- Bugfix: stdfilters didn't work because the filter was never enabled (wrong number of bits to shift)
- Bugfix: Filters were never used because the configuration register cannot be written without using the initialization mode
Both bugs are fixed by this patch. Filtering has been tested with both standard and extended identifiers and is now working properly.
- sam_gpioread: Now the actual line level from the pin is read back. This is extremely important for Open-Drain Pins, which can be used bidirectionally
- Re-Implemented twi_reset-function and enhanced it so it can be called from inside the driver (see next point)
- Glitch-Filter: Added a configuration option to enable the twi-built-in glitch filter
- Added a "Single Master Mode": In EMC Testing the TWI-Bus got stuck because the TWI-Master detected a Multi-Master access (but there is no second master). With the option "Single Master" we detect these events and automatically trigger a twi_reset. We also do an automatic recovery if a slave got stuck (SDA stays low).
With the above changes I²C-Bus reliability in harsh environments (eg. EMC) is greatly improved.
The small change in the GPIO-Driver was necessary because otherwise you cannot read back the correct line status of Open-Drain Outputs and this is needed by the twi_reset function.
-remove a wrong comment in atmel mcan ioctl
-add ioctls to set/get bit timing in stm32l4
-add ioctl hooks to allow future management of can id filters.
This change adds the following improvements:
- Increase the allowed SPI-Frequency from 20 to 40 MHz.
- Correct and rename the "VARSELECT" option This option was included in the code as "CONFIG_SPI_VARSELECT" but nowhere defined in a Kconfig file. The patch renames it to "CONFIG_SAMV7_SPI_VARSELECT" and corrects the implementation according the datasheet of Atmel. In short, this option switches the processor from "fixed peripheral selection" (single device) to "variable peripheral selection" (multiple devices on the bus).
- Add a new Function to the interface to control the timing and delays of the chip according the ChipSelect lines. This function can control the delay between the assertion of the ChipSelect and the first bit, between the last bit and the de-assertion of the ChipSelect and between two ChipSelects. This is needed to tune the transfer according the specification of the connected devices.
- Add three "hw-features" for the SAMV7, which controls the behavior of the ChipSelect:
1. force CS inactive after transfer: this forces a (short) de-assertion of the CS after a transfer, even if more data is
available in time
2. force CS active after transfer: this forces the CS to stay active after a transfer, even if the chip runs out of data. Btw.: this is a prerequisit to make the LASTXFER bit working at all.
- escape LASTXFER: this suppresses the LASTXFER bit at the end of the next transfer. The "escape"-Flag is reset automatically.
In my fix I use the freerun count value to determine if at least one tick passed since the start of the timer and thus if the value of the oneshot counter is correct. I also tried to use the function up_timer_gettime(…) to achieve this but, at least if compiled with no optimization the problem vanishes without using the value of the function, the function call takes too long.
Another problem treated in the fix is that if the oneshot timer/counter is canceled, we only know the remaining time with a precision of USEC_PER_TICK microseconds. This means the calculated remaining time is between 0 and USEC_PER_TICK microseconds too long. To fix this I subtract one tick if the calculated remaining time is greater than one tick and otherwise set the remaining time to zero. By doing so the measured times are much more precise as without it.
This fix removes the disabling of the whole USB peripheral on suspend
interrupt. Its enough to freeze the clock instead.
When disabling the whole peripheral, the next wakeup-interrupt comes
up with an disabled clocking. The unfreeze clock has no effect, because
the master clock is disabled. This makes all registers, including the
IDR unwriteable and the IRQ falls in an endless loop blocking the whole
system.
Furthermore the disabling of the peripheral clock prevents hotplugging
or reconnecting the USB.
