sergiotarxz/nuttx
sergiotarxz/nuttx
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71 Commits

Author SHA1 Message Date
Alan Carvalho de Assis
8b3a6d1eca LPC43 SD/MMC: Correct some git definitions on SMMC control register in lpc43_sdmmc.h 2016-11-30 14:50:32 -06:00
Alan Carvalho de Assis
7dbc25b02b LPC43xx: Add timer driver; configs/bambino-200e: Add support for timer driver 2016-11-23 13:33:51 -06:00
Gregory Nutt
b0dffdc2ca Fix a number of header files with mismatched 'extern C {' and '}' 2016-11-05 07:25:05 -06:00
Vytautas Lukenskas
fd1de92016 There are some small problems in LPC43xx RS485 mode configuration. In particular: 1. UART0,2,3 do not have DTR pins (different from UART1), so, Kconfig needs to be adjusted. 2. lpc43_uart.c in RS485 mode only configures DIR pin, but doesn't enable pin output for UART0,2,3. 3. should be option to reverse DIR control pin output polarity. 4. lpc43xx/chip/lpc43_uart.h doesn't have USART3 definitions. NOTE: I didn't modified and didn't tested USART1, as it has different hardware. From Vytautas Lukenskas. 2016-09-30 08:51:49 -06:00
Vytautas Lukenskas
f222d37aa7 Extend LPC43xx EMC code to support SDRAM on a dynamic memory interface. 2016-07-19 07:11:04 -06:00
Gregory Nutt
317bf064a8 i.MX6: Clean up some initializers 2016-05-24 07:44:36 -06:00
Alexander Vasiljev
ad6f37edfa Adds definitions for the LPC4337jet100 chip. 2016-05-24 07:03:50 -06:00
Alexander Vasiljev
b43fcd6f99 LPC43xx: Add AES support. 2016-05-23 08:03:32 -06:00
Gregory Nutt
b8ee28cb57 lpc4357fet256_pinconfig.h has wrong ethernet pins configuration (slow slew rate, somewhere inbuffer should be used). From Vytautas Lukenskas 2016-04-20 06:37:26 -06:00
Dave Marples
41b56a5f09 Enable the Ethernet for the LPC4330 and autonegotiation when the MAC is a LAN8720. 2016-02-18 19:07:33 -06:00
Gregory Nutt
6c2cd3edee Changes from review of last pull request 2016-01-15 10:55:58 -06:00
Lok Tep
6c872c3162 ssp in pin buffer fix 2015-12-07 23:13:14 +01:00
Lok Tep
fd74d0b625 spifi 2015-12-01 23:09:31 +01:00
Lok Tep
9a527ad3ed adc: timer mode 2015-12-01 14:53:52 +01:00
Lok Tep
dd4ef7b2e9 rename to offset 2015-11-25 21:07:14 +01:00
Lok Tep
70ab09976a setup out with data 
ep 5-6
fixex
 2015-11-25 21:07:00 +01:00
Lok Tep
5d689fedcf spifi regs 2015-11-17 18:02:08 +01:00
Lok Tep
1f8c0fdcdb timer base name difference 2015-11-09 14:34:59 +01:00
Lok Tep
08224b8606 after debug 2015-11-01 23:11:37 +01:00
Gregory Nutt
3acc09c056 LPC43xx: Remove unused .c file picked up in a recent merge 2015-10-01 07:18:07 -06:00
Gregory Nutt
2a6c71e850 Costmetic changes from last merge to better conform to the coding standard 2015-09-29 09:06:16 -06:00
pkolesnikov
e6ab9cc339 init hw, draft 2015-09-29 15:53:20 +02:00
Ilya Averyanov
0fea56cd8b LPC43xx: Add ehci driver. 2015-09-10 07:23:03 -06:00
Ilya Averyanov
a3bc46f629 LPC43xx: Add Ethernet support. From Ilya Averyanov 2015-09-02 09:01:41 -06:00
Ilya Averyanov
8c52786395 LPC43xx: Fix missing #define in eeprom. From Ilya Averyanov 2015-09-01 08:08:09 -06:00
Sebastien Lorquet
7f7082f938 Extend STM32 Ethernet operating frequency to 180MHz: 
-Extend frequency range options to 180 MHz for STM32 ETH_MACMIIA_CR
-Fix a typo in a frequency range option in LPC43
-Only configure the PPS GPIO if the PTP protocol is enabled

From Sebastien Lorquet
 2015-07-17 07:44:12 -06:00
Alessandro Temil
d4cd35af5f More changes to LPC3450 pin configuration: The hardware ETM pins will not toggle unless the SLEW FAST bit is set. From Alessandro Temil. 2015-07-09 13:36:22 -06:00
Alessandro Temil
d687bedf36 Correct some LPC4350 GPIO pin configurations. From Alessandro Temil 2015-07-09 12:09:00 -06:00
Gregory Nutt
29136e51cc Clean up and review of header files for conformance to standards 2015-06-12 19:26:01 -06:00
Gregory Nutt
7bd3d5eaf1 Clean up and review of header files for conformance to standards 2015-06-12 19:00:52 -06:00
Gregory Nutt
d78464404a Get USART 2 & 3 working on lpc4357-evb. These changes are required to get USART 2 and 3 working on the Embest development board. From Toby Duckworth 2015-01-26 07:33:22 -06:00
Gregory Nutt
4f22093bfa Initial support for the LPC4357-EVB provided by Toby Duckworth 2014-11-26 15:18:24 -06:00
Gregory Nutt
cc0a5d6004 Update to the LPC43xx RIT/Tickless code. From Brandon Warhurst 2014-10-23 07:14:37 -06:00
Gregory Nutt
c10f826ae3 Add support for tickless operation using the NXP LPC43xx 2014-10-23 06:54:24 -06:00
Gregory Nutt
23db8a44c3 Fixe to allow compile of lpc43_gpioint.c. It likely doesn't work. From Brandon warhurst_002 2014-10-21 06:36:27 -06:00
Gregory Nutt
25d4ff745b More trailing whilespace removal 2014-04-13 16:22:22 -06:00
patacongo
36df84c843 Email address change in nuttx/ 
git-svn-id: svn://svn.code.sf.net/p/nuttx/code/trunk@5145 42af7a65-404d-4744-a932-0658087f49c3
 2012-09-13 18:32:24 +00:00
patacongo
de34678cb0 Combine cfset[o|i]speed to cfsetspeed; combine cfget[o|i]speed for cfgetspeed 
git-svn-id: svn://svn.code.sf.net/p/nuttx/code/trunk@4975 42af7a65-404d-4744-a932-0658087f49c3
 2012-07-24 22:56:36 +00:00
patacongo
bbfddf5ad6 LP43xx SPIFI MTD driver update 
git-svn-id: svn://svn.code.sf.net/p/nuttx/code/trunk@4971 42af7a65-404d-4744-a932-0658087f49c3
 2012-07-23 20:08:56 +00:00
patacongo
5a627bbbc2 Update driver to work with and external SPIFI library (vs. ROM) 
git-svn-id: svn://svn.code.sf.net/p/nuttx/code/trunk@4952 42af7a65-404d-4744-a932-0658087f49c3
 2012-07-18 21:04:15 +00:00
patacongo
5329acdad6 Create an MTD driver for SPIFI 
git-svn-id: svn://svn.code.sf.net/p/nuttx/code/trunk@4951 42af7a65-404d-4744-a932-0658087f49c3
 2012-07-18 18:38:49 +00:00
patacongo
4a7999b0b7 Add logic to initialize the LPC43xx SPIFI device 
git-svn-id: svn://svn.code.sf.net/p/nuttx/code/trunk@4949 42af7a65-404d-4744-a932-0658087f49c3
 2012-07-17 20:02:57 +00:00
patacongo
4e99b594a4 Fix LPC43xx clocking bugs; LPC43xx now runs at 204MHz 
git-svn-id: svn://svn.code.sf.net/p/nuttx/code/trunk@4946 42af7a65-404d-4744-a932-0658087f49c3
 2012-07-16 21:25:29 +00:00
patacongo
6466d1c7be Finishes LPC43xx uart bard configuration; LPC43 is ready to begin testing 
git-svn-id: svn://svn.code.sf.net/p/nuttx/code/trunk@4918 42af7a65-404d-4744-a932-0658087f49c3
 2012-07-07 17:36:31 +00:00
patacongo
27f833729a Straighten out LPC32 UART clocking (still some baud calculation issues) 
git-svn-id: svn://svn.code.sf.net/p/nuttx/code/trunk@4917 42af7a65-404d-4744-a932-0658087f49c3
 2012-07-07 15:29:13 +00:00
patacongo
af8400bba9 Add LPC43 pin configuration logic 
git-svn-id: svn://svn.code.sf.net/p/nuttx/code/trunk@4914 42af7a65-404d-4744-a932-0658087f49c3
 2012-07-06 18:39:04 +00:00
patacongo
6a539b0a93 Add LPC43 GPIO interrupt configurtion logic 
git-svn-id: svn://svn.code.sf.net/p/nuttx/code/trunk@4913 42af7a65-404d-4744-a932-0658087f49c3
 2012-07-06 17:04:08 +00:00
patacongo
53bb15a078 Add LPC43 clock initialization logic 
git-svn-id: svn://svn.code.sf.net/p/nuttx/code/trunk@4910 42af7a65-404d-4744-a932-0658087f49c3
 2012-07-05 22:38:12 +00:00
patacongo
774cc1dcfc More LPC43 files in various states of work 
git-svn-id: svn://svn.code.sf.net/p/nuttx/code/trunk@4909 42af7a65-404d-4744-a932-0658087f49c3
 2012-07-05 14:58:16 +00:00
patacongo
b0cc2306ad Progress of LPC43xx build environment 
git-svn-id: svn://svn.code.sf.net/p/nuttx/code/trunk@4904 42af7a65-404d-4744-a932-0658087f49c3
 2012-07-04 17:59:16 +00:00