Commit Graph

15594 Commits

Author SHA1 Message Date
wanggang26
7f5e6bd383 hostfs: mask bit fields of not support
Signed-off-by: wanggang26 <wanggang26@xiaomi.com>
2023-09-23 05:28:57 +09:00
raiden00pl
8833501084 arch/stm32h7/dualcore: don't use stm32_hsem interface for cores synchronisation
stm32_hsem functions can use debug messages but cores synchronisation is done when
the OS is not yet fully initialized
2023-09-22 19:46:26 +08:00
raiden00pl
0e01836f09 serial: add an option that selects uart rpmsg as console 2023-09-22 19:46:26 +08:00
wanggang26
e930476b4b enable O_CLOEXEC explicit
Signed-off-by: wanggang26 <wanggang26@xiaomi.com>
2023-09-22 13:51:00 +08:00
simbit18
4f985f4367 Fix Kconfig style
Remove spaces from Kconfig
Add comments
2023-09-22 00:35:48 +08:00
raiden00pl
4c9c0c8be2 debug: add support for IPC (interprocessor communication) debug messages 2023-09-22 00:02:51 +08:00
simbit18
34bb0b6544 Fix nuttx coding style
Remove TABs
Remove spaces
Fix indentation
2023-09-21 10:03:13 -04:00
raiden00pl
dafa4e4413 arch/nrf{52|53|91}/serial: fix serial registration when ther is no console on serial 2023-09-21 20:31:03 +08:00
raiden00pl
f0155b9099 arch/nrf{52|53|91}/serial: fix warning if HAVE_UART_CONSOLE not defined
warning: control reaches end of non-void function [-Wreturn-type]
2023-09-21 20:31:03 +08:00
raiden00pl
3e79d21100 arch/arm: fix undefined reference to arm_serialinit when RTT console used 2023-09-21 20:30:27 +08:00
TimJTi
b406a30398 Fix historic %08x style printf format warnings 2023-09-21 09:04:07 +08:00
TimJTi
42093bbd54 Fix printf format warnings 2023-09-21 09:03:47 +08:00
ThomasNS
a2c806027f fix led panic feature 2023-09-21 00:35:12 +08:00
Michal Lenc
c5209e6189 samv7: add support for one wire driver over UART/USART
This commit adds support for 1 wire interface over serial driver. SAMv7
MCU does not have build in one wire support therefore external hardware
still has to be used (connection of RX/TX for example).

Signed-off-by: Michal Lenc <michallenc@seznam.cz>
2023-09-20 17:27:26 +08:00
Michal Lenc
2e08750daf samv7: rework U(S)ART config option to allow more driver configurations
UART/USART peripheral can be used for more than just standard serial
driver. It can for example be used for 1 wire interface communication
(with external circuitry added). This changes the Kconfig for SAMv7 to
allow future implementation of these drivers. Now user can select
what kind of a driver he wants on UART/USART (serial or something else).

Signed-off-by: Michal Lenc <michallenc@seznam.cz>
2023-09-20 17:27:26 +08:00
SPRESENSE
104dfb983d arch: cxd56xx: Return error for RTC alarm setting before initialization
Return EBUSY error for alarm setting before completion of RTC initialization.
2023-09-20 11:50:07 +03:00
xiao
1487aa267e add Artery at32
check nxstyle

check nxstyle
2023-09-20 02:07:55 +08:00
Simon Filgis
8853e72502 add phy bordinit functionality
on boardlevel one can do reset, cable-check, diagnostics, check link
quality and more on every link up
2023-09-19 02:41:55 +08:00
chao an
5026a96cfa nxstyle: cleanup UTF-8 Unicode to ASCII
Signed-off-by: chao an <anchao@xiaomi.com>
2023-09-18 11:54:17 -04:00
Xiang Xiao
8dbe86084e Remove FAR from source code under 32bit arch and board
Signed-off-by: Xiang Xiao <xiaoxiang@xiaomi.com>
2023-09-16 19:12:13 +03:00
chao an
9f049b47bf backtrace/unwind: add more unwind instruction support
Signed-off-by: chao an <anchao@xiaomi.com>
2023-09-16 19:51:17 +08:00
chao an
b52070a70e unwinder: fix unwind abort for uleb128 case
When unwind instruction is 0xb2,the subsequent instructions
are uleb128 bytes.
For now,it uses only the first uleb128 byte in code.

For vsp increments of 0x204~0x400,use one uleb128 byte like below:
0xc06a00e4 <unwind_test_work>: 0x80b27fac
  Compact model index: 0
  0xb2 0x7f vsp = vsp + 1024
  0xac      pop {r4, r5, r6, r7, r8, r14}

For vsp increments larger than 0x400,use two uleb128 bytes like below:
0xc06a00e4 <unwind_test_work>: @0xc0cc9e0c
  Compact model index: 1
  0xb2 0x81 0x01 vsp = vsp + 1032
  0xac      pop {r4, r5, r6, r7, r8, r14}
The unwind works well since the decoded uleb128 byte is also 0x81.

For vsp increments larger than 0x600,use two uleb128 bytes like below:
0xc06a00e4 <unwind_test_work>: @0xc0cc9e0c
  Compact model index: 1
  0xb2 0x81 0x02 vsp = vsp + 1544
  0xac      pop {r4, r5, r6, r7, r8, r14}
In this case,the decoded uleb128 result is 0x101(vsp=0x204+(0x101<<2)).
While the uleb128 used in code is 0x81(vsp=0x204+(0x81<<2)).
The unwind aborts at this frame since it gets incorrect vsp.

To fix this, add uleb128 decode to cover all the above case.

Signed-off-by: chao an <anchao@xiaomi.com>
2023-09-16 19:51:17 +08:00
Petro Karashchenko
69b6a1f09c arch/arm[64]: fix nxstyle issues
Signed-off-by: Petro Karashchenko <petro.karashchenko@gmail.com>
2023-09-16 14:17:47 +08:00
Petro Karashchenko
dbc37a0165 nuttx: fix nxstyle issues
Signed-off-by: Petro Karashchenko <petro.karashchenko@gmail.com>
2023-09-16 14:17:47 +08:00
Petro Karashchenko
88c1a55efd arch/arm/samv7: fix print specifiers issues
Signed-off-by: Petro Karashchenko <petro.karashchenko@gmail.com>
2023-09-16 14:17:47 +08:00
Petro Karashchenko
afaa2028f6 arch/arm/sama5: populate MCAN fixes from SAMv7 to SAMa5
Signed-off-by: Petro Karashchenko <petro.karashchenko@gmail.com>
2023-09-16 14:17:47 +08:00
Petro Karashchenko
816cb3cfaf style: fix multiple style issues and remove unused
Signed-off-by: Petro Karashchenko <petro.karashchenko@gmail.com>
2023-09-16 14:17:47 +08:00
Peter van der Perk
0d4b42255b s32k3: emac use semi-unique MAC address 2023-09-14 20:54:21 +08:00
simbit18
b3973496cd Fix Kconfig style
Remove spaces from Kconfig
Add comments
2023-09-13 21:39:49 +08:00
wangming9
72cf51faf3 arm/psci: Fixed arm psci related compilation errors
Summary
include/arch/syscall.h: Assembler messages:
include/arch/syscall.h:133: Error: bad instruction `struct arm_smccc_res'
include/arch/syscall.h:134: Error: junk at end of line, first unrecognized character is `{'
include/arch/syscall.h:135: Error: bad instruction `unsigned long a0'
include/arch/syscall.h:136: Error: bad instruction `unsigned long a1'
include/arch/syscall.h:137: Error: bad instruction `unsigned long a2'
include/arch/syscall.h:138: Error: bad instruction `unsigned long a3'
include/arch/syscall.h:139: Error: bad instruction `unsigned long a4'
include/arch/syscall.h:140: Error: bad instruction `unsigned long a5'
include/arch/syscall.h:141: Error: bad instruction `unsigned long a6'
include/arch/syscall.h:142: Error: bad instruction `unsigned long a7'
include/arch/syscall.h:143: Error: junk at end of line, first unrecognized character is `}'
include/arch/syscall.h:145: Error: bad instruction `typedef struct arm_smccc_res

Signed-off-by: wangming9 <wangming9@xiaomi.com>
2023-09-13 21:06:51 +08:00
Shanmin Zhang
b9fb9bea1d arm: support reboot / poweroff for qemu virt arm
Signed-off-by: Shanmin Zhang <zhangshanmin@xiaomi.com>
2023-09-12 21:57:13 +08:00
daniellizewski
a75b3bad15 Fixed typo in CRC define 2023-09-12 00:41:59 +08:00
Pavel Pisa
b9472129c8 arch/arm/samv7: fix typos in quadrature encoder and timer drivers
The typo s/.timid/.tcid prevents to compile NuttX with
quadrature encoder configured for timer1 (CONFIG_SAMV7_TC1_QE)
and s/SAM_TC789_BASE/SAM_TC678_BASE prevented use of the
of the timer 2.

Signed-off-by: Pavel Pisa <ppisa@pikron.com>
2023-09-11 23:11:43 +08:00
hujun5
70a67099b3 timer/trustzone: set CPU frequency in tee environment
In an implementation that supports the ARM Security Extensions, only
software executing in a Secure PL1 mode can write to CNTFRQ

Signed-off-by: hujun5 <hujun5@xiaomi.com>
2023-09-10 23:10:06 +08:00
liaoao
d63e3962bf qemu:fdt:add device tree support for goldfish arm/arm64
Signed-off-by: liaoao <liaoao@xiaomi.com>
2023-09-10 23:10:06 +08:00
wangming9
c8a4bdf21a arch/arm: GoldFish Platform support
Summary:
    Adding virtual evaluate platform GoldFish. Which is based on
    Android Goldfish Emulator, it's a ARM virt board but Android
    enhance it with more featue.
    The patch set goldfish as a arm chip.

Signed-off-by: wangming9 <wangming9@xiaomi.com>
2023-09-10 23:10:06 +08:00
liaoao
78c942a05a devicetree: add devicetree support for arm/arm64
Signed-off-by: liaoao <liaoao@xiaomi.com>
2023-09-10 14:28:41 +03:00
hujun5
90fba56d2e timer/trustzone: set CPU frequency in tee environment
In an implementation that supports the ARM Security Extensions, only
software executing in a Secure PL1 mode can write to CNTFRQ

Signed-off-by: hujun5 <hujun5@xiaomi.com>
2023-09-10 14:28:41 +03:00
hujun5
d9cbf84d86 arm/oneshot: rm sched_[un]lock
Signed-off-by: hujun5 <hujun5@xiaomi.com>
2023-09-09 20:26:32 +08:00
hujun5
0b23a316ca sam_hsmci: rm sched_[un]lock
Signed-off-by: hujun5 <hujun5@xiaomi.com>
2023-09-09 00:21:29 +08:00
Michal Lenc
6d0151c8da sam_usbdevhs.c: fix compile warning
chip/sam_usbdevhs.c:2474:11: warning: 'response' may be used uninitialized [-Wmaybe-uninitialized]
 2474 |           sam_ctrlep_write(ep0, response.b, nbytes);
      |           ^~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
chip/sam_usbdevhs.c:1845:13: note: by argument 2 of type 'const uint8_t *' {aka 'const unsigned char *'} to 'sam_ctrlep_write' declared here
 1845 | static void sam_ctrlep_write(struct sam_ep_s *privep, const uint8_t *buffer,
      |             ^~~~~~~~~~~~~~~~
chip/sam_usbdevhs.c:2001:24: note: 'response' declared here
 2001 |   union wb_u           response;
      |                        ^~~~~~~~

Signed-off-by: Michal Lenc <michallenc@seznam.cz>
2023-09-08 15:56:52 +03:00
Petro Karashchenko
f39de6fd1a arch/arm/armv[7|8]-m: implement dcache clean as barrier in write-through mode
This change fixes the issue when SAMv7 GMAC sometimes does not start packet
transmission. The issue is that EMAC_NCR_TSTART is written to EMAC_NCR register
while tx descriptor is not delivered to memory.

Signed-off-by: Petro Karashchenko <petro.karashchenko@gmail.com>
2023-09-08 11:54:04 +08:00
hujun5
83ba72e4b4 cxd56xx: rm sched_[un]lock
According to the current implementation, "cxd56_cpu1siguninit" will only
be called once during the NuttX startup phase,
and it won't involve scenarios of multi-threaded concurrent access.

Signed-off-by: hujun5 <hujun5@xiaomi.com>
2023-09-08 01:47:40 +08:00
Michal Lenc
c2bc3dfb12 samv7: add support for SD card detection from CD/DAT3 line
Some SD card connectors do not have separate card detection pin. In that
case card detection has to be done on CD/DAT3 data line. This means
software (i.e. architecture level driver) has to take care of pin
configuration switching (pin has to be set as data pin in case of
transfer and as interrupt card detection pin when there is no action
on data line).

This commit adds CD/DAT3 line card detection support for SAMv7 MCU.

Signed-off-by: Michal Lenc <michallenc@seznam.cz>
2023-09-08 01:13:36 +08:00
Xu Xingliang
a2df576ecf kasan: add option to disable read/write checks
Signed-off-by: Xu Xingliang <xuxingliang@xiaomi.com>
2023-09-07 00:41:43 +08:00
Philippe Leduc
87cec56154 Handle GPIO IRQs
Add board buttons
2023-09-06 12:30:35 +08:00
Philippe Leduc
5b7c948aef Add GPIO
Add userleds
2023-09-06 12:30:35 +08:00
Jakub Zdroik
96a2196beb fix argument of nxsem_wait_uninterruptible 2023-09-04 23:20:32 +08:00
simbit18
a642b7a54f Fix Kconfig style
Remove extra TABs
Add comments
2023-08-31 18:08:22 +03:00
Philippe Leduc
98e998b934 Add i2c support for the i.MX8MP
Enable INA219 on the Verdin board
2023-08-31 10:35:46 -03:00
chao an
664927c86e mm/alloc: remove all unnecessary cast for alloc
Fix the minor style issue and remove unnecessary cast

Signed-off-by: chao an <anchao@xiaomi.com>
2023-08-30 14:34:20 +08:00
chao an
b60f01a55b inode/i_private: remove all unnecessary cast for i_private
Signed-off-by: chao an <anchao@xiaomi.com>
2023-08-29 08:58:07 +02:00
chao an
7aa45305b7 fs/inode: remove all unnecessary check for filep/inode
Since VFS layer already contains sanity checks, so remove unnecessary lower half checks

Signed-off-by: chao an <anchao@xiaomi.com>
2023-08-29 09:47:11 +08:00
Michal Lenc
03e5c0217b samv7: allow usage of QSPI in SPI mode for all MCUs
Current implementation of QSPI in SPI mode was available only for MCUs
that do not have standard SPI at all. MCUs with both QSPI and SPI can
however also use QSPI in SPI mode and thus have one more SPI bus. This
commit adds required defines and config options to support QSPI in SPI
mode for all SAMv7 MCUs.

Signed-off-by: Michal Lenc <michallenc@seznam.cz>
2023-08-28 17:39:51 +03:00
raiden00pl
2fffd7dad6 arch/stm32h7: add RPTUN support 2023-08-26 03:35:32 +08:00
raiden00pl
a6c25f657d arch/stm32h7: add CM4 core support 2023-08-26 03:35:32 +08:00
raiden00pl
86134461f3 arch/stm32h7: use STM32_CPUCLK_FREQUENCY to initialize perf 2023-08-26 03:35:32 +08:00
raiden00pl
4c358419f0 arch/stm32h7: add an option to bypass clock configuration 2023-08-26 03:35:32 +08:00
raiden00pl
5ddded5561 arch/stm32h7/rcc: default value for BOARD_FLASH_PROGDELAY 2023-08-26 03:35:32 +08:00
raiden00pl
4c9d405a97 arch/stm32h7: add HSEM support 2023-08-26 03:35:32 +08:00
chao an
563125fde3 make/archive: Use the full path name when matching or storing names in the archive
This pr will avoid targets with the same name can not be archive in the same library

Signed-off-by: chao an <anchao@xiaomi.com>
2023-08-26 01:21:10 +08:00
SPRESENSE
6d44c42707 arch/arm/src/cxd56xx: Fix file path on top comment
Fix file path described in top comment for each files.
2023-08-26 01:20:32 +08:00
SPRESENSE
f7400a857d drivers/audio/cxd56: Move cxd56 sources into arch/cxd56xx
CXD56 audio functions are inside of the CXD56.
So implementation of it should be under arch directory.
2023-08-26 01:20:32 +08:00
Michal Lenc
606b6d9310 samv7: add support for PWM polarity settings
This commit adds function pwm_set_polarity() that setups channel
polarity based on input info from application layer.

Signed-off-by: Michal Lenc <michallenc@seznam.cz>
2023-08-24 18:25:47 -03:00
Philippe Leduc
e084c52e12 Add i.MX8MP Cortex-M7 port for NuttX 2023-08-24 20:10:48 +08:00
raiden00pl
c3f8753ecd Documentation: migrate STM32L4 2023-08-24 17:56:39 +08:00
chao an
ba2601deb6 Toolchain: strict GCC version check from GCC-12.2 to GCC-12
Toolchain related detection errors are still not resolved on GCC-12.3

Signed-off-by: chao an <anchao@xiaomi.com>
2023-08-23 23:52:17 +08:00
Tia
fc8848ec18 Fix bugs related to software flow control in file stm32_hciuart.c. 2023-08-23 23:23:42 +08:00
raiden00pl
7b82a1ac9c armv7-m/mpu.h: add macro to configure shared memory region 2023-08-22 23:34:57 +08:00
raiden00pl
3da199c71d armv8-m/mpu.h: add macro to configure shared memory region 2023-08-22 23:34:57 +08:00
cuiziwei
1a8027d625 nuttx/arch:add -Wno-psabi to Toolchain.defs
Signed-off-by: cuiziwei <cuiziwei@xiaomi.com>
2023-08-22 01:33:30 +08:00
raiden00pl
d31402bf3c arch/{stm32|stm32f7}/stm32_mpuinit.h: cosmetics 2023-08-21 19:22:52 +08:00
raiden00pl
78c88b5e78 arch/nrf53: FLASH cache only for netcore, disable by default as it breaks rptun
After sevaral resets of the chip after programming, rptun stops working correctly.
Simple test with RPMSG UART causes a lock:

  on the netcore:
    nsh>cat /dev/ttyproxy

  on the appcore:
    nsh>echo xxx > /dev/ttyproxy

The problem doesn't occur with NRF53_FLASH_PREFETCH=n
2023-08-21 17:34:36 +08:00
raiden00pl
187a067866 arch/nrf53/rptun: remove dependency on DEV_SIMPLE_ADDRENV 2023-08-21 17:34:36 +08:00
raiden00pl
45a542cb14 arch/nrf53: move SPU configuration to a separate file 2023-08-21 17:34:36 +08:00
raiden00pl
8ebc0dc9e8 cmake: port 99b0bad94e arch/armv8-m: DSP extension is optional 2023-08-21 17:34:36 +08:00
liaoao
9231dbe716 cpuinfo:armv6: select ARCH_HAVE_CPUINFO by default
Signed-off-by: liaoao <liaoao@xiaomi.com>
2023-08-21 17:33:50 +08:00
hujun5
f1b6cf78da arch/arm: add CONFIG_ARCH_TRUSTZONE_SECURE to some code
Signed-off-by: hujun5 <hujun5@xiaomi.com>
2023-08-21 00:06:25 +08:00
hujun5
a96c6f1abf arch/arm: Add the secure handling to gic
Signed-off-by: hujun5 <hujun5@xiaomi.com>
2023-08-21 00:06:25 +08:00
Xiang Xiao
7bb563dfe9 arch/arm: Remove CONFIG_ARCH_TRUSTZONE_BOTH related stuff
represent tee by CONFIG_ARCH_TRUSTZONE_SECURE instead

Signed-off-by: Xiang Xiao <xiaoxiang@xiaomi.com>
Signed-off-by: hujun5 <hujun5@xiaomi.com>
2023-08-21 00:06:25 +08:00
raiden00pl
e8be4d0000 arch/nrf91: remove empty nrf91_modem_sock.h 2023-08-20 22:53:38 +08:00
raiden00pl
b927cf68c6 arch/nrf91: add missing include guards 2023-08-20 22:53:38 +08:00
huangkai8
8f297f79d8 Avoid hard fault when reading vectors in text section. 2023-08-20 14:35:05 +03:00
Xiang Xiao
7f32eaa13e arm/qemu: Remove qemu_net.c which isn't needed anymore
after the follow patch:
commit 9aa57b6c53
Author: wangbowen6 <wangbowen6@xiaomi.com>
Date:   Wed Mar 22 11:49:43 2023 +0800

    virtio: add virtio framework in NuttX

    1. virtio devics/drivers match and probe/remote mechanism;
    2. virtio mmio transport layer based on OpenAmp (Compatible with both
       virtio mmio version 1 and 2);
    3. virtio-serial driver based on new virtio framework;
    4. virtio-rng driver based on new virtio framework;
    5. virtio-net driver based on new virtio framework
       (IOB Offload implementation);
    6. virtio-blk driver based on new virtio framework;
    7. Remove the old virtio mmio framework, the old framework only
       support mmio transport layer, and the new framwork support
       more transport layer and this commit has implemented all the
       old virtio drivers;
    8. Refresh the the qemu-arm64 and qemu-riscv virtio related
       configs, and update its README.txt;

    New virtio-net driver has better performance
    Compared with previous virtio-mmio-net:
    |                        | master/-c | master/-s | this/-c | this/-s |
    | :--------------------: | :-------: | :-------: | :-----: | :-----: |
    | qemu-armv8a:netnsh     |  539Mbps  |  524Mbps  | 906Mbps | 715Mbps |
    | qemu-armv8a:netnsh_smp |  401Mbps  |  437Mbps  | 583Mbps | 505Mbps |
    | rv-virt:netnsh         |  487Mbps  |  512Mbps  | 760Mbps | 634Mbps |
    | rv-virt:netnsh_smp     |  387Mbps  |  455Mbps  | 447Mbps | 502Mbps |
    | rv-virt:netnsh64       |  602Mbps  |  595Mbps  | 881Mbps | 769Mbps |
    | rv-virt:netnsh64_smp   |  414Mbps  |  515Mbps  | 491Mbps | 525Mbps |
    | rv-virt:knetnsh64      |  515Mbps  |  457Mbps  | 606Mbps | 540Mbps |
    | rv-virt:knetnsh64_smp  |  308Mbps  |  389Mbps  | 415Mbps | 474Mbps |
    Note: Both CONFIG_IOB_NBUFFERS=64, using iperf command, all in Mbits/sec
          Tested in QEMU 7.2.2

    Signed-off-by: wangbowen6 <wangbowen6@xiaomi.com>
    Signed-off-by: Zhe Weng <wengzhe@xiaomi.com>

Signed-off-by: Xiang Xiao <xiaoxiang@xiaomi.com>
2023-08-20 14:33:17 +03:00
Petro Karashchenko
075738cf14 net/ip: print ip addresses using ip4_addrN macro
Signed-off-by: Petro Karashchenko <petro.karashchenko@gmail.com>
2023-08-19 13:28:21 -03:00
chenrun1
709301cbfd hostfs:support SEEK_CUR
Signed-off-by: chenrun1 <chenrun1@xiaomi.com>
2023-08-19 01:48:48 +08:00
liaoao
c31e869fac cpuinfo: show cpufreq when hardware perfermance counting enabled
Signed-off-by: liaoao <liaoao@xiaomi.com>
2023-08-19 01:40:10 +08:00
simbit18
70ab01a20b Fix Kconfig style
Replace help => ---help---
Remove spaces from Kconfig
Add comments
2023-08-18 16:36:04 +03:00
yanghuatao
aa34885c8b arch/arm: Fix arm_backtrace_unwind.c -Wmaybe-uninitialized and -Wint-conversion warning on n606
(1)common/arm_backtrace_unwind.c:528:18: warning: 'ctrl.lr_addr' may be used uninitialized in this function [-Wmaybe-uninitialized]
(2)common/arm_backtrace_unwind.c:626:27: warning: assignment to 'long unsigned int' from 'uint8_t (*)[]' {aka 'unsigned char (*)[]'} makes integer from pointer without a cast [-Wint-conversion]

Signed-off-by: yanghuatao <yanghuatao@xiaomi.com>
2023-08-18 12:20:21 +08:00
Ryan MacDonald
074cf51268 Fix: s32k1 s32k3 kinetis: add propseg to ctrl1 timing mask 2023-08-16 10:09:40 +03:00
wangming9
e953715e6d arch/arm: add qemu support for ARM32
Signed-off-by: wangming9 <wangming9@xiaomi.com>
2023-08-15 23:56:41 +08:00
yinshengkai
88f3bc77f1 toolchain: detect use of large stack variables
partition/fs_gpt.c:384:5: warning: stack usage might be 288 bytes [-Wstack-usage=]
  384 | int parse_gpt_partition(FAR struct partition_state_s *state,

Signed-off-by: yinshengkai <yinshengkai@xiaomi.com>
2023-08-15 14:50:27 +03:00
Xiang Xiao
14563aa48c arch/armv7r: Sync gic/timer with armv7-a and armv8-a
Signed-off-by: Xiang Xiao <xiaoxiang@xiaomi.com>
2023-08-14 14:51:01 -03:00
Xiang Xiao
e4dea90725 arch/armv7-a: Update the macro definition in gic.h
https://developer.arm.com/documentation/ihi0048/b

Signed-off-by: Xiang Xiao <xiaoxiang@xiaomi.com>
2023-08-14 14:51:01 -03:00
raiden00pl
89174e6a1a arch/stm32h7: use correct name for bit 2 in STM32_PWR_CR3 register 2023-08-14 23:42:37 +08:00
David Sidrane
60840f1ed2 imxrt:Serial Preserve all but W1C bit in SR
SR contains configuration bits that need to be preserved.
2023-08-14 18:23:59 +03:00
raiden00pl
b73e1b9591 arch/{nrf52|nrf53|nrf91}: handle I2C errors in interrupt mode 2023-08-14 17:51:48 +08:00
raiden00pl
5572552024 arch/nrf53: port 6e8f25ba3b change from nrf52
Added config setting for NRF53 I2C timing bug workaround
2023-08-13 11:45:06 -03:00
raiden00pl
eec59015f0 arch/{nrf53|nrf91}: port cc99d94cfd change from nrf52
Fixed NRF52 I2C register naming
2023-08-13 11:45:06 -03:00
raiden00pl
3a61db4c7b arch/nrf53: port d7aea88727 change from nrf52
Changed NRF53 USB initialization to check for power via USBREGSTATUS instead of waiting for interrupt
2023-08-13 11:45:06 -03:00