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Author SHA1 Message Date
Alan Carvalho de Assis
84be223144 STM32: Add function prototype to eliminate a warning. 2017-02-25 11:56:15 -06:00
Gregory Nutt
90e63ba18e Purely cosmetic changes from review of last PR. 2017-02-25 11:43:05 -06:00
David Sidrane
38df949adc Merged in david_s5/nuttx/upstream_kinetis (pull request #221) 
Kinetis:Add LPUART

Approved-by: Gregory Nutt
 2017-02-25 17:23:04 +00:00
Gregory Nutt
d77d322a61 QEncoder: Add mechanism to assure that architecture-specific IOCTL commands do not overlap. 2017-02-25 11:15:59 -06:00
David Sidrane
df01e343a7 Kinetis:Add LPUART serail device driver 2017-02-25 07:06:04 -10:00
David Sidrane
0cbc03255c Kinetis:Add LPUART and Clock configuartaion to freedom-k66f board 
Pin out LPUART0 for testing
   Define BOARD_SOPT2_PLLFLLSEL ti select MCGPLLCLK
   Define BOARD_SIM_CLKDIV3_FREQ etal to provide BOARD_LPUART0_FREQ
 2017-02-25 07:05:34 -10:00
David Sidrane
b553d34a68 Kinetis:Added configurable 1|2 stop bits 
HAVE_SERIAL_CONSOLE -> HAVE_UART_CONSOLE to bew consistent with
  HAVE_LPUART_CONSOLE naming
 2017-02-25 07:02:56 -10:00
David Sidrane
dd218ffa8c Kinetis:Extend clockconfig to support SOPT2_PLLFLLSEL and SIM_CLKDIV3 
A board.h file can now specify the:
   1) BOARD_SOPT2_PLLFLLSEL to select the output of the SIM_SOPT2 MUX
     from:
       MCGFLLCLK
       MCGPLLCLK
       USB1PFD
       IRC48MHZ

    2) If it defines BOARD_SIM_CLKDIV3_FREQ then it must define
    BOARD_SIM_CLKDIV3_PLLFLLFRAC and BOARD_SIM_CLKDIV3_PLLFLLDIV
    which wil be used to cpnfigure SIM_CLKDIV3 [PLLFLLFRAC, PLLFLLDIV]
 2017-02-25 07:02:56 -10:00
David Sidrane
86c9f97f78 Kinetis: Add LPUART as lowlevel console 2017-02-25 07:02:56 -10:00
David Sidrane
29ab603a66 Kinetis:Add LPUART for use with K66 
Add LPUART made UART5 an uption as the K66 does not have UART5
 2017-02-25 07:02:56 -10:00
David Sidrane
61b10c5e58 Kinetis:Add LPUART to K66 chip 
Add KINETIS_NLPUART setting it to 1 and adjust KINETIS_NUART
  to removed UART5 as the K66 dioes not have UART5
 2017-02-25 07:02:56 -10:00
David Sidrane
f6fe9beeb3 Kinetis:Add LPUART to config 2017-02-25 07:02:56 -10:00
David Sidrane
b280aef9c0 Kinetis:Add LPUART register definitions 2017-02-25 07:02:38 -10:00
David Sidrane
9061a3fb64 Kinetis: UART add UART_BDH_SBNS definition 2017-02-25 07:02:38 -10:00
Gregory Nutt
de0e2ec261 STM32: Remove one residual use of the obsoleted STM32_TIM27_FREQUENCY definition which does not work for all STM32 family members. 2017-02-25 10:04:28 -06:00
Gregory Nutt
4c6b635298 Fix error in previous commit. 2017-02-25 09:39:33 -06:00
Gregory Nutt
c694ca0ebc Enable clocking to the timer on QE setup; disable clock on QE teardown. 2017-02-25 09:26:11 -06:00
Alan Carvalho de Assis
37298504e6 Fix QEncoder driver, based on STM32L4 driver 2017-02-24 16:10:28 -06:00
Gregory Nutt
8ee2e8d8b0 Most Ethernet drviers: Check if the poll timer is running before restarting it at the end of each TX. 2017-02-24 15:58:17 -06:00
Gregory Nutt
12a4a58aa6 Update some wdog-related comments 2017-02-24 10:58:37 -06:00
Gregory Nutt
dca77fa06a sigtimedwait: When timer expires, up_unblock_task() is called. This is okay in the single CPU case because interrupts are disable in the timer interrupt handler. But it is insufficient in the SMP case. enter_ and leave_critical_section() must be called in order to manage spinlocks correctly. 2017-02-24 10:07:23 -06:00
Gregory Nutt
e08660c335 Merge branch 'master' of bitbucket.org:nuttx/nuttx 2017-02-24 07:10:59 -06:00
Alan Carvalho de Assis
7a12cc3e56 STM32F4 Discovery: Update stm32f4discovery README.txt to instruct how to use QE 2017-02-24 07:10:07 -06:00
Alan Carvalho de Assis
8ca41b2d7a STM32F4 Discovery: Fix issues with QEncoder support 2017-02-24 07:04:58 -06:00
Marc Rechté
c4134e0181 Merged in mrechte/nuttx-twrk64 (pull request #220) 
kinetis_enet.c add #define for number of loops for auto negotiation to complete

Approved-by: Gregory Nutt
 2017-02-24 12:57:16 +00:00
Marc Rechte
579360e77d Merge branch 'master' of https://bitbucket.org/mrechte/nuttx-twrk64 2017-02-24 08:02:08 +01:00
Marc Rechte
c734a6283c kinetis_enet.c add #define for number of loops for auto negotiation to complete 2017-02-24 08:00:11 +01:00
Marc Rechté
d72f47a236 Merged nuttx/nuttx into master 2017-02-24 07:22:40 +01:00
David Sidrane
a43554decd Kinetis:SIM add paramiterized SIM_CLKDIVx_xxFRAC|DIV macros 
The makes for cleaner board definitions like:

   Divider output clock = Divider input clock * ((PLLFLLFRAC+1)/(PLLFLLDIV+1))
       SIM_CLKDIV3_FREQ = BOARD_SOPT2_FREQ × [ (PLLFLLFRAC+1) / (PLLFLLDIV+1)]
                 90 Mhz = 180 Mhz X [(0 + 1) / (1 + 1)]
    #define BOARD_SIM_CLKDIV3_PLLFLLFRAC  1
    #define BOARD_SIM_CLKDIV3_PLLFLLDIV   2
    #define BOARD_SIM_CLKDIV3_FREQ        (BOARD_SOPT2_FREQ * (BOARD_SIM_CLKDIV3_PLLFLLFRAC / BOARD_SIM_CLKDIV3_PLLFLLDIV))
 2017-02-23 19:27:55 -10:00
David Sidrane
e1278c0cb9 Kinetis:Fix typo in comment 2017-02-23 19:25:53 -10:00
Gregory Nutt
bd538d22be twr-k64f120m: refresh configurations. DEBUG must be disabled in all base configurations. CONFIG_APPS_DIR must must be defined in defconfig files. 2017-02-23 16:10:31 -06:00
Maciej Wójcik
29b4b00068 drivers/spi/Kconfig: There is too much SPI in the configuration menu; SPI Driver Support menu is empty 2017-02-23 14:39:13 -06:00
Gregory Nutt
38ca73758d Olimex STM32 p407: Add extrnal SRAM support. Unfortunately not usable or testable unless you also disable the serial console. 2017-02-23 13:27:36 -06:00
Gregory Nutt
207b4a3c68 Update README.txt 2017-02-23 11:02:06 -06:00
Gregory Nutt
d83422a00d Update README.txt 2017-02-23 10:57:21 -06:00
Gregory Nutt
9937eed3f1 Merge branch 'master' of bitbucket.org:nuttx/nuttx 2017-02-23 10:22:25 -06:00
Gregory Nutt
402690e964 Backout the rotary configuration 2017-02-23 10:21:59 -06:00
Alan Carvalho de Assis
2b2114d819 Add support to QEncoder on STM32F103Minimum board 2017-02-23 09:31:28 -06:00
David Sidrane
30fafd5f07 Merged in david_s5/nuttx/upstream_kinetis (pull request #219) 
Upstream kinetis SIM, PMC

Approved-by: Gregory Nutt
 2017-02-22 20:51:34 +00:00
David Sidrane
41e3d9f174 Kinetis:Refactor you use SIM_SOPT2_PLLFLLSEL, added warning 
The warning has been added because: SIM_SOPT2_PLLFLLSEL
  is a clock selection that may feed many clock subsystem:
   USB, TPM, SDHCSRC, LPUARTSRC. Therefore, there needs to
  be a global board level setting to select  the source for
  SIM_SOPT2_PLLFLLSEL and then  derive all the  sub selections
  and proper fractions/divisors for each modules clock.
 2017-02-22 10:42:52 -10:00
David Sidrane
12c24f2644 Kinetis:kinetis_clockconfig uses the correct ACKISO 
ACKISO is located in the PMC_REGSC on the majority
   of the Kinetis SoCs. With the exception of the
   MK40DXxxxZVLQ10 where ACKISO is located in LLWU_CS
 2017-02-22 10:42:52 -10:00
David Sidrane
1324b8c00a Kinetis:Resolves issues where Freescale moved ACKISO 
ACKISO is located in the PMC_REGSC on the majority
  of the Kinetis SoCs. With the exception of the
  MK40DXxxxZVLQ10 where ACKISO is located in LLWU_CS
 2017-02-22 10:42:52 -10:00
David Sidrane
a4b985f865 Kinetis:PMC defines are based on PMC feature configuration 2017-02-22 10:42:52 -10:00
David Sidrane
1ba6eadcec Kinetis:Include the PMC features 2017-02-22 10:42:52 -10:00
David Sidrane
8525c266a1 Created a kinetis PMC versioning scheme pulled in by Kinetis chip.h 
The motvations is to version the IP blocks of the Kinetis
     K series family of parts.

     This added versioning and configuration features for the
     Kinetis PMC IP block.

     It is envisioned that in the long term as a chip is added.
     The author of the new chip definitions will either find
     the exact configuration in an existing chip define and
     add the new chip to it Or add the PMC fature configuration
     #defines to the chip ifdef list in
     arch/arm/include/kinetis/kinetis_pmc.h  In either case the
     author should mark it as "Verified to Document Number:"
     taken from the reference manual.

     The version KINETIS_PMC_VERSION_UKN has been applied to
     most all the SoCs in the kinetis arch prior to this commit.

     The exceptions are the CONFIG_ARCH_CHIP_MK60FN1M0VLQ12,
     CONFIG_ARCH_CHIP_MK20DXxxxVLH7 All K64 and K66 have ben
     Verified PMC configurations.
 2017-02-22 10:42:52 -10:00
David Sidrane
381ffa3083 Kinetis:SIM defines are based on SIM feature configuration 2017-02-22 10:42:52 -10:00
David Sidrane
5b550a37eb Kinetis:Include the SIM features 2017-02-22 10:42:52 -10:00
David Sidrane
d74f16ecb9 Kinetis:Created a kinetis SIM versioning scheme pulled in by Kinetis chip.h 
The motvations is to version the IP blocks of the Kinetis
   K series family of parts.

   This added versioning and configuration features for the
   Kinetis SIM IP block.

   It is envisioned that in the long term as a chip is added.
   The author of the new chip definitions will either find
   the exact configuration in an existing chip define and
   add the new chip to it Or add the SIM feature configuration
   #defines to the chip ifdef list in
   arch/arm/include/kinetis/kinetis_sim.h  In either case the
   author should mark it as "Verified to Document Number:"
   taken from the reference manual.

   The version KINETIS_SIM_VERSION_UKN has been applied to
   most all the SoCs in the kinetis arch prior to this commit.

   The exceptions are the CONFIG_ARCH_CHIP_MK60FN1M0VLQ12,
   All K64 and K66 which not have Verified SIM configurations.
 2017-02-22 10:42:52 -10:00
David Sidrane
14bdf3af22 Kinetis:Fixed Typo in kinetis_mcg header 2017-02-22 10:42:52 -10:00
Gregory Nutt
a78593d66d fstatfs: Rethink last commit. Add verification that the file descriptor refers to an open file. This also should eliminate the warning while doing something useful. 2017-02-22 14:17:14 -06:00