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f07d09aa48
Commit Graph

2759 Commits

Author SHA1 Message Date
Gregory Nutt
f07d09aa48 Add SAMA5 GPIO configuration support 2013-07-22 20:59:47 -06:00
Gregory Nutt
339a55f1ea Add support SAMA5 UART and serial driver 2013-07-22 19:16:37 -06:00
Gregory Nutt
e67d610347 SAMA5 clock configuration should now agree with Atmel sample code; Added header file with macros to enable and disable peripheral clocking 2013-07-22 17:00:02 -06:00
Gregory Nutt
a9b0f304e6 Add SAMA5 clock logic. Cloned from SAM3U and not yet verified 2013-07-22 14:42:05 -06:00
Gregory Nutt
1350b2a576 SAMA5 interrupt handling logic 2013-07-22 11:54:39 -06:00
Gregory Nutt
5bbc86f894 SAMA5/Cortex-A: Improve irqsave/restore inlines + add irqenable. Add skeleton file for SAMA5 interrupt management. Also change from last commit that was left in the editor 2013-07-21 17:08:40 -06:00
Gregory Nutt
87f54f7d0b Add system timer logic for the SAMA5 2013-07-21 15:49:17 -06:00
Gregory Nutt
543b5b7e03 A few more Cortex-A5 and SAMA5 files 2013-07-21 12:52:38 -06:00
Gregory Nutt
66259bfc53 Misc Cortex-A5 changes include new file for cache operations 2013-07-20 13:06:00 -06:00
Gregory Nutt
b26d5c7164 A few more SAMA5D3 files 2013-07-19 17:45:28 -06:00
Gregory Nutt
4a81d47c86 Basic framework to support the AT91SAMA5D3 family and the SAMA5D3x-EK board(s) in particular 2013-07-19 15:23:03 -06:00
Gregory Nutt
5356bd1bbd More ARMv7-A files that are just copies of the ARMv4/5 files for now 2013-07-19 11:43:04 -06:00
Gregory Nutt
53a4f3443c Minor but fatal typo introduced in last checkin 2013-07-18 15:45:21 -06:00
Gregory Nutt
8f2ad7eec1 Some initial frame for Cortex-A5 support. No much yet 2013-07-18 15:20:47 -06:00
Gregory Nutt
a7ae91c716 NSH cmp command by Andrew Twidgell 2013-07-18 08:24:29 -06:00
Gregory Nutt
f9b9bf6e04 STM32 SDIO driver: Add supported for data block end (DBCKEND) interrupt. From Chia Cheng Tsao 2013-07-08 09:04:05 -06:00
Gregory Nutt
7536b4654b Ticket #16: STM32 OTG FS device driver endpoint allocation. From Chia Cheng Tsao 2013-07-08 08:55:05 -06:00
Gregory Nutt
25c393f371 prohibit re-entrance into sam_configgpio() 2013-07-05 17:15:54 -06:00
Gregory Nutt
94e2f4ceb4 Fix SAM34 interrupt handling for ports D-F; fix MISO logic in Arduino Due touchscreen driver 2013-07-03 08:12:45 -06:00
Gregory Nutt
f0ebaf8312 Several fixes to get a clean compile of the Arduino touch screen 2013-07-02 13:52:09 -06:00
Gregory Nutt
09faaccc02 Created new directories to hold SPI-related files 2013-07-01 08:11:54 -06:00
Gregory Nutt
f01a1517df Update LM FLASH definitions for LM4F120. From Vinti 2013-06-29 07:02:56 -06:00
Gregory Nutt
2ba00060bc SAM33/4: Need to disable write protection before modify PIO pin configuration 2013-06-28 15:34:51 -06:00
Gregory Nutt
3505ca7556 Add an NSH configuration for the Arduino Due; Pluse several fixes related to the Due and to the SAM3X in general 2013-06-28 14:32:08 -06:00
Gregory Nutt
e34e1ee987 Arduino Due: Fixes to FLASH address, flash wait states, updated Comments. Now boots and runs a bit before crashing 2013-06-28 11:29:14 -06:00
Gregory Nutt
9956392d00 With these changes the Arduino Due port builds without errors 2013-06-27 15:07:07 -06:00
Gregory Nutt
e0310e2cc8 Flesh out the Arduino Due board configuratino and integrate it with the build and configuration system 2013-06-27 14:24:27 -06:00
Gregory Nutt
293e46e435 Review and update of SAM3/4 header files and conditional logic for SAM3X/A support 2013-06-27 11:06:13 -06:00
Gregory Nutt
bc7ac20616 Add peripheral configuration logic for the SAM3X/3A; Change all references to SAM3/4 SPI to SPI0 for compatibity with the SAM3X/3A which has SPI0 and SPI1; Add directory which will eventually holdl an Arduino Due port 2013-06-26 18:46:44 -06:00
Gregory Nutt
d4b7efb34e Add SAM3X/3A pin multiplexing and GPIO encoding header files 2013-06-26 17:02:43 -06:00
Gregory Nutt
f668abaed1 Add SAM3X/3A memory map 2013-06-26 14:37:57 -06:00
Gregory Nutt
3692dfaf26 Add SAM3X/3A peripheral clock controls 2013-06-26 14:00:26 -06:00
Gregory Nutt
b089263e1c Add SAM3X/3A interrupt vectors 2013-06-26 12:59:56 -06:00
Gregory Nutt
18240b07b6 Add support for SAM3X and 3A chips, interrupts, and peripheral IDs 2013-06-26 12:28:32 -06:00
Gregory Nutt
64dd806d89 Fix integration of RAM test into the build and configuration system 2013-06-26 10:54:12 -06:00
Gregory Nutt
3d1f29217e Add support for a separate CCM memory allocator for members of the STM32 family that support CCM memory 2013-06-25 09:13:30 -06:00
Gregory Nutt
8959fffedc SAM4L Xplained SLCD driver is complete 2013-06-23 09:05:20 -06:00
Gregory Nutt
5152ce9f79 Beginning of a driver for the SAM4L LED1 module 2013-06-21 17:42:09 -06:00
Gregory Nutt
add0a67995 Straighten out issues about who calls C++ initializers with CXXTEST or HELLOXX are built as NSH applications; Add an ofstream test to CXXTEST suggested by Michael; Update many defconfig fiels to that they set configurations to handle C++ constructors just as before these configuration changes 2013-06-21 09:32:57 -06:00
Gregory Nutt
59e1d1c6cd More KL25Z SPI fixes 2013-06-20 19:58:45 -06:00
Gregory Nutt
b14f0cf9f7 KL25Z GPIO register dump function now compiles 2013-06-20 18:00:56 -06:00
Gregory Nutt
76f9df2941 Fix backward wait condition in KL24Z SPI driver 2013-06-20 17:39:42 -06:00
Gregory Nutt
d5a0c75bbb Add framework for managing SPI-related discretes on the Freedom KL25Z board. 2013-06-20 13:50:16 -06:00
Gregory Nutt
876fcca8f7 More Freedom KL25Z changed to and from Alan Carvalho de Assis 2013-06-19 20:50:27 -06:00
Gregory Nutt
d8a8679781 Fix errors in KL25Z SPI driver reported by Alan Carvalho de Assis 2013-06-19 19:32:13 -06:00
Gregory Nutt
2cfeed654a Add SAM4L PDCA register definition file 2013-06-19 18:38:31 -06:00
Gregory Nutt
3ed35802ce SPI register definition file updated to include a few differences for the SAM4L 2013-06-19 16:03:19 -06:00
Gregory Nutt
2ede49fd6a SAM4L LCDCS register definitions 2013-06-19 13:59:47 -06:00
Gregory Nutt
2a2de71b5d Add SPI driver for the Freescale KL25Z 2013-06-19 12:10:01 -06:00
Gregory Nutt
f597172733 Add SPI register definitions for the Freescale KL25Z 2013-06-19 09:56:32 -06:00