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chip
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rch/arm/armv7-a/l2cc_pl310.h: Move arch/arm/sama5/chip/sam_l2cc.h to arch/arm/armv7-a/l2cc_pl310.h. Adjust the two corresponding Kconfig files as well.
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2014-07-25 17:25:17 -06:00 |
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chip.h
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rch/arm/armv7-a/l2cc_pl310.h: Move arch/arm/sama5/chip/sam_l2cc.h to arch/arm/armv7-a/l2cc_pl310.h. Adjust the two corresponding Kconfig files as well.
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2014-07-25 17:25:17 -06:00 |
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Kconfig
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rch/arm/armv7-a/l2cc_pl310.h: Move arch/arm/sama5/chip/sam_l2cc.h to arch/arm/armv7-a/l2cc_pl310.h. Adjust the two corresponding Kconfig files as well.
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2014-07-25 17:25:17 -06:00 |
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Make.defs
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arch/arm/src/armv7-a/arm_l2cc_pl310.c, l2cc.h, l2cc_pl310.h, Kconfig: Add initiali support for the ARM L2CC-PL310 L2 cache.
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2014-07-26 16:50:08 -06:00 |
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sam_adc.c
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Change naming from cp_XYZ_cache() to arch_XYP_cache() so that all cache operations will pick up L2 support if it is enabled
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2014-07-26 18:47:33 -06:00 |
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sam_adc.h
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sam_allocateheap.c
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SAMA5D3/4 HEAP: Add a configuration option to reserve DRAM for a framebuffer when executing out of DRAM.
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2014-07-08 12:43:38 -06:00 |
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sam_boot.c
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Enables cache early in boot-up sequence
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2014-07-26 18:48:00 -06:00 |
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sam_can.c
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SAMA5 CAN: If running from SDRAM, BOARD_MCK_FREQUENCY is not a constant and cannot be used in pre-processor conditionals
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2014-04-16 10:00:32 -06:00 |
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sam_can.h
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sam_clockconfig.c
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SAMA5D3/4: UPLL divisor to generate 48MHz for OHCI is different from the two families. No idea why.
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2014-07-03 12:28:11 -06:00 |
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sam_clockconfig.h
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Move the un-definitions of __ramfuncs__ from the sam_clockconfig.c to the common up_internal.h header file so that the attribute will be applied the same to function definitions and prototypes.
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2014-04-17 08:56:20 -06:00 |
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sam_dbgu.c
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Add serial method so that lower half driver can provide RX flow control information. From Jussi Kivilinna
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2014-05-08 09:00:33 -06:00 |
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sam_dbgu.h
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SAMA5: Add support for DBGU. Xplained board now uses DBGU for the serial console
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2014-04-01 11:24:15 -06:00 |
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sam_dmac.c
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Change naming from cp_XYZ_cache() to arch_XYP_cache() so that all cache operations will pick up L2 support if it is enabled
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2014-07-26 18:47:33 -06:00 |
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sam_dmac.h
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XDMAC register sampling missed CIM register; Should not set SWREQ bit in DMA setup
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2014-07-21 13:23:36 -06:00 |
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sam_ehci.c
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Change naming from cp_XYZ_cache() to arch_XYP_cache() so that all cache operations will pick up L2 support if it is enabled
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2014-07-26 18:47:33 -06:00 |
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sam_emaca.c
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Change naming from cp_XYZ_cache() to arch_XYP_cache() so that all cache operations will pick up L2 support if it is enabled
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2014-07-26 18:47:33 -06:00 |
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sam_emacb.c
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Change naming from cp_XYZ_cache() to arch_XYP_cache() so that all cache operations will pick up L2 support if it is enabled
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2014-07-26 18:47:33 -06:00 |
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sam_ethernet.c
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SAMA5D4: Add EMAC driver
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2014-06-11 12:23:31 -06:00 |
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sam_ethernet.h
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SAMA5: Add support for Micrel KSZ8081 PHY
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2014-06-11 13:25:59 -06:00 |
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sam_gf512.c
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More trailing whilespace removal
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2014-04-13 16:22:22 -06:00 |
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sam_gf1024.c
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Fix a typo that was cloned to several SAMA5 and MTD files
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2013-12-21 09:45:27 -06:00 |
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sam_gmac.c
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Change naming from cp_XYZ_cache() to arch_XYP_cache() so that all cache operations will pick up L2 support if it is enabled
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2014-07-26 18:47:33 -06:00 |
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sam_hsmci_clkdiv.c
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SAMA5: Remove HSCMI-related functions that did not belong in sam_pmc.c and give them their own file
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2014-03-30 08:00:59 -06:00 |
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sam_hsmci.c
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SAMA5D4: Fix some HSMCI issues when XDMAC0 is enabled
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2014-07-21 17:45:48 -06:00 |
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sam_hsmci.h
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SAMA5: Remove HSCMI-related functions that did not belong in sam_pmc.c and give them their own file
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2014-03-30 08:00:59 -06:00 |
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sam_irq.c
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Change naming from cp_XYZ_cache() to arch_XYP_cache() so that all cache operations will pick up L2 support if it is enabled
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2014-07-26 18:47:33 -06:00 |
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sam_irq.h
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sam_isi.c
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SAMA5 PCK: Add support for the slow clock as the PCK clock source
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2014-07-19 13:55:08 -06:00 |
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sam_isi.h
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sam_lcd.c
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SAMA5 LCDC: Back out the delay kludge. Increase the LCDC input clock from MCK to 2*MCK was sufficient for all timing instbility problems
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2014-07-12 11:24:14 -06:00 |
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sam_lcd.h
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Move include/nuttx/fb.h to include/nuttx/video/fb.h
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2013-12-10 09:23:54 -06:00 |
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sam_lowputc.c
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SAMA5D4: USART peripheral clock appears to be MCK/2
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2014-06-20 11:40:36 -06:00 |
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sam_lowputc.h
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sam_memories.c
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SAMA5D3/4: Fix some logic in conversion of physical and virtal DRAM addresses when running out of DRAM
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2014-06-30 11:04:34 -06:00 |
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sam_memories.h
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sam_nand.c
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Change naming from cp_XYZ_cache() to arch_XYP_cache() so that all cache operations will pick up L2 support if it is enabled
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2014-07-26 18:47:33 -06:00 |
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sam_nand.h
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SAMA5 NAND: Do not perform DMA on small transfers
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2013-12-04 07:41:29 -06:00 |
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sam_ohci.c
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Change naming from cp_XYZ_cache() to arch_XYP_cache() so that all cache operations will pick up L2 support if it is enabled
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2014-07-26 18:47:33 -06:00 |
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sam_pck.c
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Fix a recently introduced typo that was being masked by some bad conditional compilation
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2014-07-22 11:45:14 -06:00 |
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sam_pck.h
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SAMA5 PCK: Add support for the slow clock as the PCK clock source
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2014-07-19 13:55:08 -06:00 |
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sam_periphclks.h
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SAMA5D4: Various changes to get the SAMA4D-EK to build
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2014-06-06 15:39:40 -06:00 |
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sam_pio.c
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SAMA5D4-EK: PIO Schmitt trigger logic backward
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2014-07-20 13:04:30 -06:00 |
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sam_pio.h
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SAMA5 PIO: Fix a typo in Schmitt trigger configuration; Configure pin as a a vanilla input first so that final pin configuration is more read-able (i.e., easier to debug)
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2014-07-09 17:16:43 -06:00 |
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sam_pioirq.c
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SAMA5D3/4: Fix two issues associated with PIO interrupts
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2014-07-07 14:16:29 -06:00 |
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sam_pmc.c
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SAMA5D4: Completes PMC modifications for the SAMA5D4
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2014-06-09 07:55:51 -06:00 |
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sam_pmc.h
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SAMA5: Remove HSCMI-related functions that did not belong in sam_pmc.c and give them their own file
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2014-03-30 08:00:59 -06:00 |
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sam_pmecc.c
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Fix a typo that was cloned to several SAMA5 and MTD files
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2013-12-21 09:45:27 -06:00 |
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sam_pmecc.h
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Fix a typo that was cloned to several SAMA5 and MTD files
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2013-12-21 09:45:27 -06:00 |
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sam_pwm.c
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SAMA5D4: Update PWM header file
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2014-06-08 14:16:50 -06:00 |
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sam_pwm.h
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sam_rtc.c
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LM: Don't initialize .data if running in SRAM. Global missing intialize type. SAMA5 NAND: Fix for read nand in smaller chunks
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2013-12-05 10:37:55 -06:00 |
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sam_rtc.h
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sam_sckc.c
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SAMA5 SCK: The SAMA5D3 does things a little differently
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2014-07-19 13:55:53 -06:00 |
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sam_sckc.h
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SAMA5: Add slow clock support
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2014-07-19 13:07:55 -06:00 |
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sam_serial.c
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SAMA5D4: USART peripheral clock appears to be MCK/2
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2014-06-20 11:40:36 -06:00 |
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sam_serial.h
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sam_spi.c
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Fix system bus IDs for SAMA5D4; Don't use explicit PERIPHID_SHIFT for symmetry with memory
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2014-06-29 11:24:10 -06:00 |
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sam_spi.h
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Backport SPI driver enhancements from SAMA5 to SAM3/4
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2014-03-13 10:34:35 -06:00 |
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sam_ssc.c
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Change naming from cp_XYZ_cache() to arch_XYP_cache() so that all cache operations will pick up L2 support if it is enabled
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2014-07-26 18:47:33 -06:00 |
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sam_ssc.h
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sam_tc.c
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SAMA5D4: Update register definitions; add support for TC2
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2014-06-08 09:19:50 -06:00 |
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sam_tc.h
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More trailing whilespace removal
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2014-04-13 16:22:22 -06:00 |
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sam_timerisr.c
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SAMA5D23 boards: When running out of SDRAM, need to query the PMC to determine operating frequency
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2014-03-29 17:51:06 -06:00 |
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sam_trng.c
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More trailing whilespace removal
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2014-04-13 16:22:22 -06:00 |
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sam_trng.h
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sam_tsd.c
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More trailing whilespace removal
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2014-04-13 16:22:22 -06:00 |
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sam_tsd.h
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sam_twi.c
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Don't have to set SDA high initially in I2C reset because that is done by the pin configuration
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2014-07-09 17:17:32 -06:00 |
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sam_twi.h
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sam_udphs.c
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Change naming from cp_XYZ_cache() to arch_XYP_cache() so that all cache operations will pick up L2 support if it is enabled
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2014-07-26 18:47:33 -06:00 |
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sam_udphs.h
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sam_usbhost.c
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STM32 OTGFS: Host USB tracing instrumentation added by Leo
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2014-04-12 08:44:22 -06:00 |
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sam_usbhost.h
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LM: Don't initialize .data if running in SRAM. Global missing intialize type. SAMA5 NAND: Fix for read nand in smaller chunks
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2013-12-05 10:37:55 -06:00 |
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sam_wdt.c
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LM: Don't initialize .data if running in SRAM. Global missing intialize type. SAMA5 NAND: Fix for read nand in smaller chunks
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2013-12-05 10:37:55 -06:00 |
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sam_wdt.h
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sam_xdmac.c
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Change naming from cp_XYZ_cache() to arch_XYP_cache() so that all cache operations will pick up L2 support if it is enabled
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2014-07-26 18:47:33 -06:00 |
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sama5d3x_periphclks.h
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SAMA5: Back out most of commit c37b5b7b97d0644743c04f2c3d9e2b7ef9f5d698. Things are going to have to be done differently
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2014-06-09 12:16:16 -06:00 |
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sama5d4x_periphclks.h
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SAMA5D4: Fix peripheral clocking macros: AIC and L2CC are continuously clocked
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2014-06-19 15:52:42 -06:00 |
