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979 Commits

Author SHA1 Message Date
Alan C. Assis
4ca38c6c50 esp32: Add PWM support using the LEDC peripheral 
Co-authored-by: Petro Karashchenko <petro.karashchenko@gmail.com>
 2022-01-08 14:46:51 +01:00
Gustavo Henrique Nihei
73ea0c1627 xtensa: Improve Kconfig description of ESP32-S2 arch family 
Also fix the wrong "dual-core" statement, since all ESP32-S2 chips are
composed of a single Xtensa LX7 core.

Signed-off-by: Gustavo Henrique Nihei <gustavo.nihei@espressif.com>
 2022-01-07 22:25:05 +01:00
Zeng Zhaoxiu
fb43fd73ed signal: signal handler may cause task's state error 
For example, task is blocked by nxsem_wait(sem1), use nxsem_wait(sem2)
in signal handler, and take sem2 successfully, after exit from signal
handler to task, nxsem_wait(sem1) returns OK, but the correct result
should be -EINTR.

Signed-off-by: Zeng Zhaoxiu <zhaoxiu.zeng@gmail.com>
 2022-01-05 21:36:44 +09:00
Abdelatif Guettouche
4edc5fb701 xtensa: Rename up_stack_color to xtensa_stack_color since it's an 
internal function.

Signed-off-by: Abdelatif Guettouche <abdelatif.guettouche@espressif.com>
 2022-01-04 02:45:45 +08:00
Gustavo Henrique Nihei
78362b0949 xtensa/esp32: Use ROM implementations of libc functions 
Signed-off-by: Gustavo Henrique Nihei <gustavo.nihei@espressif.com>
 2022-01-03 10:37:04 -03:00
Petro Karashchenko
d23ad9b9b0 userspace: fix typos in comments 
Signed-off-by: Petro Karashchenko <petro.karashchenko@gmail.com>
 2022-01-02 20:50:30 +01:00
Gustavo Henrique Nihei
c1fac720ec xtensa/esp32: Add missing param documentation for SPI Flash function 
Signed-off-by: Gustavo Henrique Nihei <gustavo.nihei@espressif.com>
 2022-01-01 20:37:44 +08:00
Gustavo Henrique Nihei
9e5e60ba48 esp32s2/esp32c3: Build MCUboot bootloader with Flash Encryption support 2022-01-01 20:37:44 +08:00
Gustavo Henrique Nihei
f130d8b91e xtensa/esp32s2: Remove unavailable support for ROM Basic Console 
This feature is only available for ESP32 chips.

Signed-off-by: Gustavo Henrique Nihei <gustavo.nihei@espressif.com>
 2021-12-31 00:56:08 +08:00
chao.an
736add0fe8 arch/backtrace: correct the skip counter 
Signed-off-by: chao.an <anchao@xiaomi.com>
 2021-12-30 16:57:40 +08:00
Gustavo Henrique Nihei
80da9abd6a xtensa/esp32: Move assertions after logging to improve debugging 
Signed-off-by: Gustavo Henrique Nihei <gustavo.nihei@espressif.com>
 2021-12-30 12:35:41 +08:00
Gustavo Henrique Nihei
b6addaa4c7 xtensa/esp32: Enable the creation of encrypted Flash partitions 
Signed-off-by: Gustavo Henrique Nihei <gustavo.nihei@espressif.com>
 2021-12-30 12:35:41 +08:00
Gustavo Henrique Nihei
340e0c8a8f xtensa/esp32: Build MCUboot bootloader with Flash Encryption support 
Signed-off-by: Gustavo Henrique Nihei <gustavo.nihei@espressif.com>
 2021-12-30 12:35:41 +08:00
ChenWen
6ce335fa84 xtensa/esp32: Fix some Wi-Fi issues 
1. Fix the issue that Wi-Fi can't connect to some special routers occasionally.
    2. Update Wi-Fi driver code to fix issue of failure to send pkt.
    3. Replace software random with hardware random
 2021-12-28 23:48:25 -06:00
chao.an
7ed0b97414 make/allsyms: skip the unnecessary link operation 
For incremental compilation, skip the stage 1 dummy link
operation if nuttx elf has been generated

Signed-off-by: chao.an <anchao@xiaomi.com>
 2021-12-28 23:47:10 -06:00
Xiang Xiao
dd942f0b04 sched/backtrace: Dump the complete stack regardless the depth 
Signed-off-by: Xiang Xiao <xiaoxiang@xiaomi.com>
 2021-12-29 12:09:54 +08:00
chao.an
a42aa8415d compile/flags: add FRAME_POINTER into Toolchain.defs 
Signed-off-by: chao.an <anchao@xiaomi.com>
 2021-12-27 22:31:27 -06:00
Petro Karashchenko
3ccb657dc2 nuttx: remove space befone newline in logs 
Signed-off-by: Petro Karashchenko <petro.karashchenko@gmail.com>
 2021-12-27 21:01:19 -06:00
Alan C. Assis
01e4e249cc Add WiFi/BLE Coexistence support 
Co-authored-by: Gustavo Henrique Nihei <gustavo.nihei@espressif.com>
Co-authored-by: Abdelatif Guettouche <abdelatif.guettouche@espressif.com>
 2021-12-23 20:42:23 -06:00
chao.an
fe2830ec94 xtensa: enhance the task dump 
add irq stack information
add cpu loading

Signed-off-by: chao.an <anchao@xiaomi.com>
 2021-12-22 11:46:02 -03:00
Gustavo Henrique Nihei
f542ab4564 xtensa/esp32s2: Add Secure Boot support on top of MCUboot 
Signed-off-by: Gustavo Henrique Nihei <gustavo.nihei@espressif.com>
 2021-12-21 07:02:40 -06:00
Gustavo Henrique Nihei
d22a2aa7a0 xtensa/esp32: Refactor makefiles for compliance to Function Call Syntax 
According to Make documentation:
- "Commas and unmatched parentheses or braces cannot appear in the text
  of an argument as written";
- "Leading spaces cannot appear in the text of the first argument as
  written".

Although in the current state it was not resulting in parsing issues, it
is better to fix it.

Signed-off-by: Gustavo Henrique Nihei <gustavo.nihei@espressif.com>
 2021-12-21 07:02:40 -06:00
Gustavo Henrique Nihei
6c3223289f xtensa/esp32: Add Secure Boot support on top of MCUboot 
This adds the capabitlity of building signed images on NuttX.

Signed-off-by: Gustavo Henrique Nihei <gustavo.nihei@espressif.com>
 2021-12-21 07:02:40 -06:00
Petro Karashchenko
3e76c3266e assert: unify stack and register dump across platforms 
Signed-off-by: Petro Karashchenko <petro.karashchenko@gmail.com>
 2021-12-20 00:02:12 -03:00
Petro Karashchenko
67d8a82393 Kconfig: fix non-string default values uniformity 
Signed-off-by: Petro Karashchenko <petro.karashchenko@gmail.com>
 2021-12-20 00:10:57 +01:00
chao.an
b11833cbba arch/assert: flush the syslog before stack dump 
flush the syslog before stack dump to avoid buffer overwrite

Signed-off-by: chao.an <anchao@xiaomi.com>
 2021-12-15 12:00:35 -06:00
chao.an
56ef1419dd arch/xtensa: set the current reg before print syslog 
ensure the semantics of the up_interrupt_context() works as expected

Signed-off-by: chao.an <anchao@xiaomi.com>
 2021-12-14 21:40:03 -06:00
chao.an
2fe06ac083 arch: xtensa: save current SP before overwrting 
Signed-off-by: chao.an <anchao@xiaomi.com>
 2021-12-14 21:40:03 -06:00
chao.an
93b133fe66 arch/xtensa: correct the interrupt stack on irq handler 
Signed-off-by: chao.an <anchao@xiaomi.com>
 2021-12-14 21:40:03 -06:00
Petro Karashchenko
51a2db6ffc Kconfig: improve uniformity 
Signed-off-by: Petro Karashchenko <petro.karashchenko@gmail.com>
 2021-12-14 07:32:48 -06:00
chao.an
c2fd66bfab arch/arm/risc-v/xtensa: add support of all symbols for debugging 
Signed-off-by: chao.an <anchao@xiaomi.com>
 2021-12-13 08:31:13 -06:00
Abdelatif Guettouche
d31a0d8aca arch/xtensa/esp32: Show CPU activity on IDLE task and on interrupts. 
Signed-off-by: Abdelatif Guettouche <abdelatif.guettouche@espressif.com>
 2021-12-13 08:30:58 -06:00
Abdelatif Guettouche
6262f7e99a esp32_idle.c: Change private function's name to start with esp32_ 
instead of up_.

Signed-off-by: Abdelatif Guettouche <abdelatif.guettouche@espressif.com>
 2021-12-13 08:30:58 -06:00
Xiang Xiao
6357523892 arch: Add _wchar_t typedef like other basic types 
Signed-off-by: Xiang Xiao <xiaoxiang@xiaomi.com>
 2021-12-09 16:57:23 +09:00
Xiang Xiao
a0990ee416 arch: Remove the duplicated up_tls_info implementation 
Define up_tls_info in arch/arch.h directly if the general one isn't suitable

Signed-off-by: Xiang Xiao <xiaoxiang@xiaomi.com>
 2021-12-05 20:59:53 -06:00
Xiang Xiao
19e5ee6ce0 arch: Remove FILE dump code from _up_dumponexit 
since the kernel build can't access the userspace memory
inside other process directly

Signed-off-by: Xiang Xiao <xiaoxiang@xiaomi.com>
 2021-12-06 11:23:58 +09:00
Abdelatif Guettouche
50d217a9e8 esp32_cpustart.c: Improve comments around the usage of the inter-cpu 
startup handshake.

Signed-off-by: Abdelatif Guettouche <abdelatif.guettouche@espressif.com>
 2021-12-02 11:21:49 -06:00
Abdelatif Guettouche
b34951e3a0 esp32_cpustart.c: Remove the CONFIG_SMP condition on some part of code 
because the whole file is only built if CONFIG_SMP is enabled.

Signed-off-by: Abdelatif Guettouche <abdelatif.guettouche@espressif.com>
 2021-12-02 11:21:49 -06:00
Xiang Xiao
b65c7c26cf arch: Dump task name through tcb_s::name instead of argv[0] 
since argv is defined in task_tcb_s not tcb_s

Signed-off-by: Xiang Xiao <xiaoxiang@xiaomi.com>
 2021-12-01 16:04:15 +01:00
Abdelatif Guettouche
251b8a3445 esp32xx_rtc: Include "clock/clock.h" to have a declaration of 
g_basetime.

Signed-off-by: Abdelatif Guettouche <abdelatif.guettouche@espressif.com>
 2021-11-26 15:23:47 -03:00
Abdelatif Guettouche
af11cf6cd1 esp32xx_rtc.c: Fix a duplicated assignment. 
Signed-off-by: Abdelatif Guettouche <abdelatif.guettouche@espressif.com>
 2021-11-26 15:23:47 -03:00
Xiang Xiao
e30a5f3790 arch/sim: Add new option to enable arch specific hostfs 
we have many different hostfs implementation now, so it's better
to select the implementation explicitly, just like what we have
done for arm(FS_HOSTFS vs. ARM_SEMIHOSTING_HOSTFS).

Signed-off-by: Xiang Xiao <xiaoxiang@xiaomi.com>
 2021-11-25 14:42:23 +01:00
zhuyanlin
1b3005accf arch:cache_invalidate: fix unalign cacheline invalidate 
Only invalidate may corrupt data in unalign start and end.
Use writeback and invalidate instead.

Signed-off-by: zhuyanlin <zhuyanlin1@xiaomi.com>
 2021-11-24 22:48:13 -06:00
zhuyanlin
4db5016d83 arch:hostfs: add cache coherence config for semihosting option 
N/A

Signed-off-by: zhuyanlin <zhuyanlin1@xiaomi.com>
 2021-11-24 22:48:13 -06:00
Abdelatif Guettouche
65db787eff esp32_irq.c: Fix retrieving IRQ number and peripheral ID when it comes 
to GPIOs in SMP mode.

Signed-off-by: Abdelatif Guettouche <abdelatif.guettouche@espressif.com>
 2021-11-22 11:41:10 -06:00
zhuyanlin
ffb543d061 xtensa: add setjmp.h include file 
N/A

Signed-off-by: zhuyanlin <zhuyanlin1@xiaomi.com>
 2021-11-17 02:23:45 -06:00
zhuyanlin
0e002af323 xtensa_backtrace: fix typ error 
N/A

Signed-off-by: zhuyanlin <zhuyanlin1@xiaomi.com>
 2021-11-17 01:47:26 -06:00
Xiang Xiao
2262ddfa6d arch: Remove fflush(stdout) from driver code 
it's wrong to call stdio function inside driver

Signed-off-by: Xiang Xiao <xiaoxiang@xiaomi.com>
 2021-11-15 00:04:12 +01:00
Abdelatif Guettouche
6cbcbd5481 arch/risc-v&xtensa/Kconfig: Don't select LIBC_ARCH_MEMCCMP. The Kconfig 
option doens't exist and we are not providing any external
implementation.

Signed-off-by: Abdelatif Guettouche <abdelatif.guettouche@espressif.com>
 2021-11-13 11:54:42 -03:00
zhuyanlin
c6c534f27b xtensa:mpu:use WRITEBACK attribute for intsram & extsram 
Signed-off-by: zhuyanlin <zhuyanlin1@xiaomi.com>
 2021-11-13 05:59:10 -06:00
Dong Heng
fed7808d80 esp32 & esp32c3: Partition supports BIO cmd 2021-11-13 05:58:30 -06:00
Dong Heng
a59aae6927 esp32/esp32c3: Fix MMU pages number calculation error 2021-11-07 21:59:54 -06:00
zhuyanlin
580d17cc02 arch:xtensa: make xtensa_abi.h global include and usage 
N/A

Signed-off-by: zhuyanlin <zhuyanlin1@xiaomi.com>
 2021-11-06 07:39:27 -05:00
Abdelatif Guettouche
73f15ed544 esp32/Kconfig: Make ESP32_BT_RESERVE_DRAM default to 0 again if 
Bluetooth is not enabled.  When Bluetooth is enbaled then it defaults to
64KB.  This will not wast those 64KB of memory when Bluetooth is not enabled.

Signed-off-by: Abdelatif Guettouche <abdelatif.guettouche@espressif.com>
 2021-11-01 10:01:38 -05:00
Gustavo Henrique Nihei
de0e4d4aac xtensa/esp32s2: Rename MTD-related configs to become more intuitive 
Signed-off-by: Gustavo Henrique Nihei <gustavo.nihei@espressif.com>
 2021-10-25 21:45:20 -05:00
Gustavo Henrique Nihei
fb00ab3242 xtensa/esp32: Rename MTD-related configs to become more intuitive 
Signed-off-by: Gustavo Henrique Nihei <gustavo.nihei@espressif.com>
 2021-10-25 21:45:20 -05:00
Gustavo Henrique Nihei
eb889b0884 xtensa/esp32s2: Enable Partition Table allocation at custom offset 
Signed-off-by: Gustavo Henrique Nihei <gustavo.nihei@espressif.com>
 2021-10-25 16:34:58 -03:00
Gustavo Henrique Nihei
9d7b9821b3 xtensa/esp32: Enable Partition Table allocation at custom offset 
Signed-off-by: Gustavo Henrique Nihei <gustavo.nihei@espressif.com>
 2021-10-25 16:34:58 -03:00
Gustavo Henrique Nihei
b555b3f89e xtensa/esp32: Refactor and reorganize Partition Table related configs 
Signed-off-by: Gustavo Henrique Nihei <gustavo.nihei@espressif.com>
 2021-10-25 16:34:58 -03:00
Gustavo Henrique Nihei
793266d39e espressif: Fix spacing style in Kconfig files 
Signed-off-by: Gustavo Henrique Nihei <gustavo.nihei@espressif.com>
 2021-10-25 08:01:44 -05:00
Gustavo Henrique Nihei
4ff754827c espressif: Fix prompt string of Wi-Fi FS mount point configs 
Signed-off-by: Gustavo Henrique Nihei <gustavo.nihei@espressif.com>
 2021-10-25 08:01:44 -05:00
Gustavo Henrique Nihei
a1af605973 espressif: Fix references to Wi-Fi according to Wi-Fi Alliance 
Signed-off-by: Gustavo Henrique Nihei <gustavo.nihei@espressif.com>
 2021-10-25 08:01:44 -05:00
Alan C. Assis
7e8003cba1 Move chip specific file compilation to CHIP_CSRCS 2021-10-23 04:03:12 -05:00
Alan C. Assis
03738622a1 esp32s2: Add RNG driver support and board profile example 2021-10-23 04:03:12 -05:00
zhuyanlin
cf1a04d0a2 xtensa:cache: add lock & unlock feature 
Since some xtensa cores cache support lock & unlock feature.

Signed-off-by: zhuyanlin <zhuyanlin1@xiaomi.com>
 2021-10-22 13:31:32 -03:00
Abdelatif Guettouche
8288a04a0b arch/xtensa/esp32: Remove the AES test from the driver. 
Signed-off-by: Abdelatif Guettouche <abdelatif.guettouche@espressif.com>
 2021-10-19 18:41:57 -03:00
zhuyanlin
b5134565fa arch:xtens:mpu: modify acc and memtype to uint32_t 
The uint8_t and uint16_t will overflow in MPU_ENTRY_AR marco.

Signed-off-by: zhuyanlin <zhuyanlin1@xiaomi.com>
 2021-10-19 00:24:31 -05:00
Xiang Xiao
91398e73eb arch/xtensa/Kconfig: add quotes in source to clean warnings from setconfig 
Signed-off-by: Xiang Xiao <xiaoxiang@xiaomi.com>
 2021-10-19 00:33:51 +02:00
Abdelatif Guettouche
7b43d11435 esp32_spiflash.c: Allocate only one variable to hold the cache state in 
single CPU mode.

Signed-off-by: Abdelatif Guettouche <abdelatif.guettouche@espressif.com>
 2021-10-16 22:56:21 -07:00
Abdelatif Guettouche
f54a929001 esp32_spiflash.c: Keep the index of the other CPU between SPI Flash 
operations.

Signed-off-by: Abdelatif Guettouche <abdelatif.guettouche@espressif.com>
 2021-10-16 22:56:21 -07:00
Abdelatif Guettouche
eeb68bda3d xtensa_testset.c: Simplify the test-set function and remove some old 
comments.

Signed-off-by: Abdelatif Guettouche <abdelatif.guettouche@espressif.com>
 2021-10-16 22:56:21 -07:00
Abdelatif Guettouche
dfe1637864 esp32_spiflash.c: Pause the other CPU during flash operation. 
Signed-off-by: Abdelatif Guettouche <abdelatif.guettouche@espressif.com>
 2021-10-16 22:56:21 -07:00
Abdelatif Guettouche
f2c2323642 esp32_intercpu_interrupt.c: Force the functions to internal SRAM. 
Signed-off-by: Abdelatif Guettouche <abdelatif.guettouche@espressif.com>
 2021-10-16 22:56:21 -07:00
Abdelatif Guettouche
d2bc011719 arch/xtensa/xtensa_cpupause.c: Allow a spin before taking the g_cpu_wait 
spinlock.

If we repeatedly call up_cpu_pause and up_cpu_resume, there would be
cases where the next call to up_cpu_pause happens while the other CPU is
still responding to the previous resume request.  In this case the
DEBUGASSERT will trigger.  We should allow the first CPU to wait until the
other CPU has finished responding to the resume request.

Signed-off-by: Abdelatif Guettouche <abdelatif.guettouche@espressif.com>
 2021-10-16 09:46:23 -07:00
Abdelatif Guettouche
591c1563b8 esp32_oneshot_lowerhalf.c: Use the same alignment as the rest of the 
code base.

Signed-off-by: Abdelatif Guettouche <abdelatif.guettouche@espressif.com>
 2021-10-16 00:01:23 -07:00
Abdelatif Guettouche
9e1d2ca95e esp32_rt_timer.c: Group static variables into a struct and fix naming 
standard

Signed-off-by: Abdelatif Guettouche <abdelatif.guettouche@espressif.com>
 2021-10-16 00:01:23 -07:00
Abdelatif Guettouche
0dff3f2762 esp32_wifi_adapter.c: Use the specified spin lock when 
enabling/disabling interrupts.

Signed-off-by: Abdelatif Guettouche <abdelatif.guettouche@espressif.com>
 2021-10-16 00:01:23 -07:00
Abdelatif Guettouche
a50d673df7 esp32_wifi_adapter.c: Don't hold another spinlock when calling 
enter_critical_section, we already hold the global IRQ spinlock.

Signed-off-by: Abdelatif Guettouche <abdelatif.guettouche@espressif.com>
 2021-10-16 00:01:23 -07:00
Abdelatif Guettouche
11216257cf esp32_rt_timer.c: Don't nest calls to spin_lock_irqsave with a device 
specific spinlock, this will lead to deadlocks.

Signed-off-by: Abdelatif Guettouche <abdelatif.guettouche@espressif.com>
 2021-10-16 00:01:23 -07:00
Abdelatif Guettouche
e847c61801 esp32_wifi_adapter.c: Use device specific locks. 
Signed-off-by: Abdelatif Guettouche <abdelatif.guettouche@espressif.com>
 2021-10-16 00:01:23 -07:00
Abdelatif Guettouche
32f7471f9e esp32_wlan.c: Use device specific locks. 
Signed-off-by: Abdelatif Guettouche <abdelatif.guettouche@espressif.com>
 2021-10-16 00:01:23 -07:00
Abdelatif Guettouche
4ae1285124 esp32_emac.c: Use device specific locks. 
Signed-off-by: Abdelatif Guettouche <abdelatif.guettouche@espressif.com>
 2021-10-16 00:01:23 -07:00
Abdelatif Guettouche
e64390d5e9 esp32_rt_timer.c: Use device specific locks. 
Signed-off-by: Abdelatif Guettouche <abdelatif.guettouche@espressif.com>
 2021-10-16 00:01:23 -07:00
Abdelatif Guettouche
c61009c2cf esp32/esp32_spi_slave.c: Use device specific locks. 
Signed-off-by: Abdelatif Guettouche <abdelatif.guettouche@espressif.com>
 2021-10-16 00:01:23 -07:00
Abdelatif Guettouche
2273684cb1 esp32/esp32_spi.c: Use device specific locks. 
Signed-off-by: Abdelatif Guettouche <abdelatif.guettouche@espressif.com>
 2021-10-16 00:01:23 -07:00
Abdelatif Guettouche
0123243f9a esp32/esp32_i2c.c: Use device specific locks. 
Signed-off-by: Abdelatif Guettouche <abdelatif.guettouche@espressif.com>
 2021-10-16 00:01:23 -07:00
Abdelatif Guettouche
0af9a49d9c esp32/esp32_oneshot_lowerhalf.c: Use device specific locks. 
Signed-off-by: Abdelatif Guettouche <abdelatif.guettouche@espressif.com>
 2021-10-16 00:01:23 -07:00
Abdelatif Guettouche
698af43d78 esp32/esp32_freerun.c: Use device specific locks. 
Signed-off-by: Abdelatif Guettouche <abdelatif.guettouche@espressif.com>
 2021-10-16 00:01:23 -07:00
Abdelatif Guettouche
04bd27400a xtensa/esp32_wdt_lowerhalf.c: Use device specific locks. 
Signed-off-by: Abdelatif Guettouche <abdelatif.guettouche@espressif.com>
 2021-10-16 00:01:23 -07:00
Abdelatif Guettouche
19a096cdfe arch/xtensa/esp32_tim_lowerhalf.c: Use device specific locks. 
Signed-off-by: Abdelatif Guettouche <abdelatif.guettouche@espressif.com>
 2021-10-16 00:01:23 -07:00
Gustavo Henrique Nihei
ff705586bb xtensa/esp32s2: Provide SPI Flash parameters to MCUboot build 
Also unify bootloader config creation to reduce duplication.

Signed-off-by: Gustavo Henrique Nihei <gustavo.nihei@espressif.com>
 2021-10-15 23:55:10 -07:00
Gustavo Henrique Nihei
4d5e0f8fe1 xtensa/esp32: Provide SPI Flash parameters to MCUboot build 
Also unify bootloader config creation to reduce duplication.

Signed-off-by: Gustavo Henrique Nihei <gustavo.nihei@espressif.com>
 2021-10-15 23:55:10 -07:00
Abdelatif Guettouche
a7d8d9dd98 esp32s2/tie.h: Run the file though detab. 
Signed-off-by: Abdelatif Guettouche <abdelatif.guettouche@espressif.com>
 2021-10-14 07:39:54 -03:00
Abdelatif Guettouche
6d246eb18f esp32s2/tie.h: The old tie.h file was from ESP32 which doesn't apply to 
ESP32-S2.  This commit gets the correct S2 tie.h file

Signed-off-by: Abdelatif Guettouche <abdelatif.guettouche@espressif.com>
 2021-10-14 07:39:54 -03:00
Abdelatif Guettouche
217fd97fd3 xtensa_coproc.S: Correctly save/restore coprocessor0 state. 
Signed-off-by: Abdelatif Guettouche <abdelatif.guettouche@espressif.com>
 2021-10-14 07:39:54 -03:00
Abdelatif Guettouche
7420f245bc xtensa_context.S: Save and restore SCOMPARE1 when necessary. 
SCOMPARE1 is used by some atomic instructions and need to be preserved
during a context switch.

Signed-off-by: Abdelatif Guettouche <abdelatif.guettouche@espressif.com>
 2021-10-14 06:32:17 -03:00
Alan C. Assis
867c6d0636 esp32: Add initial support to Bluetooth Low Energy 
Co-authored-by: saramonteiro <saramonteirosouza44@gmail.com>
Co-authored-by: Gustavo Henrique Nihei <gustavonihei@gmail.com>
 2021-10-04 15:10:37 -03:00
Abdelatif Guettouche
d22b4ec539 espxx_rng.c: Add "/" at the beginning of paths for consistency. 
Signed-off-by: Abdelatif Guettouche <abdelatif.guettouche@espressif.com>
 2021-09-30 13:50:25 -03:00
Abdelatif Guettouche
5c6a30c00b esp32_rng.c: Remove the initialization guard. The init function is 
called only once during startup.

Signed-off-by: Abdelatif Guettouche <abdelatif.guettouche@espressif.com>
 2021-09-30 13:50:25 -03:00
Abdelatif Guettouche
6a262c5203 esp32_rng.c: Remove unused functions. 
Signed-off-by: Abdelatif Guettouche <abdelatif.guettouche@espressif.com>
 2021-09-30 13:50:25 -03:00
Sara Souza
8a142f474e xtensa/esp32-s2/rttimer: Disable alarm before setting a new value and enabling it 2021-09-28 21:02:57 -03:00
Alin Jerpelea
15a37c5a5a arch: Omni Hoverboards: update licenses to Apache 
Gregory Nutt has submitted the SGA
Omni Hoverboards has submitted the SGA
David Sidrane has submitted the ICLA
Mateusz Szafoni has submitted the ICLA
Sebastien Lorquet has submitted the ICLA
Paul Alexander Patience has submitted the ICLA

as a result we can migrate the licenses to Apache.

Signed-off-by: Alin Jerpelea <alin.jerpelea@sony.com>
 2021-09-28 04:37:38 -07:00
Gustavo Henrique Nihei
a5f9e29d78 xtensa/esp32s2: Enable support for "make bootloader" target 
This enables the provisioning of the bootloader binaries through the
build system.

Signed-off-by: Gustavo Henrique Nihei <gustavo.nihei@espressif.com>
 2021-09-27 18:21:53 -07:00
Gustavo Henrique Nihei
800678ca78 xtensa/esp32s2: Enable booting from MCUboot bootloader 
Signed-off-by: Gustavo Henrique Nihei <gustavo.nihei@espressif.com>
 2021-09-27 18:21:53 -07:00
Abdelatif Guettouche
5336704c77 esp32_start.c: Initialize the SPI RAM before enabling its cache. 
Signed-off-by: Abdelatif Guettouche <abdelatif.guettouche@espressif.com>
 2021-09-27 05:13:51 -07:00
Gustavo Henrique Nihei
c23986ec63 xtensa/esp32: Select ARCH_HAVE_BOOTLOADER for ESP32 chips 
Signed-off-by: Gustavo Henrique Nihei <gustavo.nihei@espressif.com>
 2021-09-24 10:48:19 -07:00
Gustavo Henrique Nihei
4ac3044cc3 xtensa/esp32: Enable build system to download or build bins from source 
Signed-off-by: Gustavo Henrique Nihei <gustavo.nihei@espressif.com>
 2021-09-23 20:52:25 -07:00
Abdelatif Guettouche
f2f2040c44 esp32_spiram/psram/himem: Add and fix the files' sections. 
Signed-off-by: Abdelatif Guettouche <abdelatif.guettouche@espressif.com>
 2021-09-23 02:49:11 -07:00
Abdelatif Guettouche
3d8a6fb676 esp32_spiram.c: Remove esp_himem_reserved_area_size from esp32_spiram.c 
file.  This function is already defined in esp_himem and is used only
when that file is built.  We don't need another weak function.

Signed-off-by: Abdelatif Guettouche <abdelatif.guettouche@espressif.com>
 2021-09-23 02:49:11 -07:00
Abdelatif Guettouche
2834d2a46f esp32_spiflash.c/esp32_spiram.c: Remove some unused macros/functions/variables. 
Signed-off-by: Abdelatif Guettouche <abdelatif.guettouche@espressif.com>
 2021-09-23 02:49:11 -07:00
Sara Souza
962059f843 xtensa/esp32-s2: Adds oneshot device driver support 2021-09-22 22:53:54 -03:00
Sara Souza
fba6fa2dc1 xtensa/esp32-s2: Adds support to rt_timer and systimer to ESP32-S2. 2021-09-22 17:18:24 -03:00
Sara Souza
2cd4f4af79 xtensa/esp32-s2: Adds freerun timer wrapper 2021-09-22 09:38:10 -03:00
Gustavo Henrique Nihei
eca1f86294 arch/xtensa: Remove CODE qualifier for Xtensa-specific files 
Signed-off-by: Gustavo Henrique Nihei <gustavo.nihei@espressif.com>
 2021-09-22 08:16:01 -03:00
Gustavo Henrique Nihei
e13dd7dab9 arch/xtensa: Remove FAR qualifier for Xtensa-specific files 
Signed-off-by: Gustavo Henrique Nihei <gustavo.nihei@espressif.com>
 2021-09-22 08:16:01 -03:00
Gustavo Henrique Nihei
58f87ef443 xtensa/esp32: Fix wrong position for ++ operator on I2C driver 
Signed-off-by: Gustavo Henrique Nihei <gustavo.nihei@espressif.com>
 2021-09-22 08:16:01 -03:00
Abdelatif Guettouche
9f4d7e4767 xtensa_dumpstate.c: Fix the name of the TCB variable when dumping the 
backtrace.

Signed-off-by: Abdelatif Guettouche <abdelatif.guettouche@espressif.com>
 2021-09-21 09:22:28 -03:00
Abdelatif Guettouche
15b68b9abb esp32_spiflash.c: Correctly disable APP's CPU cache. 
Signed-off-by: Abdelatif Guettouche <abdelatif.guettouche@espressif.com>
 2021-09-17 17:43:45 -03:00
Gustavo Henrique Nihei
b33ccd01cf xtensa/esp32: Make the semaphore timeout on I2C configurable 
Signed-off-by: Gustavo Henrique Nihei <gustavo.nihei@espressif.com>
 2021-09-16 14:07:26 -03:00
zhuyanlin
7947e50f06 xtensa:backtrace: flush to stack when in interrupt 
The registers may be in window during interrupt.
Flush window stack to stack first.
And fix warning in build.

Signed-off-by: zhuyanlin <zhuyanlin1@xiaomi.com>
 2021-09-16 10:53:35 -05:00
zhuyanlin
cdb441cc3f arch:xtensa:dumpstate: use sched_dumpstack 
Use sched_dumpstack instead. The backtrace infomation like

xtensa_user_panic: User Exception: EXCCAUSE=0009 task: hello
xtensa_registerdump:    PC: 202b32b8    PS: 00060030
xtensa_registerdump:    A0: a02acb87    A1: 20998d10    A2: ffffaaaa    A3: 12345678
xtensa_registerdump:    A4: a02ba26c    A5: 209949c0    A6: 20990994    A7: 00000258
xtensa_registerdump:    A8: a02b32af    A9: 20998cb0   A10: 0000000f   A11: 209949a0
xtensa_registerdump:   A12: a02be95c   A13: 20994980   A14: 00000003   A15: 209949d0
xtensa_registerdump:   SAR: 00000000 CAUSE: 00000009 VADDR: ffffaaaa
xtensa_registerdump:  LBEG: 00000000  LEND: 00000000  LCNT: 00000000
xtensa_registerdump:  TMP0: 202b1512  TMP1: 20998af0
sched_dumpstack: [BackTrace| 3|0]:  0x202acbae 0x202b232e 0x202b1912 0x202b19f5 0x202b24f1 0x202b152f    0x40023 0x202b32b0
sched_dumpstack: [BackTrace| 3|1]:  0x202acb87 0x202a86a4

Signed-off-by: zhuyanlin <zhuyanlin1@xiaomi.com>
 2021-09-16 10:32:38 +08:00
zhuyanlin
6e0f84dc88 arch:xtensa: add up_backtrace support 
Up_backtrace can be backtrace from task or interrupt.

Signed-off-by: zhuyanlin <zhuyanlin1@xiaomi.com>
 2021-09-16 10:32:38 +08:00
zhuyanlin
3acdbef60d xtensa:arch: force up_getsp to inline 
Up_getsp may be not inline in gcc, thus get the sp
is up_getsp function's sp, not the caller function.

Signed-off-by: zhuyanlin <zhuyanlin1@xiaomi.com>
 2021-09-16 10:32:38 +08:00
zhuyanlin
583dce0b98 arch:xtensa: remove WSBITS/WBBITS to core.h 
Remove WSBITS/WBBITS macro to core.h as may be used by
arch common code.

Signed-off-by: zhuyanlin <zhuyanlin1@xiaomi.com>
 2021-09-16 10:32:38 +08:00
Sara Souza
83a9c2b24b xtensa/irq.h: Fixes the routine that clears the processor interrupt 2021-09-13 17:01:49 -03:00
zhuyanlin
8e6fbe700e xtensa:dcache_clean: use DCACHE_LINZESIZE instead of DCACHE_SIZE 
Clean_dcache use DCACHE_LINZESIZE instead of DCACHE_SIZE in addr loop

Signed-off-by: zhuyanlin <zhuyanlin1@xiaomi.com>
 2021-09-13 14:38:57 +08:00
Abdelatif Guettouche
4ef859924b esp32_serial.c: Release the spinlock before calling uart_xmitchars, this 
functions will call esp32_txint again which leads to deadlock since
esp32_txint has already locked the spinlock.

Signed-off-by: Abdelatif Guettouche <abdelatif.guettouche@espressif.com>
 2021-09-09 19:35:17 +09:00
Abdelatif Guettouche
b5bb1fb8a3 esp32_serial.c: Replace critical section by a device specific spin lock. 
Signed-off-by: Abdelatif Guettouche <abdelatif.guettouche@espressif.com>
 2021-09-09 19:35:17 +09:00
Abdelatif Guettouche
f47d28c108 esp32_serial.c: Don't fake an interrupt when interrupts are not 
suppressed.

Signed-off-by: Abdelatif Guettouche <abdelatif.guettouche@espressif.com>
 2021-09-08 09:27:08 -03:00
zhuyanlin
26b4bb3075 xtensa:cache: fix typo error 
use addr instead of add
 2021-09-08 11:19:02 +02:00
zhuyanlin
7b5c39a9d3 arch:xtensa: add xtensa_cache code support 
Add xtensa_cache code support
 2021-09-07 13:33:31 +08:00
zhuyanlin
d6fe0f18f5 arch:xtensa: add XTENSA_CACHE config support 
Add support for XTENSA_HAVE_ICACHE & XTENSA_HAVE_DACHE
 2021-09-07 13:33:31 +08:00
Sara Souza
26397c6695 xtensa/esp32: Wi-Fi board logic refactoring. 
This commit removes the initialization of the Wi-Fi partition
from the Wi-Fi board logic and moves it to the SPI Flash board code.

It creates 2 different partition (one for Wi-Fi and one for general
use).

It also allows these partitions to be mounted over several FSs.
 2021-09-04 14:30:02 +08:00
zhuyanlin
fd9ce0137e arch:xtensa: add xtensa mpu support 
Add support for Xtensa Memory Protect Unit.

Change-Id: I27e2f05daae24429ef7513d843b4f217daeefa0d
 2021-09-02 09:17:26 -03:00
Sara Souza
8081228556 xtensa/esp32-s2: Adds support to the timer driver 
Only one more support for ESP32-S2 chip.
 2021-09-01 14:10:01 -03:00
Xiang Xiao
b0c782255c libxx: Change CXX_LIBSUPCXX to LIBSUPCXX 
align with other Kconfig(e.g. LIBCXXABI, LIBCXX, UCLIBCXX)

Signed-off-by: Xiang Xiao <xiaoxiang@xiaomi.com>
 2021-08-28 17:14:48 -03:00
zhuyanlin
9ea7676731 arch:xtensa: rename XCHAL_INT_NLEVELS to XCHAL_NUM_INTLEVELS 
The name used in Tensilica support file core-isa.h for all vendors is
`XCHAL_NUM_INTLEVELS`.
Use a new name may be confused by newer porting xtensa arch.

Change-Id: Ie108d3fdfcc02c81f0eacfca852a1cfc9eea17de
 2021-08-28 21:51:45 +02:00
Abdelatif Guettouche
1385ea7673 arch/esp32: Properly handle GPIO interrupt in SMP. 
The PRO CPU and APP CPU have different peripherals for GPIO interrupts.
Each CPU needs to allocate an interrupt and attach it to its GPIO
peripheral.

Signed-off-by: Abdelatif Guettouche <abdelatif.guettouche@espressif.com>
 2021-08-27 13:24:00 +09:00
Kapil Gupta
ec99e11f5e esp32/softap: Enable the WPA2 by default to ask user password 
Signed-off-by: Kapil Gupta <kapil.gupta@espressif.com>
Co-author: Alan Carvalho de Assis <alan.carvalho@espressif.com>
 2021-08-26 13:26:57 +08:00
Abdelatif Guettouche
fc594c5d25 esp32_irq.c: Extend the CPU interrupt/peripheral map to include the 
status of the interrupt (enabled/disabled).

Signed-off-by: Abdelatif Guettouche <abdelatif.guettouche@espressif.com>
 2021-08-26 07:06:22 +09:00
Abdelatif Guettouche
810ed19b8f arch/xtensa/esp32_irq.c: Enable/disable interrupts using the Interrupt 
Matrix.

This allows manipulating interrupts from both CPUs.  Internal interrupts
however, still need to be disabled/enabled by each CPU.

Signed-off-by: Abdelatif Guettouche <abdelatif.guettouche@espressif.com>
 2021-08-26 07:06:22 +09:00
Abdelatif Guettouche
a7abd56448 arch/xtensa: Move the Xtensa specific part of interrupts to 
xtensa/include/irq.h

Signed-off-by: Abdelatif Guettouche <abdelatif.guettouche@espressif.com>
 2021-08-26 07:06:22 +09:00
Abdelatif Guettouche
470799b0b3 arch/xtensa/esp32_irq: Remove the map/unmap IRQ functions they are used 
only inside this file.

Signed-off-by: Abdelatif Guettouche <abdelatif.guettouche@espressif.com>
 2021-08-26 07:06:22 +09:00
Abdelatif Guettouche
04cd520293 arch/xtensa/esp32: Merge esp32_intdecode with esp32_irq. 
Signed-off-by: Abdelatif Guettouche <abdelatif.guettouche@espressif.com>
 2021-08-26 07:06:22 +09:00
Abdelatif Guettouche
79cc12c034 arch/xtesna/esp32: Merge the contents of esp32_cpuint and esp32_irq. 
They do the same thing (manipulate interrupts) keeping them separated
was making things harder.

Signed-off-by: Abdelatif Guettouche <abdelatif.guettouche@espressif.com>
 2021-08-26 07:06:22 +09:00
Abdelatif Guettouche
237aebb7e1 arch/xtensa/esp32_cpuint.c: Refactor retrieving the intmap and register 
address of a peripheral.

Signed-off-by: Abdelatif Guettouche <abdelatif.guettouche@espressif.com>
 2021-08-26 07:06:22 +09:00
Abdelatif Guettouche
02c17c3169 arch/esp32: Simplify the interrupt allocation process. 
Allocating and attaching interrupts were both exported outside, however
these two move hand in hand and we don't have to expose these details.
Also, the parameters passed are saved and will be used to retrieve
information about the interrupt and the attached peripheral.

Signed-off-by: Abdelatif Guettouche <abdelatif.guettouche@espressif.com>
 2021-08-26 07:06:22 +09:00
Abdelatif Guettouche
eefe7ebe5f xtensa/esp32_cpuint: export only one function to allocate a CPU 
interrupt.

That function will have a parameter to decide whether to allocate a
level sensitive interrupt or an edge sensitive interrupt.

All the drivers are also updated with this API change.

Signed-off-by: Abdelatif Guettouche <abdelatif.guettouche@espressif.com>
 2021-08-26 07:06:22 +09:00
Abdelatif Guettouche
dbdec45049 arch/xtensa/src/common: Use irq_spin APIs in modifyregXX 
Replace enter_critical_section with spin_lock_irqsave.
Replace leave_critical_section with spin_unlock_irqrestore.

Signed-off-by: Abdelatif Guettouche <abdelatif.guettouche@espressif.com>
 2021-08-25 23:32:40 +08:00
Abdelatif Guettouche
5ff703d5d0 arch/*_testset: Fix few typos. 
Signed-off-by: Abdelatif Guettouche <abdelatif.guettouche@espressif.com>
 2021-08-25 00:20:20 +08:00