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609 Commits

Author SHA1 Message Date
Xiang Xiao
71269811ca mtd: Implement BIOC_PARTINFO for all drivers 
Signed-off-by: Xiang Xiao <xiaoxiang@xiaomi.com>
 2021-08-16 10:08:26 -03:00
Virus.V
5a1de89370 riscv/bl602: Fix that AP cannot be start when STA have been started. 2021-08-16 02:06:59 -07:00
Abdelatif Guettouche
5b350f3a0f arch/*_reprioritizertr.c: Fix typos in comments. 
Signed-off-by: Abdelatif Guettouche <abdelatif.guettouche@espressif.com>
 2021-08-14 11:19:34 -07:00
Xiang Xiao
d1687418db mtd: Remove the empty MTDIOC_XIPBASE implmentation 
Signed-off-by: Xiang Xiao <xiaoxiang@xiaomi.com>
 2021-08-11 09:50:51 -03:00
Abdelatif Guettouche
054e284785 *_cpustart.c: Fix typos in function description. 
Signed-off-by: Abdelatif Guettouche <abdelatif.guettouche@espressif.com>
 2021-08-11 11:06:27 +09:00
Sara Souza
af6c311fd1 risc-v/esp32-c3: Complete the support for RWDT 2021-08-10 11:17:15 -03:00
Xiang Xiao
5d1a444812 Replace __attribute__ ((unused)) with unused_code 
Signed-off-by: Xiang Xiao <xiaoxiang@xiaomi.com>
 2021-07-29 21:55:21 -03:00
Xiang Xiao
69df58c2e8 Replace __attribute__((no_instrument_function)) with noinstrument_function; 
Signed-off-by: Xiang Xiao <xiaoxiang@xiaomi.com>
 2021-07-29 21:55:21 -03:00
Xiang Xiao
007adc7736 Replace all __attribute__((section(x)) with locate_data(x) 
Signed-off-by: Xiang Xiao <xiaoxiang@xiaomi.com>
 2021-07-29 21:55:21 -03:00
Xiang Xiao
b3f9ffbe72 Replace all __attribute__((aligned(x)) with aligned_data(x) 
Signed-off-by: Xiang Xiao <xiaoxiang@xiaomi.com>
 2021-07-29 21:55:21 -03:00
Sara Souza
cdbfacc1fe risc-v/esp32-c3: Adds systimer support and make rt_timer rely on it 2021-07-27 20:43:34 -07:00
Michal Lenc
9fc806984c adc: add ioctl command to get the number of configured channels 
Number of configured ADC channels is currently only defined in board
level section, typically in xxx_adc.c file. This commit introduces
ioctl command ANIOC_GET_NCHANNELS that returns the number of configured
channels which is determined by the driver code. The change can allow the
applications to be more flexible when it comes to multiple ADC devices
with different number of configured channels.

Signed-off-by: Michal Lenc <michallenc@seznam.cz>
 2021-07-26 19:45:47 -07:00
Sara Souza
0794991a07 risc-v/esp32-c3: Disable wdt in the start function. 2021-07-26 19:44:30 -07:00
Nathan Hartman
b92aeb8209 Fix various typos 
arch/arm/src/eoss3/eoss3_serial.c:
arch/arm/src/imxrt/hardware/imxrt_flexcan.h:
arch/arm/src/imxrt/imxrt_flexcan.c:
arch/arm/src/imxrt/imxrt_flexpwm.c:
arch/arm/src/imxrt/imxrt_lpi2c.c:
arch/arm/src/kinetis/kinetis_flexcan.c:
arch/arm/src/nrf52/hardware/nrf52_rtc.h:
arch/arm/src/nrf52/nrf52_clockconfig.c:
arch/arm/src/nrf52/nrf52_radio.c:
arch/arm/src/nrf52/nrf52_tim.c:
arch/arm/src/rtl8720c/amebaz_depend.c:
arch/arm/src/s32k1xx/Kconfig:
arch/arm/src/s32k1xx/s32k1xx_flexcan.c:
arch/arm/src/s32k1xx/s32k1xx_lpi2c.c:
arch/arm/src/sama5/hardware/sam_sdmmc.h:
arch/arm/src/sama5/sam_gmac.c:
arch/arm/src/samd5e5/sam_wdt.c:
arch/avr/src/avr32/up_exceptions.S:
arch/avr/src/avr32/up_fullcontextrestore.S:
arch/renesas/src/rx65n/rx65n_dtc.c:
arch/renesas/src/rx65n/rx65n_usbhost.c:
arch/risc-v/src/esp32c3/esp32c3_tickless.c:
boards/arm/stm32h7/stm32h747i-disco/include/board.h:
include/nuttx/lcd/ili9225.h:
libs/libc/stdio/lib_fgetpos.c:
libs/libc/stdio/lib_fseek.c:
libs/libc/stdio/lib_fsetpos.c:

    * Fix typos.
 2021-07-25 18:36:53 -07:00
jordi
f3af6edf93 Kconfig: add quotes in source to clean warnings from setconfig 
To avoid the setconfig warning "style: quotes recommended around xxx in
source xxx"
 2021-07-23 02:32:19 -07:00
Abdelatif Guettouche
e85b119363 arch/: Clean what was made during context in distclean. 
Cleaning during `clean_context` had the issue of remaking everything
when `menuconfig` was issued.  That's because `menuconfig` has a
`clean_context` on its way.

Signed-off-by: Abdelatif Guettouche <abdelatif.guettouche@espressif.com>
 2021-07-21 16:52:36 -03:00
Gustavo Henrique Nihei
c05feda208 risc-v/esp32c3: Implement MTDIOC_ERASESTATE for SPI Flash driver 
Signed-off-by: Gustavo Henrique Nihei <gustavo.nihei@espressif.com>
 2021-07-17 09:00:41 -07:00
Xiang Xiao
98b5724b59 arch: Fix rtcb can't found error 
use the same condition check in declaration and reference

Signed-off-by: Xiang Xiao <xiaoxiang@xiaomi.com>
Change-Id: I7b05316e914708fceeddac394d784ee3720a3c1b
 2021-07-16 12:48:09 -03:00
ChenWen
2abb75fee7 risc-v/esp32c3: Fix some ESP32-C3 Wi-Fi driver issues 2021-07-15 23:20:29 -07:00
Virus.V
063e1d6b74 risc-v/bl602: update wifi firmware and some fixup. 
1. Added check for repeated connection wifi operations.
2. Invoke the carrier on/off operation in the wrong place.
3. The RTC initialization time is incorrect.
4. Reserve 32K I-Cache space in the linker script.
5. Increase the size of the wifi firmware receiving buffer.

Signed-off-by: Virus.V <virusv@live.com>
 2021-07-13 05:12:12 -07:00
Sara Souza
48f2b10ee3 risc-v/esp32-c3: Use systimer 0 to RTOS TICK 2021-07-12 21:03:27 -07:00
Dong Heng
f5eaf82c93 risc-v/esp32c3: Use onexit to free thread private semaphore 2021-07-12 09:38:21 -03:00
Xiang Xiao
76cdd5c329 mm: Remove mm_heap_impl_s struct 
it's more simple to make mm_heap_s opaque outside of mm

Signed-off-by: Xiang Xiao <xiaoxiang@xiaomi.com>
Change-Id: I5c8e435f6baba6d22b10c5f7e8d9191104fb5af2
 2021-07-07 04:25:15 -07:00
Dong Heng
475becac37 risc-v/esp32c3: Add board_ioctl and board_uniqueid 2021-07-05 23:12:17 -05:00
Nathan Hartman
ce20211357 Fix various typos in comments and documentation 
Fix typos in these files:
    * Documentation/components/drivers/character/foc.rst
    * Documentation/guides/cpp_cmake.rst
    * Kconfig
    * arch/arm/src/imxrt/imxrt_lpspi.c
    * arch/arm/src/kinetis/kinetis_spi.c
    * arch/arm/src/kl/kl_spi.c
    * arch/arm/src/lpc31xx/lpc31_spi.c
    * arch/arm/src/nrf52/nrf52_radio.h
    * arch/arm/src/s32k1xx/s32k1xx_lpspi.c
    * arch/arm/src/stm32/Kconfig
    * arch/arm/src/stm32/stm32_adc.c
    * arch/arm/src/stm32/stm32_foc.c
    * arch/arm/src/stm32/stm32_foc.h
    * arch/arm/src/stm32/stm32_pwm.c
    * arch/arm/src/stm32/stm32_spi.c
    * arch/arm/src/stm32f0l0g0/stm32_spi.c
    * arch/arm/src/stm32f7/Kconfig
    * arch/arm/src/stm32f7/stm32_spi.c
    * arch/arm/src/stm32h7/Kconfig
    * arch/arm/src/stm32h7/stm32_allocateheap.c
    * arch/arm/src/stm32h7/stm32_fmc.c
    * arch/arm/src/stm32h7/stm32_fmc.h
    * arch/arm/src/stm32h7/stm32_pwm.c
    * arch/arm/src/stm32h7/stm32_qspi.c
    * arch/arm/src/stm32h7/stm32_spi.c
    * arch/arm/src/stm32l4/stm32l4_pwm.c
    * arch/arm/src/stm32l4/stm32l4_spi.c
    * arch/arm/src/stm32l5/Kconfig
    * arch/arm/src/stm32l5/stm32l5_spi.c
    * arch/renesas/src/rx65n/rx65n_dtc.c
    * arch/renesas/src/rx65n/rx65n_usbdev.c
    * arch/risc-v/src/rv32m1/rv32m1_serial.c
    * boards/arm/stm32/b-g431b-esc1/src/stm32_foc.c
    * boards/arm/stm32/nucleo-f103rb/src/stm32_foc_ihm07m1.c
    * boards/arm/stm32/nucleo-f302r8/src/stm32_foc_ihm07m1.c
    * boards/arm/stm32h7/nucleo-h743zi2/README.txt
    * boards/risc-v/rv32m1/rv32m1-vega/README.txt
    * boards/sim/sim/sim/scripts/Make.defs
    * drivers/1wire/1wire.c
    * drivers/1wire/1wire_internal.h
    * drivers/lcd/Kconfig
    * drivers/syslog/ramlog.c
    * fs/fat/Kconfig
    * libs/libc/debug/Kconfig
    * libs/libc/machine/Kconfig
    * libs/libc/stdio/lib_libvsprintf.c
    * libs/libc/stdlib/lib_div.c
    * libs/libc/stdlib/lib_ldiv.c
    * libs/libc/stdlib/lib_lldiv.c
    * libs/libdsp/lib_observer.c
 2021-07-04 11:23:26 -05:00
Xiang Xiao
b1f711f790 mm: Move procfs_register_meminfo into common place 
to avoid the code duplication and ensure the consistent behaviour

Signed-off-by: Xiang Xiao <xiaoxiang@xiaomi.com>
 2021-07-03 09:39:32 -07:00
Dong Heng
4f2df0311d risc-v/esp32c3: Fix some BLE driver issues 
1. remove SMP functions because ESP32-C3 is singal core
2. disable phy_printf in ble adapter when enable Wi-Fi
3. fix BLE character device macro
 2021-07-03 07:28:30 -05:00
Virus.V
5f67d65e9e risc-v/bl602: add efuse driver 
Signed-off-by: Virus.V <virusv@live.com>
 2021-07-02 13:17:39 -05:00
chenwen
31a6da2343 risc-v/esp32c3: Notifies networking layer whether the carrier is available 2021-06-30 23:09:34 -05:00
Virus.V
84100128b2 risc-v/bl602: update wifi firmware version 
Signed-off-by: Virus.V <virusv@live.com>
 2021-06-30 01:08:10 -05:00
xiewenxiang
5fd3eca9c9 riscv/esp32c3: Support BLE sleep mode 2021-06-28 23:14:30 -05:00
xiewenxiang
145d917587 riscv/esp32c3: Add Wi-Fi and BLE coexist 2021-06-28 23:14:30 -05:00
xiewenxiang
8b96edc3a5 riscv/esp32c3: Add esp32c3 BLE driver 2021-06-28 23:14:30 -05:00
Virus.V
8452c571ec risc-v/bl602: BLE firmware adapts to the new framework 
Signed-off-by: Virus.V <virusv@live.com>
 2021-06-28 07:03:04 -05:00
Virus.V
cd50650583 risc-v/bl602: Support AP and STA as independent network interface device 
Signed-off-by: Virus.V <virusv@live.com>
 2021-06-28 07:03:04 -05:00
Abdelatif Guettouche
add18b9592 arch/risc-v/esp32c3: Remove the up_textheap_init function since it's not 
needed anymore.

Implement the up_extraheaps_init function to initialize all separate
heaps.

Signed-off-by: Abdelatif Guettouche <abdelatif.guettouche@espressif.com>
 2021-06-26 09:52:43 -05:00
Abdelatif Guettouche
60da4317b9 arch/risc-v/esp32c3: Use the same naming for the RTC heap as ESP32 for 
consistency.

Signed-off-by: Abdelatif Guettouche <abdelatif.guettouche@espressif.com>
 2021-06-23 08:37:01 +09:00
Abdelatif Guettouche
bdbc9ef04f arch/risc-v/esp32c3_rtc_heap.c: Correct the name of the procfs info 
variable.

Signed-off-by: Abdelatif Guettouche <abdelatif.guettouche@espressif.com>
 2021-06-23 08:37:01 +09:00
Liu Han
2dd081ed7d risc-v/esp32c3: Support ESP32-C3 SHA accelerator 2021-06-21 02:41:53 -05:00
chenwen
8648970994 esp32&esp32c3/wifi: Fix the issues of Wi-Fi configuration being overwritten 2021-06-19 08:00:35 -03:00
chenwen
ee3350ed1d risc-v/esp32c3: Disable Wi-Fi reconnect by default 2021-06-19 08:00:35 -03:00
Xiang Xiao
ab974edc84 sched: Identify the stack need to free by TCB_FLAG_FREE_STACK 
instead calling kmm_heapmember or umm_heapmember because:
1.The stack supplied by caller may allocate from heap too
2.It's hard to implement these two function in ASan case

Signed-off-by: Xiang Xiao <xiaoxiang@xiaomi.com>
Change-Id: I196377822b7c4643ab4f29b7c1dc41dcd7c4dab1
 2021-06-18 05:44:41 -07:00
Abdelatif Guettouche
af5e0c620f Rename MODULE_TEXT to TEXT_HEAP as the latter is more generic. 
Signed-off-by: Abdelatif Guettouche <abdelatif.guettouche@espressif.com>
 2021-06-18 07:14:17 -05:00
Abdelatif Guettouche
79e9347551 arch/risc-v/esp32c3/esp32c3_modtext.c: Prioritise allocation from the 
RTC heap when available.

Signed-off-by: Abdelatif Guettouche <abdelatif.guettouche@espressif.com>
 2021-06-18 00:53:42 -05:00
Abdelatif Guettouche
f54804bafc arch/risc-v/esp32c3: Create a separate heap for the RTC memory. 
Signed-off-by: Abdelatif Guettouche <abdelatif.guettouche@espressif.com>
 2021-06-18 00:53:42 -05:00
Abdelatif Guettouche
7198b3ef4b risc-v/esp32c3/esp32c3_soc.h: Add a function to check if a pointer is 
within the RTC RAM range.

Signed-off-by: Abdelatif Guettouche <abdelatif.guettouche@espressif.com>
 2021-06-18 00:53:42 -05:00
Sara Souza
8f59054ef2 risc-v/esp32c3: Adds I2C RESET support via hardware. 2021-06-16 21:22:26 -05:00
Janne Rosberg
673f9519eb risc-v/mpfs: add dma support 2021-06-16 12:22:54 -05:00
Eero Nurkkala
502210e98c riscv/mpfs: add i2c reset handler 
Add reset functionality into the mpfs i2c driver.

Signed-off-by: Eero Nurkkala <eero.nurkkala@offcode.fi>
 2021-06-16 12:31:36 -03:00
Liu Han
04c805207a risc-v/esp32c3: Support ESP32-C3 efuse 2021-06-16 09:35:09 -03:00
Virus.V
69fce77718 risc-v/bl602: update firmware to fix undefined up_irq_* symbols when linking 
Signed-off-by: Virus.V <virusv@live.com>
 2021-06-15 23:25:16 -05:00
Dong Heng
60fb1adaca riscv: Add inline IRQ process functions 
Remove functions from RISC-V chips.
 2021-06-15 23:25:16 -05:00
Xiang Xiao
2e49e1bc5c mtd: Add MTDIOC_FLUSH IOCTL like MTDIOC_XIPBASE 
since the old design reuse BIOC_FLUSH for
MTD device which make some confusion

Signed-off-by: Xiang Xiao <xiaoxiang@xiaomi.com>
 2021-06-15 13:26:45 -03:00
Sara Souza
2a7b97c0cd risc-v/esp32-c3: Adds I2C polled support 2021-06-15 10:51:18 -05:00
Liu Han
8eaaf6d462 risc-v/esp32c3: Support ESP32-C3 RSA accelerator 2021-06-14 15:03:11 -03:00
Masayuki Ishikawa
bafac8b560 arch: k210: Fix stack coloring for the idle thread stack 
Summary:
- I noticed that stack coloring for the idle thread stacks does
  not work due to the recent changes
- This commit fixes this issue

Impact:
- k210 only

Testing:
- Tested with both maix-bit (dev board) and QEMU

Signed-off-by: Masayuki Ishikawa <Masayuki.Ishikawa@jp.sony.com>
 2021-06-12 05:54:08 -05:00
Eero Nurkkala
1bce864ef7 mpfs: add i2c driver 
This adds mpfs i2c driver.

Signed-off-by: Eero Nurkkala <eero.nurkkala@offcode.fi>
 2021-06-11 21:03:42 -05:00
Eero Nurkkala
fad34e04c4 mpfs: add spi driver 
This adds the SPI driver for the MPFS Icicle board.

Signed-off-by: Eero Nurkkala <eero.nurkkala@offcode.fi>
 2021-06-11 09:10:03 -05:00
Abdelatif Guettouche
96bcf7678b risc-v/esp32c3_wifi_adapter.c: Remove a config that's only used in 
Xtensa chips.

Signed-off-by: Abdelatif Guettouche <abdelatif.guettouche@espressif.com>
 2021-06-11 10:49:52 -03:00
Virus.V
7c20199a61 riscv/bl602:replace syslog to debugging log macros 2021-06-10 08:59:16 -05:00
Xiang Xiao
c0fdddc5d7 arch: Remove all go_nx_start from chip specifc source 
since the idle stack color is done in the common code now

Signed-off-by: Xiang Xiao <xiaoxiang@xiaomi.com>
 2021-06-10 06:50:41 -07:00
Xiang Xiao
fa0d123f87 arch: Colorize the idle thread stack in an unified way 
Signed-off-by: Xiang Xiao <xiaoxiang@xiaomi.com>
Change-Id: Idae8da53e5a4799a8edc0e882f17fd515b70cb14
 2021-06-10 06:50:41 -07:00
Chen Wen
dbf9c87a42 risc-v/esp32c3: Support ESP32-C3 RTC driver 2021-06-10 09:33:04 -03:00
Xiang Xiao
6576306bca arch: Rename xxx_getsp to up_getsp 
All modern desgin support stack pointer and it's also an
important information, so let's standardize this interface.

Signed-off-by: Xiang Xiao <xiaoxiang@xiaomi.com>
 2021-06-09 10:20:02 -07:00
Xiang Xiao
5b2a17b892 Include assert.h in necessary place 
Signed-off-by: Xiang Xiao <xiaoxiang@xiaomi.com>
 2021-06-08 13:06:08 -07:00
unixjet
68f19a6290 risc-v/rv32m1: Basic port to rv32m1 ri5cy 2021-06-05 17:25:57 -03:00
Gustavo Henrique Nihei
0b3c2c7603 spi: Refactor SPI Slave interface prefix to sync with I2C Slave 2021-06-05 04:50:34 -07:00
Gustavo Henrique Nihei
27782aca19 risc-v/esp32c3: Include missing debug.h header 2021-06-05 04:50:34 -07:00
Gustavo Henrique Nihei
77dfb39260 risc-v/esp32c3: Uniformize references to CPU interrupt ID 2021-06-04 23:26:13 +01:00
Gustavo Henrique Nihei
f53306f9af risc-v/esp32c3: Ensure internal linkage of interrupt map 2021-06-04 23:26:13 +01:00
Gustavo Henrique Nihei
a2bcffde73 risc-v/esp32c3: Remove unused macros 2021-06-04 23:26:13 +01:00
Abdelatif Guettouche
2d55f2659e riscv/esp32c3: Add module text allocator. 
Signed-off-by: Abdelatif Guettouche <abdelatif.guettouche@espressif.com>
 2021-06-04 18:08:36 -03:00
Abdelatif Guettouche
778e3ed4ad arch/risc-v/rv32im/riscv_assert.c: Provide dummy definitions of dump 
functions when ARCH_STACKDUMP is not enabled.

Signed-off-by: Abdelatif Guettouche <abdelatif.guettouche@espressif.com>
 2021-06-04 12:20:18 -05:00
Abdelatif Guettouche
94ded7a695 arch/riscv/rv32im/riscv_assert.c: Fix preprocessor condition. 
Signed-off-by: Abdelatif Guettouche <abdelatif.guettouche@espressif.com>
 2021-06-04 12:20:18 -05:00
Janne Rosberg
7b882c3588 risc-v/mpfs: fix ext irq 1-12 
Handle irq numbers 1-12 correctly
 2021-06-04 10:14:58 -05:00
Jani Paalijarvi
ebdc7a06b1 risc-v/mpfs: add MSTimer register offsets and bitmasks 2021-06-04 10:14:58 -05:00
Janne Rosberg
f7cbed0256 risc-v/mpfs: enable up_systemreset() 2021-06-04 10:14:58 -05:00
Janne Rosberg
ec11643394 risc-v/mpfs: add sysreg register defines 
This adds minimal set of sysreg defines for MPFS
 2021-06-04 10:14:58 -05:00
Xiang Xiao
2e54df0f35 Don't include assert.h from public header file 
Signed-off-by: Xiang Xiao <xiaoxiang@xiaomi.com>
 2021-06-03 08:36:03 -07:00
Sara Souza
b54be4e946 risc-v/esp32-c3: Add support for HW flow control. 2021-06-01 21:37:27 -05:00
Gustavo Henrique Nihei
24c206b3f8 risc-v/esp32c3: Add DMA support for the SPI Slave controller 2021-06-01 21:37:09 -05:00
Gustavo Henrique Nihei
15a93ae974 risc-v/esp32c3: Remove Master-only settings on SPI Slave driver 2021-06-01 21:37:09 -05:00
Xiang Xiao
d7f96003cf Don't include debug.h from public header file 
Signed-off-by: Xiang Xiao <xiaoxiang@xiaomi.com>
 2021-06-01 06:42:02 +09:00
Gustavo Henrique Nihei
1530b0f639 risc-v/esp32c3: Fix overwriting of registered-but-disabled interrupts 2021-05-31 09:15:40 -05:00
Gustavo Henrique Nihei
da78cf78eb risc-v/esp32c3: Remove useless parameter from DMA macro 2021-05-31 09:14:14 -05:00
Gustavo Henrique Nihei
7e15d897bd risc-v/esp32c3: Add driver for SPI Slave controller 2021-05-31 12:54:15 +01:00
chenwen
1d1dd8512f esp32&esp32c3/wifi: Support specific channel and bssid scan 2021-05-31 11:09:19 +01:00
Abdelatif Guettouche
e29da149e3 arch/riscv/src/esp32c3/esp32c3_rt_timer: Fix typos and re-word some 
comments.

Signed-off-by: Abdelatif Guettouche <abdelatif.guettouche@espressif.com>
 2021-05-27 05:01:54 -07:00
Abdelatif Guettouche
08aa9ce540 arch/xtensa/src/esp32/esp32_rt_timer: Fix typos and re-word some 
comments.

Signed-off-by: Abdelatif Guettouche <abdelatif.guettouche@espressif.com>
 2021-05-27 05:01:54 -07:00
Abdelatif Guettouche
0f3d94e8e8 arch/risc-v/src/esp32c3/esp32c3_rt_timer.h: Add section headers. 
Signed-off-by: Abdelatif Guettouche <abdelatif.guettouche@espressif.com>
 2021-05-27 05:01:54 -07:00
Virus.V
c6317650f9 risc-v/bl602: Add RTC support 2021-05-26 20:03:19 -03:00
Gustavo Henrique Nihei
1d940b2982 risc-v/esp32c3: Constify DMA descriptor pointer to buffer 2021-05-26 14:05:27 -03:00
Gustavo Henrique Nihei
29cae80533 risc-v/esp32c3: Fix DMA TX Burst being set to input register 2021-05-26 14:05:27 -03:00
Dong Heng
73dcbac09d riscv/esp32c3: Add ESP32-C3 AES driver 2021-05-25 11:02:59 -03:00
Govind Singh
2975050c96 arch/riscv/bl602: Fix typo in i2c driver 
Signed-off-by: Govind Singh <govind.sk85@gmail.com>
 2021-05-25 01:37:28 -05:00
Janne Rosberg
d6205642ab add support for PolarFire SoC and icicle board 
Co-authored-by: Eero Nurkkala <eero.nurkkala@offcode.fi>
 2021-05-24 22:55:44 -05:00
Xiang Xiao
001e7c3e76 sched: Don't include nuttx/sched.h inside sched.h 
But let nuttx/sched.h include sched.h instead to
avoid expose nuttx kernel API to userspace.

Signed-off-by: Xiang Xiao <xiaoxiang@xiaomi.com>
 2021-05-24 12:11:53 +09:00
Dong Heng
76df958e34 riscv/esp32c3: Support SPI Flash encryption read/write 2021-05-23 08:37:25 -03:00
Huang Qi
f4a0b7aedd libc: Call pthread_exit in user-space by up_pthread_exit 
Drop to user-space in kernel/protected build with up_pthread_exit,
now all pthread_cleanup functions executed in user mode.

* A new syscall SYS_pthread_exit added
* A new tcb flag TCB_FLAG_CANCEL_DOING added
* up_pthread_exit implemented for riscv/arm arch

Signed-off-by: Huang Qi <huangqi3@xiaomi.com>
 2021-05-21 22:46:52 -06:00
Huang Qi
81a01d089b libc/pthread: Fix comment and document issue 
Signed-off-by: Huang Qi <huangqi3@xiaomi.com>
 2021-05-21 22:46:52 -06:00
Gregory Nutt
bb9b58bdde libc: Move pthread_create to user space 
Signed-off-by: Huang Qi <huangqi3@xiaomi.com>
Change-Id: I5c447d94077debc79158686935f288e4c8e51e01
 2021-05-21 22:46:52 -06:00
Jukka Laitinen
e4fd99682e rv64gc: use PRIx64 format for alert and assert 
This fixes compilation warnings caused by number formatting

Signed-off-by: Jukka Laitinen <jukkax@ssrc.tii.ae>
 2021-05-20 05:42:01 -05:00
Jukka Laitinen
e79a45bb93 rv64gc/riscv_assert.c: Fix compilation without CONFIG_DEBUG_ALERT 
Signed-off-by: Jukka Laitinen <jukkax@ssrc.tii.ae>
 2021-05-20 05:42:01 -05:00
chenwen
9a99d813fa risc-v/esp32c3: Support ESP32-C3 auto-sleep 2021-05-19 07:00:40 -03:00
Dong Heng
f12de4f7d9 riscv/esp32c3: Add ESP32-C3 ADC driver 2021-05-18 09:20:46 -03:00
Gustavo Henrique Nihei
26a5cb2094 risc-v/esp32c3: Add support for DMA transfers on SPI driver 2021-05-17 13:21:12 +01:00
Gustavo Henrique Nihei
132ffdd28d risc-v/esp32c3: Add burst transfer support for GDMA 2021-05-17 13:21:12 +01:00
Dong Heng
4a7f998c33 riscv/esp32c3: Fix RT timer issues 
1. Enable alarm if there is timer active
2. Wake up main thread to delete timer
3. Wake up main thread when timer is timeout in ISR
 2021-05-16 13:23:43 -05:00
Dong Heng
beed26b6bf riscv/esp32c3: Add ESP32-C3 LEDC(PWM) driver 2021-05-15 08:38:37 -03:00
chenwen
16667930cb risc-v/esp32c3: Support ESP32-C3 PM standby and sleep 2021-05-12 10:15:06 -03:00
Gustavo Henrique Nihei
90a4e8d718 risc-v/esp32c3: Fix DMA channels' interrupt IDs 2021-05-07 16:46:41 -03:00
Dong Heng
bd8e37bb4b risc-v/esp32c3: Add ESP32-C3 (G)DMA driver and testing 2021-05-07 16:46:41 -03:00
Sara Souza
50daf24242 esp32/esp32-c3: Adds two helpers to extract and include a field value 2021-05-05 01:30:03 -07:00
Abdelatif Guettouche
f3a6d80c95 esp32c3/hardware: Include files of the same level by their names only and 
remove unnecessary includes.

Signed-off-by: Abdelatif Guettouche <abdelatif.guettouche@espressif.com>
 2021-05-05 01:28:22 -07:00
Sara Souza
b01ddef61b risc-v/esp32-c3: Adds freerun wrapper 2021-05-04 15:22:26 -03:00
Gustavo Henrique Nihei
7ded22fb1a risc-v/k210: Fix SMP interrupt stack size calculation 2021-04-29 19:39:17 -07:00
Gustavo Henrique Nihei
e0da0bf6bd arch/risc-v: Fix interrupt stack alignment 2021-04-29 19:39:17 -07:00
Gustavo Henrique Nihei
f8a36f10c3 arch: Uniformize optimization flag setting across architectures 2021-04-29 19:17:16 -07:00
Gustavo Henrique Nihei
abf039b744 risc-v/rv32im: Set MAXOPTIMIZATION regardless of any debug options 2021-04-29 19:17:16 -07:00
Dong Heng
fcd5648bca riscv/esp32c3: Fix SPI Flash driver internal chip data address error 
"g_rom_flashchip" is not in fixed address between all ESP32-C3's different versions.
 2021-04-28 09:58:16 -05:00
Gustavo Henrique Nihei
edeb16123b risc-v/esp32c3: Uniformize alignment for assembly instructions 2021-04-28 09:55:57 -05:00
Gustavo Henrique Nihei
9e7d3cff92 risc-v/esp32c3: Improve interrupt handler documentation 2021-04-28 09:55:57 -05:00
Gustavo Henrique Nihei
27d32f4309 risc-v/esp32c3: Reorder register restoration on interrupt handler epiloque 2021-04-28 09:55:57 -05:00
Gustavo Henrique Nihei
66a15a6f83 risc-v/esp32c3: Fix wrong references to ESP32 2021-04-28 15:41:30 +01:00
Gustavo Henrique Nihei
7caebdd50f arch/risc-v: Fix stack alignment according to calling convention 
The RISC-V Integer Calling Convention states that the stack pointer
shall always be aligned to a 128-bit boundary upon procedure entry, both
for RV32* and RV64* ISAs (exception to the RV32E ISA, which must follow a
specific convention)
 2021-04-27 23:12:20 -05:00
Gustavo Henrique Nihei
016652f7d7 risc-v/esp32c3: Change ESP32C3_RT_TIMER_TASK_PRIORITY comment into help text 2021-04-27 20:43:07 -06:00
Gustavo Henrique Nihei
9df2179562 risc-v/esp32c3: Uniformize Kconfig alignment and styling 2021-04-27 20:43:07 -06:00
Gustavo Henrique Nihei
1e45a9329b risc-v/esp32c3: Remove inconsistent usage of comment command 2021-04-27 20:43:07 -06:00
Gustavo Henrique Nihei
cd6c29a126 risc-v/esp32c3: Remove redundant dependency 2021-04-27 20:43:07 -06:00
Gustavo Henrique Nihei
beefd51296 risc-v/esp32c3: Add driver for General Purpose SPI Master 2021-04-26 20:50:32 -03:00
Sara Souza
5c562c1068 risc-v/esp32-c3: Reorganize the timer logic for wireless use 2021-04-22 21:38:16 -05:00
Dong Heng
fecdd27df3 esp32 & esp32c3: Update Wi-Fi BT and Wi-Fi libraries to fix some issues 2021-04-22 07:34:06 -03:00
Sara Souza
7a80cbf93f risc-v/esp32-c3: Adds oneshot timer driver. 2021-04-22 09:13:58 +01:00
Masayuki Ishikawa
1a9e7efde5 smp: Remove CONFIG_SMP_IDLETHREAD_STACKSIZE 
Summary:
- The CONFIG_SMP_IDLETHREAD_STACKSIZE was introduced to optimize
  the idle stack size for other than CPU0
- However, there are no big differences between the idle stacks.
- This commit removes the config to simplify the kernel code

Impact:
- All SMP configurations

Testing:
- Tested with ostest with the following configs
- spresense:smp, spresense:rndis_smp
- esp32-devkitc:smp (QEMU), maix-bit:smp (QEMU)
- sabre-6quad:smp (QEMU), sabre-6quad:netnsh_smp (QEMU)
- raspberrypi-pico:smp, sim:smp (x86_64)

Signed-off-by: Masayuki Ishikawa <asayuki.Ishikawa@jp.sony.com>
 2021-04-19 21:46:39 -05:00
Masayuki Ishikawa
64f46b7f7e arch: k210: Add coloration for the idle stacks 
Summary:
- This commit adds coloration for the idle stacks

Impact:
- k210 only

Testing:
- Tested with smp and nsh configs with QEMU and dev board

Signed-off-by: Masayuki Ishikawa <Masayuki.Ishikawa@jp.sony.com>
 2021-04-19 01:09:22 -05:00
Masayuki Ishikawa
44bc681daa arch: fe310: Add coloration for the idle stack 
Summary:
- This commit adds coloration for the idle stack
- Also, apply la pseudo-instruction instead of lui and addi

Impact:
- fe310 only

Testing:
- Tested with nsh with QEMU and dev board

Signed-off-by: Masayuki Ishikawa <Masayuki.Ishikawa@jp.sony.com>
 2021-04-19 01:05:40 -05:00
Xiang Xiao
2335b69120 arch: Allocate the space from the beginning in up_stack_frame 
arch: Allocate the space from the beginning in up_stack_frame

and modify the affected portion:
1.Correct the stack dump and check
2.Allocate tls_info_s by up_stack_frame too
3.Move the stack fork allocation from arch to sched

Signed-off-by: Xiang Xiao <xiaoxiang@xiaomi.com>
 2021-04-16 12:41:41 +09:00
Xiang Xiao
8640d82ce0 arch: Rename g_intstackbase to g_intstacktop 
Signed-off-by: Xiang Xiao <xiaoxiang@xiaomi.com>
 2021-04-16 12:41:41 +09:00
Dong Heng
31854ca135 riscv/esp32c3: Fix heap end address 2021-04-12 01:36:11 -05:00
Masayuki Ishikawa
7ce1033aa2 arch: k210: Fix interrupt stack corruption in SMP mode 
Summary:
- I noticed that stack corruption happens due to recent refactoring
- This commit fixes this issue

Impact:
- SMP only

Testing:
- Tested with maix-bit:smp (QMU and dev board)

Signed-off-by: Masayuki Ishikawa <Masayuki.Ishikawa@jp.sony.com>
 2021-04-11 13:00:40 -05:00
Xiang Xiao
3f67c67aaf arch: Fix the stack boundary calculation and check 
All supported arch uses a push-down stack:
The stack grows toward lower addresses in memory. The stack pointer
register points to the lowest, valid working address (the "top" of
the stack). Items on the stack are referenced as positive(include zero)
word offsets from sp.
Which means that for stack in the [begin, begin + size):
1.The initial SP point to begin + size
2.push equals sub and then store
3.pop equals load and then add

Signed-off-by: Xiang Xiao <xiaoxiang@xiaomi.com>
 2021-04-10 08:39:54 -07:00
Alin Jerpelea
231b8518b7 NuttX: Ken Pettit: update licenses to Apache 
Ken Pettit has submitted the ICLA and we can migrate the licenses
 to Apache.

Sebastien Lorquet has submitted the ICLA and we can migrate the licenses
 to Apache.

Gregory Nutt has submitted the SGA and we can migrate the licenses
 to Apache.

Signed-off-by: Alin Jerpelea <alin.jerpelea@sony.com>
 2021-04-10 06:42:19 -05:00
chenwen
4ca34ac5b5 risc-v/esp32c3: Fix the issue of getting wrong Wi-Fi password 2021-04-09 03:44:29 -05:00
chenwen
a41d37cffd arch/risc-v/src/common/riscv_initialize.c: Add telnet_initialize to riscv's up_initialize 2021-04-08 23:18:32 -05:00
Matias N
ab206687bb Replace wrong inclusion of sys/errno.h (toolchain provided) with errno.h 2021-04-07 21:27:06 -05:00
Sara Souza
0926e7c578 risc-v/esp32-c3: Fixes gargabe UART issue, refactors serial driver, changes default pins of UART 1 and fixes low baud rate issue. 2021-04-06 11:44:06 -03:00
Xiang Xiao
d62ae03bf8 arch: Move setjmp/longjmp to libc/machine 
Signed-off-by: Xiang Xiao <xiaoxiang@xiaomi.com>
 2021-04-04 16:30:37 -07:00
Alan Carvalho de Assis
bac84de45f esp32c3: Add support to RNG driver 
Co-authored-by: Gustavo Henrique Nihei <gustavo.nihei@espressif.com>
Co-authored-by: Abdelatif Guettouche <abdelatif.guettouche@espressif.com>
 2021-04-03 07:20:03 -05:00
hotislandn
b4b175cb7f arch:rv64:add memory clobber to inline asm for syscall. 
Signed-off-by: hotislandn <hotislandn@hotmail.com>
 2021-04-03 00:54:23 -05:00
Alin Jerpelea
5d633d7e0b arch: risc-V: Author Gregory Nutt: update licenses to Apache 
Gregory Nutt has submitted the SGA and we can migrate the licenses
 to Apache.

Signed-off-by: Alin Jerpelea <alin.jerpelea@sony.com>
 2021-03-31 08:48:51 -07:00
chenwen
91eb70b5ef risc-v/esp32c3: Support ESP32-C3 wireless ioctl cmd 2021-03-30 12:29:11 -05:00
Brennan Ashton
0a3b20e546 syslog: Drop extra carriage return from syslog calls 2021-03-28 21:24:00 -05:00
hotislandn
6aa86b469c arch:rv64:c906:add PMP, change mem map for protect build. 
Signed-off-by: hotislandn <hotislandn@hotmail.com>
 2021-03-28 09:02:48 -05:00
Alan Carvalho de Assis
76c02afc48 esp32c3-devkit: Add board support for SPIFlash 
Co-authored-by: Abdelatif Guettouche <abdelatif.guettouche@espressif.com>
 2021-03-26 09:19:25 +01:00
Alan Carvalho de Assis
4f8ff0765f risc-v/esp32c3: Add SPIFlash support 
Co-Authored-By: Dong Heng <dongheng@espressif.com>
Co-authored-by: Gustavo Henrique Nihei <gustavo.nihei@espressif.com>
Co-authored-by: Abdelatif Guettouche <abdelatif.guettouche@espressif.com>
 2021-03-26 09:19:25 +01:00
Dong Heng
c55085c0d8 riscv/esp32c3: Add standard C atomic function 2021-03-25 12:02:48 -03:00
Virus.V
7c80826c21 risc-v/bl602: Add wifi and ble support 
tcpip ok

update wifi demo configuration

fix tcpip input cause misalign fault

change some api definetions in nuttx

fix wifi manager strlen copy without suffix null character

fix 602 network buf allocation issue

wifi scan works

[ble] Add controller code

[BLE] Add nuttx adapt code for blecontroller .

[BLE] modified include file path, to fix cflag is too long.

[ble]Test ble peripheral pass, save code.

[ble] Organize the code

[BLE] Add blecontroller config for nuttx

[BLE] Add config for ble example

fix tcp lost packet when rx

support wpa3.

Copy default config from wifi default config. Create ble for local test and ble tester for autopts.

Add config for local test.

Add pts teset config for host test

Add config for mesh test

Create task to init blecontroller

Delete blecontroller rx thread.

using idle task to receive hci command from host

Set ble device name to /dev/ble, and fix code.

1.fix a ke schedule risk 2. CFG_HOST is enabled only in the case that CONFIG_BLE_HOST_DISABLE is not enabled, by lanlan

rm _sp_main stack.

change h/l workq_stack_size 6K

change l workq_stack_size 3K.

[ble] delete file_detach

color idle stack.

clear bl602 netdev code

SCAN is sorted according to RSSI

enlarge nsh command line buffer

fixup stack overflow check checkfail when startup

arch/risc-v/BL602:fix reboot cause crash

reboot default use romapi.

riscv/bl602:netdev support defered input, remove wifi_tx function

risc-v/bl602:fix sem_timedwait usage error in bl_cmds

risc-v/bl602:fix memory access out of bounds when copy ssid

remove ble and wifi source, download when build

add bl602 blob gitignore

risc-v/bl602:remove ble-pts defconfig

Fix some typos in NuttX style naming

Fix the replacement of tab to space

fix wlan interface down still receive packet

fix wapi crash, rx when ifdown,and ble_hci_rx_do

change system reset to rom dirver

change ble hci interval to 50ms

NuttX support wifi enable/disable log via KConfig

support country code configuration in Kconfig

fix ap tx not work
 2021-03-25 01:38:45 -07:00
Xiang Xiao
e14c458747 mm/heap: Move semaphore related declaration to private header 
since other subsystem doesn't need call these function anymore

Signed-off-by: Xiang Xiao <xiaoxiang@xiaomi.com>
Change-Id: Idfb217c412db62d9f17f427310b75bb78785dc50
 2021-03-22 15:35:32 +01:00
hotislandn
fdaf265ed0 arch:rv64:c906:colorize the idle stack area;minor fixes. 
Signed-off-by: hotislandn <hotislandn@hotmail.com>
 2021-03-22 06:06:24 -07:00
Abdelatif Guettouche
51283bd99a arch/risc-v/syscall.h: Fix syscall function names in comments. 
Signed-off-by: Abdelatif Guettouche <abdelatif.guettouche@espressif.com>
 2021-03-20 13:02:54 -03:00
Abdelatif Guettouche
fb0fd36a5c arch/risc-v: Internal functions should be prefixed by "riscv_" instead 
of "up_"

Signed-off-by: Abdelatif Guettouche <abdelatif.guettouche@espressif.com>
 2021-03-20 13:02:54 -03:00
hotislandn
e452b667ef arch:rv64:fix 64bit data type and insn for FPU handlers. 
Signed-off-by: hotislandn <hotislandn@hotmail.com>
 2021-03-18 22:53:03 -07:00
hotislandn
f16a0a7380 arch:rv64:keep the stack to be 16bytes aligned. 
Signed-off-by: hotislandn <hotislandn@hotmail.com>
 2021-03-17 19:50:35 -07:00
Jiuzhu Dong
e96c8b9283 fs: allocate file/socket dynamically 
Change-Id: I8aea63eaf0275f47f21fc8d5482b51ffecd5c906
Signed-off-by: Jiuzhu Dong <dongjiuzhu1@xiaomi.com>
 2021-03-17 06:46:42 -07:00
hotislandn
fb7a5b86ca arch:rv64:c906:demo protect build without PMP. 
Signed-off-by: hotislandn <hotislandn@hotmail.com>
 2021-03-16 11:43:10 -03:00
Dong Heng
458caf2732 riscv/esp32c3: Add ESP32-C3 WLAN netcard driver 2021-03-16 10:42:32 -03:00
Abdelatif Guettouche
65a7ecec09 arch/risc-v: Remove a declaration of "up_boot" function that was never used. 
Signed-off-by: Abdelatif Guettouche <abdelatif.guettouche@espressif.com>
 2021-03-13 19:07:02 -03:00
Abdelatif Guettouche
ea0dc8c1d2 arch/risc-v: up_allocate_heap is already declared in nuttx/arch.h 
Signed-off-by: Abdelatif Guettouche <abdelatif.guettouche@espressif.com>
 2021-03-13 19:07:02 -03:00
Abdelatif Guettouche
44ada05549 arch/risc-v: Internal functions should be prefixed with riscv_ not up_ 
Signed-off-by: Abdelatif Guettouche <abdelatif.guettouche@espressif.com>
 2021-03-13 19:07:02 -03:00
Sara Souza
d28962bbc0 risc-v/esp32-c3: Adds termios support. 2021-03-12 08:41:51 +00:00
Masayuki Ishikawa
bb255d075c arch: risc-v: Author Masayuki Ishikawa: Update license to Apache 
Signed-off-by: Masayuki Ishikawa <Masayuki.Ishikawa@jp.sony.com>
 2021-03-12 16:15:44 +08:00
Gustavo Henrique Nihei
d87274c123 risc-v/esp32c3: Release stuck I2C slaves on Reset 2021-03-11 19:32:03 -03:00
Gustavo Henrique Nihei
cb1c415b46 risc-v/esp32c3: Add support for I2C tracing 2021-03-11 19:32:03 -03:00
Gustavo Henrique Nihei
0f508c1a5f risc-v/esp32c3: Fix erroneous index for I2C IRQ 2021-03-11 19:32:03 -03:00
Gustavo Henrique Nihei
0b672b9c57 risc-v/esp32c3: Fix I2C timeout register mask 2021-03-11 19:32:03 -03:00
Gustavo Henrique Nihei
11b1f0f9dd risc-v/esp32c3: Add driver for I2C peripheral 2021-03-11 19:32:03 -03:00
Xiang Xiao
c047c1412f Remove all gap8(risc-v) arch and board source code 
Signed-off-by: Xiang Xiao <xiaoxiang@xiaomi.com>
 2021-03-11 10:51:11 -08:00
Xiang Xiao
c54d617f2c Remove nr5m100(risc-v) arch and board source code 
Signed-off-by: Xiang Xiao <xiaoxiang@xiaomi.com>
 2021-03-11 10:51:11 -08:00
hotislandn
d898bc445c arch:rv64:c906:enable DP FPU support. 
Signed-off-by: hotislandn <hotislandn@hotmail.com>
 2021-03-11 10:34:47 +08:00
hotislandn
5e50938726 arch:riscv64:basic porting for C906. 
Signed-off-by: hotislandn <hotislandn@hotmail.com>
 2021-03-10 19:23:24 +08:00
Virus.V
c34667b450 risc-v/bl602:fix bl602_flash_erase to erase the wrong block 2021-03-09 07:56:00 -08:00
Gustavo Henrique Nihei
330eff36d7 sourcefiles: Fix relative path in file header 2021-03-09 23:18:28 +08:00
Gustavo Henrique Nihei
47cb41c92f makefiles: Fix relative path in file header 2021-03-09 23:18:28 +08:00
Sara Souza
c885e718a7 risc-v/esp32-c3: complements serial driver 2021-03-09 11:17:10 -03:00
Sara Souza
85a93be5d7 risc-v/esp32-c3: Adds timer driver 2021-03-09 11:16:53 -03:00
Sara Souza
d00e97cbca risc-v/esp32-c3:free cpu in case it was preallocated in wdt driver 2021-03-09 10:57:58 +00:00
Gustavo Henrique Nihei
fa36897541 risc-v/esp32c3: Fix Kconfig file formatting 2021-03-04 16:31:51 +00:00
Gustavo Henrique Nihei
b1b4190802 risc-v/esp32c3: Fix default GPIO function when no option is provided 2021-03-03 18:46:43 -08:00
Gustavo Henrique Nihei
bc335009d9 risc-v/esp32c3: Allow pin to be configured as Input and Output simultaneously 2021-03-03 18:46:43 -08:00
Abdelatif Guettouche
85620c3c1a risc-v/esp32c3: Add more flash options to esptool. 
Signed-off-by: Abdelatif Guettouche <abdelatif.guettouche@espressif.com>
 2021-03-03 18:28:18 -08:00
ligd
f9d20ea4d2 sigdeliver: fix system block when kill signal to idle in SMP 
Bug description:

CONFIG_SMP=y

Suppose we have 2 cores in SMP, here is the ps return:

PID GROUP CPU PRI POLICY TYPE    NPX STATE     STACK   USED  FILLED COMMAND
  0     0   0   0 FIFO   Kthread N-- Assigned 004076 000748  18.3%  CPU0 IDLE
  1     0   1   0 FIFO   Kthread N-- Running  004096 000540  13.1%  CPU1 IDLE

nsh> kill -4 0
or:
nsh> kill -4 1

system blocked.

Reason:

In func xx_sigdeliver() restore stage, when saved_irqcount == 0, that means
rtcb NOT in critical_section before switch to xx_sigdeliver(), then we need
reset the critical_section state before swith back.

Fix:

Add condition to cover saved_irqcount == 0.

Change-Id: I4af7f95e47f6d78a4094c3757d39b01ac9d533b3
Signed-off-by: ligd <liguiding1@xiaomi.com>
 2021-03-03 15:03:32 +00:00
Abdelatif Guettouche
39016f6d68 risc-v/esp32c3: Configure clock and call board initialize at startup. 
Signed-off-by: Abdelatif Guettouche <abdelatif.guettouche@espressif.com>
 2021-02-25 22:13:26 -08:00
hotislandn
651b905b99 arch:rv64:add API up_copyfullstate for later FPU support. 
Signed-off-by: hotislandn <hotislandn@hotmail.com>
 2021-02-25 11:26:27 -08:00
Gustavo Henrique Nihei
7fe096c65e risc-v: Fix typos reported by codespell 2021-02-25 16:25:47 +00:00
hotislandn
30cb7d3983 arch:rv32:up_sigdeliver missing fpu contexts. 
Signed-off-by: hotislandn <hotislandn@hotmail.com>
 2021-02-24 23:42:18 -08:00
Gustavo Henrique Nihei
6edeb9ebd9 risc-v/esp32c3: Free CPU interrupt if irq_attach fails 2021-02-24 15:56:26 +00:00
Gustavo Henrique Nihei
5c24c98880 risc-v/esp32c3: Invalidate CPU interrupt number after free 2021-02-24 15:56:26 +00:00
Abdelatif Guettouche
fb68a4b777 esp32c3: Add system reset. 
Signed-off-by: Abdelatif Guettouche <abdelatif.guettouche@espressif.com>
 2021-02-23 18:13:02 -08:00
Gustavo Henrique Nihei
48ff647fe9 risc-v/esp32c3: Fix erroneous references to ESP32-C3 2021-02-23 18:12:16 -08:00
Gustavo Henrique Nihei
af8e71d9e9 risc-v/esp32c3: Fix inconsistent guard comment 2021-02-22 09:24:14 -08:00