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780cb0911d
Commit Graph

90 Commits

Author SHA1 Message Date
Gregory Nutt
780cb0911d Add board configuration for the SAMD21 Xplained board 2015-06-21 07:48:46 -06:00
Gregory Nutt
379a1e114f SAMD21: Add pin multiplexing definitions 2015-06-20 18:55:23 -06:00
Gregory Nutt
97d697f7c4 SAMD2x: Eliminate a warning 2015-06-20 16:06:01 -06:00
Gregory Nutt
5eeabf29dd Missed a few in previous commit 2015-06-20 15:55:56 -06:00
Gregory Nutt
1d3abb18e4 SAMD21: Update GCLKs for SAMD21 2015-06-20 15:55:21 -06:00
Gregory Nutt
d9863f11f6 SAMD21: Update PM definitions for SAMD21 support 2015-06-20 15:32:57 -06:00
Gregory Nutt
28ae44eb02 SAMD21: Add memory map header file 2015-06-20 15:02:25 -06:00
Gregory Nutt
d00ed2d780 Add configuration support for SAMD21 2015-06-20 14:31:53 -06:00
Gregory Nutt
e013bb49a8 SAML21 USB: Add host side register defintiions 2015-06-20 11:09:35 -06:00
Gregory Nutt
d298b8048c SAML21 USB: Add device side register defintiions 2015-06-20 09:25:06 -06:00
Gregory Nutt
b6629c0745 SAML21: Partial USB header file 2015-06-20 07:13:35 -06:00
Gregory Nutt
b39cd9ee93 Refresh SAMV71-Xult configurations 2015-06-17 12:01:33 -06:00
Gregory Nutt
ad7eb4e24f Update some comments 2015-06-17 06:31:30 -06:00
Gregory Nutt
3c06202152 SAM4L DMA: Need separate peripheral IDs for TX and RX 2015-06-17 06:23:07 -06:00
Gregory Nutt
a5175456ed SAML21: Add OPAMP register definition header file 2015-06-16 15:54:49 -06:00
Gregory Nutt
61543db536 SAML21: Add DAC register definition header file 2015-06-16 13:32:27 -06:00
Gregory Nutt
5ee4cf6ae4 SAML21: Add AES register definition header file 2015-06-16 12:22:49 -06:00
Gregory Nutt
b5cc782205 SAML21 DMAC: Mostly cosmetic changes 2015-06-16 10:39:21 -06:00
Gregory Nutt
08dcb6dc8d SAML21 DMA: Fix a logic error. Since the write back descriptors overly the base descriptors, we need to do some special things in order to correctly free any allocated descriptors 2015-06-16 10:07:26 -06:00
Gregory Nutt
b1230eb951 Fix a comment 2015-06-15 15:09:23 -06:00
Gregory Nutt
9511364a03 SAML21 minor stuff 2015-06-14 14:27:58 -06:00
Gregory Nutt
01c5c63369 SAML21: Completes first rought cut of DMAC driver 2015-06-14 13:29:59 -06:00
Gregory Nutt
4f8db55462 SAML21 DMA: BASEADDR and WRBADDR can only be written while the DMAC is disabled 2015-06-14 11:46:44 -06:00
Gregory Nutt
fb6252aa6f SAML21 DMA: More DMA logic. Still incomplete 2015-06-14 11:26:52 -06:00
Gregory Nutt
c2f2919ab0 SAML21 DMA: Add logic to set up base and writeback table addresses 2015-06-14 10:51:10 -06:00
Gregory Nutt
1f6f3d7bb2 Fix reversed arguments in SAML21 DMA logic 2015-06-14 08:52:39 -06:00
Gregory Nutt
75077f4728 SAML21: Add DMA descriptor management logic 2015-06-14 08:48:25 -06:00
Gregory Nutt
8c8b2d926b SAMD21: Add build framework for DMA support. Nothing there yet except for skeletal logic taken from SAM3/4. 2015-06-13 15:06:37 -06:00
Gregory Nutt
26518df3ed SAML21: Add DMAC register definition header file 2015-06-13 10:16:07 -06:00
Gregory Nutt
075261f5ee SAML21: Since SERCOM5 usese a different output channel, it will also need a different GCLK generator 2015-06-10 08:38:35 -06:00
Gregory Nutt
9be151cdbb SAML21: A different SLOW clock must be used with SERCOM5 2015-06-10 08:18:05 -06:00
Gregory Nutt
cae38625f8 SAM4L: Fix some issues from loast commit. Now running off DFLL with source clock = XOSCK32K 2015-05-26 13:25:39 -06:00
Gregory Nutt
b96a141e8a SAML21-Xlplained: Add options to enable XOSC32K and to use it as the DFLL source; NSH configure now uses DFLL with OSC16M source 2015-05-26 10:39:38 -06:00
Gregory Nutt
fe175fbc16 SAMD20: Fixes the problem introduced with the SAML21 integration 2015-05-25 10:13:06 -06:00
Gregory Nutt
643a98a0a8 SAML21: Fix issue with open loop operation; Add configuration options to select clock source 2015-05-24 10:27:37 -06:00
Gregory Nutt
6973337ccd Fix numerous typos in configuration variable names. Tracked down by Alan Carvalho de Assis 2015-05-23 17:08:35 -06:00
Gregory Nutt
8e71f90d84 SAML21: Add missing support for GCLK8 2015-05-23 17:02:13 -06:00
Gregory Nutt
d495834882 SAML21: Several SERCOM fixes. No gets UART output, but at the wrong BAUD 2015-05-23 13:08:28 -06:00
Gregory Nutt
84ca7f4a46 SAM4L: Re-order some clock initialization. There was a dependency of GCLK0 on DFLL, but DFLL was being enabled after GCLK0 2015-05-23 11:01:22 -06:00
Gregory Nutt
41f9fb8c62 SAML21: Fix some register definitions; board OSC16M frequency 2015-05-23 10:54:51 -06:00
Gregory Nutt
601aa6e358 SAMD/L: Change ordering of some initialization steps to match Atmel sample code. Add Errate 13134 support. SAML wait states changed to 1. Sample code is using 0 2015-05-23 08:55:06 -06:00
Gregory Nutt
1c82e961f5 SAML21. With these changes, the board now builds without error 2015-05-22 10:36:37 -06:00
Gregory Nutt
0eee2c40a8 SAML21: Rename sam_gclk.c to samd_gclk.c. Create saml_gclk.c with corrected logic for the SAML21 2015-05-22 07:28:19 -06:00
Gregory Nutt
2314cbd37e SAML21 clock config: Fix a misthink in last commit. Move setting of ONDEMAND to after clock is enabled in most cases 2015-05-21 16:50:55 -06:00
Gregory Nutt
2478184c22 SAML21: Clean up a few more compilation issues 2015-05-21 16:23:15 -06:00
Gregory Nutt
a0b9e26aba SAML21: Add logic to set MCLK CPU and related dividers 2015-05-21 13:40:34 -06:00
Gregory Nutt
ed47a08832 SAML21: Add FDPLL96M configuration logic 2015-05-21 11:52:38 -06:00
Gregory Nutt
786b292b1f SAML21: Add logic to support GLCK peripheral channels; add logic to configure FDPLL lock timer and ref clock GCLKs 2015-05-21 10:47:41 -06:00
Gregory Nutt
544a789714 SAMD/L: Move GCLK configuration logic to its own C file 2015-05-21 10:07:42 -06:00
Gregory Nutt
ac2fe431aa SAML21: Add some parameter checking for FDPLL96M 2015-05-20 13:51:40 -06:00