Gregory Nutt
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9ed0387379
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Olimex-LPC1766-STK: Enable procfs in NSH configuration. Automount /proc on startup.
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2016-12-05 08:52:40 -06:00 |
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Gregory Nutt
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6cff0a7012
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SAMA5 PWM: Minor improvement to a loop
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2016-12-04 15:48:13 -06:00 |
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Gregory Nutt
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39c4ecbcd0
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SAMA5 PWM: Costmetic
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2016-12-04 15:39:53 -06:00 |
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Gregory Nutt
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ff76ebfd31
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SAMA5 does not build when executing from SDRAM before board frequencies are not constant. Rather, the bootloader configures the clocking and we must derive the clocking from the MCK left by the bootloader. This means lots more computations. This is untested on initial commit because I don't have a good PWM test setup right now.
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2016-12-04 15:25:43 -06:00 |
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Masayuki Ishikawa
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d92a7886a4
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SAM3/4: Add SMP support for the dual-core SAM4CM
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2016-12-04 07:23:31 -06:00 |
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Masayuki Ishikawa
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84900298b7
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ARMv7-M SMP: Applied the latest changes for ARMv7A-SMP
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2016-12-04 06:49:49 -06:00 |
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Gregory Nutt
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9c65b0321d
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Eliminate some warnings
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2016-12-04 06:24:24 -06:00 |
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Gregory Nutt
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920a9592d1
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Fix a naming collision introduced in last big commit
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2016-12-03 18:19:08 -06:00 |
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Gregory Nutt
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7467329a98
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Eliminate CONFIG_NO_NOINTS. Lots of files changed -> lots of testing needed.
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2016-12-03 16:28:19 -06:00 |
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Gregory Nutt
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ad3897531f
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C5471 Ethernet now supports CONFIG_NET_NOINTS
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2016-12-03 12:17:55 -06:00 |
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Gregory Nutt
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43459fe75e
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DM09x0 Ethernet now supports CONFIG_NET_NOINTS
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2016-12-03 11:42:15 -06:00 |
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Gregory Nutt
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bfa1da14e2
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LM3S Ethernet now supports CONFIG_NET_NOINTS
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2016-12-03 08:32:49 -06:00 |
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Gregory Nutt
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1851e9e837
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SAMA5D3: Add support for CONFIG_NET_NOINTS to EMACA and GMAC driver.
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2016-12-02 16:36:27 -06:00 |
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Gregory Nutt
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b95e1f656b
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i.MX6: Add an untested SPI driver taken directly from the i.MX1 port.
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2016-12-02 13:51:07 -06:00 |
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Alan Carvalho de Assis
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cd119ad544
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GPDMA driver for the LPC43xx. The GPDMA block is basically the same as the LPC17xx. Only the clock configuration is different and LPC43xx has four different DMA request sources, where LPC17xx has only two.
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2016-12-01 18:01:04 -06:00 |
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Sebastien Lorquet
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db24f237d7
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STM32L4: Correct USART1/2 definitions. Use default mbed UART4 settings
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2016-12-01 09:00:59 -06:00 |
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Alan Carvalho de Assis
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8b3a6d1eca
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LPC43 SD/MMC: Correct some git definitions on SMMC control register in lpc43_sdmmc.h
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2016-11-30 14:50:32 -06:00 |
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Janne Rosberg
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a03d26e88d
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stm32_otghshost: if STM32F446 increase number of channels to 16
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2016-11-30 12:17:12 -06:00 |
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Gregory Nutt
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44668c00a0
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LPC17 Ethernet: Tiny, trivial, cosmetic spacing change
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2016-11-30 12:16:21 -06:00 |
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Gregory Nutt
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934aded293
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arch/: Adapt all Ethernet drivers to work as though CONFIG_NET_MULTIBUFFER were set. Remove all references to CONFIG_NET_MULTIBUFFER
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2016-11-29 16:06:48 -06:00 |
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Gregory Nutt
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f06d521c10
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Minor extensions to some comments
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2016-11-29 10:01:38 -06:00 |
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Gregory Nutt
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79bb895073
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i.MX6: Don't output the alphabet if CONFIG_DEBUG_FEATURES is not set.
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2016-11-29 08:34:22 -06:00 |
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Gregory Nutt
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a8b69c3efe
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Back out a debug change that was included in commit
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2016-11-29 07:51:49 -06:00 |
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Marc Rechté
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3f91bd6056
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STM32 DAC: Fix shift value whenever there are is a DAC2 and, hence, up to three interfaces.
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2016-11-29 07:03:54 -06:00 |
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Gregory Nutt
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d65be718c2
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sched_note: Extend OS instrumentation to include some SMP events.
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2016-11-27 17:14:57 -06:00 |
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Gregory Nutt
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cbf98ae0a0
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ARMv7 GIC: SGIs are non-maskable but go through the same path as other, maskable interrupts. Added logic to serialize SGI processing when necessary.
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2016-11-27 13:18:34 -06:00 |
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Gregory Nutt
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21e42d18c1
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ARMv7-A/i.MX6 SMP: Move SMP coherernt cache setup to earlier in initialization of CPUn, n>0
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2016-11-27 11:28:24 -06:00 |
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Gregory Nutt
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cd54c71dc1
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ARMv7-A/i.MX6: Modify handling of the SMP cache coherency configuration so that it is identical to the steps from the TRM. Makes no differenct, however.
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2016-11-27 10:21:46 -06:00 |
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Gregory Nutt
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278d8330d6
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arm_scu.c edited online with Bitbucket. Fux some typos.
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2016-11-27 02:59:42 +00:00 |
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Gregory Nutt
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3f6eadc238
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ARMv7-A: Fix some SCU SMP logic
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2016-11-26 18:41:48 -06:00 |
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Gregory Nutt
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546e352830
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i.MX6: Add some controls to enable SMP cache coherency in SMP mode
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2016-11-26 17:46:20 -06:00 |
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Gregory Nutt
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3353d9280f
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i.MX6: Disable non-cached region support. Add SCU register definitions.
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2016-11-26 17:03:57 -06:00 |
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Gregory Nutt
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8dc79bb7ef
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Update comments and README file
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2016-11-26 16:02:37 -06:00 |
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Gregory Nutt
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b2ba12e02a
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SMP: Basic function
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2016-11-26 14:23:23 -06:00 |
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Gregory Nutt
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785ed5faf2
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SMP: A few more compile/link issues. Still problems.
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2016-11-26 13:20:11 -06:00 |
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Gregory Nutt
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6ff6da083f
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Fix a few compile related issues from the last commit
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2016-11-26 12:23:09 -06:00 |
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Gregory Nutt
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aae306e942
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i.MX6 SMP: Inter-CPU data no saved in a non-cacheable region.
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2016-11-26 12:04:02 -06:00 |
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Gregory Nutt
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dda0ac8b21
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Update comments
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2016-11-26 11:06:24 -06:00 |
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Gregory Nutt
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9376296e99
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Merge remote-tracking branch 'origin/master' into imx6-smp
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2016-11-26 11:02:55 -06:00 |
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Gregory Nutt
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8bacb1e426
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Update comments
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2016-11-26 11:02:21 -06:00 |
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Gregory Nutt
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bdf570ea08
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Fix typos in comments
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2016-11-26 10:42:25 -06:00 |
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Gregory Nutt
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2fba04f752
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i.MX6 SMP: Beginning of non-cacheable region (incomplete)
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2016-11-26 10:37:06 -06:00 |
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Gregory Nutt
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61b45a8544
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i.MX6: Add some comments
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2016-11-26 09:27:29 -06:00 |
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Gregory Nutt
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e3fe320e08
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SMP: Add support for linking spinlocks into a special, non-cached memory region.
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2016-11-26 08:47:03 -06:00 |
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Maciej Wójcik
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0d0b1b64e2
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Fix for F1 RTC Clock, tested on F103
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2016-11-25 06:17:18 +01:00 |
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Gregory Nutt
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b08fb33c28
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SMP: Fix typos in some conditional compilation
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2016-11-24 17:59:45 -06:00 |
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Gregory Nutt
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7f636f2280
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SMP: Add spin_trylock(). Use this in conditions where other CPUs need to stopped but we cannot call enter_critical_section.
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2016-11-24 13:33:43 -06:00 |
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Gregory Nutt
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f77dcdf323
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ARMv7-A SMP: Add a little logic to signal handling.
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2016-11-24 11:45:05 -06:00 |
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Gregory Nutt
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c03d126da6
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arm_cpupause.c edited online with Bitbucke. What was I thinking... Back out previous change.
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2016-11-24 04:45:07 +00:00 |
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Gregory Nutt
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19e7f2210e
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arm_cpupause.c edited online with Bitbucket. Fix a typo in a comment.
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2016-11-24 04:24:40 +00:00 |
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