Commit Graph

232 Commits

Author SHA1 Message Date
Abdelatif Guettouche
af5e0c620f Rename MODULE_TEXT to TEXT_HEAP as the latter is more generic.
Signed-off-by: Abdelatif Guettouche <abdelatif.guettouche@espressif.com>
2021-06-18 07:14:17 -05:00
Masayuki Ishikawa
f0b689a063 arch: arm: Add select ARCH_HAVE_MODULE_TEXT to ARCH_CHIP_CXD56XX
Summary:
- I noticed that make savedefconfig shows warnings regarding
  'unmet direct dependencies (ARCH_HAVE_MODULE_TEXT)'
- This commit fixes this issue

Impact:
- None

Testing:
- Tested with spresense:wifi

Signed-off-by: Masayuki Ishikawa <Masayuki.Ishikawa@jp.sony.com>
2021-06-04 01:40:37 -05:00
chao.an
6c40185985 arm/v7-a/fpu: add VFP-v3 D32 support
Signed-off-by: chao.an <anchao@xiaomi.com>
2021-05-21 09:55:00 -03:00
Michael Jung
f3a5675cc4 stm32l5: Architecture Support for STM32L5
Architecture support for STMicroelectronics STM32L552xx and STM32L562xx
MCUs.  This is based on corresponding code for STM32L4, but has been
considerably adjusted.  Tested with Nucleo-L552ZE-Q and STM32L562E-DK
boards with simple NSH configurations.

Signed-off-by: Michael Jung <mijung@gmx.net>
2021-03-16 12:04:00 -07:00
Masayuki Ishikawa
8085010ae8 arch: arm: Add 'select ARM_HAVE_WFE_SEV' to ARCH_CHIP_RP2040
Summary:
- This commit adds 'select ARM_HAVE_WFE_SEV' to ARCH_CHIP_RP2040
- Now NuttX spinlock uses WFE/SEV to reduce power consumption
- Also, modify a comment on rp2040

Impact:
- rp2040 only

Testing:
- Tested with raspberrypi-pico:smp

Signed-off-by: Masayuki Ishikawa <Masayuki.Ishikawa@jp.sony.com>
2021-02-24 19:12:22 -08:00
Yuichi Nakamura
01699e00e0 arm/rp2040: Raspberry Pi Pico SMP support 2021-02-25 07:20:59 +09:00
David Sidrane
62321fa5db s32k1xx:Support ramfunc 2021-02-23 18:11:41 -08:00
Yuichi Nakamura
ed1da60f52 arch/arm: Add RP2040 (Raspberry Pi Pico's SoC) support 2021-02-20 03:45:24 -08:00
Alan C. Assis
b0d611d3dc Replace ARM_LWL_CONSOLE with generic LWL_CONSOLE 2021-01-31 06:14:50 -08:00
Matias N
e5200d4af9 nrf52: add stackcheck support 2021-01-27 09:49:16 -08:00
Matias N
ebe596bcd1 nrf52: enable and fix build for SPI BITORDER 2021-01-16 21:04:44 -08:00
Masayuki Ishikawa
6158b6b77b spinlock: Introduce SP_WFE() and SP_SEV()
Summary:
- This commit introduces SP_WFE() and SP_SEV() to be used for spinlock
- Also, use wfe/sev instructions for ARMV7-A to reduce power consumption

Impact:
- ARMV7-a SMP only

Testing:
- sabre-6quad:smp (QEMU, dev board)
- maix-bit:smp, esp32-devkitc:smp, spresense:smp sim:smp (compile only)

Signed-off-by: Masayuki Ishikawa <Masayuki.Ishikawa@jp.sony.com>
2020-12-11 05:58:35 -06:00
liuhaitao
d5c6bfe6cf arch: Add custom arch chip build support
Just like custom board build support, add custom arch chip build
support.

Change-Id: I71c87e6b2195501a1b1d728b71d7cbe344951057
Signed-off-by: liuhaitao <liuhaitao@xiaomi.com>
2020-10-20 14:48:16 +08:00
raiden00pl
35a5036e32 nrf52: add serial termios support 2020-09-30 09:09:04 -03:00
Xiang Xiao
031984f76a arch/arm: Select arm family when ARCH_ARM1136J/ARCH_ARM1156T2/ARCH_ARM1176JZ is defined
Signed-off-by: Xiang Xiao <xiaoxiang@xiaomi.com>
2020-09-22 23:05:29 +01:00
Xiang Xiao
7faf72cabc arch/arm: Add ARCH_ARMV6M Kconfig to prepare the support of CortexM0+
also align with the armv7m implementation

Signed-off-by: Xiang Xiao <xiaoxiang@xiaomi.com>
2020-09-22 23:05:29 +01:00
raiden00pl
a2b00fd348 nrf52: add PWM support 2020-09-13 10:57:11 -03:00
Matias N
459ad29799 nrf52: extend systimer support; support WFI/WFE again
This commit exends systimer options for nRF52 arch. It is possible
to use ARM SysTick either for tickless or non-tickless mode. Also,
it is possible to use the RTC peripheral for tickless mode. This
also re-enables support for WFI/WFE sleep if RTC is used, since
this counter continues to run in this mode (in contrast to SysTick).
2020-09-10 12:10:20 +02:00
Masayuki Ishikawa
08c4376606 arch, include, sched : Refactor ARCH_GLOBAL_IRQDISABLE related code
Summary:
- ARCH_GLOBAL_IRQDISABLE was initially introduced for LC823450 SMP
- At that time, i.MX6 (quad Cortex-A9) did not use this config
- However, this option is now used for all CPUs which support SMP
- So it's good timing for refactoring the code

Impact:
- Should have no impact because the logic is the same for SMP

Testing:
- Tested with board: spresense:smp, spresense:wifi_smp
- Tested with qemu: esp32-core:smp, maix-bit:smp, sabre-6quad:smp
- Build only: lc823450-xgevk:rndis, sam4cmp-db:nsh

Signed-off-by: Masayuki Ishikawa <Masayuki.Ishikawa@jp.sony.com>
2020-09-03 10:20:20 +08:00
leomarradke
f5912b5cba arch: samd5e5 : Oneshot, freerun and tickless available support. All support runs on Timer/Counter (TC).
Some fixes in external interrupt controller (EIC) and clockconfig.

Testing:
- Build check only.

Signed-off-by: Leomar Mateus Radke  <leomar@falker.com.br>
2020-08-18 12:42:44 -03:00
SPRESENSE
d560ce65ff cxd56xx: spresense: Add some improvements and fix bugs for Spresense board
- Add new functions of GNSS
- Support the lower PWM frequency
- Add CONFIG_CPUFREQ_RELEASE_LOCK
- Add high speed ADC support
- Add HPADC input gain configuration
- Add eMMC device
- Frame buffer support
- Fix SD/GNSS/sensor drivers not worked
- Build errors
- Fix nxstyle issues
2020-07-28 09:13:05 +02:00
Brennan Ashton
aef6f4ae09 Add initial support for the QuickLogic EOS S3
The QuickFeather board added as an initial target.
These featrues are minimally implemented:
  * Clock Configuration -- All clocking registers are defined and
    configuration is used to setup the HSO, M4 Core, and M4 Perif
    clocks.  Additionally some clock debugging is stubbed for
    bringing out clock paths to IO pins.

  * UART -- The lowputc as well as the serial driver is implemnted
    for the single UART device. Currently the configuration is
    hard coded, but uses the proper interfaces to later fill in.

  * SysTick -- The system tick timer is implemented and clocking
    properly. Tickless mode is not yet implemented.

  * Interrupts -- The interrupt system is implemented and verified
    using the UART and SysTick systems.

  * GPIO -- GPIO and IOMUX systems are defined and implemented.
    This is verified using the UART as well as the Arch LED
    system.  The GPIO interupt system is stubbed out but not
    implemented.

  * Arch LEDS -- The blue LED as part of the RGB LED is configured
    and attached to the Arch LED system.  This indicates the device
    coming online as well as when a hardfault is triggered.

Applications and Testing:
  * There is a nsh configuration implemented that includes debug
    features as well as the ostest, getprime, and mem test.
    All of these have been run and verified.

Signed-off-by: Brennan Ashton <bashton@brennanashton.com>
2020-07-15 11:25:30 +01:00
Nathan Hartman
168a4cafc6 Add support for STM32G474: Modify existing files
Add support for the STM32G474 family of microcontrollers and the
B-G474E-DPOW1 Discovery Board, which features a STM32G474RET6.

This is a major pull request as it adds support for an entirely
new family of STM32. This support is implemented in
arch/arm/src/stm32 and shares implementation with other STM32
families supported by that code, such as the 'L15xx, 'F10xx,
'F20xx, 'F3xxx, and 'F4xxx.

arch/arm/Kconfig:
arch/arm/include/stm32/chip.h:
arch/arm/include/stm32/irq.h:
arch/arm/src/stm32/Kconfig:
arch/arm/src/stm32/hardware/stm32_adc.h:
arch/arm/src/stm32/hardware/stm32_adc_v2.h:
arch/arm/src/stm32/hardware/stm32_dma.h:
arch/arm/src/stm32/hardware/stm32_dma_v1.h:
arch/arm/src/stm32/hardware/stm32_flash.h:
arch/arm/src/stm32/hardware/stm32_i2c.h:
arch/arm/src/stm32/hardware/stm32_i2c_v2.h:
arch/arm/src/stm32/hardware/stm32_memorymap.h:
arch/arm/src/stm32/hardware/stm32_pinmap.h:
arch/arm/src/stm32/hardware/stm32_tim.h:
arch/arm/src/stm32/stm32_allocateheap.c:
arch/arm/src/stm32/stm32_dma.c:
arch/arm/src/stm32/stm32_dma_v1.c:
arch/arm/src/stm32/stm32_dumpgpio.c:
arch/arm/src/stm32/stm32_gpio.c:
arch/arm/src/stm32/stm32_gpio.h:
arch/arm/src/stm32/stm32_lowputc.c:
arch/arm/src/stm32/stm32_rcc.c:
arch/arm/src/stm32/stm32_rcc.h:
arch/arm/src/stm32/stm32_serial.c:
arch/arm/src/stm32/stm32_syscfg.h:
arch/arm/src/stm32/stm32_uart.h:

    * Add architectural support to existing NuttX files. This
      makes the STM32G474 family parts accessible to the system.

With big thanks for detailed code review:
    David Sidrane (davids5)
    Mateusz Szafoni (raiden00)
    Abdelatif Guettouche (Ouss4)
2020-05-23 09:02:00 -03:00
qiaowei
2376d8a266 Porting arch/armv8-m support
1. Add dsp extension; float point based on hardware and software.
2. Delete folder "iar"
3. Add tool chain for cortex-M23 and cortex-M35p

Signed-off-by: qiaowei <qiaowei@xiaomi.com>
Change-Id: I5bfc78abb025adb0ad4fae37e2b444915f477fe7
2020-04-26 07:43:37 -06:00
Xiang Xiao
cde88cabcc Run codespell -w with the latest dictonary again
Signed-off-by: Xiang Xiao <xiaoxiang@xiaomi.com>
2020-02-23 22:27:46 +01:00
Masayuki Ishikawa
f38f39d410 arch: arm: Select ARCH_GLOBAL_IRQDISABLE for iMX6
NOTE: SMP related behaviour will be same as armv7-m SMP

Signed-off-by: Masayuki Ishikawa <Masayuki.Ishikawa@jp.sony.com>
2020-02-19 20:04:58 -06:00
YAMAMOTO Takashi
7513cb6921 CONFIG_ARM_SEMIHOSTING_HOSTFS: mention limited support of directories 2020-02-18 17:11:59 +08:00
David Sidrane
f506e2bd72 Merged in david_s5/nuttx/master_h7 (pull request #1058)
STM32H7:Flash driver and Serious BUG fixes.

* arch/arm/Kconfig:Add ARCH_HAVE_PROGMEM for STM32H7

* stm32h7:Add FLASH progmem support

* stm32h7:pwr add CPUCR & D3CR

* stm32h7:syscfg Add PWRCR

* stm32h7:rcc Properly configure VOS and Flash

Approved-by: Gregory Nutt <gnutt@nuttx.org>
2019-10-22 19:49:49 +00:00
Masayuki Ishikawa
4c53f0d232 Merged in masayuki2009/nuttx.nuttx/spresense_smp (pull request #1041)
Spresense smp

* arch: arm: Add ARCH_GLOBAL_IRQDISABLE to ARCH_CHIP_CXD56XX in Kconfig

    Signed-off-by: Masayuki Ishikawa <Masayuki.Ishikawa@jp.sony.com>

* arch: arm: cxd56xx: Make fpuconfg() public in cxd56_start.c

    NOTE: fpuconfig() is called in both cxd56_start.c and cxd56_cpustart.c

    Signed-off-by: Masayuki Ishikawa <Masayuki.Ishikawa@jp.sony.com>

* arch: arm: cxd56xx: Add support for SMP

    NOTE: To run cxd56xx in SMP mode, new boot loader which will be
    released later must be used.

    Signed-off-by: Masayuki Ishikawa <Masayuki.Ishikawa@jp.sony.com>

* arch: arm: cxd56xx: Add irq routing for SMP in cxd56_irq.c

    NOTE: In cxd56xx, each external interrupt controller can be
    accessed from a local APP_DSP (Cortex-M4F) only. This commit
    supports IRQ routing for SMP by calling up_send_irqreq() in
    both up_enable_irq() and up_disable_irq().

    Signed-off-by: Masayuki Ishikawa <Masayuki.Ishikawa@jp.sony.com>

* boards: spresense: Add smp configuration

    Signed-off-by: Masayuki Ishikawa <Masayuki.Ishikawa@jp.sony.com>

Approved-by: Gregory Nutt <gnutt@nuttx.org>
2019-10-03 13:06:21 +00:00
David Sidrane
c6689b3093 stm32h7 SDMMC support IDMA, Interrupt driven, pullups and SDIO
* stm32h7:Supports ARMV7M Stack check
* stm32h7:sdmmc bug fix writting address 0
* stm32h7:sdmmc Clean up timming
* stm32f7:Kconfig typos, formating
* stm32f7:sdmmc use binary not
* stm32f7:nxstyle formatting
* stm32h7:SDMMC Kconfig add Block Setup, Preflight, Delayed Invalidate
* stm32h7:Correct value of ICR reset
* stm32h7:SDMMC support IDMA, Interrupt driven, pullups and SDIO
* stm32h7:Add AXI
* stm32h7:Workaround for Errata 2.2.9 Reading from AXI SRAM may lead to data read corruption
2019-09-19 16:13:24 +00:00
David Sidrane
64fb11c1b8 Merged in david_s5/nuttx/master_h7 (pull request #1012)
Master h7

* stm32h7:spi allow more clock sources

* stm32h7 has ARCH_HAVE_I2CRESET

Approved-by: Gregory Nutt <gnutt@nuttx.org>
2019-08-20 14:41:13 +00:00
Gregory Nutt
bcfabcbe53 This commit brings the initial files for a port to the NXP S32K1xx family. This is very much a work in progress and is little more that a partial configuration/build environment and some S32K1xx register definition header files
Squashed commit of the following:

    arch/arm/src/s32k1xx/hardware/s32k1xx_mcm.h:  Add MCM register definition file.
    arch/arm/src/s32k1xx/hardware/s32k1xx_memorymap.h:  Add memory map definition file.
    arch/arm/src/s32k1xx/hardware/s32k1xx_cmu.h:  Add CMU register definition file.
    arch/arm/src/s32k1xx/hardware/s32k1xx_pcc.h:  Add PCC register definition file.
    arch/arm/src/s32k1xx/hardware/s32k1xx_scg.h:  Add SCG register definition file.
    arch/arm/src/s32k1xx:  Add initial Make.defs files.
    Basic configuration logic for the S32K1 family.
2019-08-12 12:12:58 -06:00
Gregory Nutt
240926c995 Beginning to update comments to reflect new organization of the boards/ sub-directory. 2019-08-08 08:46:54 -06:00
David S. Alessio
ced0dc1e16 arch/arm/src/armv7-m: Add ARMv7-M setjmp/longjump functions. 2019-08-06 15:59:19 -06:00
Alin Jerpelea
a1c991d921 Merged in alinjerpelea/nuttx (pull request #963)
Move boards to boards folder

* boards: rename configs folder to boards

    This is the proposed layout after the change:

    boards: - folder containing board folders
            <board>: - name of each board
                    drivers: - extra drivers specific for platform
                    include: - header files for the boars
                    scripts: - extra scripts specific for platform
                        src: - board specific code
                      tools: - extra tools specific for platform
                    <config>: - board specific configuration(s)

    Note:
    <xxx> names are dependent on platform

    This is a logical change to aim to the arch layout but this is a
    huge change it should be done in several steps to lower the risk.

    Signed-off-by: Alin Jerpelea <alin.jerpelea@sony.com>

* Kconfig: replace configs with boards

    The change is needed after the path change

    Signed-off-by: Alin Jerpelea <alin.jerpelea@sony.com>

* Makefile: replace configs with boards

    The change is needed after the path change

    Signed-off-by: Alin Jerpelea <alin.jerpelea@sony.com>

* Makefile.*: replace configs with boards

    The change is needed after the path change

    Signed-off-by: Alin Jerpelea <alin.jerpelea@sony.com>

* Make.defs: replace configs with boards

    The change is needed after the path change

    Signed-off-by: Alin Jerpelea <alin.jerpelea@sony.com>

* .sh: replace configs with boards

    The change is needed after the path change

    Signed-off-by: Alin Jerpelea <alin.jerpelea@sony.com>

* .mk: replace configs with boards

    The change is needed after the path change

    Signed-off-by: Alin Jerpelea <alin.jerpelea@sony.com>

* .c & .h: replace configs with boards

    The change is needed after the path change

    Signed-off-by: Alin Jerpelea <alin.jerpelea@sony.com>

* .bat: replace configs with boards

    The change is needed after the path change

    Signed-off-by: Alin Jerpelea <alin.jerpelea@sony.com>

Approved-by: Gregory Nutt <gnutt@nuttx.org>
2019-08-05 12:04:14 +00:00
Gregory Nutt
ad1adffba6 arch/arm/src/lpc11xx, arch/arm/include/lpc11xx, configs/lpcxpresso-lpc1115: Support for the LPCXpresso-LPC1115 and for the LPC1115 architecture in general was removed after NuttX-7.30. The LPC11 port was never really used (to my knowledge) and was no longer supported. A snapshot of the port is still available in the Obsoleted repository. It can be brought back into the main repository at any time if anyone is willing to provide support for the architecture. 2019-07-11 16:16:11 -06:00
jjlange
e5dfd805e6 Merged in jjlange/nuttx/lpc40xx (pull request #946)
Add support for LPC40xx family chips

* Corrected a few peripheral definitions and pin functions for the LPC17xx family.
    Added configuration options, chip definitions, and additional pin functions for the LPC40xx family.
    Added board configurations for Embedded Artists LPC4088 Quickstart board and LPC4088 Developer's kit.  These configurations are still something of a work in progress.  In particular, the LCD functionality is untested.

* First pass rename in *.c and *.h files.

* Renamed LPC17XX to LPC17XX_40XX in config files

* Rplaced LPC17xx with LPC17xx/LPC40xx in .c files

* Replaced LPC17xx with LPC17xx/LPC40xx in .h files

* Updated some documentation

* Working on moving directories

* moved arch/arm/src/lpc17xx and arch/arm/include/lpc17xx to lpc17xx_40xx

* Renamed LPC17_* constants / configuration options to LPC17_40_*

* Updated chip family name defines

* Renamed some chip-specific files

* Updated references to renamed files

* Updated references to lpc17_ to lpc17_40_

* Renamed source files from lpc17_* to lpc17_40_*

* Clean up white space

Approved-by: Gregory Nutt <gnutt@nuttx.org>
2019-07-11 16:50:00 +00:00
Dave Marples
a2def2a4d1 arch/arm/src/common/up_lwl_console.c: Add support for a 'Lightweight Link' protocol between a target and debugger for use when you need a console but the target doesn't have a spare serial port or other available resource. 2019-06-03 07:31:17 -06:00
raiden00pl
64feadfc21 Merged in raiden00/nuttx_lora/g0_port (pull request #878)
arch/stm32g0, configs/nucleo-g071rb: the basic NSH configuration is now functional

Approved-by: Gregory Nutt <gnutt@nuttx.org>
2019-05-30 11:44:10 +00:00
Gregory Nutt
5cdd038df2 Rename STM32F0L0 to STM32F0L0G0 since it now alsow supports the STM32G0 thanks to Mateusz Szafoni's contribution
Squashed commit of the following:

    arch/arm:  Rename include/stm32f0l0 and src/stm32f0l0 to stm32f0l0g0.

    Change all occurrences of lower-case stm32f0l0 to stm32f0l0g0.

    Change all occurrences of upper-case STM32F0L0 to STM32F0L0G0.
2019-05-27 08:16:24 -06:00
raiden00pl
9c676a9e67 Merged in raiden00/nuttx_lora (pull request #876)
Initial support for STM32G0

configs: initial support for nucleo-g071rb

Approved-by: Gregory Nutt <gnutt@nuttx.org>
2019-05-27 11:48:57 +00:00
Nobuto Kobayashi
eba004d498 arch/arm/src/cxd56xx and arch/arm/include/cxd56xx: Add initial CXD56xx chip sources. 2019-04-22 07:51:22 -06:00
Valmantas Paliksa
8cea24fdf0 arch/arm/src/stm32f: Added support for TICKLESS mode. 2019-04-12 08:10:02 -06:00
zhangyuan7
3d171340db arch/arm/armv7-a: Support thumb mode and fix interworking issue. 2019-03-19 11:10:41 -06:00
Xiang Xiao
64252a298f arch/: Unify the cache interface for all architectures 2019-03-19 10:37:13 -06:00
Xiang Xiao
2f208fdde8 arch/Kconfig: Move FPU options to a common place and unify the usage by removing ARCH_CORTEXRxF. 2019-03-19 10:26:15 -06:00
Gregory Nutt
5fe6981c9a Squashed commit of the following:
libs/libc/pthread/pthread_spinlock.c:  Resolve several TODO issues by accessing up_testset() via the boardctl() interface rather than attempting to call it directly.

    configs/boardctl.c, include/sys/boardctl.h:  Add access to architecture-specific up_testset() via boardctl().

    arch/Kconfig's, sched/Kconfig, and include/nuttx/spinlock.h:  Spinlocks are not available unless the architecture supports the up_testset() operation.
2019-03-04 14:22:50 -06:00
Gregory Nutt
f546801fb3 Squashed commit of the following:
arch/arm/src/tiva/hardware:  Add CC13xx SMPH and AUX SMPH header files.  Still need DDI0 OSC header file for CC13x0 compilation.

    arch/arm/src/tiva/cc13xx:  A few changes toward getting the launchxl-cc1310/nsh configuration to build
2019-01-23 11:48:50 -06:00
Petro Karashchenko
1727e47d2e Initial changes for BeagleBone Black board support (TI AM335x family based on Cortex-A8)
Squashed commit of the following:

Author: Gregory Nutt <gnutt@nuttx.org>
    Many small changes related to coding style.

Author: Petro Karashchenko <petro.karashchenko@gmail.com>
    configs/beaglebone-black:  Adds initial support for the BeagleBone Black board.
    arch/arm/src/am335x:  Adds initial support for the TI AM355x family.
2019-01-06 09:05:38 -06:00
Gregory Nutt
a0a537a9f0 arch/arm/src/bcm2708 and arch/arm/include/bcm2708: Remove all support for the BCM2708/2835. This was added only for support of the Pi Zero board which was previously removed. The support was minimal and unverified. The removed files can still be found in the Obsoleted directory. 2019-01-02 12:15:07 -06:00