Gregory Nutt
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487866b2b6
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SAMA5: Add basic SPI suppport (untested)
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2013-08-04 11:08:20 -06:00 |
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Gregory Nutt
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8194e6bbcf
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SAMA5: Add DMA suppport (untested)
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2013-08-04 10:44:18 -06:00 |
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Gregory Nutt
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a93b095ce4
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SAMA5: Add DMA controller register definitions
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2013-08-03 12:13:42 -06:00 |
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Gregory Nutt
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8b317e9ea3
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Standard configuration variables used to enable interupt controller debug; SAMA5: Correct handling of spurious interrupts
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2013-08-03 08:22:37 -06:00 |
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Gregory Nutt
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c7293535fe
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Various changes to get SAMA5 SDRAM working. Marginally functional, but there is more to be done
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2013-08-02 18:30:27 -06:00 |
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Gregory Nutt
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08a1ff5c79
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Correct some typos int he MPADDRCS register address definitions
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2013-08-02 12:06:11 -06:00 |
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Gregory Nutt
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b00d72a7f2
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SAMA5: More MMU-related changes to properly initialize SDRAM
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2013-08-02 11:11:57 -06:00 |
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Gregory Nutt
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894618f894
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SAMA5: Add logic to initialize SAMA5D3x-EK on-board SDRAM
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2013-08-01 16:58:55 -06:00 |
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Gregory Nutt
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70e1028d41
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SAMA5: Add DDR controller register definitions
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2013-08-01 12:27:41 -06:00 |
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Gregory Nutt
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35c3a49e1c
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ARMv7-A: Map all of .text, .bss, .data., stacks before enabling the MMU and caching. This is simpler and avoids fears I have about caching
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2013-08-01 10:05:33 -06:00 |
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Gregory Nutt
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f0e6d4f101
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ARMv7-A: Separate CONFIG_PAGING start-up logic into a different startup file. Too much conditional compilation.
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2013-08-01 07:41:00 -06:00 |
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Gregory Nutt
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b0045bc7e2
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SAMA5: Add an NSH configuration of the SAMA5D3x-EK board
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2013-07-31 10:46:13 -06:00 |
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Gregory Nutt
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8695c89aa4
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SAMA5: Modification of some CPSR-related inline functions
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2013-07-31 09:11:24 -06:00 |
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Gregory Nutt
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db20c5fc43
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Fix Cortex-A CPSR register field definition
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2013-07-30 19:05:24 -06:00 |
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Gregory Nutt
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391d300d4d
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SAMA5: Change mapping of vector tables to work around that fact that I don't understand how the AXI MATRIX remap works
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2013-07-30 16:19:52 -06:00 |
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Gregory Nutt
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16371b50e4
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ARMv7-A: Add cp15_disable_dcache(); SAMA5: nor_main.c no disables MMU and caches; Should not remap ISRAM to address 0x0 unless we booted into ISRAM
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2013-07-30 13:20:33 -06:00 |
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Gregory Nutt
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6f99994722
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More DAC changes from John Wharington
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2013-07-30 11:41:53 -06:00 |
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Gregory Nutt
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b75a0cf8be
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Add ARMv7-A irqdisable() inline function
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2013-07-30 11:37:09 -06:00 |
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Gregory Nutt
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84150fd7ed
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STM32 F3 I2C driver from John Wharington
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2013-07-30 10:35:17 -06:00 |
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Gregory Nutt
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4bdcceb3b3
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STM32 DAC DMA fixes from John Wharington
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2013-07-30 08:54:32 -06:00 |
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Gregory Nutt
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547f9be80f
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SAMA5: More cache and mmu inline utility functions
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2013-07-29 19:57:15 -06:00 |
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Gregory Nutt
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95998c715f
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SAMA5: Separate cache operations into separate files
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2013-07-29 18:38:02 -06:00 |
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Gregory Nutt
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f658bcdb13
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Changes to ARMv7-A boot logic to handle the case where we execute out of NOR FLASH
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2013-07-29 17:54:56 -06:00 |
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Gregory Nutt
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4e90fae5e8
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Add SAMA5 HSMC register definitions and logic to reconfigure the NOR FLASH
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2013-07-29 10:56:21 -06:00 |
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Gregory Nutt
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27a9da98f4
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SAMA5: Add file structure to support board-specific initialization of NOR flash
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2013-07-29 07:41:53 -06:00 |
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Gregory Nutt
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65c8abddb8
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SAMA5: The ostest configuration have been converted to run out of NOR flash. There is more to be done, however
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2013-07-28 15:07:35 -06:00 |
|
Gregory Nutt
|
7dfabf3507
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SAMA5: Correct a clock configuration bug; clarify some MMU memory types
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2013-07-28 12:44:06 -06:00 |
|
Gregory Nutt
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f191ac94c0
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SAMA5: Correct vector mapping
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2013-07-28 09:44:11 -06:00 |
|
Gregory Nutt
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9a5311296f
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Removed unused ARMv7-A cache function
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2013-07-27 14:03:02 -06:00 |
|
Gregory Nutt
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ae6ed8ca52
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SAMA5: Fix heap allocation bugs
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2013-07-27 11:28:31 -06:00 |
|
Gregory Nutt
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3d16c9afc7
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SAMA5 page table is cached; need to flush the cache each time that the page table is updated
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2013-07-27 09:27:37 -06:00 |
|
Gregory Nutt
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87af1517ed
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Correct an error in Cortex-A5 intermediate MMU mapping
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2013-07-26 17:26:53 -06:00 |
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Gregory Nutt
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14093ef76a
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Add a hello world configuration to help with the SAMA5 bringup
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2013-07-26 15:28:01 -06:00 |
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Gregory Nutt
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2f772c84fd
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Finally... renamed all CONFIG_DRAM_ settings to CONFIG_RAM_
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2013-07-26 10:09:17 -06:00 |
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Gregory Nutt
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f87963accd
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SAMA5: If the page table is in high memory, make sure that it is excluded from the heap
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2013-07-26 09:16:46 -06:00 |
|
Gregory Nutt
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4ea9e1eb6e
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Fix some bad page table definitions of last commit
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2013-07-25 18:11:25 -06:00 |
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Gregory Nutt
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696f6d0482
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Misc Cortex-A5 MMU-related fix -- still does not boot
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2013-07-25 16:37:55 -06:00 |
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Gregory Nutt
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d1be1e6698
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Fix an uninitialized register error that crept into the ARM9 start up code many years ago and was recently cloned into the Cortex-A5. Obviously no on has used NuttX with ARM9 for years
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2013-07-24 20:12:04 -06:00 |
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Gregory Nutt
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f337f3a977
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Fix SAMA5 vector linking issue
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2013-07-24 12:51:42 -06:00 |
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Gregory Nutt
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213780bc43
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Update SAMA5D3x-EK board configuration to support on-board UART connections, LEDs, and push buttons
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2013-07-24 12:27:12 -06:00 |
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Gregory Nutt
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63f136dd7e
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Revamp the way external memory regions are configured; Add logic to add SAMA5 external memory regions to the heap
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2013-07-24 10:08:32 -06:00 |
|
Gregory Nutt
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a81abd3514
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Improve Cortex-A5 context switching so that a little less copying is done
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2013-07-24 07:47:51 -06:00 |
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Gregory Nutt
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2e8fcc7229
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ARMv7-N: Fix a copy error introduced in the previous check-in
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2013-07-23 19:09:17 -06:00 |
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Gregory Nutt
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cb3f394d53
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Improve some ARMv7-A/M floating point register save time; Add floating point register save logic for ARMv7-A
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2013-07-23 17:52:06 -06:00 |
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Gregory Nutt
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9e24c4fcd5
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ARMv7-A: Need 8-byte stack alignment when callign C code from interrupt handlers. This change needs to be ported to other ARM architectures as well
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2013-07-23 14:47:16 -06:00 |
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Gregory Nutt
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596cdf2982
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SAMA5: Adapt clocking for different boot modes. New header files for AXI matrix, BSC, and SFR
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2013-07-23 13:54:49 -06:00 |
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Gregory Nutt
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ae3f2b2876
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Add SAMA5D3 pin multiplexing definitions
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2013-07-23 09:47:01 -06:00 |
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Gregory Nutt
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e9f8689cee
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Add SAMA5 GPIO configuration support
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2013-07-22 20:59:47 -06:00 |
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Gregory Nutt
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50cd6352fa
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Add support SAMA5 UART and serial driver
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2013-07-22 19:16:37 -06:00 |
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Gregory Nutt
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9665c0d267
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SAMA5 clock configuration should now agree with Atmel sample code; Added header file with macros to enable and disable peripheral clocking
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2013-07-22 17:00:02 -06:00 |
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Gregory Nutt
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571308c27a
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Add SAMA5 clock logic. Cloned from SAM3U and not yet verified
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2013-07-22 14:42:05 -06:00 |
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Gregory Nutt
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fb8a7a91fb
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SAMA5 interrupt handling logic
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2013-07-22 11:54:39 -06:00 |
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Gregory Nutt
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ca9b52b07f
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SAMA5/Cortex-A: Improve irqsave/restore inlines + add irqenable. Add skeleton file for SAMA5 interrupt management. Also change from last commit that was left in the editor
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2013-07-21 17:08:40 -06:00 |
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Gregory Nutt
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b26d506514
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Add system timer logic for the SAMA5
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2013-07-21 15:49:17 -06:00 |
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Gregory Nutt
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0b46176b43
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A few more Cortex-A5 and SAMA5 files
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2013-07-21 12:52:38 -06:00 |
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Gregory Nutt
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0d9250fae5
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Misc Cortex-A5 changes include new file for cache operations
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2013-07-20 13:06:00 -06:00 |
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Gregory Nutt
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6f0e07d071
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A few more SAMA5D3 files
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2013-07-19 17:45:28 -06:00 |
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Gregory Nutt
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137cd94b6a
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Basic framework to support the AT91SAMA5D3 family and the SAMA5D3x-EK board(s) in particular
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2013-07-19 15:23:03 -06:00 |
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Gregory Nutt
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c294e9b374
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More ARMv7-A files that are just copies of the ARMv4/5 files for now
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2013-07-19 11:43:04 -06:00 |
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Gregory Nutt
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15ae557793
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Minor but fatal typo introduced in last checkin
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2013-07-18 15:45:21 -06:00 |
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Gregory Nutt
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28a90ba46d
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Some initial frame for Cortex-A5 support. No much yet
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2013-07-18 15:20:47 -06:00 |
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Gregory Nutt
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91313feac2
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NSH cmp command by Andrew Twidgell
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2013-07-18 08:24:29 -06:00 |
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Gregory Nutt
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78bffd06c2
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STM32 SDIO driver: Add supported for data block end (DBCKEND) interrupt. From Chia Cheng Tsao
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2013-07-08 09:04:05 -06:00 |
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Gregory Nutt
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d649c2a462
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Ticket #16: STM32 OTG FS device driver endpoint allocation. From Chia Cheng Tsao
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2013-07-08 08:55:05 -06:00 |
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Gregory Nutt
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dcb4545afb
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prohibit re-entrance into sam_configgpio()
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2013-07-05 17:15:54 -06:00 |
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Gregory Nutt
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d5f274ac76
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Fix SAM34 interrupt handling for ports D-F; fix MISO logic in Arduino Due touchscreen driver
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2013-07-03 08:12:45 -06:00 |
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Gregory Nutt
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348304fcb4
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Several fixes to get a clean compile of the Arduino touch screen
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2013-07-02 13:52:09 -06:00 |
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Gregory Nutt
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a954eb76b2
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Created new directories to hold SPI-related files
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2013-07-01 08:11:54 -06:00 |
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Gregory Nutt
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5c86557971
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Update LM FLASH definitions for LM4F120. From Vinti
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2013-06-29 07:02:56 -06:00 |
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Gregory Nutt
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4db87105e9
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SAM33/4: Need to disable write protection before modify PIO pin configuration
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2013-06-28 15:34:51 -06:00 |
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Gregory Nutt
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880d7f261b
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Add an NSH configuration for the Arduino Due; Pluse several fixes related to the Due and to the SAM3X in general
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2013-06-28 14:32:08 -06:00 |
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Gregory Nutt
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4fe041a10b
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Arduino Due: Fixes to FLASH address, flash wait states, updated Comments. Now boots and runs a bit before crashing
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2013-06-28 11:29:14 -06:00 |
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Gregory Nutt
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8f41963efd
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With these changes the Arduino Due port builds without errors
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2013-06-27 15:07:07 -06:00 |
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Gregory Nutt
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2ecac742b6
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Flesh out the Arduino Due board configuratino and integrate it with the build and configuration system
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2013-06-27 14:24:27 -06:00 |
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Gregory Nutt
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3910edbf90
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Review and update of SAM3/4 header files and conditional logic for SAM3X/A support
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2013-06-27 11:06:13 -06:00 |
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Gregory Nutt
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77b36e0bc1
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Add peripheral configuration logic for the SAM3X/3A; Change all references to SAM3/4 SPI to SPI0 for compatibity with the SAM3X/3A which has SPI0 and SPI1; Add directory which will eventually holdl an Arduino Due port
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2013-06-26 18:46:44 -06:00 |
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Gregory Nutt
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69bd94290a
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Add SAM3X/3A pin multiplexing and GPIO encoding header files
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2013-06-26 17:02:43 -06:00 |
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Gregory Nutt
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87cfee43af
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Add SAM3X/3A memory map
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2013-06-26 14:37:57 -06:00 |
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Gregory Nutt
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ae6dbb9bf9
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Add SAM3X/3A peripheral clock controls
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2013-06-26 14:00:26 -06:00 |
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Gregory Nutt
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8865cf8be0
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Add SAM3X/3A interrupt vectors
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2013-06-26 12:59:56 -06:00 |
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Gregory Nutt
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2812f5be67
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Add support for SAM3X and 3A chips, interrupts, and peripheral IDs
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2013-06-26 12:28:32 -06:00 |
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Gregory Nutt
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64d149233b
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Fix integration of RAM test into the build and configuration system
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2013-06-26 10:54:12 -06:00 |
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Gregory Nutt
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e00a8397bc
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Add support for a separate CCM memory allocator for members of the STM32 family that support CCM memory
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2013-06-25 09:13:30 -06:00 |
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Gregory Nutt
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22c3d49807
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SAM4L Xplained SLCD driver is complete
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2013-06-23 09:05:20 -06:00 |
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Gregory Nutt
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c21986c418
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Beginning of a driver for the SAM4L LED1 module
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2013-06-21 17:42:09 -06:00 |
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Gregory Nutt
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7a65c32d4b
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Straighten out issues about who calls C++ initializers with CXXTEST or HELLOXX are built as NSH applications; Add an ofstream test to CXXTEST suggested by Michael; Update many defconfig fiels to that they set configurations to handle C++ constructors just as before these configuration changes
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2013-06-21 09:32:57 -06:00 |
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Gregory Nutt
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4fded8a25c
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More KL25Z SPI fixes
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2013-06-20 19:58:45 -06:00 |
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Gregory Nutt
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6e2fe7ccaf
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KL25Z GPIO register dump function now compiles
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2013-06-20 18:00:56 -06:00 |
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Gregory Nutt
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d088cbec5b
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Fix backward wait condition in KL24Z SPI driver
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2013-06-20 17:39:42 -06:00 |
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Gregory Nutt
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2e40a98c74
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Add framework for managing SPI-related discretes on the Freedom KL25Z board.
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2013-06-20 13:50:16 -06:00 |
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Gregory Nutt
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3c05e28e6d
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More Freedom KL25Z changed to and from Alan Carvalho de Assis
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2013-06-19 20:50:27 -06:00 |
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Gregory Nutt
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bdc68f73ad
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Fix errors in KL25Z SPI driver reported by Alan Carvalho de Assis
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2013-06-19 19:32:13 -06:00 |
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Gregory Nutt
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f3781d1eec
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Add SAM4L PDCA register definition file
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2013-06-19 18:38:31 -06:00 |
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Gregory Nutt
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e377bab446
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SPI register definition file updated to include a few differences for the SAM4L
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2013-06-19 16:03:19 -06:00 |
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Gregory Nutt
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c9ed0f9120
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SAM4L LCDCS register definitions
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2013-06-19 13:59:47 -06:00 |
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Gregory Nutt
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23579f3af4
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Add SPI driver for the Freescale KL25Z
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2013-06-19 12:10:01 -06:00 |
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Gregory Nutt
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5368531d60
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Add SPI register definitions for the Freescale KL25Z
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2013-06-19 09:56:32 -06:00 |
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Gregory Nutt
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49ad89dd70
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Fix test of NULL pointer in the SAM3/4 SPI driver
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2013-06-18 12:16:52 -06:00 |
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Gregory Nutt
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a56bf3f8b3
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Freescale KL25Z support from Alan Carvalho de Assis
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2013-06-18 11:20:57 -06:00 |
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Gregory Nutt
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7e372171c2
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SAM3/4 SPI phase control (CPHA) is inverted
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2013-06-18 09:29:55 -06:00 |
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