Commit Graph

11541 Commits

Author SHA1 Message Date
Gregory Nutt
0a8aa537a2 arch/arm/src/tiva/cc13xx/cc13xx_gpio.h: Add CC13xx GPIO encoding file. 2018-12-05 17:42:50 -06:00
Gregory Nutt
dcf4b4b689 STM32H7 and STM32L4: Applied David Sidrane's I2C to:
arch/arm/src/stm32h7/stm32_i2c.c
   arch/arm/src/stm32l4/stm32l4_i2c.c

Those easy because F7 patch applied with no problem (after changing path and file names appropriately).  The patch could not be appleed to the following.  The logic is different.  I don't know if a similar change is needed there or not.

   arch/arm/src/stm32/stm32f30xxx_i2c.c
   arch/arm/src/stm32/stm32f40xxx_i2c.c
   arch/arm/src/stm32/stm32_i2c.c
   arch/arm/src/stm32/stm32_i2c_alt.c
   arch/arm/src/stm32f0/stm32f0_i2c.c
2018-12-05 15:38:42 -06:00
David Sidrane
f43451b7df Merged in david_s5/nuttx/master_f7_i2c (pull request #774)
stm32f7:i2c out of bounds access on priv->msgv

Error in if statment. It was checking for msgc > 0.
   If message count is 1, only index 0 is valid on
   priv->msgv. There for random values in memory were
   used to set next_norestart.

Approved-by: GregoryN <gnutt@nuttx.org>
2018-12-05 21:24:59 +00:00
Gregory Nutt
d830b323dd arch/arm/src/tiva: Starting to work through alternate function pin configuration and GPIO interrupts for C13xx. Works a lot differently than the LM and Tiva parts. 2018-12-05 15:17:22 -06:00
Gregory Nutt
051e37bce2 arch/arm/src/tiva/hardware: Add CC13xx IOC register definitions. 2018-12-05 13:02:29 -06:00
Gregory Nutt
cdb6e16ad3 arch/arm/src/tiva: Add cc13xx startup logic, rename up_lowsetup->tiva_lowsetup, fixes to cc13xx GPIO header files, break up tiva_timer.h to support future cc13xx timer register definitions, cc13xx has no sysctl block. 2018-12-05 10:08:34 -06:00
Mateusz Szafoni
428b625428 Merged in raiden00/nuttx_pe (pull request #773)
arch/arm/include/stm32/chip.h: remove redundant STM32 family definitions. It is already done in arch/arm/src/stm32/Kconfig

Approved-by: GregoryN <gnutt@nuttx.org>
2018-12-05 11:46:36 +00:00
Gregory Nutt
7aaa5a800d arch/arm/src/tiva: Remove option CONFIG_TIVA_BOARD_CLOCKCONFIG. It is not used and unnecessary. Fix some naming. up_clockconfig() is inappropriate. Change tiva_clockconfig() to tiva_clock_reconfigure() then we can change up_clockconfig() to tive_clock_configure(). 2018-12-04 18:15:46 -06:00
Gregory Nutt
9a68127e3e arch/arm/src/tiva: Remove CONFIG_TIVA_BOARD_EARLYINIT. The option is no long meaningfule. Also set the CC13xx SYSCLCK freqency to a fixed 48MHz. 2018-12-04 17:20:25 -06:00
Gregory Nutt
3d23c68c05 arch/arm/src/tiva: Add GPIO header files. Reoganized tiva_gpio.c so that we can also handle the cc13xx GPIO which is very different. 2018-12-04 13:16:52 -06:00
Gregory Nutt
4d2c47a01d arch/arm/src/tiva/hardware: Break up tiva_gpio.h and place in MCU-specific sub-directories. This necessary to later develop Simplelink-specific GPIO header files. 2018-12-04 10:21:19 -06:00
Gregory Nutt
b2013df856 /arch/arm/src/tiva/hardware: Add CC13x0 and CC13x2 UART header files. 2018-12-04 08:40:29 -06:00
Gregory Nutt
c9ca9ced72 arch/arm/src/tiva/hardware: Move UART header files into sub-directories to make space for the SimpleLink UART header files. 2018-12-04 07:44:24 -06:00
Gregory Nutt
7d8f6625e3 arch/arm/src/tiva: Use naming sysctrl vs syscontrol be better match TI documentation. Combine hardware/cc13x2_cc26x2_v* directories. 2018-12-04 07:32:53 -06:00
Juha Paalijärvi
1afe4676e2 arch/arm/src/stm32f0/stm32f0_clockconfig.c: Fixes the problem in GPIO port clocks. Only port A clock was enabled although the comment states otherwise. 2018-12-04 06:50:32 -06:00
Dave Marples
d0cda60442 In the current implementation we only use very high priority interrupts (levels 0, 0x10 and 0x20 in CORTEX-M speak) but that means there are loads of lower priority ones that are effectively unused. I have *not* changed the semantics of these levels but have 'shifted' them to be based around the midpoint of the available interrupts (0x80) rather than at the top end....that allows for interrupts to be defined above (or, indeed, below) them as needed by the application. This should have no functional effect on existing code but adds in a clean capability to define higher priority interrupts. 2018-12-03 17:41:59 -06:00
Gregory Nutt
8aeeb1d8d3 arch/arm/src/stm32/stm32_adc.c: Eliminate a new warning found in build testing 2018-12-03 14:49:49 -06:00
Gregory Nutt
a641cb2ad8 configs/launchxl-cc1312r1/: Add a configuration for the LAUNCHXL-CC1312R1 board. This is a very stripped down configuration. It was needed to support verifiction of the CC13xx configuration logic and will be needed to support completion of the CC13xx port. 2018-12-03 13:25:31 -06:00
Gregory Nutt
8983f1c82e STM32F7, STM32H7, and STM32L4: Port Dave Marples STM32 fix to other STM32 spi drivers 2018-12-03 13:24:42 -06:00
Gregory Nutt
ee058683c6 arch/arm/src/tiva/hardware: Bring in memory map header files for the CC13x0 and CC13x2. 2018-12-03 09:10:05 -06:00
Gregory Nutt
ffc7dbf36b arch/arm/include/tiva: Add support for cc13xx interrupts. arch/arm/src/armv7-m: Add FPB header file. 2018-12-03 07:26:02 -06:00
Dave Marples
ff508f9b12 arch/arm/src/stm32/stm32_spi.c: Correct some compile problems introduced with 8328539534. 2018-12-03 07:15:40 -06:00
Mateusz Szafoni
db799e857c Merged in raiden00/nuttx_pe (pull request #772)
arch/arm/src/stm32/stm32_adc.c: refactor adc_reset. It should be easier to maintain this code if it's divided into smaller functions

Approved-by: GregoryN <gnutt@nuttx.org>
2018-12-02 18:34:02 +00:00
Gregory Nutt
ab974488d5 arch/arm/src/tiva/hardware: Remove annoying warnings 'No flash dimensions defined for selected chip.' 2018-12-02 07:58:12 -06:00
Dave Marples
8328539534 drivers/spi/Kconfig and include/nuttx/spi/spi.h: Extend the HW features supported by SPI. It now supports a deffered DMA trigger hardware configuration. arch/arm/src/stm32/stm32_spi.c: Implements the new deferred DMA trigger feature. 2018-12-02 07:30:55 -06:00
Mateusz Szafoni
d2b98cc150 Merged in raiden00/nuttx_pe (pull request #771)
Use STM32 DMA IP core version instead of chip family names and some minor improvements

arch/arm/src/stm32/chip/stm32_adc.h: raise error if two IP cores seleceted

libs/libdsp/Kconfig: cosmetic change

arch/arm/src/stm32/Kconfig: hide TIMER menu, HRTIM menu and USB Host debug menu if peripherals not enabled

configs/stm32f429i-disco/highpri/defconfig: fix configuration warning

Approved-by: GregoryN <gnutt@nuttx.org>
2018-12-02 11:49:25 +00:00
Mateusz Szafoni
7c77eb738e Merged in raiden00/nuttx_pe (pull request #770)
configs/nucleo-f207zg, configs/nucleo-f103rb: add ADC and PWM examples; arch/arm/src/stm32_adc.c: there is no DMA CFG bit for the basic IPv1 ADC

Approved-by: GregoryN <gnutt@nuttx.org>
2018-12-02 01:24:36 +00:00
Gregory Nutt
f0e6e06a37 Squashed commit of the following:
arch/arm/src/tiva/hardwar:  Move LM3S and LM4F include files to hardware/lm/ sub-directory.  Move all TM4C header files files to hardware/tm4c/ sub-directory.

    arch/arm:  Add basic configuration/build support for CC13xx parts.  Conditioned on EXPERIMENTAL.
2018-12-01 12:22:05 -06:00
Gregory Nutt
e7e54ccbf7 Re-arranging some Tiva directories to simply forthcoming SimpleLink port
Squashed commit of the following:

    arch/arm/src/tiva/Make.defs:  Trivial change to conditional VPATH.

    arch/arm/src/tiva:  Move LM3S and LM4F source files to lm/ sub-directory.  Move all TM4C source files to tm4c sub-directory.

    arch/arm/src/tiva and configs/:  Change include patch from chip/ to hardware/ in all Tiva files includes.

    arch/tmp/src:  Rename chip/ subdirectory to hardware/.  This is a better name since it does not conflict with other directory names and, well, we are going to be change a lot of the Tiva directory structure in the next few commits.
2018-12-01 09:29:47 -06:00
Mateusz Szafoni
0a288ac3db Merged in raiden00/nuttx_pe (pull request #769)
configs: add support for nucleo-f103rb, nucleo-f207zg and nucleo-l152re

Approved-by: GregoryN <gnutt@nuttx.org>
2018-12-01 12:22:05 +00:00
Alan Carvalho de Assis
3271049a9d arch/arm/src/armv7-m/itm.h: Fix missing space causing macro issues 2018-12-01 06:12:29 -06:00
Gregory Nutt
05b6a19a81 arch/arm/src/max326xx/max32660/max32660_spim.c: Add support for low-level register I/O debug output. Fix some backard clrbit/setbit arguments to the modifyreg function. SPI transfer still stalls. 2018-11-30 16:44:48 -06:00
Gregory Nutt
67f196fcf8 configs/max32660-evsys: Added support for an SPI-based micro-SD card. Does not yet work (SPI hangs with no data transferred). 2018-11-30 15:12:38 -06:00
Gregory Nutt
86a67fa3e8 Squashed commit of the following:
arch/arm/src/max326xx/max32660/max32660_spim.c:  SPI0 master mode support is complete (sans DMA and completely untested).  configs/max32660-evsys/src:  Add framework for SPI support.

    arch/arm/src/max326xx/max32660/max32660_spim.c:  Fleshes out some of the data transfer logic.  More needs to be done.  Also removes leveraged DMA support.  It will be a long time (if ever) before DMA is supported.  No point in dragging all of that bogus logic around.
2018-11-30 12:48:46 -06:00
Gregory Nutt
6d285cfed1 arch/arm/src/max326xx/max32660: Fix some confusion. SPI0 and SPI1 are not the same type of peripheral. SPI0 is SPI17Y; SPI1 is SPIMMS. Add basic SPI0 interrupt handling logic. 2018-11-29 18:32:40 -06:00
Gregory Nutt
9203815e4c arch/arm/src/max326xx/max32660/max32660_spim.c: Add a little more SPI logic. Still not complete. 2018-11-29 15:38:13 -06:00
Gregory Nutt
0841602739 Beginning of an SPI driver for the MAX32660. Incomplete. Does not even compile correctly yet.
Squashed commit of the following:

    arch/arm/src/max326xx/max32660/max32660_spim.c: A few updates tot he SPI master driver.  Still incomplete and does not even compile.

    Update some comments

    arch/arm/src/max326xx:  Clean up some general build issues.  Still STM32 code posing as MAX32660.

    arch/arm/src/max326xx:  Starting SPI driver.  Initial commit is just the STM32 SPI driver with name changes.
2018-11-29 12:12:56 -06:00
Gregory Nutt
8a99b5969e arch/arm/src/max326xx: Fixes UART interrupt problems. With these changes, the NSH configuration appears stable and is no longer conditioned on EXPERIMENTAL. 2018-11-29 07:50:45 -06:00
Gregory Nutt
1710b96388 arch/arm/src/max326xx/max32660/max32660_serial.c: Using wrong register to check interrupt status. Still problems; I think we are not getting FIFO interrupts. 2018-11-28 17:44:20 -06:00
Gregory Nutt
a6682a9bef Squashed commit of the following:
arch/arm/src/max326xx and configs/max32660-evsys/src:  Fix some issues with GPIO setup of output pins.  Correct polarity of on-board LED output.  The on-board LED is now functional.

    arch/arm/src/max326xx: WFI instruction in IDLE loop seems to interfere with stability.  Commented out for now.  Needs to be investigated further.
2018-11-28 11:20:31 -06:00
Gregory Nutt
5da7dbaf98 rch/arm/src/max326xx/max32660/max32660_lowputc.c: Fix typo revealed only when flow control is enabled. 2018-11-27 17:49:44 -06:00
Gregory Nutt
d164a2cf5b Squashed commit of the following:
arch/arm/src/max326xx:  Fixes for GPIO configuration problems and serial driver problems.  I now get the NuttShell prompt (if I also band on ENTER to force all of the characters out).  Progress, but not yet ready.

    configs/max32660-evsys:  Support CONFIG_BOOT_RUNFROMISRAM=y.
2018-11-27 16:50:59 -06:00
Gregory Nutt
0820d0659b Squashed commit of the following:
arch/arm/src/max326xx/max32660/max32660_clockconfig.c: Fix an error in a register name.

    arm/src/max326xx/max32660:  Fix a few new compilation errors when DEBUG is enabled.
2018-11-27 14:47:49 -06:00
Gregory Nutt
c82032ba62 arch/arm/src/armv7-m: Make naming used in ARM register definition files a little more compatible with naming used in other header files. 2018-11-27 10:36:40 -06:00
Gregory Nutt
6435d6b952 configs/stm32f4discovery/src/stm32_critmon.c: include dwt.h, don't define DWT_CYCNT inline. 2018-11-27 09:39:09 -06:00
Gregory Nutt
da379a5c97 arch/arm/src/stm32f7/stm32_sdmmc.c: Fix a pre-processor error found in build testing. 2018-11-25 15:54:51 -06:00
Gregory Nutt
0af39e1493 arch/: Update all _exit() implementations for all architectures so that they correctly called the scheduler instumentation layer for the new task that runs when the old one exits. This missing instrumentation was confusing the Critical Section Monitor logic with uses this instrumentation to track the state of critical sections. 2018-11-24 18:20:57 -06:00
Gregory Nutt
6d9103b01a A few trivial changes from review of last PR. 2018-11-23 17:44:46 -06:00
Mateusz Szafoni
fc46135ebc Merged in raiden00/nuttx_pe (pull request #767)
Improvements in STM32 ADC, minor changes in STM32 PWM, DMA, HRTIM and add some highpri ADC examples

arch/arch/src/stm32/stm32_adc: fix RCC reset logic

arch/arch/src/stm32/stm32_adc: move sample time change functions to low-level ADC ops

arch/arch/src/stm32/stm32_adc: configurable ADC DMA mode (one shot mode, circular mode)

arch/arch/src/stm32/stm32_pwm: remove llops_get interface. We can use structure casting to get pwm low-level ops

arch/arch/src/stm32/stm32_pwm: add timer enable/disable and frequency update to low-level ops

arch/src/arm/stm32: remove redundant stm32f33xxx_dma.c

arch/arm/src/stm32/stm32f40xxx_dma.c: add interfaces to interact with highp priority DMA interupts

arch/src/arm/stm32/stm32_hrtim: do not enable timers on startup if option from Kconfig selected and add interface to enable/disable timers

arch/src/arm/stm32/stm32_hrtim: fix some warnings

configs/nucleo-f334r8/highpri: update configuration due to changes in stm32_adc

configs/stm32f334-disco/buckboost: update configuration due to changes in stm32_adc

configs/nucleo-f334r8/highpri: add support for ADC injected sequence, add triggering from TIM1

configs/nucleo-f302r8/highpri: add high priority ADC interrupts example

configs/stm32f429i-disco/highpri: add high priority ADC interrupts example

Approved-by: GregoryN <gnutt@nuttx.org>
2018-11-23 23:33:45 +00:00
Gregory Nutt
1b63f66106 arch/arm/src/max326xx/max32660/max32660_clockconfig.c: Fix a logic error. Move logic that disables clocks to the end of the configuration. They might be needed by the previous clock configuration. 2018-11-22 15:01:18 -06:00
Gregory Nutt
22de66d553 arch/arm/src/max326xx/max32660/max32660_wdt.c: Fix alarm delay calculation. 2018-11-21 17:54:36 -06:00
Gregory Nutt
9ca2cde234 arch/arm/src/max326xx: Fix some misthinking in the last commit. 2018-11-21 15:23:05 -06:00
Gregory Nutt
c7cb4fa594 arch/arm/src/max326xx: Add missing function to get the alarm time. 2018-11-21 15:06:02 -06:00
Gregory Nutt
49ed9cac86 arch/arm/src/max326xx: Work-in-progress RTC driver for the MAX32660 2018-11-21 12:31:15 -06:00
Gregory Nutt
09f4dee6bc All network drivers! Change pre-processor logic that selects the high priority work queue or gives preferential treatment to the high priority work. All network logic must run on the low priority work queue! Or suffer the consequences. 2018-11-21 07:57:26 -06:00
Gregory Nutt
b69957ef5f arch/arm/src/max326xx/max32660/max32660_wdt.c: Another design simplication. 2018-11-21 06:57:29 -06:00
Gregory Nutt
2797d5fc49 arch/arm/src/max326xx/max32660/max32660_wdt.c: Design fixes to watchdog timer. 2018-11-20 17:38:00 -06:00
Gregory Nutt
84e6510de5 arch/arm/src/max326xx: Add the first, untested cut of an watchdog timer driver. 2018-11-20 17:13:35 -06:00
Bob Feretich
c6851201c0 This commit adds a new function arch_invalidate_dcache_by_addr(). It takes the same parameters as arch_invalidate_dcache(), but performs invalidation of only the lines in cache that need to be invalidated. This new function could be used as a a direct replacement for arch_invalidate_dcache().
The user of this invalidation are mmcsd_sdio currently.  The mmcsd_sdio driver makes calls for dcache invalidation through the chip specific architecture function SDIO_DMARECVSETUP(). I changed the arch/arm/stm32f7 chips to use arch_invalidate_dcache_by_addr() instead of arch_invalidate_dcache().

This commit includes additional changes to mmcsd_sdio.c.  I created SDIO_DMADELYDINVLDT() (DMA delayed invalidate) to invalidate store-into mode dcaches after the DMA transfer.  I have been using SDIO_DMADELYDINVLDT() for several weeks now and it has fixed the problems that I previously reported regarding non-cache aligned buffer invalidation errors (for my store-through dcache). However, it does not permit use of unaligned DMA buffers for store-into mode dcaches.

SDIO_DMADELYDINVLDT() is a NoOp unless the chip specific Kconfig file selects CONFIG_ARCH_HAVE_SDIO_DELAYED_INVLDT. I have modified all the stm32f7 chips to select it.
2018-11-20 14:03:42 -06:00
Gregory Nutt
bdb60ac2f7 arch/arm/src/stm32/stm32_adc.c: Very mysterious. Several configurations now fail to build stm32_adc.o. This chante avoids those build failures, yet I see no code changed in recent months that should affect this. Any insights anyone? 2018-11-20 12:29:37 -06:00
Gregory Nutt
37f994207d arch/arm/src/max326xx/max32660: Some rather minor updates from comparison of my board port with logic provided by Maxim Integrated. 2018-11-20 12:02:15 -06:00
Gregory Nutt
86d7f39a42 arch/arm/src/max326xx: Rename the chip subdirectory to hardware. The include paths were getting too mind boggling with two directories named chip. Should do this for the other architectures as well. 2018-11-20 11:20:58 -06:00
Gregory Nutt
b9903dc8c8 arch/arm/src/max326xx: Finish DMA implementation. Clean up compile issues when DMA, GPIO interrupts are enabled. 2018-11-20 11:14:11 -06:00
Gregory Nutt
7a45fc6f1c arch/arm/src/max326xx: Add framework for MAX326XX standard DMA support. 2018-11-20 08:09:03 -06:00
David Sidrane
e73228395f Merged in david_s5/nuttx/master_imxrt_headers (pull request #763)
imxrt:Add ADC chip header

Approved-by: GregoryN <gnutt@nuttx.org>
2018-11-20 00:24:58 +00:00
Gregory Nutt
03cd52a5a2 arch/arm/include/max326xx: Add missing MAX32660 interrupt vectors. arch/arm/src/max326xx: Add missing MAX32660 GPIO interrupt handler. 2018-11-19 18:02:57 -06:00
Gregory Nutt
7854a18ece arch/arm/src/max326xx: Finish of the serial driver. Add support for the MAX626xx instruction cache. 2018-11-19 14:36:32 -06:00
Gregory Nutt
34123867c9 arch/arm/src/max326xx: Fleshes out logic in max32660_lowputc.c 2018-11-19 13:02:49 -06:00
Gregory Nutt
1d2a69539b Squashed commit of the following:
arch/arm/src/max326xx/max32660/max32660_serial.c:  Add a mostly commented out serial driver.  With this, we can accomplish a complete build with many warnings for 'Missing logic'
    configs/max32660-evsys/src/max326_button.c:  Add support for the on-board button.
    arch/arm/src/max326xx:  Add a mostly empty max326_lowputc.c file mostly so that we can get further in the compilation.  Fixed several more compile errors revealed by this.
    arch/arm/src/max326xx:  Add peripheral clock control header file.
2018-11-19 10:47:28 -06:00
Eduard Niesner
b905888d2c arch/arm/src/stm32f7: Ported the QEncoder from F4 to F7 2018-11-19 07:51:41 -06:00
Lwazi Dube
9d0740e069 After commit 51b78034ac, my tiva console does not work - enter key produces garbage characters. This commit fixes the problem for me. 2018-11-18 18:03:39 -06:00
Gregory Nutt
dd3361a175 arch/arm/src/max326xx: Add more clock configuration options. 2018-11-18 17:54:01 -06:00
Gregory Nutt
fe0209eec2 arch/arm/src/max326xx: Add initial clock configuration logic. Needs verification. 2018-11-18 16:41:07 -06:00
Gregory Nutt
054db14dd2 arch/arm/src/max326xx: Add GCR register definition header file. Some feeble clock configuration progress. 2018-11-18 13:06:24 -06:00
Gregory Nutt
169198ff38 arch/arm/src/max326xx/max32660: Add GPIO driver and GPIO interrupt support. 2018-11-18 11:22:51 -06:00
Zou Hanya
74cd8a53d5 Squashed commit of the following:
Author: Gregory Nutt <gnutt@nuttx.org>

    A few trivial updates from review of changes.

    Remove references to NRF52-PCA10040 from documentation.  Replace with NRF52-generic.

    Remove configs/nrf52-pca10040/  Replaced with configs/nrf52-generic.

Author: Zou Hanya <hanyazou@gmail.com>

    Improve LED handling #if~#endif in nrf52_autoleds.c and nrf52_userleds.c

    Add Adafruit Feather nRF52 board LED support

    Add Adafruit Feather nRF52 board

    Add nrf52-generic

    Replace 'pca10040' with 'generic'

    Copy from nrf52-pca10040 to nrf52-generic
2018-11-18 07:51:24 -06:00
Gregory Nutt
d2da0be4ee arch/arm/src/max326xx/chip: Add MAX32660 pin multiplexing header files. 2018-11-17 16:47:54 -06:00
Gregory Nutt
8e18e8ae54 arch/arm/src/max326xx: Get's past a few initial compile problems. Still a long road ahead. 2018-11-17 15:36:40 -06:00
Gregory Nutt
6d5c1ec64f arch/arm/src/max326xx: Add encodings that will be needed for GPIO pin configurations. 2018-11-17 15:01:21 -06:00
Gregory Nutt
61fd244fd3 Add support for the Maxim Integrated MAX32660-EVSYS board.
Squashed commit of the following:

    arch/arm/src/max326xx and configs/max32660-evsys/nsh/defconfig:  Work out some issues related to MAX326xx configuration.

    configs/max32660-evsys:  Add unverified board support framework.
2018-11-17 13:24:09 -06:00
Anthony Merlino
4d574e7a60 Merged in antmerlino/nuttx/stm32f2-write-protect (pull request #762)
arch/arm/stm32: stm32_flash_writeprotect supported the same for STM32F20XX as STM32F4XXX

Approved-by: GregoryN <gnutt@nuttx.org>
2018-11-17 17:29:29 +00:00
Gregory Nutt
a427a40bd0 arch/arm/src/max326xx/chip: Add MAX32660 SPIMSS register definition header files. 2018-11-17 11:21:29 -06:00
Gregory Nutt
1527720be9 arch/arm/src/max326xx/chip: Add SPI register definition header file. 2018-11-17 10:47:57 -06:00
Gregory Nutt
854f171c66 arch/arm/src/max326xx/chip: Add I2C register definition header file. 2018-11-17 09:19:17 -06:00
Mateusz Szafoni
6673ae3e9c arch/arm/src/stm32/stm32_pwm.c: STM32 MOE is not being appropriately handled for PWM for advanced timers. It is only ever reset and so no PWM train is generated. This change addresses this. Noted by Dave Marples. 2018-11-17 06:55:19 -06:00
Gregory Nutt
8000e0b263 arch/arm/src/max326xx/Kconfig: Needs to select CONFIG_UARTn_SERIALDRIVER. 2018-11-17 06:36:25 -06:00
Gregory Nutt
13d902a0a5 arch/arm/src/max326xx: Bring in some mostly standard, ARMv7-M, 'boilerplate' files. 2018-11-16 15:33:01 -06:00
Gregory Nutt
06f132c5d0 Brings in WIP port for the Maxim Integrated MAX326xx MCU family. Not really very much in place yet so marked EXPERIMENTAL in Kconfig file.
Squashed commit of the following:

    Update a README.  Mark MAX326XX as EXPERIMENTAL before bringing into master.
    arch/arm/src/max326xx/chip:  Add MAX32660 TMR register definition header files.
    arch/arm/src/max326xx/chip:  Add MAX32660 WDT register definition header files.
    arch/arm/src/max326xx/chip:  Add MAX32660 RTC register definition header files.
    arch/arm/src/max326xx/chip:  Add MAX32660 UART register definition header files.
    arch/arm/src/max326xx/chip:  Add DMA register definition header files.
    Update some comments explaining what is meant by a 'chip family'
    arch/arm/src/max326xx/chip:  Add GPIO register definition header files.
    arch/arm/src/max326xx/chip:  Add FLC register definition header files.
    arch/arm/src/max326xx/chip:  Add FCR, PWRSEQ, and SIR register definition header files.
    arch/arm/src/max326xx/chip:  Add ICC register definition header file.
    arch/arm/src/max326xx/chip:  Add memory map header files.
    arch/arm/include/max326xx:  Minor fleshing out.
    arch/arm/arm/include/max326xx: Add basic support for Maxim MAX326xx family.  arch/arm/Kconfig and arch/arm/src/max326xx/Kconfig:  Add basic condiguration support for the MAX326xx.
2018-11-16 13:17:47 -06:00
Gregory Nutt
be1567d924 Trivial changes from review or last PR. 2018-11-15 15:08:02 -06:00
David Sidrane
2a13f13c0f Merged in david_s5/nuttx/master_imxrt_headers (pull request #761)
imxrt:Add FLEXPWM

Approved-by: GregoryN <gnutt@nuttx.org>
2018-11-15 21:02:38 +00:00
David Sidrane
a92a025e5f Merged in david_s5/nuttx/master_f4_446_469_GPIO (pull request #760)
stm32:STM32F446 & STM32F469 correct PC1 SPI assignments

Approved-by: GregoryN <gnutt@nuttx.org>
2018-11-15 17:14:49 +00:00
Xiang Xiao
dbf01d12b7 Assertions: Identify the running task correctly when dumping task state information. It takes time to switch to the target task after g_readytorun has been modified. If panic/assert happen during this period, the dump will contain the incorrect and confusing information due to the difference between the real running task and the return value of this_task(). This change resolve this problem by adding g_running_task to track the real running task through the context switch. 2018-11-15 07:11:51 -06:00
David Sidrane
c6db972702 - imxrt: Add PIT, GPT, and QIMER(TMR) header files
Squashed commit of the following:

    imxrt: Add QTIMER(TMR)
    imxrt: Add GPT
    imxrt: Add PIT
2018-11-13 16:34:59 -06:00
Dave Marples
9b68efe251 arch/arm/src/imxrt/imxrt_usdhc.c: Improve SD card handling in the DMA case. For now I think we can consider this complete for both Interrupt and DMA transfers. There is other stuff to add (high speed, low voltage, DDR etc.) later, 2018-11-13 06:41:27 -06:00
Dave Marples
50a1b9eddf arch/arm/src/imxrt: This commit complete the interrupt driven USDHC1 functionality for the IMXRT EVKB. There is more work to be done to complete DMA mode and further changes will follow. 2018-11-12 13:47:44 -06:00
Gregory Nutt
a42c5e57fc Cosmetic updates from review of last PR. 2018-11-12 09:53:44 -06:00
Mateusz Szafoni
becb667f56 Merged in raiden00/nuttx_pe (pull request #758)
stm32/stm32_adc: major refator

stm32/stm32_adc: use STM32 ADC IP core version and ADC available functions instead of chip family names in conditional compilation

stm32/chip: replace family specific ADC headers with STM32 ADC IP core version headers

stm32/stm32_adc: configurable sample time supported for all chips, not only L1

stm32/stm32_adc: enable/disable interrupts supported for all chips, not only L1

stm32/stm32_adc: resolution configuration

stm32/stm32f33xxx_adc: remove wrong assertion

configs/nucleo-f303ze: support for ADC and ADC example

configs/stm32f429i-disco: support for ADC and ADC example

Approved-by: GregoryN <gnutt@nuttx.org>
2018-11-12 15:45:55 +00:00
Xiang Xiao
543f4ed8ec arch/ all assertion functions: up_assert move the register dump to first make the more important info first 2018-11-11 12:53:59 -06:00
Xiang Xiao
dfe788be25 arch/ all assertion functinos: up_stackdump dump the full stack if stack overflow the stack info is very useful to find the backtrace 2018-11-11 12:52:36 -06:00
Xiang Xiao
e4106a3744 arch/ assertions files: up_registerdump capture the general register if not yet saved and up_saveusercontext is implemented, the register dump is very useful to find the cause of failure. 2018-11-11 12:50:50 -06:00