Commit Graph

15982 Commits

Author SHA1 Message Date
Gregory Nutt
2481b1bfd5 Do not ignore .asm files that are tracked. 2020-07-04 17:52:42 +01:00
Xiang Xiao
95aa3a11d1 arch/tms570: Remove the unused frac variable
and change the type of divb7 from float32_t to float

Signed-off-by: Xiang Xiao <xiaoxiang@xiaomi.com>
2020-07-04 08:31:06 -07:00
Xiang Xiao
993591dca1 arch/x86_64: Fix Warning: ignoring changed section attributes
chip/intel64_head.S: Assembler messages:
chip/intel64_head.S:281: Warning: ignoring changed section attributes for .text
chip/intel64_head.S:485: Warning: ignoring changed section attributes for .bss

Signed-off-by: Xiang Xiao <xiaoxiang@xiaomi.com>
2020-07-03 10:20:39 +01:00
Xiang Xiao
b984534255 lib/math: Remove float32 and float64 definition
since they aren't defined by standard and never supported by other POSIX OS

Signed-off-by: Xiang Xiao <xiaoxiang@xiaomi.com>
2020-07-02 10:53:34 -03:00
Jari van Ewijk
b84ce844c6 S32K additional style fixes 2020-07-01 13:45:38 +01:00
Jari van Ewijk
3db090a210 S32K - Expand FlexTimer header file and add PWM support 2020-07-01 13:45:38 +01:00
Peter van der Perk
4a40a7c3d7 S32K148EVB netdev lateinit to support Enet & CAN at the same time 2020-06-30 12:46:50 -06:00
Peter van der Perk
eca1011b1e Expose xxx_caninitialize() correctly so it's usable in latedev init when there are multiple net devices 2020-06-30 12:46:50 -06:00
Jari van Ewijk
1306cbc16e S32K additional style fixes 2020-06-30 15:46:15 +01:00
Jari van Ewijk
86c151edf1 S32K Small Fixes:
- Typos / wrong names in s32k14x_irq.h, s32k1xx_memorymap.h and s32k1xx_pcc.h
- Wrong base address for port input disable register in s32k1xx_pin.c
- up_* still had to be changed to arm_* in some places
2020-06-30 15:46:15 +01:00
ligd
36a0978952 arch/risc-v/src/rv32im: update & complete risc-v rv32im arch
1. add schedulesigaction.c
2. add SYS_save_context handling
3. Skip ECALL instruction when up_swint()

Change-Id: Id52c6dd9ee1052441957b73463c00d3fd26555c5
Signed-off-by: ligd <liguiding@fishsemi.com>
2020-06-30 09:31:21 -03:00
Jacob Dahl
b12b3072e8 Added support for STM32F412xx. Tested with the NUCLEO-F412ZG dev board as well as a custom board using the STM32F412CE. 2020-06-29 17:44:35 +02:00
Claudio Micheli
10f93b9d9b stm32l4: extend CAN ioctrl with NART/ABOM. Add RTR to CAN header
Signed-off-by: Claudio Micheli <claudio@auterion.com>
2020-06-29 09:05:44 -03:00
Claudio Micheli
94e87bb6e8 stm32: extend CAN ioctrl with NART/ABOM. Add RTR to CAN header
Signed-off-by: Claudio Micheli <claudio@auterion.com>
2020-06-29 09:05:44 -03:00
Claudio Micheli
7a346bee26 stm32f7: Add the option to include RTR in CAN header
Signed-off-by: Claudio Micheli <claudio@auterion.com>
2020-06-29 09:05:44 -03:00
Beat Küng
f6039bbfa7 stm32f7: add CANIOC_SET_NART and CANIOC_SET_ABOM ioctl's to can driver 2020-06-29 09:05:44 -03:00
Matias Nitsche
861f80e853 stm32l4 RCC: configure flash wait states early, otherwise execution is corrupted when clock is increased before that 2020-06-28 13:25:05 -03:00
Matias Nitsche
c26521c38f stm32l4 dfumode: move initialization point of bootloader jump instruction to correct place 2020-06-26 09:59:40 -03:00
Matias Nitsche
d1c538b65c stm32l4: dfumode style fixes 2020-06-26 09:59:40 -03:00
Matias Nitsche
b4bea95a6a stm32l4: add support for booting into DFU mode 2020-06-26 09:59:40 -03:00
Ouss4
a7fdc4ba03 arch/arm/src/stm32/stm32f40xxx_i2c.c: Fix tracing enumeration.
Values used in the ISR were taken from STM32F7 but the enumeration was
not updated.
2020-06-26 09:51:09 -03:00
YAMAMOTO Takashi
05671fd8f1 vpnkit: set mac address when available
up_vpnkit network driver gets its mac address from the vpnkit.
it isn't available until a successful negotiation with the vpnkit.
2020-06-25 07:27:44 -05:00
YAMAMOTO Takashi
74d13d74b9 sim: Add more names to nuttx-names.in
Some of them are for the recent development. eg. rewind, ftw
Some of them were simply missing. eg. shutdown
2020-06-25 07:26:53 -05:00
Matias Nitsche
1115f0104b stm32l4 oneshot: style fix 2020-06-25 11:04:14 +01:00
Matias Nitsche
3c37d68735 stm32l4 oneshot: assert period > 0, otherwise the timer never fires 2020-06-25 11:04:14 +01:00
Gustavo Henrique Nihei
105d561a51 arch/arm/src/stm32f7: Refactor FMC functions for STM32F7
This refactor is based on the FMC architecture of STM32H7, with the
exception of the board specific definitions.
2020-06-24 10:51:02 -03:00
Gustavo Henrique Nihei
b06722cd7f boards/arm/stm32/stm32f769i-disco: Add support for external SDRAM 2020-06-24 10:51:02 -03:00
chao.an
f5039d0b23 sim: fix compile error caused by race condition
LD: nuttx.rel
objcopy: couldn't open symbol redefinition file nuttx-names.dat
         (error: No such file or directory)
Makefile: 297: recipe for target 'nuttx.rel' failed

Change-Id: Ic78f030b77c3468ddbb96d4fb0558edad3abc3ae
Signed-off-by: chao.an <anchao@xiaomi.com>
2020-06-24 14:32:22 +01:00
David Sidrane
5cbebda133 kinetis:Ethernet fixed & better interrupt management
When any error was detected the buffers descriptors were
   blindly initialized. This caused the TX of the MAC to
   be in a bad state. The correct thing to do, we disable
   the MAC, init the bufffers and re-eanable the MAC.

   The interrupts were being throlled at the NVIC. This been
   cleaned up.
2020-06-21 14:16:26 -06:00
Huang Qi
a13ebe5975 arch/arm/stm32: Make SysTick as a Tickless clock source option
Signed-off-by: Huang Qi <huangqi3@xiaomi.com>
2020-06-20 09:10:27 -03:00
David Sidrane
b64060f717 s32k1xx:flexcan clock_systimespec -> clock_systime_timespec 2020-06-19 00:27:52 +01:00
chao.an
6e8cf28e9c nuttx/names: add symbol name preprocessing support
Change-Id: I54e0b24391b6e08801e3f0b1799ed3fcc9188ae7
Signed-off-by: chao.an <anchao@xiaomi.com>
2020-06-18 07:09:40 -06:00
chao.an
1a59e5ad0f sim/names: add munmap into naming list
Change-Id: Ideb6c538fafda3f031d3a0d976da85917ba64530
Signed-off-by: chao.an <anchao@xiaomi.com>
2020-06-18 07:09:40 -06:00
chao.an
d96b22ae3c nuttx/names: add getchar into naming list
Change-Id: I04b9283250bd139201b2de766f7f5f30db992434
Signed-off-by: chao.an <anchao@xiaomi.com>
2020-06-18 07:09:40 -06:00
qiaowei
1ab98da054 nuttx-names.dat: add strstr.
Signed-off-by: qiaowei <qiaowei@xiaomi.com>
Change-Id: Iab4bbe0ea3b12d819c790a4720d3d3c5534ad581
2020-06-18 07:09:40 -06:00
Matias Nitsche
67ab8ebb5f style fixes 2020-06-17 13:17:38 -03:00
Matias Nitsche
b7d18585dc stm32l4: add I2C timings for 48 MHz SYSCLK 2020-06-17 13:17:38 -03:00
Matias Nitsche
fa97e216e4 stm32l4: clocking fixes (would hang for MSI@48MHz on STM32L476) 2020-06-17 13:17:38 -03:00
Peter van der Perk
6a19f03756 FlexCAN C89 Style initialization 2020-06-16 15:35:43 -03:00
Peter van der Perk
ede6225c72 NXStyle fixes 2020-06-16 15:35:43 -03:00
Peter van der Perk
efbe4c89e2 S32K1XX Enhanced EEPROM block device driver 2020-06-16 15:35:43 -03:00
Peter van der Perk
4eecf8561f FlexCAN interrupt fixes, old compiler fixes
SocketCAN old compiler fix
2020-06-16 15:35:43 -03:00
Gregory Nutt
ed9532e31f CONFIG_SCHED_INSTRUMENTATION_SYSCALL should not available if the architecture does not support the required system hook note hooks. 2020-06-16 14:04:53 -03:00
Matias Nitsche
7ce175b614 style fixes 2020-06-16 01:00:45 +01:00
Matias Nitsche
2bdc0c5bc8 stm32l4 ADC: on 47x/48x parts, the ACSR register needs to be configured for ADC inputs to work 2020-06-16 01:00:45 +01:00
Matias Nitsche
9786e3a1a8 style fixes 2020-06-15 23:19:51 +01:00
Matias Nitsche
3f1e89e30f stm32l4 serial fix: clock divider for baud rate was not correctly set 2020-06-15 23:19:51 +01:00
Peter van der Perk
b5c5948e1c NXStyle fixes 2020-06-15 08:07:19 -06:00
Peter van der Perk
5f73dc89be Kinetis: Added FlexCAN driver with SocketCAN support 2020-06-15 08:07:19 -06:00
Peter van der Perk
ff76ef0725 s32k1xx: Added FlexCAN driver with SocketCAN support 2020-06-15 08:07:19 -06:00
chao.an
9153ca538b arch/renesas: fix nxstyle warning
Signed-off-by: chao.an <anchao@xiaomi.com>
2020-06-15 07:19:41 -06:00
chao.an
332e5481ee arch/stackframe: fix heap buffer overflow
ASAN trace:
...
==32087==ERROR: AddressSanitizer: heap-buffer-overflow on address 0xf4502120 at pc 0x56673ca3 bp 0xff9b6a08 sp 0xff9b69f8
WRITE of size 1 at 0xf4502120 thread T0
    #0 0x56673ca2 in strcpy string/lib_strcpy.c:64

0xf4502120 is located 0 bytes to the right of 8224-byte region [0xf4500100,0xf4502120)
allocated by thread T0 here:
    #0 0xf7a60f54 in malloc (/usr/lib32/libasan.so.4+0xe5f54)
    #1 0x5667725d in up_create_stack sim/up_createstack.c:135
    #2 0x56657ed8 in nxthread_create task/task_create.c:125
    #3 0x566580bb in kthread_create task/task_create.c:297
    #4 0x5665935f in work_start_highpri wqueue/kwork_hpthread.c:149
    #5 0x56656f31 in nx_workqueues init/nx_bringup.c:181
    #6 0x56656fc6 in nx_bringup init/nx_bringup.c:436
    #7 0x56656e95 in nx_start init/nx_start.c:809
    #8 0x566548d4 in main sim/up_head.c:95
    #9 0xf763ae80 in __libc_start_main (/lib/i386-linux-gnu/libc.so.6+0x18e80)

CALLSTACK:
    #8  0xf79de7a5 in __asan_report_store1 () from /usr/lib32/libasan.so.4
    #9  0x565fd4d7 in strcpy (dest=0xf4a02121 "", src=0xf5c00895 "k") at string/lib_strcpy.c:64
    #10 0x565e4eb2 in nxtask_setup_stackargs (tcb=0xf5c00810, argv=0x0) at task/task_setup.c:570
    #11 0x565e50ff in nxtask_setup_arguments (tcb=0xf5c00810, name=0x5679e580 "hpwork", argv=0x0) at task/task_setup.c:714
    #12 0x565e414e in nxthread_create (name=0x5679e580 "hpwork", ttype=2 '\002', priority=224, stack=0x0, stack_size=8192, entry=0x565e54e1 <work_hpthread>, argv=0x0) at task/task_create.c:143
    #13 0x565e42e3 in kthread_create (name=0x5679e580 "hpwork", priority=224, stack_size=8192, entry=0x565e54e1 <work_hpthread>, argv=0x0) at task/task_create.c:297
    #14 0x565e5557 in work_start_highpri () at wqueue/kwork_hpthread.c:149
    #15 0x565e3e32 in nx_workqueues () at init/nx_bringup.c:181
    #16 0x565e3ec7 in nx_bringup () at init/nx_bringup.c:436
    #17 0x565e3d96 in nx_start () at init/nx_start.c:809
    #18 0x565e3195 in main (argc=1, argv=0xffe6b954, envp=0xffe6b95c) at sim/up_head.c:95

Change-Id: I096f7952aae67d055daa737e967242eb217ef8ac
Signed-off-by: chao.an <anchao@xiaomi.com>
2020-06-15 07:19:41 -06:00
Xiang Xiao
4fbbd2e3bf arch: Move PRIxMAX and SCNxMAX definition to include/stdint.h
like other related macro(e.g. INTMAX_MIN, INTMAX_MAX...)

Signed-off-by: Xiang Xiao <xiaoxiang@xiaomi.com>
Change-Id: I8863599960b1a9b1c22ae9c35735a379a4c745b0
2020-06-10 08:24:47 +02:00
Xiang Xiao
7758eb8658 arch: Define INTx_C and UINTx_C macro
Signed-off-by: Xiang Xiao <xiaoxiang@xiaomi.com>
Change-Id: Ia50ea8764880fabd3d878c95328632c761be6b43
2020-06-10 08:24:47 +02:00
David Sidrane
7e3c341b15 stm32h7:Fix compiler error stm32_bdma_capable 2020-06-09 20:08:50 +01:00
raiden00pl
8708e34b29 arch/arm/src/nrf52/nrf52_idle.c: disable WFI in up_idle 2020-06-09 13:12:09 +01:00
Huang Qi
2b0324c3bf boards/risc-v/k210/maix-bit: Add initial autoled support
Signed-off-by: Huang Qi <huangqi3@xiaomi.com>
2020-06-08 10:53:29 +09:00
Huang Qi
bcd7ccc0b5 arch/risc-v/src/k210: Add basic gpiohs support
Signed-off-by: Huang Qi <huangqi3@xiaomi.com>
2020-06-08 10:53:29 +09:00
Alan C. Assis
d41a2f87f0 Add support to STM32F411CE 2020-06-07 02:29:16 +01:00
Ouss4
a90f657743 arch/arm/src/stm32/stm32_hrtim.c: Fix nxstyle issues. 2020-06-06 15:46:51 -03:00
Ouss4
465a13c2cb arch/arm/src: Return ENOTTY when the ioctl command is not recognized. 2020-06-06 15:46:51 -03:00
David Sidrane
a793369815 stm32h7:DMA Add BDMA support
Apply suggestions from code review

Co-authored-by: Mateusz Szafoni <raiden00pl@gmail.com>
2020-06-06 19:17:15 +01:00
David Sidrane
a254023e74 stm32h7:SPI Locate SPI6 DMA buffers in sram4 2020-06-06 23:05:30 +08:00
David Sidrane
ddf2704915 stm32h7:Kconfig limit STM32H7_SPIn_COMMTYPE range to valid values 2020-06-05 21:07:54 +01:00
YAMAMOTO Takashi
36ae29c21c sim: Fix hostfs errno
Don't forget to convert the host convention (-1/errno) to
the nuttx kernel convention. (negative errno)
2020-06-05 19:49:35 +08:00
Ouss4
871d5c6b72 Fix PR 1188 nxstyle issues 2020-06-05 12:21:43 +08:00
Ouss4
1ca552716c arch/arm/src/stm32/stm32_i2s: Change the initialize function from
stm32_i2sdev_initialize to stm32_i2sbus_initiliaze, to be consistent
with the way other buses are initialized.
The stm32_i2sdev_initiliaze (similar to stm32_spidev_initialize for
example) is a board specific function that does any necessary
initialization that's board depedent.
2020-06-05 12:21:43 +08:00
Ouss4
a30b77cbb9 arch/arm/src/stm32/stm32.h: Include stm32_i2s.h 2020-06-05 12:21:43 +08:00
Ouss4
a098e03005 arch/arm/src/stm32/stm32_i2s.h: file hardware/stm32_i2s.h does not
exist.
2020-06-05 12:21:43 +08:00
Ouss4
1c17e5f3c3 arch/arm/src/stm32/Kconfig: Fix a trivial typo (I2C -> I2S) 2020-06-05 12:21:43 +08:00
Xiang Xiao
b4bd9427f7 arch: Rename _exit to up_exit to follow the naming convention
Signed-off-by: Xiang Xiao <xiaoxiang@xiaomi.com>
Change-Id: I2779a2a3ccb5426fe78714fdcc629b8dfbb7aaf6
2020-06-04 22:20:45 +01:00
Xiang Xiao
85b859fb8d arch: _exit should't call nxsched_resume_scheduler twice in SMP mode
utilize the call inside nxtask_exit instead, also move
nxsched_suspend_scheduler to nxtask_exit for symmetry

Signed-off-by: Xiang Xiao <xiaoxiang@xiaomi.com>
Change-Id: I219fc15faf0026e452b0db3906aa40b40ac677f3
2020-06-04 22:20:45 +01:00
Jakob Haufe
c45289eb89 Fix typo in arch/arm/src/lpc17xx_40xx/Kconfig 2020-06-04 16:46:12 +01:00
Jukka Laitinen
fe44ce0f3f arch/arm/src/stm32h7/stm32_spi.c: Corrections for SPI master driver
This fixes the following 3 issues:

1. Wait for send to complete in exchange

Before shutting down the SPI, we have to wait for send to complete; not only
DMA, since DMA just puts data to the SPI fifo. It is not yet out of SPI.

When doing exchange with both send & receive this is not an issue because when
receive dma has completed, it is certain that also the send is.

This can be accomplished by completing the transfer in SPI TXC interrupt
instead of DMA callback.

2. Fix TXDMAEN and RXDMAEN placement

According to the spec, the RXDMAEN must be enabled before
enabling DMA requests for Tx and Rx in DMA registers, and TXDMAEN
after that.

Cleaner place to do this is in spi_dmarxstart and spi_dmatxstart, where
also the dma requests are enabled. This also handles properly the
simplex modes.

3. Remove bus signal glitches when shutting off SPI block

Use AFCNTR to avoid glitches in SPI lines while turning SPI block
on/off during calls to exchange.

Signed-off-by: Jukka Laitinen <jukka.laitinen@intel.com>
2020-06-03 07:06:30 -07:00
Jukka Laitinen
91779e997a arch/arm/src/stm32h7/hardware/stm32h7x3xx_spi.h: Fix nxstyle issues
Signed-off-by: Jukka Laitinen <jukka.laitinen@intel.com>
2020-06-03 07:06:30 -07:00
David Sidrane
698ac72dae stm32h7:stm32_sdmmc fix compiler error when SDMMC2 is enabled 2020-06-02 17:51:23 -06:00
Gregory Nutt
0da3400009 ez80: Fix ez80 build problems.
arch/z80/src/Makefile:  Correct inclusion of non-existent file.  This was not a problem before because there was '-' before the include.  Problem revealed with '-' removed.

arch/z80/src/ez80/Toolchain.defs:  Apparently there are not too many '"' in path definition.

tools/incdir.c:  No space between -usrinc:  or -sysinc:  and the list of paths.
2020-06-02 13:20:51 -03:00
Xiang Xiao
ed0c38cb7a arch/intel64: Don't include immintrin.h
because it will bring a lot of host header files

Signed-off-by: Xiang Xiao <xiaoxiang@xiaomi.com>
2020-06-01 08:22:46 -06:00
Xiang Xiao
b932b653dd arch: Select 64bit elf base on the architecture characteristic
Signed-off-by: Xiang Xiao <xiaoxiang@xiaomi.com>
Change-Id: I09eec5a76f255016a910cfec3b3f70cd7577525e
2020-05-31 21:38:32 -07:00
Xiang Xiao
f6a87c5c15 arch: Change dependence from ELF to LIBC_ARCH_ELF
since LIBC_MODLIB need to be considered too

Signed-off-by: Xiang Xiao <xiaoxiang@xiaomi.com>
Change-Id: I220b25afa08727af954ccbb40ac987b66113b2be
2020-05-31 21:38:32 -07:00
David Sidrane
1b8c072802 stm32h7:stm32_spi Restores internal DMA buffer broken in 574b25
574b25 broke the internal DMA buffers usage that solved
   the following problem: The DMA capable interface does
   not know the buffers extent. It calulates it from size.
   The user may need to transfer less than a cachline bytes,
   but STILL have a DMA cabable buffer. The user is therefore
   foreced to transfer more data then needed to "trick" the
   DMA cabable function. This is a wast of bus bandwith and
   may not work will all devices. The internal buffer, solve
   this issue.

stm32h7:stm32_spi review changes

   Added sugestion from jlaitine to support RX only.
2020-05-29 13:08:18 -07:00
RB
f47151f8a7 Updated Rx65n rtc for non CONFIG_RTC_HIRES
Added support for non CONFIG_RTC_HIRES
2020-05-28 16:16:25 -06:00
Jukka Laitinen
48c88f2af3 arch/arm/src/stm32h7: Add the spi slave bus control driver
This is a work in progress, and now only serves as
DMA enabled simplex RX-only mode bus controller

Signed-off-by: Jukka Laitinen <jukka.laitinen@intel.com>
2020-05-28 05:14:38 -07:00
Jukka Laitinen
b2a9a8cf81 arch/arm/src/samv7/sam_spi_slave.c: Change for modified spi slave interface
Signed-off-by: Jukka Laitinen <jukka.laitinen@intel.com>
2020-05-28 05:14:38 -07:00
Jukka Laitinen
8d3c9a8773 arch/arm/src/stm32h7/stm32_spi.h: Split long lines
Signed-off-by: Jukka Laitinen <jukka.laitinen@intel.com>
2020-05-28 05:14:38 -07:00
Masayuki Ishikawa
3f88f57666 arch: imxrt: Fix style violations in imxrt_clockconfig.c 2020-05-26 16:30:04 +02:00
Masayuki Ishikawa
8dda796e6a arch: imxrt: Set the low power mode to 'remain in run mode'
NOTE: now imxrt can wake up from wfi
2020-05-26 16:30:04 +02:00
JacobCrabill
a4012bffa8 stm32h7:stm32h7x3xx_rcc Select FDCAN clock source 2020-05-26 03:57:34 -07:00
Gregory Nutt
82debdc213 Make task_init() and task_activate() internal OS functions.
-Move task_init() and task_activate() prototypes from include/sched.h to include/nuttx/sched.h.  These are internal OS functions and should not be exposed to the user.
-Remove references to task_init() and task_activate() from the User Manual.
-Rename task_init() to nxtask_init() since since it is an OS internal function
-Rename task_activate() to nxtask_activate since it is an OS internal function
2020-05-25 23:54:45 +01:00
Yang Chung-Fan
9345cb5553 arch: x86: Set the idle task stack to prevent get/set errno on idle task resulting NULL reference 2020-05-25 11:18:03 -06:00
Xiang Xiao
37685110cb arch/sim: Fix hostfs.h No such file or directory in makedep
Signed-off-by: Xiang Xiao <xiaoxiang@xiaomi.com>
2020-05-25 09:34:47 -06:00
raiden00pl
d66cb505a5 nrf52: add workaround to SPI Master 1 Byte transfer anomaly 2020-05-25 08:12:14 -06:00
Xiang Xiao
e83c1400b6 build: Move BOARD_DIR definition to common place
Signed-off-by: Xiang Xiao <xiaoxiang@xiaomi.com>
2020-05-24 20:20:12 +01:00
Xiang Xiao
7e5b0f81e9 build: Replace -I with INCDIR
Signed-off-by: Xiang Xiao <xiaoxiang@xiaomi.com>
2020-05-24 20:20:12 +01:00
Xiang Xiao
23668a4b9b build: Remove the empty variable assignment
Signed-off-by: Xiang Xiao <xiaoxiang@xiaomi.com>
2020-05-24 08:24:13 -06:00
Xiang Xiao
edb0ce2d5a build: Don't need use $(DELIM) in include statement
Signed-off-by: Xiang Xiao <xiaoxiang@xiaomi.com>
2020-05-24 08:24:13 -06:00
Masayuki Ishikawa
36c1f7ccf0 arch: tiva: Introduce tiva_idle.c 2020-05-24 09:44:46 -03:00
Xiang Xiao
dd61d3d9f9 build: Remve the unnecessary .gitignore
Signed-off-by: Xiang Xiao <xiaoxiang@xiaomi.com>
2020-05-23 18:00:40 +01:00
David Sidrane
1c2e8cbb36 stm32h7 stm32h7x3xx_rc: Fix CS violation 2020-05-23 09:16:30 -03:00
David Sidrane
19111d9d85 stm32h7:stm32h7x3xx_rcc SDMMC2EN is in RCC_AHB2ENR 2020-05-23 09:16:30 -03:00