Gregory Nutt
|
6a79cea2c0
|
Beginning of support for SAMA5 EHCI. Not much there yet
|
2013-08-20 15:46:36 -06:00 |
|
Gregory Nutt
|
609dc65235
|
Add kernel/user memalign functions. Not fully integrated
|
2013-08-20 13:04:49 -06:00 |
|
Gregory Nutt
|
4d5789dfdd
|
SAMA5 OHCI+EHCI mostly cosmetic changes
|
2013-08-19 15:03:14 -06:00 |
|
Gregory Nutt
|
4bf3dbe149
|
USB host: Add device address management support in preparation for USB hub support
|
2013-08-18 14:31:57 -06:00 |
|
Gregory Nutt
|
a6e6b4ba2d
|
Add few more EHCI definitions
|
2013-08-18 13:01:13 -06:00 |
|
Gregory Nutt
|
07bd7c2168
|
STM32 F1 I2C: Fix a typo that crept in with some recent changes. From Yiran Liao
|
2013-08-18 07:45:14 -06:00 |
|
Gregory Nutt
|
b33de2b618
|
Add EHCI header file (not quite complete)
|
2013-08-17 14:19:18 -06:00 |
|
Gregory Nutt
|
a0837fca6c
|
SAMA5 OHCI: Driver is now basically functional
|
2013-08-16 13:13:21 -06:00 |
|
Gregory Nutt
|
db42d9350c
|
SAMA5 OHCI: Re-organize some endpoint list data structures.. Strange things happen when semaphores lie in DMA memory which is occasionally invalidated
|
2013-08-16 11:36:51 -06:00 |
|
Gregory Nutt
|
ddc93e1da3
|
STM32 SPI: nbits interface extended to handle LSB- or MSB-first operation. From Teemu Pirinen
|
2013-08-16 11:35:22 -06:00 |
|
Gregory Nutt
|
94bcdc66b0
|
SAMA5 OHCI: Don't prealloc RH port TDs and EDs. Allocate from a free list like other cases
|
2013-08-15 17:15:08 -06:00 |
|
Gregory Nutt
|
41c068f652
|
SAMA5 OHCI: Fix errors in cache handling; Don't add ED to control list until port is connected
|
2013-08-15 15:28:27 -06:00 |
|
Gregory Nutt
|
e23a92243c
|
SAMA5: ports should not be reset state (seems to make no difference)
|
2013-08-14 17:33:31 -06:00 |
|
Gregory Nutt
|
49f3831e11
|
SAMA5: Alternatie clock configuration that yields a perfect 48MHz full speed USB clock and a CPU clock of 384MHz
|
2013-08-14 15:16:04 -06:00 |
|
Gregory Nutt
|
e32b60a78c
|
SAMA5 OHCI: Use physical address and flush and/or invalidate data caches as necessary
|
2013-08-14 12:23:06 -06:00 |
|
Gregory Nutt
|
bdbe4a4f25
|
Clean up some LP17xx and STM32 USB host configuration compilation errors due to the massive changes to the USB host interfaces needed to support the SAMA5
|
2013-08-13 17:43:19 -06:00 |
|
Gregory Nutt
|
8f429fd54d
|
SAMA5: Major restructuring of the the OHCI driver drivers to better handle the multiple root hub ports and concureent transfers on each port.
|
2013-08-13 16:48:14 -06:00 |
|
Gregory Nutt
|
34418d12bb
|
Separate wait() and enumerate() methods from struct usbhost_driver_s and move to new interface, struct usbhost_connection_s. This is part of the necessary restructuring of the USB host interface to support multiple root hub ports.
|
2013-08-13 15:03:46 -06:00 |
|
Gregory Nutt
|
b4645f73ec
|
Back out most of the changes of 3b04d08043742b9e65cf38d45988b35bff91daed
|
2013-08-13 14:12:27 -06:00 |
|
Gregory Nutt
|
d0fbea35eb
|
Separate SAMA5 OHCI interrupt handling into separate functions
|
2013-08-13 13:34:35 -06:00 |
|
Gregory Nutt
|
7339c1c5e6
|
SAMA5 OHCI: Fix some erors in the loop that waits for device connection changes
|
2013-08-13 09:44:16 -06:00 |
|
Gregory Nutt
|
6d72cccdf0
|
Fix re-entry problem in SAMA5 up_putc
|
2013-08-13 09:42:40 -06:00 |
|
Gregory Nutt
|
f3bfd6a515
|
STM32 F3 fixes from John Wharington
|
2013-08-13 07:48:18 -06:00 |
|
Gregory Nutt
|
a4c195482f
|
More changes to USB host interface to support multiple downstream ports
|
2013-08-12 16:29:33 -06:00 |
|
Gregory Nutt
|
39696cbf96
|
First of several changes needed to support multiple USB host root hubs
|
2013-08-12 14:44:06 -06:00 |
|
Gregory Nutt
|
f5a0ce709c
|
SAMA5: Add logic to control VBUS power for OHCI
|
2013-08-12 11:59:10 -06:00 |
|
Gregory Nutt
|
dfe6452b8e
|
Add untested OHCI driver for the SAMA5; structure naming and header files for USB host initialization prototypes
|
2013-08-11 17:11:32 -06:00 |
|
Gregory Nutt
|
9cf1365cde
|
SAMA5: Some improvements to the HSCMI card removal/insertion logic
|
2013-08-11 11:13:11 -06:00 |
|
Gregory Nutt
|
69bc6afbd3
|
Add CAN configuration to STM32 config menu
|
2013-08-10 19:37:35 -06:00 |
|
Gregory Nutt
|
03130ca5a3
|
STM32: Fix STM32 serial init for non-reordered serial ports. From Lorenz Meier
|
2013-08-10 19:33:16 -06:00 |
|
Gregory Nutt
|
217ed87aad
|
Added option to disable STM32 serial port re-ordering
|
2013-08-10 19:29:44 -06:00 |
|
Gregory Nutt
|
3c38992727
|
SAMA5: Fix HSMCI race condition. Now memory card interface is functional with DMA
|
2013-08-10 18:01:23 -06:00 |
|
Gregory Nutt
|
6622714c5d
|
Rearrange configuration settings so that ARCH_HAVE_SDIO is moved to higher, sharable level
|
2013-08-10 09:06:53 -06:00 |
|
Gregory Nutt
|
75d0fc2a10
|
Extend the virtual-to-physical address conversion logic to handle NFS SRM, UDPH SRAM, and external SRAM and PSRAM.
|
2013-08-09 17:55:27 -06:00 |
|
Gregory Nutt
|
d8b3921972
|
SAMA5: Centralize logic for conversion between physical and virtual addresses
|
2013-08-09 17:25:53 -06:00 |
|
Gregory Nutt
|
ad6b8726c2
|
Fix some cache-related issues with the SAMA5 DMA driver
|
2013-08-09 15:25:13 -06:00 |
|
Gregory Nutt
|
a2ba8992a9
|
SAM3,4,A5 DMA fixes; SAMA5 SPI driver now supports DMA transfers
|
2013-08-09 13:12:16 -06:00 |
|
Gregory Nutt
|
2b36e7e266
|
SAMA5: Use RDR/TDR registers for DMA, not FIFO registers; change DMA bit settings to match Atmel example. Still no DMA
|
2013-08-08 15:51:16 -06:00 |
|
Gregory Nutt
|
53c4a1e647
|
SAMA5 DMA: Need to flush caches; DMA channel depends upon direction of DMA; the maximum transfer size in bytes depends on the number of bytes per transfer
|
2013-08-08 13:15:52 -06:00 |
|
Gregory Nutt
|
05242e41ef
|
More SAMA5 DMAC driver fixes. Still does not work.
|
2013-08-07 17:19:48 -06:00 |
|
Gregory Nutt
|
e015c6edd6
|
SAMA3,4,A5: Misc corrections to DMA and HSMCI drivers
|
2013-08-07 11:32:08 -06:00 |
|
Gregory Nutt
|
159635bc2a
|
Fix SAM bug: Parmaters reversed in DMA function call
|
2013-08-06 15:47:09 -06:00 |
|
Gregory Nutt
|
d1da100cf0
|
SAM3,4,A5 DMAC driver fixes
|
2013-08-06 13:27:48 -06:00 |
|
Gregory Nutt
|
03f24c7a1d
|
SAM3,4,A5: Fix some masked status checks that can generate false error reports
|
2013-08-06 12:36:56 -06:00 |
|
Gregory Nutt
|
dfe42d0254
|
SAMA5: A few early, easy bug fixes. The rest will all be difficult
|
2013-08-06 11:29:53 -06:00 |
|
Gregory Nutt
|
e8a34ea3ac
|
SAMA5: Add PIO interrupt support. Massive name changes for consistency in PIO vs GPIO naming. SAMA5D3x-EK: Add support for SD card detection PIO interrupts
|
2013-08-06 10:20:17 -06:00 |
|
Gregory Nutt
|
a68a3a0366
|
SAMA5: Add HSMCI memory card driver support
|
2013-08-05 16:21:24 -06:00 |
|
Gregory Nutt
|
cff3e713f1
|
SAMA5: SPI Driver + AT25 FLASH work; SAM3/4: Correct an error, SPI will not be correctly configured if CONFIG_SPI_OWNBUS=n
|
2013-08-05 10:29:43 -06:00 |
|
Gregory Nutt
|
36f4cb53dd
|
SAMA5: Add logic to auto-mount a file system on AT25 SPI FLASH for NSH
|
2013-08-05 08:24:39 -06:00 |
|
Gregory Nutt
|
412aaa83a2
|
SAMA5D3x-EK: At support for the AT25 serial FLASH
|
2013-08-04 16:56:41 -06:00 |
|
Gregory Nutt
|
5fe6e4df26
|
SAMA5: Add register level debug option for SPI
|
2013-08-04 14:45:24 -06:00 |
|
Gregory Nutt
|
d516baa73f
|
SAMA5: SPI driver now supports both SPI0 and SPI1
|
2013-08-04 12:50:20 -06:00 |
|
Gregory Nutt
|
487866b2b6
|
SAMA5: Add basic SPI suppport (untested)
|
2013-08-04 11:08:20 -06:00 |
|
Gregory Nutt
|
8194e6bbcf
|
SAMA5: Add DMA suppport (untested)
|
2013-08-04 10:44:18 -06:00 |
|
Gregory Nutt
|
a93b095ce4
|
SAMA5: Add DMA controller register definitions
|
2013-08-03 12:13:42 -06:00 |
|
Gregory Nutt
|
8b317e9ea3
|
Standard configuration variables used to enable interupt controller debug; SAMA5: Correct handling of spurious interrupts
|
2013-08-03 08:22:37 -06:00 |
|
Gregory Nutt
|
c7293535fe
|
Various changes to get SAMA5 SDRAM working. Marginally functional, but there is more to be done
|
2013-08-02 18:30:27 -06:00 |
|
Gregory Nutt
|
08a1ff5c79
|
Correct some typos int he MPADDRCS register address definitions
|
2013-08-02 12:06:11 -06:00 |
|
Gregory Nutt
|
b00d72a7f2
|
SAMA5: More MMU-related changes to properly initialize SDRAM
|
2013-08-02 11:11:57 -06:00 |
|
Gregory Nutt
|
894618f894
|
SAMA5: Add logic to initialize SAMA5D3x-EK on-board SDRAM
|
2013-08-01 16:58:55 -06:00 |
|
Gregory Nutt
|
70e1028d41
|
SAMA5: Add DDR controller register definitions
|
2013-08-01 12:27:41 -06:00 |
|
Gregory Nutt
|
35c3a49e1c
|
ARMv7-A: Map all of .text, .bss, .data., stacks before enabling the MMU and caching. This is simpler and avoids fears I have about caching
|
2013-08-01 10:05:33 -06:00 |
|
Gregory Nutt
|
f0e6d4f101
|
ARMv7-A: Separate CONFIG_PAGING start-up logic into a different startup file. Too much conditional compilation.
|
2013-08-01 07:41:00 -06:00 |
|
Gregory Nutt
|
b0045bc7e2
|
SAMA5: Add an NSH configuration of the SAMA5D3x-EK board
|
2013-07-31 10:46:13 -06:00 |
|
Gregory Nutt
|
8695c89aa4
|
SAMA5: Modification of some CPSR-related inline functions
|
2013-07-31 09:11:24 -06:00 |
|
Gregory Nutt
|
db20c5fc43
|
Fix Cortex-A CPSR register field definition
|
2013-07-30 19:05:24 -06:00 |
|
Gregory Nutt
|
391d300d4d
|
SAMA5: Change mapping of vector tables to work around that fact that I don't understand how the AXI MATRIX remap works
|
2013-07-30 16:19:52 -06:00 |
|
Gregory Nutt
|
16371b50e4
|
ARMv7-A: Add cp15_disable_dcache(); SAMA5: nor_main.c no disables MMU and caches; Should not remap ISRAM to address 0x0 unless we booted into ISRAM
|
2013-07-30 13:20:33 -06:00 |
|
Gregory Nutt
|
6f99994722
|
More DAC changes from John Wharington
|
2013-07-30 11:41:53 -06:00 |
|
Gregory Nutt
|
b75a0cf8be
|
Add ARMv7-A irqdisable() inline function
|
2013-07-30 11:37:09 -06:00 |
|
Gregory Nutt
|
84150fd7ed
|
STM32 F3 I2C driver from John Wharington
|
2013-07-30 10:35:17 -06:00 |
|
Gregory Nutt
|
4bdcceb3b3
|
STM32 DAC DMA fixes from John Wharington
|
2013-07-30 08:54:32 -06:00 |
|
Gregory Nutt
|
547f9be80f
|
SAMA5: More cache and mmu inline utility functions
|
2013-07-29 19:57:15 -06:00 |
|
Gregory Nutt
|
95998c715f
|
SAMA5: Separate cache operations into separate files
|
2013-07-29 18:38:02 -06:00 |
|
Gregory Nutt
|
f658bcdb13
|
Changes to ARMv7-A boot logic to handle the case where we execute out of NOR FLASH
|
2013-07-29 17:54:56 -06:00 |
|
Gregory Nutt
|
4e90fae5e8
|
Add SAMA5 HSMC register definitions and logic to reconfigure the NOR FLASH
|
2013-07-29 10:56:21 -06:00 |
|
Gregory Nutt
|
27a9da98f4
|
SAMA5: Add file structure to support board-specific initialization of NOR flash
|
2013-07-29 07:41:53 -06:00 |
|
Gregory Nutt
|
65c8abddb8
|
SAMA5: The ostest configuration have been converted to run out of NOR flash. There is more to be done, however
|
2013-07-28 15:07:35 -06:00 |
|
Gregory Nutt
|
7dfabf3507
|
SAMA5: Correct a clock configuration bug; clarify some MMU memory types
|
2013-07-28 12:44:06 -06:00 |
|
Gregory Nutt
|
f191ac94c0
|
SAMA5: Correct vector mapping
|
2013-07-28 09:44:11 -06:00 |
|
Gregory Nutt
|
9a5311296f
|
Removed unused ARMv7-A cache function
|
2013-07-27 14:03:02 -06:00 |
|
Gregory Nutt
|
ae6ed8ca52
|
SAMA5: Fix heap allocation bugs
|
2013-07-27 11:28:31 -06:00 |
|
Gregory Nutt
|
3d16c9afc7
|
SAMA5 page table is cached; need to flush the cache each time that the page table is updated
|
2013-07-27 09:27:37 -06:00 |
|
Gregory Nutt
|
87af1517ed
|
Correct an error in Cortex-A5 intermediate MMU mapping
|
2013-07-26 17:26:53 -06:00 |
|
Gregory Nutt
|
14093ef76a
|
Add a hello world configuration to help with the SAMA5 bringup
|
2013-07-26 15:28:01 -06:00 |
|
Gregory Nutt
|
2f772c84fd
|
Finally... renamed all CONFIG_DRAM_ settings to CONFIG_RAM_
|
2013-07-26 10:09:17 -06:00 |
|
Gregory Nutt
|
f87963accd
|
SAMA5: If the page table is in high memory, make sure that it is excluded from the heap
|
2013-07-26 09:16:46 -06:00 |
|
Gregory Nutt
|
4ea9e1eb6e
|
Fix some bad page table definitions of last commit
|
2013-07-25 18:11:25 -06:00 |
|
Gregory Nutt
|
696f6d0482
|
Misc Cortex-A5 MMU-related fix -- still does not boot
|
2013-07-25 16:37:55 -06:00 |
|
Gregory Nutt
|
d1be1e6698
|
Fix an uninitialized register error that crept into the ARM9 start up code many years ago and was recently cloned into the Cortex-A5. Obviously no on has used NuttX with ARM9 for years
|
2013-07-24 20:12:04 -06:00 |
|
Gregory Nutt
|
f337f3a977
|
Fix SAMA5 vector linking issue
|
2013-07-24 12:51:42 -06:00 |
|
Gregory Nutt
|
213780bc43
|
Update SAMA5D3x-EK board configuration to support on-board UART connections, LEDs, and push buttons
|
2013-07-24 12:27:12 -06:00 |
|
Gregory Nutt
|
63f136dd7e
|
Revamp the way external memory regions are configured; Add logic to add SAMA5 external memory regions to the heap
|
2013-07-24 10:08:32 -06:00 |
|
Gregory Nutt
|
a81abd3514
|
Improve Cortex-A5 context switching so that a little less copying is done
|
2013-07-24 07:47:51 -06:00 |
|
Gregory Nutt
|
2e8fcc7229
|
ARMv7-N: Fix a copy error introduced in the previous check-in
|
2013-07-23 19:09:17 -06:00 |
|
Gregory Nutt
|
cb3f394d53
|
Improve some ARMv7-A/M floating point register save time; Add floating point register save logic for ARMv7-A
|
2013-07-23 17:52:06 -06:00 |
|
Gregory Nutt
|
9e24c4fcd5
|
ARMv7-A: Need 8-byte stack alignment when callign C code from interrupt handlers. This change needs to be ported to other ARM architectures as well
|
2013-07-23 14:47:16 -06:00 |
|
Gregory Nutt
|
596cdf2982
|
SAMA5: Adapt clocking for different boot modes. New header files for AXI matrix, BSC, and SFR
|
2013-07-23 13:54:49 -06:00 |
|
Gregory Nutt
|
ae3f2b2876
|
Add SAMA5D3 pin multiplexing definitions
|
2013-07-23 09:47:01 -06:00 |
|
Gregory Nutt
|
e9f8689cee
|
Add SAMA5 GPIO configuration support
|
2013-07-22 20:59:47 -06:00 |
|
Gregory Nutt
|
50cd6352fa
|
Add support SAMA5 UART and serial driver
|
2013-07-22 19:16:37 -06:00 |
|
Gregory Nutt
|
9665c0d267
|
SAMA5 clock configuration should now agree with Atmel sample code; Added header file with macros to enable and disable peripheral clocking
|
2013-07-22 17:00:02 -06:00 |
|
Gregory Nutt
|
571308c27a
|
Add SAMA5 clock logic. Cloned from SAM3U and not yet verified
|
2013-07-22 14:42:05 -06:00 |
|
Gregory Nutt
|
fb8a7a91fb
|
SAMA5 interrupt handling logic
|
2013-07-22 11:54:39 -06:00 |
|
Gregory Nutt
|
ca9b52b07f
|
SAMA5/Cortex-A: Improve irqsave/restore inlines + add irqenable. Add skeleton file for SAMA5 interrupt management. Also change from last commit that was left in the editor
|
2013-07-21 17:08:40 -06:00 |
|
Gregory Nutt
|
b26d506514
|
Add system timer logic for the SAMA5
|
2013-07-21 15:49:17 -06:00 |
|
Gregory Nutt
|
0b46176b43
|
A few more Cortex-A5 and SAMA5 files
|
2013-07-21 12:52:38 -06:00 |
|
Gregory Nutt
|
0d9250fae5
|
Misc Cortex-A5 changes include new file for cache operations
|
2013-07-20 13:06:00 -06:00 |
|
Gregory Nutt
|
6f0e07d071
|
A few more SAMA5D3 files
|
2013-07-19 17:45:28 -06:00 |
|
Gregory Nutt
|
137cd94b6a
|
Basic framework to support the AT91SAMA5D3 family and the SAMA5D3x-EK board(s) in particular
|
2013-07-19 15:23:03 -06:00 |
|
Gregory Nutt
|
c294e9b374
|
More ARMv7-A files that are just copies of the ARMv4/5 files for now
|
2013-07-19 11:43:04 -06:00 |
|
Gregory Nutt
|
15ae557793
|
Minor but fatal typo introduced in last checkin
|
2013-07-18 15:45:21 -06:00 |
|
Gregory Nutt
|
28a90ba46d
|
Some initial frame for Cortex-A5 support. No much yet
|
2013-07-18 15:20:47 -06:00 |
|
Gregory Nutt
|
91313feac2
|
NSH cmp command by Andrew Twidgell
|
2013-07-18 08:24:29 -06:00 |
|
Gregory Nutt
|
78bffd06c2
|
STM32 SDIO driver: Add supported for data block end (DBCKEND) interrupt. From Chia Cheng Tsao
|
2013-07-08 09:04:05 -06:00 |
|
Gregory Nutt
|
d649c2a462
|
Ticket #16: STM32 OTG FS device driver endpoint allocation. From Chia Cheng Tsao
|
2013-07-08 08:55:05 -06:00 |
|
Gregory Nutt
|
dcb4545afb
|
prohibit re-entrance into sam_configgpio()
|
2013-07-05 17:15:54 -06:00 |
|
Gregory Nutt
|
d5f274ac76
|
Fix SAM34 interrupt handling for ports D-F; fix MISO logic in Arduino Due touchscreen driver
|
2013-07-03 08:12:45 -06:00 |
|
Gregory Nutt
|
348304fcb4
|
Several fixes to get a clean compile of the Arduino touch screen
|
2013-07-02 13:52:09 -06:00 |
|
Gregory Nutt
|
a954eb76b2
|
Created new directories to hold SPI-related files
|
2013-07-01 08:11:54 -06:00 |
|
Gregory Nutt
|
5c86557971
|
Update LM FLASH definitions for LM4F120. From Vinti
|
2013-06-29 07:02:56 -06:00 |
|
Gregory Nutt
|
4db87105e9
|
SAM33/4: Need to disable write protection before modify PIO pin configuration
|
2013-06-28 15:34:51 -06:00 |
|
Gregory Nutt
|
880d7f261b
|
Add an NSH configuration for the Arduino Due; Pluse several fixes related to the Due and to the SAM3X in general
|
2013-06-28 14:32:08 -06:00 |
|
Gregory Nutt
|
4fe041a10b
|
Arduino Due: Fixes to FLASH address, flash wait states, updated Comments. Now boots and runs a bit before crashing
|
2013-06-28 11:29:14 -06:00 |
|
Gregory Nutt
|
8f41963efd
|
With these changes the Arduino Due port builds without errors
|
2013-06-27 15:07:07 -06:00 |
|
Gregory Nutt
|
2ecac742b6
|
Flesh out the Arduino Due board configuratino and integrate it with the build and configuration system
|
2013-06-27 14:24:27 -06:00 |
|
Gregory Nutt
|
3910edbf90
|
Review and update of SAM3/4 header files and conditional logic for SAM3X/A support
|
2013-06-27 11:06:13 -06:00 |
|
Gregory Nutt
|
77b36e0bc1
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Add peripheral configuration logic for the SAM3X/3A; Change all references to SAM3/4 SPI to SPI0 for compatibity with the SAM3X/3A which has SPI0 and SPI1; Add directory which will eventually holdl an Arduino Due port
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2013-06-26 18:46:44 -06:00 |
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Gregory Nutt
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69bd94290a
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Add SAM3X/3A pin multiplexing and GPIO encoding header files
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2013-06-26 17:02:43 -06:00 |
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Gregory Nutt
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87cfee43af
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Add SAM3X/3A memory map
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2013-06-26 14:37:57 -06:00 |
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Gregory Nutt
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ae6dbb9bf9
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Add SAM3X/3A peripheral clock controls
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2013-06-26 14:00:26 -06:00 |
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Gregory Nutt
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8865cf8be0
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Add SAM3X/3A interrupt vectors
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2013-06-26 12:59:56 -06:00 |
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Gregory Nutt
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2812f5be67
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Add support for SAM3X and 3A chips, interrupts, and peripheral IDs
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2013-06-26 12:28:32 -06:00 |
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Gregory Nutt
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64d149233b
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Fix integration of RAM test into the build and configuration system
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2013-06-26 10:54:12 -06:00 |
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Gregory Nutt
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e00a8397bc
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Add support for a separate CCM memory allocator for members of the STM32 family that support CCM memory
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2013-06-25 09:13:30 -06:00 |
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Gregory Nutt
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22c3d49807
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SAM4L Xplained SLCD driver is complete
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2013-06-23 09:05:20 -06:00 |
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Gregory Nutt
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c21986c418
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Beginning of a driver for the SAM4L LED1 module
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2013-06-21 17:42:09 -06:00 |
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Gregory Nutt
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7a65c32d4b
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Straighten out issues about who calls C++ initializers with CXXTEST or HELLOXX are built as NSH applications; Add an ofstream test to CXXTEST suggested by Michael; Update many defconfig fiels to that they set configurations to handle C++ constructors just as before these configuration changes
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2013-06-21 09:32:57 -06:00 |
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Gregory Nutt
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4fded8a25c
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More KL25Z SPI fixes
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2013-06-20 19:58:45 -06:00 |
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Gregory Nutt
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6e2fe7ccaf
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KL25Z GPIO register dump function now compiles
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2013-06-20 18:00:56 -06:00 |
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Gregory Nutt
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d088cbec5b
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Fix backward wait condition in KL24Z SPI driver
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2013-06-20 17:39:42 -06:00 |
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Gregory Nutt
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2e40a98c74
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Add framework for managing SPI-related discretes on the Freedom KL25Z board.
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2013-06-20 13:50:16 -06:00 |
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Gregory Nutt
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3c05e28e6d
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More Freedom KL25Z changed to and from Alan Carvalho de Assis
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2013-06-19 20:50:27 -06:00 |
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Gregory Nutt
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bdc68f73ad
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Fix errors in KL25Z SPI driver reported by Alan Carvalho de Assis
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2013-06-19 19:32:13 -06:00 |
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Gregory Nutt
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f3781d1eec
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Add SAM4L PDCA register definition file
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2013-06-19 18:38:31 -06:00 |
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Gregory Nutt
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e377bab446
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SPI register definition file updated to include a few differences for the SAM4L
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2013-06-19 16:03:19 -06:00 |
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Gregory Nutt
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c9ed0f9120
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SAM4L LCDCS register definitions
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2013-06-19 13:59:47 -06:00 |
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Gregory Nutt
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23579f3af4
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Add SPI driver for the Freescale KL25Z
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2013-06-19 12:10:01 -06:00 |
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Gregory Nutt
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5368531d60
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Add SPI register definitions for the Freescale KL25Z
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2013-06-19 09:56:32 -06:00 |
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Gregory Nutt
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49ad89dd70
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Fix test of NULL pointer in the SAM3/4 SPI driver
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2013-06-18 12:16:52 -06:00 |
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