Commit Graph

271 Commits

Author SHA1 Message Date
Gregory Nutt
037c9ea0a4 arch/arm: Rename all up_*.h files to arm_*.h
Summary

The naming standard at https://cwiki.apache.org/confluence/display/NUTTX/Naming+FAQ requires that all MCU-private files begin with the name of the architecture, not up_.

This PR addresses only these name changes for the up_*.h files.  There are only three, but almost 1680 files that include them:

    up_arch.h
    up_internal.h
    up_vfork.h

The only change to the files is from including up_arch.h to arm_arch.h (for example).

The entire job required to be compatible with that Naming Convention will also require changing the naming of the up_() functions that are used only within arch/arm and board/arm.

Impact

There should be not impact of this change (other that one step toward more consistent naming).

Testing

stm32f4discovery:netnsh
2020-05-01 03:43:44 +01:00
Gregory Nutt
c6c712b2fc arch/arm: Rename all up_*.c files to arm_*.c 2020-05-01 02:11:01 +01:00
Gregory Nutt
a86884c615 Run all .c and .h files modifed in this PR through nxstyle. 2020-04-30 22:09:51 +01:00
Gregory Nutt
6398a64e26 Rename up_saveusercontext to arm_saveusercontext 2020-04-30 22:09:51 +01:00
Gregory Nutt
3a82a20c90 Rename up_copyarmstate to arm_copyarmstate 2020-04-30 22:09:51 +01:00
Gregory Nutt
3d2cd1493f Rename up_copyfullstate to arm_copyfullstate 2020-04-30 22:09:51 +01:00
Gregory Nutt
a7558cf9b9 Run all .c and .h modified by the PR through nxstyle. 2020-04-30 18:38:32 +01:00
Gregory Nutt
e2a65ceb5f Rename up_fullcontextrestore to arm_fullcontextrestore 2020-04-30 18:38:32 +01:00
Nathan Hartman
d6f7821b15 Docs and comments: Change OSX -> macOS
Mac OS X was renamed to macOS at some point. Update references to
OSX, OS X, Mac OS X, Mac OSX, and other permutations, to macOS,
in README files and in comments of other files.
2020-04-26 07:48:33 -06:00
Nathan Hartman
a5e643b0cd Fix typos in comments and documentation. 2020-03-16 20:01:11 -06:00
Xiang Xiao
cde88cabcc Run codespell -w with the latest dictonary again
Signed-off-by: Xiang Xiao <xiaoxiang@xiaomi.com>
2020-02-23 22:27:46 +01:00
Xiang Xiao
bd4e8e19d3 Run codespell -w against all files
and fix the wrong correction
2020-02-22 14:45:07 -06:00
YAMAMOTO Takashi
b363bd0841 Update the comments (the location of trampoline code)
Also, fix typos and copy-and-paste errors.
2020-02-20 14:21:16 +08:00
Juha Niskanen
15b78abccf Fix typos in comments 2020-02-14 08:50:45 -06:00
Xiang Xiao
80277d1630
Refine the preprocessor conditional guard style (#190) 2020-01-31 19:07:39 +01:00
Juha Niskanen
a762c06ed9 Fix typos and some incorrect comments
Author: Alan Carvalho de Assis <acassis@gmail.com>

    Run nxstyle against .c and .h files and fix it

Author: Juha Niskanen <juha.niskanen@haltian.com>

    Fix typos and some incorrect comments
2020-01-20 09:32:36 -03:00
Xiang Xiao
6a3c2aded6 Fix wait loop and void cast (#24)
* Simplify EINTR/ECANCEL error handling

1. Add semaphore uninterruptible wait function
2 .Replace semaphore wait loop with a single uninterruptible wait
3. Replace all sem_xxx to nxsem_xxx

* Unify the void cast usage

1. Remove void cast for function because many place ignore the returned value witout cast
2. Replace void cast for variable with UNUSED macro
2020-01-02 10:54:43 -06:00
Gregory Nutt
69318b1024 Re-implements reverted commit 344f7bc9f6 in a way that should not have the undesired side-effect. include/nuttx/sched.h: Add a bit to the TCB flags to indicat the thread is a user thread in a syscall. sched/nuttx/nxsig_dispatch.c: Delay dispatching to signal handlers if within a system call. In all syscall implementations: Process delayed signal handling when exiting system call. 2019-11-28 12:47:36 -06:00
Gregory Nutt
cbdd590c82 Revert "include/nuttx/sched.h: Add storage for a previous signal mask. arch/: In all syscall implementations, block all signals before dispatching a system call; resotre signal mask when the system call returns."
Using the sigprocmask() for this purpose has too many side-effects.

This reverts commit 344f7bc9f6.
2019-11-28 11:57:54 -06:00
Gregory Nutt
344f7bc9f6 include/nuttx/sched.h: Add storage for a previous signal mask. arch/: In all syscall implemenations, block all signals before dispatching a system call; resotre signal mask when the system call returnes. 2019-11-28 10:51:29 -06:00
Nathan Hartman
68d43d3679 Fix typos. 2019-08-04 14:50:28 -06:00
Gregory Nutt
abf6965c24 Squashed commit of the following:
libs/:  Remove references to CONFIG_DISABLE_SIGNALS.  Signals can no longer be disabled.
    syscall/:  Remove references to CONFIG_DISABLE_SIGNALS.  Signals can no longer be disabled.
    wireless/:  Remove references to CONFIG_DISABLE_SIGNALS.  Signals can no longer be disabled.
    Documentation/:  Remove references to CONFIG_DISABLE_SIGNALS.  Signals can no longer be disabled.
    include/:  Remove references to CONFIG_DISABLE_SIGNALS.  Signals can no longer be disabled.
    drivers/:  Remove references to CONFIG_DISABLE_SIGNALS.  Signals can no longer be disabled.
    sched/:  Remove references to CONFIG_DISABLE_SIGNALS.  Signals can no longer be disabled.
    configs:  Remove references to CONFIG_DISABLE_SIGNALS.  Signals can no longer be disabled.
    arch/xtensa:  Remove references to CONFIG_DISABLE_SIGNALS.  Signals can no longer be disabled.
    arch/z80:  Remove references to CONFIG_DISABLE_SIGNALS.  Signals can no longer be disabled.
    arch/x86:  Remove references to CONFIG_DISABLE_SIGNALS.  Signals can no longer be disabled.
    arch/renesas and arch/risc-v:  Remove references to CONFIG_DISABLE_SIGNALS.  Signals can no longer be disabled.
    arch/or1k:  Remove all references to CONFIG_DISABLE_SIGNALS.  Signals are always enabled.
    arch/misoc:  Remove all references to CONFIG_DISABLE_SIGNALS.  Signals are always enabled.
    arch/mips:  Remove all references to CONFIG_DISABLE_SIGNALS.  Signals are always enabled.
    arch/avr:  Remove all references to CONFIG_DISABLE_SIGNALS.  Signals are always enabled.
    arch/arm:  Remove all references to CONFIG_DISABLE_SIGNALS.  Signals are always enabled.
2019-04-29 14:52:05 -06:00
Gregory Nutt
c1beda8a34 ARMv7-A/R: Add barriers.h header file for consistency with ARMv7-M. 2019-03-19 13:20:23 -06:00
Xiang Xiao
64252a298f arch/: Unify the cache interface for all architectures 2019-03-19 10:37:13 -06:00
Gregory Nutt
a2e62f557d Squashed commit of the following:
sched/init/nx_bringup.c:  Fix a naming collision.
    sched/init:  Rename os_start() to nx_start()
    sched/init:  Rename os_smp* to nx_smp*
    sched/init:  Rename os_bringup to nx_bringup
    sched/init:  rename all internal static functions to begin with nx_ vs os_
2019-02-04 16:20:35 -06:00
Gregory Nutt
bb623d1e04 This commit renames all internal OS functions defined under sched/task so that they begin with the prefix. For example, nxtask_exit() vs. task_exit().
Squashed commit of the following:

    Trivial, cosmetic
    sched/, arch/, and include:  Rename task_vforkstart() as nxtask_vforkstart()
    sched/, arch/, and include:  Rename task_vforkabort() as nxtask_vforkabort()
    sched/, arch/, and include:  Rename task_vforksetup() as nxtask_vfork_setup()
    sched/:  Rename notify_cancellation() as nxnotify_cancellation()
    sched/:  Rename task_recover() to nxtask_recover()
    sched/task, sched/pthread/, Documentation/:  Rename task_argsetup() and task_terminate() to nxtask_argsetup() and nxtask_terminate(), respectively.
    sched/task:  Rename task_schedsetup() to nxtask_schedsetup()
    sched/ (plus some binfmt/, include/, and arch/):  Rename task_start() and task_starthook() to nxtask_start() and nxtask_starthook().
    arch/ and sched/:  Rename task_exit() and task_exithook() to nxtask_exit() and nxtask_exithook(), respectively.
    sched/task:  Rename all internal, static, functions to begin with the nx prefix.
2019-02-04 13:42:51 -06:00
Gregory Nutt
a77c073797 arch/: Fix an interlock that was broken by commit 641a98a434 in all implementations of up_sigdeliver. 2019-02-03 17:14:32 -06:00
Gregory Nutt
641a98a434 arch/: The saved return register state is available on the user stack. Thic commit reorders some logic so that certain, critical registers are preserved in the TCB. This does not make the logic 100% secure, but does prevent some obvious things. sched/signal/sig_delivery: Add a flag to the TCB to indicate that we are in a signal handler. Use this flag to assure that a there a never attempts to nest signal handling operations on a thread. This was guaranteed before but when locking of pre-emption during signal delivering was eliminated in a previous commit, there was a remote possibility of an attempt to do nested signal handling. This flag assures that there is only one signal handled at a time. 2019-02-03 15:29:47 -06:00
Xiang Xiao
763ba51b78 arch/xxx/src/xxx/up_assert.c: Dump CPU0 IDLE stack only when PID equals 0. IDLE threads of other CPUs do not need this special check 2019-01-26 10:59:23 -06:00
Gregory Nutt
db24306435 arch/assertion logic: Fix additional places where the test for an IDLE task is incorrect. It is not invalid in all configurations to check for PID==0. However, the logic fixed in these places lackes sufficient intelligence to find the right stack for the CPU IDLE thread and could still show the wrong stack. 2018-12-18 17:45:46 -06:00
Gregory Nutt
ec9265aa95 arch assertions: Correct duplicated logic from commit dbf01d12b7. Checking for PID == zero is not a valid way to test for the IDLE task in all configurations! This is only true in the single CPU configuration. In multiple CPU configurations, there will be a separate IDLE task for each CPU with a different PID. 2018-12-18 17:35:42 -06:00
Xiang Xiao
dbf01d12b7 Assertions: Identify the running task correctly when dumping task state information. It takes time to switch to the target task after g_readytorun has been modified. If panic/assert happen during this period, the dump will contain the incorrect and confusing information due to the difference between the real running task and the return value of this_task(). This change resolve this problem by adding g_running_task to track the real running task through the context switch. 2018-11-15 07:11:51 -06:00
Xiang Xiao
543f4ed8ec arch/ all assertion functions: up_assert move the register dump to first make the more important info first 2018-11-11 12:53:59 -06:00
Xiang Xiao
dfe788be25 arch/ all assertion functinos: up_stackdump dump the full stack if stack overflow the stack info is very useful to find the backtrace 2018-11-11 12:52:36 -06:00
Xiang Xiao
e4106a3744 arch/ assertions files: up_registerdump capture the general register if not yet saved and up_saveusercontext is implemented, the register dump is very useful to find the cause of failure. 2018-11-11 12:50:50 -06:00
Gregory Nutt
2b3ec4172d arch/: Add 'BOARD_ASSERT_RESET_VALUE' in config/Kconfig and replace reboot status '0' to 'CONFIG_BOARD_ASSERT_RESET_VALUE'. 2018-11-10 14:06:46 -06:00
Gregory Nutt
b823fd83bd arch/arm/src/armv7-a: Replicate the same fix was previously commited for the armv7-r. 2018-09-20 21:40:29 -06:00
EunBong Song
0f18e8cc32 Merged in ebsong/nuttx (pull request #722)
Pull request for mtd/progmem refactoring.

* mtd/progmem: change up_progmem_npages to up_progmem_neraseblocks

    page is a unit for read/write operation.
    eraseblock is a unit for erase operation.
    up_progmem_npages is a little bit confusing because it returns number of
    erase blocks in flash memory. This patch changes up_progmem_npages to
    up_progmem_neraseblocks. There is no logical change.

    Signed-off-by: EunBong Song <eunb.song@samsung.com>

* mtd/progmem: up_progmem_erasesize.

    Change argument name to be more readable.

    Signed-off-by: EunBong Song <eunb.song@samsung.com>

* mtd/progmem: up_progmem_eraseblock

    Change up_progmem_erasepage to up_progmem_eraseblock.
    eraseblock is more readable name than erasepage.

    Signed-off-by: EunBong Song <eunb.song@samsung.com>

* mtd/progmem: change up_progmem_eraseblock's return value.

    up_progmem_eraseblock erase a block. so it's better to return the erase block
    size than page size.

    Signed-off-by: EunBong Song <eunb.song@samsung.com>

* arm/cortex-r : fix wrong cp15_flash_dcache.

    change mcrne to mcr for unconditional dcache.

    Signed-off-by: sungduk.cho <sungduk.cho@samsung.com>

Approved-by: GregoryN <gnutt@nuttx.org>
2018-09-21 03:18:38 +00:00
EunBong Song
d33b0640fe Merged in ebsong/nuttx (pull request #712)
Pull request for cortex-r4 codes

* arm/armv7-r: Add general interrupt controller.

    This is based on armv7-a gic controller code.

    Signed-off-by: EunBong Song <eunb.song@samsung.com>

* arm/armv7-r: add invalidate dcache in arm_head.S

    Adding invalidate dcache as a comment in arm_head.S.

    Signed-off-by: EunBong Song <eunb.song@samsung.com>

* arm/armv7-r: Fix some wrong configuration of program status register.

    PSR_E_BIT bit should be set for big endian system.
    PSR_A_BIT bis is set automatically as arm cortex-r4 reference manual 3.7.4.
    So we don't need to set this bit.

    Signed-off-by: EunBong Song <eunb.song@samsung.com>

* arm/armv7-r: Fix some wrong MPU register definition.

    Change MPU_RBAR_ADDR_MASK and MPU_RACR_TEX_SHIFT mask as
    arm cortex-r4 reference manual.

    Region Base Address Register 0-4 bits are reserved.
    MPU Region Access control register type 3-5 bits.

    Signed-off-by: EunBong Song <eunb.song@samsung.com>

* driver/mtd: fix compilation error.

    This commit fixes below compilation errors.

    CC:  mtd/smart.c
    mtd/smart.c:182:22: error: 'gWearBitToLevelMap4' defined but not used [-Werror=unused-const-variable=]
     static const uint8_t gWearBitToLevelMap4[] =
                          ^~~~~~~~~~~~~~~~~~~
    mtd/smart.c:170:22: error: 'gWearLevelToBitMap4' defined but not used [-Werror=unused-const-variable=]
     static const uint8_t gWearLevelToBitMap4[] =
                          ^~~~~~~~~~~~~~~~~~~
    cc1: all warnings being treated as errors
    make[1]: *** [smart.o] Error 1

    Signed-off-by: Junyeon LEE <junyeon2.lee@samsung.com>

Approved-by: GregoryN <gnutt@nuttx.org>
2018-08-29 01:50:41 +00:00
Xiang Xiao
7a9309370f arm syscalls: svcall/sycall logic needs to get the ucontext argument from R4 instead of stack since all syscall parameters pass from registers in syscall.h 2018-08-24 07:11:18 -06:00
Xiang Xiao
e1202d2ed3 Replace all ASSERT with DEBUGASSERT to save the code space 2018-08-24 06:58:30 -06:00
Xiang Xiao
467d2a58ea Replace non critical PANIC with DEBUGPANIC to save the code space 2018-08-24 06:21:15 -06:00
Xiang Xiao
a465b6f0d4 configs/: Change CONFIG_BOARD_RESET_ON_CRASH to CONFIG_BOARD_RESET_ON_ASSERT, arch/: Implement call to board_reset() if in all implementations of up_assert() when CONFIG_BOARD_RESET_ON_ASSERT=y. 2018-08-22 17:04:39 -06:00
Gregory Nutt
a94e3284b3 syslog: Enable is partial, crippled version of syslog_flush(); arch/: Call syslog_flush() from assertion handling logic. 2018-06-07 16:29:16 -06:00
Gregory Nutt
977d41d519 Based on a change recommended by Mark Shulte:
Signal handlers maybe run with interrupts enabled or disabled, depending on how the task the received the signal was blocked. (i.e.: If sem_wait() is called, then we disable interrupts, then block the currently running task). This could be dangerous, because user code would be running with interrupts disabled.

This change forces interrupts to be enabled in up_sigdeliver() before executing the signal handler calling up_irq_enable() explicitly.  This is safe because, when we return to normal execution, interrupts will be restored to their previous state when the signal handler returns.
2018-06-06 09:54:30 -06:00
Gregory Nutt
50ca22ae78 Trivial, cosmetic update to last review. 2018-04-18 10:14:06 -06:00
Gregory Nutt
1efd591cd8 arch/arm/include/tms570, arm/src/armv7-r, and arm/src/tms570: Adds support for the TMS570LS3137ZWT and corrects seversl ARMv7-R and TMS570 issues 2018-04-18 08:58:36 -06:00
Gregory Nutt
de6b13b3ab Per OpenGroup.org, syslog -- and, hence, nonstandard vsyslog, and debug wrappers -- does not return a value. Rename _vsyslog to nx_vsyslog. Use internal nx_vsyslog in the few cases where a return value is required. 2018-03-04 08:07:07 -06:00
Gregory Nutt
5c5d19f1c8 Some ommissions from previous commit. 2018-02-04 12:36:51 -06:00
Gregory Nutt
1e59d9dd14 armv7-a, armv7-r, armv7-m: Add atomic read-add-write and read-subtract-write functions. 2018-02-04 12:22:03 -06:00
Gregory Nutt
1567b82429 Make sure that labeling is used consistently in all function headers (part 2). 2018-02-01 12:03:55 -06:00
Gregory Nutt
7cf88d7dbd Make sure that labeling is used consistently in all function headers. 2018-02-01 10:00:02 -06:00
Gregory Nutt
6e4918c557 Remove CONFIG_ARM_TOOLCHAIN_GNU; replace with CONFIG_ARCH_TOOLCHAIN_GNU 2017-05-13 13:28:15 -06:00
Manohara HK
b154531838 I found an issue inside the cp15_coherent_dcache function in file, arch/arm/src/armv7-r/cp15_coherent_dcache.S.
The "mcr CP15_BPIALLIS(r0)" instruction is used for invalidating entire branch predictor.  But the problem is, since this is the generic code and can be called on any armv7-r architecture based CPU's.  It is a problem, if this instruction is called in uni processor configuration. Because, BPIALLIS (c7, 0, c1, 6) instruction is only added as part of the "Multiprocessing Extensions" (As per ARM® Architecture Reference Manual /ARMv7-A and ARMv7-R edition)

So in my opinion, this instruction should be under SMP configuration. In non-SMP configuration this instruction could become undefined.
2017-02-13 06:33:15 -06:00
Gregory Nutt
edd9186540 ELF: Move ARMv7-A and ARMv7-R versions of ELF relocation logic to libc/machine 2017-01-21 14:40:26 -06:00
Gregory Nutt
be5ba90d4f Move optimized ARM memcpy functions from arch/arm/src/ to libc/machine/. This is necessary for the PROTECTED and KERNEL build modes. Otherwise, memcpy() will be built in to kernel space and not accessible to applications. 2017-01-20 10:53:46 -06:00
Gregory Nutt
13d00344c9 Add configuration to prevent selection of Windows native toolchains when using Ubuntu under Windows 10 2017-01-02 07:16:47 -06:00
Gregory Nutt
3a0413c048 Back out most of 34be3e7c3c and update README again. Windows native tools cannot be used with Ubuntu under Windows 10 now. For Cygwin, that support depends on the 'cygpath -w' tool to convert POSIX paths to Windows paths. There is no corresponding tool for Ubuntu under Windows 10. 2017-01-01 16:29:03 -06:00
Gregory Nutt
34be3e7c3c Add configuration support for builds with Ubuntu under Windows 10 2017-01-01 15:34:23 -06:00
Gregory Nutt
dc79e35d65 For Cortex-A9, should also set ACTLR.FW in SMP mode to enble TLB and cache broadcasts. Does not fix SMP cache problem. 2016-12-07 09:06:41 -06:00
Gregory Nutt
89c3c20052 Merge remote-tracking branch 'origin/master' into misoc 2016-11-06 11:09:05 -06:00
Gregory Nutt
c1a687a4e5 Trivial changes from review of last PR 2016-11-06 08:11:01 -06:00
Heesub Shin
bda7d9ee4d ARMv7-R: fix to restore the Thumb flag in CPSR
Thumb flag in CPSR is not restored back when the context switch occurs
while executing thumb instruction.

Reported-by: Eunbong Song <eunb.song@samsung.com>
Signed-off-by: Byoungtae Cho <bt.cho@samsung.com>
Signed-off-by: Heesub Shin <heesub.shin@samsung.com>
2016-11-06 21:48:02 +09:00
Heesub Shin
343243c7c0 ARMv7-R: fix CPSR corruption after exception handling
A sporadic hang with consequent crash is observed when booting:

    arm_prefetchabort: Prefetch abort. PC: 04d34a00 IFAR: 04d34a00 IFSR: 00000008
    up_assert: Assertion failed at file:armv7-r/arm_prefetchabort.c line: 87 task: init
    up_dumpstate: Current sp: 004c3df0
    up_dumpstate: Interrupt stack:
    up_dumpstate:   base: 004c05fc
    up_dumpstate:   size: 00000800
    up_dumpstate: User stack:
    up_dumpstate:   base: 004c3f58
    up_dumpstate:   size: 00000fec
    up_dumpstate: User Stack
    up_stackdump: 004c3de0: 004a0d14 004c3df0 004c3f58 004a0d20 00000057 004c2c58 09000000 004a42a4
    up_stackdump: 004c3e00: 00000003 004c3e10 004a0f1c 004bbcef 33c44b00 004a0f28 04d34a00 00000008
    up_stackdump: 004c3e20: 00000008 004a01bc 004bfd38 00000001 00007fff 00000001 34134a00 d83e4c00
    up_stackdump: 004c3e40: 09000000 00000000 33c44b00 d83e4c00 0c3f4c00 00000000 00000000 00000003
    up_stackdump: 004c3e60: 004c3e70 004a1494 04d34a00 200b0253 004c3ed8 004a5298 004c3ed8 6d00006d
    up_stackdump: 004c3e80: 0000006d 004bc3f4 00000009 004a4f64 00000009 b9e0784f 333f3ed0 69d4227d
    up_stackdump: 004c3ea0: d81f09bd 0f867344 5a7e2c12 8acefd34 5d00dc1b 004bc432 004c3f08 004c0e08
    up_stackdump: 004c3ec0: 00000000 00000000 00000000 00000000 00000000 004a4210 004a5258 004a5300
    up_stackdump: 004c3ee0: 00000000 00000001 ffffffff 004c3f80 000002b0 004a4234 00000007 004c3f08
    up_stackdump: 004c3f00: 004a58b4 004bc432 004bc3f4 004c3f80 000002b0 0000029c 00000000 0000029c
    up_stackdump: 004c3f20: 00000000 004a5900 0000ff01 00000000 00000000 004a61f4 00000000 004a5fa4
    up_stackdump: 004c3f40: 00000000 004a5f6c 00000000 004a2668 00000000 00000000 b7509f04 004c3f64
    up_registerdump: R0: 00000001 00007fff 00000001 34134a00 d83e4c00 09000000 00000000 33c44b00
    up_registerdump: R8: d83e4c00 0c3f4c00 00000000 00000000 00000003 004c3e70 004a1494 04d34a00
    up_registerdump: CPSR: 200b0253

It seems to be caused by the corrupted or wrong CPSR restored on return
from exception. NuttX restores the context using code like this:

    msr spsr, r1

GCC translates this to:

    msr spsr_fc, r1

As a result, not all SPSR fields are updated on exception return. This
should be:

    msr spsr_fsxc, r1

On some evaluation boards, spsr_svc may have totally invalid value at
power-on-reset. As it is not initialized at boot, the code above may
result in the corruption of cpsr and thus unexpected behavior.

Reported-by: Eunbong Song <eunb.song@samsung.com>
Signed-off-by: Heesub Shin <heesub.shin@samsung.com>
2016-11-06 20:48:09 +09:00
Heesub Shin
6bfc6b4d23 ARMv7-R: fix typo in mpu support
s/ARMV7M/ARMV7R/g

Reported-by: Eunbong Song <eunb.song@samsung.com>
Signed-off-by: Heesub Shin <heesub.shin@samsung.com>
2016-11-06 20:48:09 +09:00
Heesub Shin
003511d198 ARMv7-R: add cache handling functions
This commit adds functions for enabling and disabling d/i-caches which
were missing for ARMv7-R.

Signed-off-by: Heesub Shin <heesub.shin@samsung.com>
2016-11-06 20:48:01 +09:00
Heesub Shin
6a1a846011 ARMv7-R: add new Kconfig entries for d/i-cache
Unlike in ARMv7-A/M, Kconfig entries for data and instruction caches
are currently missing in ARMv7-R. This commit adds those missing Kconfig
entries. Actual implmenetation for those functions will be added in the
subsequent patches.

Signed-off-by: Heesub Shin <heesub.shin@samsung.com>
2016-11-06 16:07:46 +09:00
Heesub Shin
2b922fcdbd ARMv7-R: remove the redundant update on SCTLR
mpu_control() is invoking cp15_wrsctlr() around SCTLR update
redundantly.

Signed-off-by: Heesub Shin <heesub.shin@samsung.com>
2016-11-06 16:07:45 +09:00
Heesub Shin
05d477661b ARMv7-R: fix invalid drbar handling
In ARMv7-R, [31:5] bits of DRBAR is physical base address and other bits
are reserved and SBZ. Thus, there is no point in passing other than the
base address.

Signed-off-by: Heesub Shin <heesub.shin@samsung.com>
2016-11-06 16:07:41 +09:00
Heesub Shin
af6e4f59c6 ARMv7-R: fix compilation error
This commit fixes compilation errors on MPU support for ARMv7-R.

Signed-off-by: Heesub Shin <heesub.shin@samsung.com>
2016-11-06 16:07:38 +09:00
Heesub Shin
96a200a71c ARMv7-R: fix typo
fix trivial typo: s/ARMv7-A/ARMv7-R/

Signed-off-by: Heesub Shin <heesub.shin@samsung.com>
2016-11-06 16:07:36 +09:00
Gregory Nutt
cb96e632fa LM32: Add toolchain configuration; Add Toolchain.defs. 2016-11-03 07:21:25 -06:00
Gregory Nutt
841e1aa77f Fix a cloned typo 2016-10-19 09:14:21 -06:00
Gregory Nutt
5a0f9fcb7d Fix STM32 RTC Alarm interrupts. They were being enabled BEFORE the interrupt system was being initialized. 2016-07-23 10:36:06 -06:00
Gregory Nutt
7f16548f57 Replaces last three commits. Does the same thing, but does it in a way that does not change the usage model. 2016-06-21 05:26:08 -06:00
Gregory Nutt
c05da80a27 Eliminate a warning 2016-06-20 22:54:58 -06:00
Gregory Nutt
505ca542e8 Remove some last traces of lowvsyslog that were missed; Add a SYSLOG emergency channel for handling assertion output more cleanly 2016-06-20 16:11:50 -06:00
Gregory Nutt
43eb04bb8f Without lowsyslog() *llinfo() is not useful. Eliminate and replace with *info(). 2016-06-20 11:59:15 -06:00
Gregory Nutt
d88bbaa185 armv7-r/armv7-m: Convert *err() to either *info() or add ERROR:, depending on if an error is reported 2016-06-17 15:57:52 -06:00
Gregory Nutt
b39e53391d Add underscore at beginning of alert() as well 2016-06-16 12:38:05 -06:00
Gregory Nutt
0c8c7fecf0 Add _ to the beginning of all debug macros to avoid name collisions 2016-06-16 12:33:32 -06:00
Gregory Nutt
6f08216621 Centralize definitions associated with CONFIG_DEBUG_SYSCALL 2016-06-16 08:12:38 -06:00
Gregory Nutt
a98bc05f65 New debug macro: alert(). This is high priority, unconditional output and is used to simplify and stanardize crash error reporting. 2016-06-14 09:07:53 -06:00
Gregory Nutt
0f249016a0 Eliminate some warnings 2016-06-13 14:01:32 -06:00
Gregory Nutt
a1469a3e95 Add CONFIG_DEBUG_ERROR. Change names of *dbg() * *err() 2016-06-11 15:50:49 -06:00
Gregory Nutt
e99301d7c2 Rename *lldbg to *llerr 2016-06-11 14:55:27 -06:00
Gregory Nutt
1cdc746726 Rename CONFIG_DEBUG to CONFIG_DEBUG_FEATURES 2016-06-11 14:14:08 -06:00
Gregory Nutt
fc3540cffe Replace all occurrences of vdbg with vinfo 2016-06-11 11:59:51 -06:00
Gregory Nutt
3a74a438d9 Rename CONFIG_DEBUG_VERBOSE to CONFIG_DEBUG_INFO 2016-06-11 11:50:18 -06:00
Gregory Nutt
4d4f54a789 Rename current_regs to g_current_regs; For ARM, g_current_regs needs to be an array to support multiple CPUs 2016-03-09 13:41:48 -06:00
Gregory Nutt
83bc1c97c3 Rename irqsave() and irqrestore() to up_irq_save() and up_irq_restore() 2016-02-14 16:11:25 -06:00
Gregory Nutt
70e502adb0 Replace irqsave() with enter_critical_section(); replace irqrestore() with leave_critical_section() 2016-02-13 19:11:09 -06:00
Gregory Nutt
6181711942 Correct some comments 2016-02-09 13:48:16 -06:00
Gregory Nutt
a6eb9a351c Add spinlock support for ARMv7-M architectures 2016-02-09 13:44:22 -06:00
Gregory Nutt
98e9e7d768 Add spinlock support for ARMv7-R architectures 2016-02-09 13:01:32 -06:00
Gregory Nutt
ed4e3c0a9e ARM: Replace explicit references to g_readytorun with indirect references via the macro this_task() 2016-02-06 13:41:28 -06:00
Gregory Nutt
10001f8556 WINTOOl should be selected only for Cygwin. MSYS and native should not have it. 2016-01-09 16:34:33 -06:00
Gregory Nutt
d9737f0645 TMS570: reset stack pointer before calling os_start 2015-12-29 07:56:22 -06:00
Gregory Nutt
e7d7036cb9 ARMv7-R: L2CC_VBASE->L2CC_BASE 2015-12-28 16:32:34 -06:00
Gregory Nutt
ae0e6b4096 ARMv7-R and TMS570: Re-orider some initialization logic. __start used to called arm_boot() which would return. Then __start would call os_start(). That won't work for the TMS570 if is does a destructive memory tested because the return information will be lost in the stack. Also comment a nuisance assertion. The assertion is probably correct but certainly a nuisance during initial testing 2015-12-28 16:15:33 -06:00
Gregory Nutt
c3758286d7 TMS570: Add ESM interrupt handler 2015-12-27 08:34:14 -06:00
Gregory Nutt
e0214f9d62 ARMv7-R: Remove some CONFIG_PAGING logic left over from ARMv7-A leverage 2015-12-27 08:32:53 -06:00
Gregory Nutt
6d0650349a Add support for ARM big-endian toolchains with prefix armeb- 2015-12-26 18:13:01 -06:00
Gregory Nutt
9bcf27d15b TMS570 is big-endian 2015-12-26 14:47:54 -06:00
Gregory Nutt
663d2b0127 Eliminate a warning due to a range check on an undefined pre-processar variable 2015-12-22 13:20:20 -06:00
Gregory Nutt
d7af5b234c Fix an error in pre-processor condition 2015-12-21 21:36:34 -06:00
Gregory Nutt
092c681157 TMS570: Add a little more IRQ/FIQ logic 2015-12-21 10:57:01 -06:00
Gregory Nutt
2629053bbe TMS570: Add pin multiplexing logic 2015-12-20 10:14:51 -06:00
Gregory Nutt
63d5032d3b TMS4570: Was not building arm_head.S or up_allocateheap.c; ARMv7-R: Fix variious problems not that arm_head.S is being built 2015-12-19 18:56:23 -06:00
Gregory Nutt
d4b7bf59d0 TMS570: More start-up logic 2015-12-18 08:57:29 -06:00
Gregory Nutt
cd0baf490f Fix Kconfig: BOOT_SDRAM_DATA, not CONFIG_BOOT_SDRAM_DATA 2015-12-17 10:50:53 -06:00
Gregory Nutt
c251fd7756 ARMv7-R: Add a configuration to support delayed memory initialization. This logic was already in place for SDRAM but is also required for some ECC memories as well. 2015-12-17 10:49:56 -06:00
Gregory Nutt
9364824a53 ARMv7-R: Add logic to work-around errata, remove logic to access VBAR since this is no VBAR and add logic to access PMCR. TMS570: Add logic to set debug bits in PMCR 2015-12-17 09:34:38 -06:00
Gregory Nutt
bacf7cf07e ARMv7-R: fix some issues to get a clean compilation; TMS570: Add enough logic to support a minimum build. Not much there on the initial commit 2015-12-16 09:03:14 -06:00
Gregory Nutt
8fb76cf970 TMS570: Add a place holder for the TMS570. Not much there yet 2015-12-14 16:38:05 -06:00
Gregory Nutt
b3502af042 ARMv7-M: Add MPU support 2015-12-14 15:38:58 -06:00
Gregory Nutt
09f79919b5 ARMv7-R: Review/update CPSR bit definitions 2015-12-14 13:19:22 -06:00
Gregory Nutt
39cace15a1 Update CP15 access macros 2015-12-14 13:02:54 -06:00
Gregory Nutt
7475712d87 ARMv7-R: Review/update cache operations 2015-12-14 12:32:32 -06:00
Gregory Nutt
b9feaf13b0 Update ARMv7-R system control register definitions from TRM 2015-12-14 11:54:58 -06:00
Gregory Nutt
5585f44b7e Add initial support for ARMv7-R architecture. Initial commit is largely a clone of ARMv7-A and needs further review 2015-12-14 08:40:38 -06:00