2009-09-21 13:53:48 +00:00
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############################################################################
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# arch/arm/src/stm32/Make.defs
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#
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2018-06-20 12:30:37 -06:00
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# Copyright (C) 2009, 2011-2016, 2018 Gregory Nutt. All rights reserved.
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2011-12-21 15:50:06 +00:00
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# Author: Gregory Nutt <gnutt@nuttx.org>
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2009-09-21 13:53:48 +00:00
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#
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# Redistribution and use in source and binary forms, with or without
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# modification, are permitted provided that the following conditions
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# are met:
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#
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# 1. Redistributions of source code must retain the above copyright
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# notice, this list of conditions and the following disclaimer.
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# 2. Redistributions in binary form must reproduce the above copyright
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# notice, this list of conditions and the following disclaimer in
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# the documentation and/or other materials provided with the
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# distribution.
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# 3. Neither the name NuttX nor the names of its contributors may be
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# used to endorse or promote products derived from this software
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# without specific prior written permission.
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#
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# THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
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# "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
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# LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
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# FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
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# COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
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# INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
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# BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
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# OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
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# AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
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# LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
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# ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
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# POSSIBILITY OF SUCH DAMAGE.
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#
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############################################################################
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2014-04-12 09:33:52 -06:00
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HEAD_ASRC =
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2009-09-21 13:53:48 +00:00
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2013-03-23 14:46:02 +00:00
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CMN_UASRCS =
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CMN_UCSRCS =
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2013-02-08 00:17:54 +00:00
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CMN_ASRCS = up_saveusercontext.S up_fullcontextrestore.S up_switchcontext.S
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2018-02-04 12:22:03 -06:00
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CMN_ASRCS += up_testset.S up_fetchadd.S vfork.S
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2013-02-08 00:17:54 +00:00
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2018-08-25 10:23:21 -06:00
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CMN_CSRCS = up_assert.c up_blocktask.c up_copyfullstate.c up_createstack.c
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CMN_CSRCS += up_exit.c up_hardfault.c up_initialize.c up_initialstate.c
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CMN_CSRCS += up_interruptcontext.c up_mdelay.c up_memfault.c up_modifyreg8.c
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CMN_CSRCS += up_modifyreg16.c up_modifyreg32.c up_releasepending.c
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CMN_CSRCS += up_releasestack.c up_reprioritizertr.c up_schedulesigaction.c
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CMN_CSRCS += up_sigdeliver.c up_stackframe.c up_svcall.c up_systemreset.c
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CMN_CSRCS += up_trigger_irq.c up_unblocktask.c up_udelay.c up_usestack.c
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CMN_CSRCS += up_doirq.c up_vfork.c
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2009-09-21 13:53:48 +00:00
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2015-04-12 06:26:50 -06:00
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ifeq ($(CONFIG_ARMV7M_STACKCHECK),y)
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CMN_CSRCS += up_stackcheck.c
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endif
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2019-06-03 07:31:17 -06:00
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ifeq ($(CONFIG_ARM_LWL_CONSOLE),y)
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CMN_CSRCS += up_lwl_console.c
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endif
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2015-03-11 12:30:14 -06:00
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ifeq ($(CONFIG_ARMV7M_LAZYFPU),y)
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2015-03-06 08:26:43 -06:00
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CMN_ASRCS += up_lazyexception.S
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else
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2013-02-08 00:17:54 +00:00
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CMN_ASRCS += up_exception.S
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2015-03-06 08:26:43 -06:00
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endif
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2013-02-08 00:17:54 +00:00
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CMN_CSRCS += up_vectors.c
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2012-02-22 18:14:18 +00:00
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2013-03-18 21:10:08 +00:00
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ifeq ($(CONFIG_ARCH_RAMVECTORS),y)
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CMN_CSRCS += up_ramvec_initialize.c up_ramvec_attach.c
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endif
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2014-08-29 14:47:22 -06:00
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ifeq ($(CONFIG_BUILD_PROTECTED),y)
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2014-09-01 15:39:34 -06:00
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CMN_CSRCS += up_mpu.c up_task_start.c up_pthread_start.c
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2013-03-23 14:46:02 +00:00
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CMN_CSRCS += up_signal_dispatch.c
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CMN_UASRCS += up_signal_handler.S
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2013-03-22 14:49:21 +00:00
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endif
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2015-01-24 06:03:39 -06:00
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ifeq ($(CONFIG_STACK_COLORATION),y)
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CMN_CSRCS += up_checkstack.c
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endif
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2011-12-07 18:58:21 +00:00
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ifeq ($(CONFIG_ARCH_FPU),y)
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2013-02-08 00:17:54 +00:00
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CMN_ASRCS += up_fpu.S
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2015-08-31 08:40:02 -06:00
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CMN_CSRCS += up_copyarmstate.c
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2013-07-23 17:52:06 -06:00
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endif
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2011-12-07 18:58:21 +00:00
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2015-09-23 22:51:22 +02:00
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ifeq ($(CONFIG_ARMV7M_ITMSYSLOG),y)
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CMN_CSRCS += up_itm_syslog.c
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endif
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2014-04-12 09:33:52 -06:00
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CHIP_ASRCS =
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2013-02-08 00:17:54 +00:00
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CHIP_CSRCS = stm32_allocateheap.c stm32_start.c stm32_rcc.c stm32_lse.c
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2016-06-04 07:22:45 -06:00
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CHIP_CSRCS += stm32_lsi.c stm32_gpio.c stm32_exti_gpio.c stm32_flash.c
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2016-12-13 18:01:23 -06:00
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CHIP_CSRCS += stm32_irq.c stm32_dma.c stm32_lowputc.c
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2017-05-21 14:14:09 -06:00
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CHIP_CSRCS += stm32_serial.c stm32_spi.c stm32_i2s.c stm32_sdio.c stm32_tim.c
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2016-06-04 07:22:45 -06:00
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CHIP_CSRCS += stm32_waste.c stm32_ccm.c stm32_uid.c stm32_capture.c
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2019-03-21 12:06:59 -06:00
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CHIP_CSRCS += stm32_dfumode.c
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2014-08-06 16:26:01 -06:00
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2015-11-17 16:57:02 -05:00
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ifeq ($(CONFIG_TIMER),y)
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CHIP_CSRCS += stm32_tim_lowerhalf.c
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endif
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2014-08-06 16:26:01 -06:00
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ifneq ($(CONFIG_SCHED_TICKLESS),y)
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CHIP_CSRCS += stm32_timerisr.c
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2016-07-06 12:48:30 -06:00
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else
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CHIP_CSRCS += stm32_tickless.c
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endif
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ifeq ($(CONFIG_STM32_ONESHOT),y)
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2016-08-11 14:53:39 -06:00
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CHIP_CSRCS += stm32_oneshot.c stm32_oneshot_lowerhalf.c
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2016-07-06 12:48:30 -06:00
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endif
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ifeq ($(CONFIG_STM32_FREERUN),y)
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CHIP_CSRCS += stm32_freerun.c
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2014-08-06 16:26:01 -06:00
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endif
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2013-02-08 00:17:54 +00:00
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2014-08-29 14:47:22 -06:00
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ifeq ($(CONFIG_BUILD_PROTECTED),y)
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2013-03-22 14:49:21 +00:00
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CHIP_CSRCS += stm32_userspace.c stm32_mpuinit.c
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endif
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2014-07-03 08:50:24 -06:00
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ifeq ($(CONFIG_STM32_CCM_PROCFS),y)
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CHIP_CSRCS += stm32_procfs_ccm.c
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endif
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2019-05-15 08:20:28 +00:00
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ifeq ($(CONFIG_STM32_HAVE_IP_I2C_V1),y)
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2014-05-14 07:48:47 -06:00
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ifeq ($(CONFIG_STM32_I2C_ALT),y)
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CHIP_CSRCS += stm32_i2c_alt.c
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2017-07-06 10:20:14 -06:00
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else ifeq ($(CONFIG_STM32_STM32F4XXX),y)
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2016-10-24 16:32:10 -06:00
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CHIP_CSRCS += stm32f40xxx_i2c.c
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2013-07-30 10:35:17 -06:00
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else
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CHIP_CSRCS += stm32_i2c.c
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endif
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2019-05-15 08:20:28 +00:00
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else ifeq ($(CONFIG_STM32_HAVE_IP_I2C_V2),y)
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CHIP_CSRCS += stm32_i2c_v2.c
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endif
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2013-07-30 10:35:17 -06:00
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2012-04-02 22:20:39 +00:00
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ifeq ($(CONFIG_USBDEV),y)
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ifeq ($(CONFIG_STM32_USB),y)
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2013-02-08 00:17:54 +00:00
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CHIP_CSRCS += stm32_usbdev.c
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2012-04-02 22:20:39 +00:00
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endif
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ifeq ($(CONFIG_STM32_OTGFS),y)
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2013-02-08 00:17:54 +00:00
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CHIP_CSRCS += stm32_otgfsdev.c
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2012-08-15 17:58:54 +00:00
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endif
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2014-11-20 07:19:04 -06:00
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ifeq ($(CONFIG_STM32_OTGHS),y)
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CHIP_CSRCS += stm32_otghsdev.c
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endif
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2012-08-15 17:58:54 +00:00
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endif
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2018-07-13 10:34:33 -06:00
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ifeq ($(CONFIG_STM32_USBHOST),y)
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2012-08-15 17:58:54 +00:00
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ifeq ($(CONFIG_STM32_OTGFS),y)
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2013-02-08 00:17:54 +00:00
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CHIP_CSRCS += stm32_otgfshost.c
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2013-11-10 07:23:06 -06:00
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endif
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2014-10-07 15:05:30 -06:00
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ifeq ($(CONFIG_STM32_OTGHS),y)
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CHIP_CSRCS += stm32_otghshost.c
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2012-04-02 22:20:39 +00:00
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endif
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2014-04-12 08:44:22 -06:00
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ifeq ($(CONFIG_USBHOST_TRACE),y)
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CHIP_CSRCS += stm32_usbhost.c
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else
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ifeq ($(CONFIG_DEBUG_USB),y)
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CHIP_CSRCS += stm32_usbhost.c
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endif
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endif
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endif
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2014-03-04 08:58:01 -06:00
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ifneq ($(CONFIG_ARCH_IDLE_CUSTOM),y)
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2013-02-08 00:17:54 +00:00
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CHIP_CSRCS += stm32_idle.c
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2011-12-08 18:02:38 +00:00
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endif
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2013-02-08 00:17:54 +00:00
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CHIP_CSRCS += stm32_pmstop.c stm32_pmstandby.c stm32_pmsleep.c
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2012-06-28 00:48:00 +00:00
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2014-03-04 08:58:01 -06:00
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ifneq ($(CONFIG_ARCH_CUSTOM_PMINIT),y)
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2013-02-08 00:17:54 +00:00
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CHIP_CSRCS += stm32_pminitialize.c
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2012-03-14 19:37:28 +00:00
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endif
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2012-01-08 21:33:57 +00:00
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ifeq ($(CONFIG_STM32_ETHMAC),y)
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2013-02-08 00:17:54 +00:00
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CHIP_CSRCS += stm32_eth.c
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2011-08-20 13:23:34 +00:00
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endif
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2011-10-07 17:21:16 +00:00
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2011-12-14 19:59:06 +00:00
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ifeq ($(CONFIG_STM32_PWR),y)
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2015-04-28 06:37:59 -06:00
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CHIP_CSRCS += stm32_pwr.c stm32_exti_pwr.c
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2011-12-14 19:59:06 +00:00
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endif
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2018-08-08 12:42:04 -06:00
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ifeq ($(CONFIG_STM32_RTC),y)
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2013-02-08 00:17:54 +00:00
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CHIP_CSRCS += stm32_rtc.c
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2012-07-17 00:22:48 +00:00
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ifeq ($(CONFIG_RTC_ALARM),y)
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2013-02-08 00:17:54 +00:00
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CHIP_CSRCS += stm32_exti_alarm.c
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2012-07-17 00:22:48 +00:00
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endif
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2017-10-20 17:15:17 +00:00
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ifeq ($(CONFIG_RTC_PERIODIC),y)
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CHIP_CSRCS += stm32_exti_wakeup.c
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endif
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2015-02-13 12:56:58 -06:00
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ifeq ($(CONFIG_RTC_DRIVER),y)
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CHIP_CSRCS += stm32_rtc_lowerhalf.c
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endif
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2011-10-07 17:21:16 +00:00
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endif
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2011-11-22 20:07:42 +00:00
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2016-05-27 06:46:33 -06:00
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ifeq ($(CONFIG_STM32_ADC),y)
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2013-02-08 00:17:54 +00:00
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CHIP_CSRCS += stm32_adc.c
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2011-12-12 01:04:53 +00:00
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endif
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2016-10-25 14:14:10 -06:00
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ifeq ($(CONFIG_STM32_SDADC),y)
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CHIP_CSRCS += stm32_sdadc.c
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endif
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2018-12-09 16:31:57 +00:00
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ifeq ($(CONFIG_STM32_DAC),y)
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2013-02-08 00:17:54 +00:00
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CHIP_CSRCS += stm32_dac.c
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2011-12-12 03:37:37 +00:00
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endif
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2018-12-09 16:31:57 +00:00
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ifeq ($(CONFIG_STM32_COMP),y)
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2017-03-19 18:36:44 +01:00
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CHIP_CSRCS += stm32_comp.c
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endif
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2018-12-09 16:31:57 +00:00
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ifeq ($(CONFIG_STM32_OPAMP),y)
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2017-04-30 11:05:34 +02:00
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CHIP_CSRCS += stm32_opamp.c
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endif
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2018-06-28 11:37:29 -06:00
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ifeq ($(CONFIG_STM32_HRTIM),y)
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2017-06-11 10:49:20 -06:00
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CHIP_CSRCS += stm32_hrtim.c
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endif
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2016-05-25 12:31:32 -06:00
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ifeq ($(CONFIG_STM32_1WIREDRIVER),y)
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CHIP_CSRCS += stm32_1wire.c
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endif
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2018-04-13 10:36:23 -06:00
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ifeq ($(CONFIG_STM32_HCIUART),y)
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CHIP_CSRCS += stm32_hciuart.c
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endif
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2015-05-21 07:47:22 -06:00
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ifeq ($(CONFIG_STM32_RNG),y)
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2013-02-08 00:17:54 +00:00
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CHIP_CSRCS += stm32_rng.c
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2012-09-29 20:34:25 +00:00
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endif
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2013-11-11 14:05:29 -06:00
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ifeq ($(CONFIG_STM32_LTDC),y)
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CHIP_CSRCS += stm32_ltdc.c
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endif
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2014-12-19 13:41:08 -06:00
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ifeq ($(CONFIG_STM32_DMA2D),y)
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CHIP_CSRCS += stm32_dma2d.c
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endif
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2018-12-09 16:31:57 +00:00
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ifeq ($(CONFIG_STM32_PWM),y)
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2013-02-08 00:17:54 +00:00
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CHIP_CSRCS += stm32_pwm.c
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2011-12-16 19:29:41 +00:00
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endif
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2017-08-24 10:26:53 -06:00
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ifeq ($(CONFIG_SENSORS_QENCODER),y)
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2013-02-08 00:17:54 +00:00
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CHIP_CSRCS += stm32_qencoder.c
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2012-02-14 15:32:57 +00:00
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endif
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2018-12-09 16:31:57 +00:00
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ifeq ($(CONFIG_STM32_CAN),y)
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2013-02-08 00:17:54 +00:00
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CHIP_CSRCS += stm32_can.c
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2011-12-21 15:50:06 +00:00
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endif
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2012-04-15 16:42:09 +00:00
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ifeq ($(CONFIG_STM32_IWDG),y)
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2013-02-08 00:17:54 +00:00
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CHIP_CSRCS += stm32_iwdg.c
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2012-04-15 16:42:09 +00:00
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endif
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ifeq ($(CONFIG_STM32_WWDG),y)
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2013-02-08 00:17:54 +00:00
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CHIP_CSRCS += stm32_wwdg.c
|
2012-04-15 01:11:54 +00:00
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endif
|
|
|
|
|
2016-06-11 14:14:08 -06:00
|
|
|
ifeq ($(CONFIG_DEBUG_FEATURES),y)
|
2013-02-08 00:17:54 +00:00
|
|
|
CHIP_CSRCS += stm32_dumpgpio.c
|
2011-11-22 20:07:42 +00:00
|
|
|
endif
|
2015-02-04 06:49:05 -06:00
|
|
|
|
2015-02-04 07:24:19 -06:00
|
|
|
ifeq ($(CONFIG_STM32_AES),y)
|
2015-02-04 06:49:05 -06:00
|
|
|
CHIP_CSRCS += stm32_aes.c
|
|
|
|
endif
|
2015-02-21 15:15:51 -06:00
|
|
|
|
|
|
|
ifeq ($(CONFIG_STM32_BBSRAM),y)
|
|
|
|
CHIP_CSRCS += stm32_bbsram.c
|
|
|
|
endif
|
2019-05-27 07:21:52 -06:00
|
|
|
|
|
|
|
ifeq ($(CONFIG_STM32_FMC),y)
|
|
|
|
CHIP_CSRCS += stm32_fmc.c
|
|
|
|
endif
|
|
|
|
|
|
|
|
ifeq ($(CONFIG_STM32_FSMC),y)
|
|
|
|
CHIP_CSRCS += stm32_fsmc.c
|
|
|
|
endif
|