sergiotarxz/nuttx
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Commit Graph

198 Commits

Author SHA1 Message Date
Gregory Nutt
2edc58e383 SAMA5 CAN: Add register definition file 2013-10-21 12:22:27 -06:00
Gregory Nutt
f890af8e53 SAMA5 TC: Add timer/counter register definition file 2013-10-20 14:47:02 -06:00
Gregory Nutt
84973e9956 SAMA5 TRNG: /dev/random appears to be functional 2013-10-20 12:08:39 -06:00
Gregory Nutt
386daa25ca SAMA5 TRNG: Add a /dev/random driver based on the SAMA5D3 TRNG peripheral 2013-10-20 11:38:31 -06:00
Gregory Nutt
49b3366eff SAMA5: Hook RTC into build system; Finish RTC alarm logic; Verify correct behavior of the basic RTC functionality 2013-10-19 10:41:20 -06:00
Gregory Nutt
0a5d287e69 SAMA5: Add GPBR register definitions 2013-10-19 10:22:21 -06:00
Gregory Nutt
0eea9f2ebe SAMA5: Add RTC and WDT register definition header files 2013-10-18 14:47:50 -06:00
Gregory Nutt
98ffd096a0 SAMA5 LCDC: Correct how framebuffer memory was being mapped; Remove options to get framebuffer memory in various. Because of the mapping and aligment requirements, those options really cannot be supported 2013-10-13 13:08:05 -06:00
Gregory Nutt
1dfcee203c SAMA5: Allow portions of external memory to be added to the heap instead of the whole thing 2013-10-10 12:00:32 -06:00
Gregory Nutt
cc23806fa1 SAMA5 LCDC: Corrections from first debug sessions. Still a way to go 2013-10-09 13:21:27 -06:00
Gregory Nutt
f3a4fc42d7 SAMA5: LCDC driver incorporated into the build system. 2013-10-08 15:30:38 -06:00
Gregory Nutt
3fd7f4f855 SAMA5: More LCDC driver progress 2013-10-08 08:57:48 -06:00
Gregory Nutt
f6dc32c30c SAMA5: More LCDC driver progress 2013-10-07 15:54:08 -06:00
Gregory Nutt
c7c6186356 SAMA5: LCDC driver progress 2013-10-07 12:05:16 -06:00
Gregory Nutt
74db990b7e SAMA5: Completes LDCDC register definition file 2013-10-04 15:43:19 -06:00
Gregory Nutt
021bdecb05 SAMA5: Add LCD register definition header file 2013-10-04 10:11:12 -06:00
Gregory Nutt
889ea78194 SAMA5: ADC and touchscreen drivers now build without errors 2013-10-03 14:32:21 -06:00
Gregory Nutt
db6d76baf5 SAMA5 ADC and touchscreen: Drivers are code complete and ready for test 2013-10-03 10:06:14 -06:00
Gregory Nutt
8b8523f935 SAMA Touchscreen/ADC: More progress 2013-10-02 16:55:22 -06:00
Gregory Nutt
afa475e948 SAMA5 ADC/Touchscreen: A little more logic 2013-10-01 14:40:34 -06:00
Gregory Nutt
7120517af0 SAMA5 ADC/Touchscreen: A little more progress. Still not complete 2013-09-30 14:28:42 -06:00
Gregory Nutt
3027dd3c54 SAMA5: Framework for an touchscreen driver (incomplete) 2013-09-30 09:04:21 -06:00
Gregory Nutt
e1fc3f51b3 SAMA5 ADC: Framework for an ADC driver (incomplete) 2013-09-30 07:22:34 -06:00
Gregory Nutt
05eb7e3da4 SAMA5 ADC: Beginning ADC register definition file 2013-09-29 18:34:09 -06:00
Gregory Nutt
0e5caa2ae3 SAMA5 GMAC: Various fixes from initial debug 2013-09-29 15:03:57 -06:00
Gregory Nutt
9fcbd8879a SAMA5 GMAC and GMII support is code complete and ready for test 2013-09-27 13:12:04 -06:00
Gregory Nutt
fbd09bd75f Beginng of support for GMII/RGMII PHYs 2013-09-26 15:55:21 -06:00
Gregory Nutt
48f1227fbf SAMA5 GMAC: Initial driver check-in is just the EMAC driver forced to compile with the GMAC register definitions 2013-09-26 10:35:52 -06:00
Gregory Nutt
9dd0680f0e SAMA5: Completes GMAC register definition header file 2013-09-26 09:13:14 -06:00
Gregory Nutt
a070e748fd SAMA5 HSMCI: Disable TX DMA. it is not reliable 2013-09-23 13:54:32 -06:00
Gregory Nutt
425c26d27a SAMA5 EMAC: Changes from early debug sessions. Still a way to go 2013-09-17 15:52:19 -06:00
Gregory Nutt
ec499a3aa8 SAMA5 EMAC: Add basic PHY logic 2013-09-16 18:00:21 -06:00
Gregory Nutt
2a10afb311 SAMA5 EMAC: Packet transmission logic 2013-09-16 14:58:11 -06:00
Gregory Nutt
f267cea5b6 SAMA5 EMAC: Incremental progress. Still not code complete 2013-09-16 11:36:12 -06:00
Gregory Nutt
7b6a1a57eb SAMA5 EMAC: Create a empty, skeleton file that will eventually become the SAMA5 EMAC driver 2013-09-13 15:04:46 -06:00
Gregory Nutt
363df90d81 SAMA5 EMAC and GMAC: More additions to register definition files 2013-09-13 03:35:56 -06:00
Gregory Nutt
91a065e9fc SAMA5: Beginning of EMAC and GMAC register definition header files 2013-09-12 15:45:12 -06:00
Gregory Nutt
9f937bc0e4 SAMA5D3x-EK README update 2013-09-12 14:17:56 -06:00
Gregory Nutt
1d40c068fb SAMA5 TWI: Misc improvements during debug (still not getting interupts) 2013-09-12 12:25:31 -06:00
Gregory Nutt
42b547f73c SAMA5: Barebones TWI driver implementation 2013-09-11 16:48:56 -06:00
Gregory Nutt
f2a5c43b25 SAMA5: Framework for a TWI driver (incomplete) 2013-09-11 12:28:52 -06:00
Gregory Nutt
f9afaf89fc SAMA5: TWI register definition file 2013-09-11 10:23:46 -06:00
Gregory Nutt
9861f18ee1 SAMA5 UDPHS: Fix DMA channel vs. matching endpoint 2013-09-04 15:08:19 -06:00
Gregory Nutt
75b53ad12b SAMA5 UDPHS: More USB fixes mostly related to byte counts, endpoint configuration, and dma configuration 2013-09-04 13:36:52 -06:00
Gregory Nutt
06355a17e1 SAMA UDPHS: Add pull-up and stall logic. Added to build system but does not yet build 2013-08-31 17:37:51 -06:00
Gregory Nutt
30cf03d3e8 SAMA5 UDPHS: Add endpoint configuration and read DMA logic 2013-08-31 12:20:00 -06:00
Gregory Nutt
f22b388cb4 SAMA5 UDPHS: Bring in UDPHS endpoint interrupt handling logic 2013-08-31 10:43:58 -06:00
Gregory Nutt
07ffab9308 SAMA5: Updated UDPHS driver. Still incomplete 2013-08-30 14:51:41 -06:00
Gregory Nutt
eeaeb369fe SAMA5 UDPHS interrupt decoding logic 2013-08-29 17:34:05 -06:00
Gregory Nutt
a4f58596d4 SAMA5: Initial framework for a UDPHS USB device side driver 2013-08-29 16:29:27 -06:00
Gregory Nutt
b47e1933f5 SAMA5: Add high-speed USB register definition header file 2013-08-28 17:50:05 -06:00
Gregory Nutt
56f9092a87 Fix all occurrences of "the the" in documentation and comments 2013-08-27 09:40:19 -06:00
Gregory Nutt
28a103f1f2 SAMA5: EHCI now handles low- and full-speed connections by giving them to OHCI; OHCI now uses the work queue to defer interrupt processing; If both OHCI and EHCI are enabled, EHCI is the master of the UHPHS interrupt 2013-08-24 11:34:24 -06:00
Gregory Nutt
d7cba5e5ca SAMA5/ECHI: Debug register access, add logic to determine transfer size, fix setting of control bit in token 2013-08-23 16:23:15 -06:00
Gregory Nutt
6a79cea2c0 Beginning of support for SAMA5 EHCI. Not much there yet 2013-08-20 15:46:36 -06:00
Gregory Nutt
4bf3dbe149 USB host: Add device address management support in preparation for USB hub support 2013-08-18 14:31:57 -06:00
Gregory Nutt
a6e6b4ba2d Add few more EHCI definitions 2013-08-18 13:01:13 -06:00
Gregory Nutt
49f3831e11 SAMA5: Alternatie clock configuration that yields a perfect 48MHz full speed USB clock and a CPU clock of 384MHz 2013-08-14 15:16:04 -06:00
Gregory Nutt
39696cbf96 First of several changes needed to support multiple USB host root hubs 2013-08-12 14:44:06 -06:00
Gregory Nutt
dfe6452b8e Add untested OHCI driver for the SAMA5; structure naming and header files for USB host initialization prototypes 2013-08-11 17:11:32 -06:00
Gregory Nutt
d8b3921972 SAMA5: Centralize logic for conversion between physical and virtual addresses 2013-08-09 17:25:53 -06:00
Gregory Nutt
a2ba8992a9 SAM3,4,A5 DMA fixes; SAMA5 SPI driver now supports DMA transfers 2013-08-09 13:12:16 -06:00
Gregory Nutt
2b36e7e266 SAMA5: Use RDR/TDR registers for DMA, not FIFO registers; change DMA bit settings to match Atmel example. Still no DMA 2013-08-08 15:51:16 -06:00
Gregory Nutt
05242e41ef More SAMA5 DMAC driver fixes. Still does not work. 2013-08-07 17:19:48 -06:00
Gregory Nutt
e015c6edd6 SAMA3,4,A5: Misc corrections to DMA and HSMCI drivers 2013-08-07 11:32:08 -06:00
Gregory Nutt
e8a34ea3ac SAMA5: Add PIO interrupt support. Massive name changes for consistency in PIO vs GPIO naming. SAMA5D3x-EK: Add support for SD card detection PIO interrupts 2013-08-06 10:20:17 -06:00
Gregory Nutt
a68a3a0366 SAMA5: Add HSMCI memory card driver support 2013-08-05 16:21:24 -06:00
Gregory Nutt
412aaa83a2 SAMA5D3x-EK: At support for the AT25 serial FLASH 2013-08-04 16:56:41 -06:00
Gregory Nutt
487866b2b6 SAMA5: Add basic SPI suppport (untested) 2013-08-04 11:08:20 -06:00
Gregory Nutt
8194e6bbcf SAMA5: Add DMA suppport (untested) 2013-08-04 10:44:18 -06:00
Gregory Nutt
a93b095ce4 SAMA5: Add DMA controller register definitions 2013-08-03 12:13:42 -06:00
Gregory Nutt
c7293535fe Various changes to get SAMA5 SDRAM working. Marginally functional, but there is more to be done 2013-08-02 18:30:27 -06:00
Gregory Nutt
08a1ff5c79 Correct some typos int he MPADDRCS register address definitions 2013-08-02 12:06:11 -06:00
Gregory Nutt
b00d72a7f2 SAMA5: More MMU-related changes to properly initialize SDRAM 2013-08-02 11:11:57 -06:00
Gregory Nutt
894618f894 SAMA5: Add logic to initialize SAMA5D3x-EK on-board SDRAM 2013-08-01 16:58:55 -06:00
Gregory Nutt
70e1028d41 SAMA5: Add DDR controller register definitions 2013-08-01 12:27:41 -06:00
Gregory Nutt
35c3a49e1c ARMv7-A: Map all of .text, .bss, .data., stacks before enabling the MMU and caching. This is simpler and avoids fears I have about caching 2013-08-01 10:05:33 -06:00
Gregory Nutt
4e90fae5e8 Add SAMA5 HSMC register definitions and logic to reconfigure the NOR FLASH 2013-07-29 10:56:21 -06:00
Gregory Nutt
27a9da98f4 SAMA5: Add file structure to support board-specific initialization of NOR flash 2013-07-29 07:41:53 -06:00
Gregory Nutt
65c8abddb8 SAMA5: The ostest configuration have been converted to run out of NOR flash. There is more to be done, however 2013-07-28 15:07:35 -06:00
Gregory Nutt
f191ac94c0 SAMA5: Correct vector mapping 2013-07-28 09:44:11 -06:00
Gregory Nutt
87af1517ed Correct an error in Cortex-A5 intermediate MMU mapping 2013-07-26 17:26:53 -06:00
Gregory Nutt
14093ef76a Add a hello world configuration to help with the SAMA5 bringup 2013-07-26 15:28:01 -06:00
Gregory Nutt
f87963accd SAMA5: If the page table is in high memory, make sure that it is excluded from the heap 2013-07-26 09:16:46 -06:00
Gregory Nutt
4ea9e1eb6e Fix some bad page table definitions of last commit 2013-07-25 18:11:25 -06:00
Gregory Nutt
696f6d0482 Misc Cortex-A5 MMU-related fix -- still does not boot 2013-07-25 16:37:55 -06:00
Gregory Nutt
63f136dd7e Revamp the way external memory regions are configured; Add logic to add SAMA5 external memory regions to the heap 2013-07-24 10:08:32 -06:00
Gregory Nutt
596cdf2982 SAMA5: Adapt clocking for different boot modes. New header files for AXI matrix, BSC, and SFR 2013-07-23 13:54:49 -06:00
Gregory Nutt
ae3f2b2876 Add SAMA5D3 pin multiplexing definitions 2013-07-23 09:47:01 -06:00
Gregory Nutt
e9f8689cee Add SAMA5 GPIO configuration support 2013-07-22 20:59:47 -06:00
Gregory Nutt
50cd6352fa Add support SAMA5 UART and serial driver 2013-07-22 19:16:37 -06:00
Gregory Nutt
9665c0d267 SAMA5 clock configuration should now agree with Atmel sample code; Added header file with macros to enable and disable peripheral clocking 2013-07-22 17:00:02 -06:00
Gregory Nutt
571308c27a Add SAMA5 clock logic. Cloned from SAM3U and not yet verified 2013-07-22 14:42:05 -06:00
Gregory Nutt
fb8a7a91fb SAMA5 interrupt handling logic 2013-07-22 11:54:39 -06:00
Gregory Nutt
b26d506514 Add system timer logic for the SAMA5 2013-07-21 15:49:17 -06:00
Gregory Nutt
0b46176b43 A few more Cortex-A5 and SAMA5 files 2013-07-21 12:52:38 -06:00
Gregory Nutt
0d9250fae5 Misc Cortex-A5 changes include new file for cache operations 2013-07-20 13:06:00 -06:00
Gregory Nutt
6f0e07d071 A few more SAMA5D3 files 2013-07-19 17:45:28 -06:00