Gregory Nutt
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1e59d9dd14
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armv7-a, armv7-r, armv7-m: Add atomic read-add-write and read-subtract-write functions.
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2018-02-04 12:22:03 -06:00 |
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Gregory Nutt
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1c5ec07414
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arch/: Remove dangling space at the end of lines.
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2017-06-28 13:16:48 -06:00 |
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Gregory Nutt
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588d2b506f
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Xtensa ESP32: Oddly, an rsync barrier when writing to co-processor register corrects problem.
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2016-12-21 08:04:48 -06:00 |
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Gregory Nutt
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cdd8dc72a5
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Xtensa ESP32: Basically a redesign of the interrupt dispatch logic.
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2016-12-16 15:36:52 -06:00 |
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Gregory Nutt
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41cf32a20e
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Fix windowspill register handling + Use r6, not r2 when passing paramters with call4
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2016-12-16 09:20:36 -06:00 |
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Gregory Nutt
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b5e979d58f
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ESP32: Fix a couple of bugs associated with handling of CPU interrupts.
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2016-12-14 13:31:44 -06:00 |
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Gregory Nutt
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a8e3f79494
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Xtensa/ESP32: Add User Exception handler
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2016-10-31 12:04:52 -06:00 |
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Gregory Nutt
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a787a99071
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ESP32: Add inter-cpu interrupts
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2016-10-31 08:29:28 -06:00 |
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Gregory Nutt
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63d5ab5b67
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Add logic to attach inter-CPU interrupts. Fix some compilation errors.
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2016-10-30 16:15:04 -06:00 |
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Gregory Nutt
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85ed3dae9a
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Update some compilation issues
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2016-10-30 15:38:51 -06:00 |
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Gregory Nutt
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fdede8099b
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Xtensa/ESP32: Add Level1 handler, panic handler, remove EXECHOOKS.
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2016-10-30 10:57:57 -06:00 |
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Gregory Nutt
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8c96221093
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Xtensa: Replace CONFIG_XTENSA_CALL0_ABI with compiler defined __XTENSA_CALL0_ABI__
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2016-10-30 07:37:51 -06:00 |
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Gregory Nutt
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d346f25aae
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Xtensa/ESP32: Fix some compile issues related to new co-processor logic
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2016-10-29 10:27:46 -06:00 |
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Gregory Nutt
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ccf5b4e357
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Xtensa: Cleanup of co-processor logic; remove some unnecessary things.
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2016-10-29 09:36:33 -06:00 |
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Gregory Nutt
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b4b26285f1
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ESP32: Add tie-asm.h
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2016-10-28 10:53:14 -06:00 |
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Gregory Nutt
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be2a801e30
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Xtensa: Add xtensa_coproc.h
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2016-10-28 10:33:20 -06:00 |
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Gregory Nutt
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6ed5d4b20c
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ESP32: Fix some compilation errors
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2016-10-27 16:36:22 -06:00 |
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Paul A. Patience
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912fe06a86
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Add architecture-specific inttypes.h
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2016-10-27 16:01:38 -04:00 |
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Gregory Nutt
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76788040d5
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ESP32: Add esp32_config.h
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2016-10-26 15:45:03 -06:00 |
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Gregory Nutt
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650757bbf0
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ESP32: Add GPIO support
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2016-10-26 12:11:24 -06:00 |
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Gregory Nutt
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b8462d3e04
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ESP32: Need to take priority into account when allocating CPU interrupts
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2016-10-25 16:27:58 -06:00 |
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Gregory Nutt
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2a59205ffa
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ESP32: Add CPU interrupt managmement logic; improve level interrupt decoding.
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2016-10-25 12:02:53 -06:00 |
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Gregory Nutt
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1dabbd8489
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Costmetic changes
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2016-10-24 16:18:30 -06:00 |
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Gregory Nutt
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4cf60022ca
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Xtensa: Correct some compile issues
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2016-10-23 16:25:55 -06:00 |
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Gregory Nutt
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a41c98952c
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Xtensa: Fix some compilation issues
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2016-10-23 13:33:48 -06:00 |
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Gregory Nutt
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1166d44441
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Minor improvement to the up_irq_save() implementation
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2016-10-23 13:37:40 -06:00 |
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Gregory Nutt
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6bbe55602c
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Xtensa: Add tie.h
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2016-10-23 13:25:41 -06:00 |
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Gregory Nutt
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1fcced12eb
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Xtensa: Timer code now compiles okay
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2016-10-23 11:31:48 -06:00 |
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Gregory Nutt
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bf363d103b
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Merge branch 'esp32' of bitbucket.org:nuttx/nuttx into esp32
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2016-10-23 10:47:31 -06:00 |
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Gregory Nutt
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9f06b13ffb
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Xtensa: Add core.h header file
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2016-10-23 10:43:16 -06:00 |
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Gregory Nutt
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c3d76d56bc
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Xtensa: Fix some compilation issues
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2016-10-23 10:06:30 -06:00 |
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Gregory Nutt
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09b462e419
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Xtensa: Add region protected; Implement some missing signal handling logic.
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2016-10-23 09:02:50 -06:00 |
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Gregory Nutt
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112b62a14e
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Xtensa: Correct variou compilation issues
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2016-10-23 08:04:57 -06:00 |
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Gregory Nutt
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a9a4f6384d
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Xtensa: Add interrupt enable/disable controls. Add dummy timer and IRQ initialization.
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2016-10-23 08:00:17 -06:00 |
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Gregory Nutt
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75df09fd40
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Remove support for software prioritization of interrupts
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2016-10-23 06:37:28 -06:00 |
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Gregory Nutt
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2c83d79465
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Xtensa: Remove 'virtual' interrupt support
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2016-10-23 06:24:35 -06:00 |
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Gregory Nutt
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764ef72641
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Xtensa: Restore XCHAL_ naming convenction
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2016-10-22 09:03:43 -06:00 |
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Gregory Nutt
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1ea22b680d
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Xtensa: Add timer dispatch logic
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2016-10-21 13:23:28 -06:00 |
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Gregory Nutt
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f07601a067
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Xtensa: First cat at context switching functions
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2016-10-21 10:43:59 -06:00 |
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Gregory Nutt
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9e1600b7d3
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Xtensa: Trivial interrupt-related changes
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2016-10-20 12:56:35 -06:00 |
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Gregory Nutt
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5c3afd088e
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Xtensa: A little more interrupt handling logic
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2016-10-20 11:44:14 -06:00 |
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Gregory Nutt
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31d5acc8a7
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Forgot to add a file before the last commit
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2016-10-19 10:06:07 -06:00 |
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Gregory Nutt
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6357970c5f
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Xtensa: Fix some compilation issues
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2016-10-18 12:38:57 -06:00 |
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Gregory Nutt
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8c3c78f24a
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Xtensa: Fix register usage in up_strackframe
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2016-10-16 09:26:33 -06:00 |
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Gregory Nutt
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a8662c70db
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Xtensa: Keep task state in TCB (unless you want to redesign signal handling). Lots of cosmetic clean-up.
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2016-10-16 07:57:16 -06:00 |
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Gregory Nutt
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eada2bf8d8
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XTENSA: Add function prototypes
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2016-10-15 12:23:36 -06:00 |
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Gregory Nutt
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4621784617
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Add xtensa.h (which is call up_internal.h in other architectures.
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2016-10-15 11:45:15 -06:00 |
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Gregory Nutt
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6f35ced002
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ESP32: Add peripheral interrupt IRQ numbers
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2016-10-15 08:39:15 -06:00 |
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Gregory Nutt
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e3ead1db69
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Xtensa: Add an initial guess at the form of struct xcpcontext
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2016-10-14 13:17:48 -06:00 |
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Gregory Nutt
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c078573677
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Add some .gitignore files
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2016-10-13 16:29:50 -06:00 |
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