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2506 Commits

Author SHA1 Message Date
raiden00pl
76824ba2a9 stm32g4xxxx_memorymap.h: remove invalid OPAMP1-6 definitions 2021-06-10 13:58:33 -03:00
raiden00pl
af0f2b4f37 stm32g4: add OPAMP defs 2021-06-10 13:58:33 -03:00
Xiang Xiao
c0fdddc5d7 arch: Remove all go_nx_start from chip specifc source 
since the idle stack color is done in the common code now

Signed-off-by: Xiang Xiao <xiaoxiang@xiaomi.com>
 2021-06-10 06:50:41 -07:00
Xiang Xiao
2e54df0f35 Don't include assert.h from public header file 
Signed-off-by: Xiang Xiao <xiaoxiang@xiaomi.com>
 2021-06-03 08:36:03 -07:00
Xiang Xiao
d7f96003cf Don't include debug.h from public header file 
Signed-off-by: Xiang Xiao <xiaoxiang@xiaomi.com>
 2021-06-01 06:42:02 +09:00
Alin Jerpelea
02b244cb6f arch: arm: update licenses to Apache 
Sebastien Lorquet has submitted the CLA

Uros Platise has submitted the CLA

Gregory Nutt is the copyright holder for those files and he has submitted the
SGA as a result we can migrate the licenses to Apache.

Signed-off-by: Alin Jerpelea <alin.jerpelea@sony.com>
 2021-05-31 01:37:27 -05:00
Xiang Xiao
001e7c3e76 sched: Don't include nuttx/sched.h inside sched.h 
But let nuttx/sched.h include sched.h instead to
avoid expose nuttx kernel API to userspace.

Signed-off-by: Xiang Xiao <xiaoxiang@xiaomi.com>
 2021-05-24 12:11:53 +09:00
Huang Qi
f4a0b7aedd libc: Call pthread_exit in user-space by up_pthread_exit 
Drop to user-space in kernel/protected build with up_pthread_exit,
now all pthread_cleanup functions executed in user mode.

* A new syscall SYS_pthread_exit added
* A new tcb flag TCB_FLAG_CANCEL_DOING added
* up_pthread_exit implemented for riscv/arm arch

Signed-off-by: Huang Qi <huangqi3@xiaomi.com>
 2021-05-21 22:46:52 -06:00
Anthony Merlino
e37ce7677b Try to address CI build error and a few macro fixes. 2021-05-19 10:41:18 -07:00
Anthony Merlino
b54a4c7788 Replace more ATIM_/BTIM_ macros with GTIM_ macros 2021-05-19 10:41:18 -07:00
Anthony Merlino
58c92be39c stm32 timers: Make some register operations more readable. 2021-05-19 10:41:18 -07:00
Anthony Merlino
fa2b9ca43b stm32/stm32f7 tickless: Fix up_timer_getmask to be correct for the width of the timer. 2021-05-16 13:04:31 -05:00
Nathan Hartman
8af9d39667 Documentation, comments: Minor improvements and typos fixed 2021-05-09 19:12:13 -07:00
David Sidrane
17b786399c stm32:SDIO:Use 250 Ms Data path timeout, regardless of Card Clock frequency 2021-05-07 17:39:08 -04:00
raiden00pl
b721ba05aa stm32_pwm.c: fix compilation warnings 2021-05-05 09:32:58 -03:00
raiden00pl
7cb7fe3f38 stm32_pwm: fixes for PULSECOUNT support 
1. generate an indefinite number of pulses when info->count = 0
2. timers that don't support pulse-count shouldn't use pulse-count logic
 2021-05-05 09:32:58 -03:00
raiden00pl
7b53a5fe1c stm32_adc.c: rename a struct member in struct adccmn_data_s from 'initialized' to 'refcount' 2021-05-05 01:27:56 -07:00
David Sidrane
3feb3a247d stm32:Serial DMA config USART{4578} -> UART{4578} 2021-04-15 21:26:32 -05:00
raiden00pl
82ce1de7cd stm32/stm32_foc: remove the debug message before the calibration start 
For unknown reasons this message may interferre with the calibration
procedure and result in invalid calibariton data.
We leave only a message informing about the end of the the calibration.
The problem was observed for STM32G4 + IHM16M1.
 2021-04-15 06:37:15 -05:00
raiden00pl
13f62d15cc stm32/stm32_foc: do not enable PWM outputs that are not in use 2021-04-15 06:37:15 -05:00
raiden00pl
ad8c09d0a1 stm32: include support for TIMERS_V3 2021-04-14 10:53:50 -04:00
raiden00pl
7c11397469 stm32: add definitions for TIMERS_V3. All credit goes to Nathan Hartman (hartmannathan) 2021-04-14 10:53:50 -04:00
raiden00pl
6d69600905 stm32/Kconfig: move configuration common for G4 under STM32_STM32G4XXX option 2021-04-14 10:53:50 -04:00
Marco Krahl
8456f3615e drivers/1wire: Moves header and adjusts include paths 
Moves header to 1wire include sub directory.
Moves over common crc definitions to new interface.

Signed-off-by: Marco Krahl <ocram.lhark@gmail.com>
 2021-04-14 02:49:28 -05:00
raiden00pl
beebb57445 stm32g4xx: add support for FOC 2021-04-13 14:38:28 -05:00
raiden00pl
835b129c94 stm32g4xx: add DBGMCU definitions 2021-04-13 14:38:28 -05:00
Anthony Merlino
9c8c2b0db2 Separate CLOCK_TIMEKEEPING and SCHED_TICKLESS. 2021-04-13 11:42:31 -05:00
raiden00pl
c90a6bdf2b stm32/Kconfig: enable ADCx DMA support if DMAMUX enabled 2021-04-13 12:08:17 -03:00
raiden00pl
bf04ef9a3c stm32g4: add support for DMA (DMAMUX) 2021-04-13 12:08:17 -03:00
raiden00pl
fbb7e95ebf stm32g4xxxx_dmamux.h: rename defs to match other chips and add DMAMAP defs 2021-04-13 09:20:18 -05:00
raiden00pl
62001bff3b stm32g4xx: add support for PWM 2021-04-13 09:19:52 -05:00
raiden00pl
4c741bc9a5 stm32/Kconfig: G4 chips use TIMERS_V2 2021-04-13 09:19:52 -05:00
raiden00pl
ff2ae3e894 stm32g4xx: add support for ADC 2021-04-13 09:29:09 -03:00
Jukka Laitinen
3f6bb76e01 arch/arm/src/stm32f7/stm32_allocateheap.c: Fix MPU alignments 
Change the logic for allocating user heap for PROTECTED_BUILD:
- Don't rely on SRAM1_END alignment
- Make better use of MPU subregions when allocating the heap
- Don't duplicate the calculation of user heap start in kernel heap
  allocation; use the previous calculation directly

Signed-off-by: Jukka Laitinen <jukkax@ssrc.tii.ae>
 2021-04-12 23:20:18 -05:00
Xiang Xiao
3f9908f7d1 Remove the unnecessary math.h inclusion 
or move from header file to source file since math.h doesn't always exist

Signed-off-by: Xiang Xiao <xiaoxiang@xiaomi.com>
 2021-04-12 22:58:23 -04:00
raiden00pl
cf645fc9ba arch/arm/src/stm32/stm32_foc.c: add modifications to support STM32F1 
- generalize DBGMCU for PWM timer
- use ADC common data only if coupled ADC present
- rename some ADC definitions that collide with stm32_adc.h
 2021-04-11 03:52:21 -05:00
raiden00pl
021a89569d arch/arm/src/stm32: introduce DBGMCU IP core versions 2021-04-11 03:52:21 -05:00
raiden00pl
3caf26fe3e arch/arm/src/stm32/stm32_adc.c: support adc_inj_startconv also for STM32F1 2021-04-11 03:52:21 -05:00
Anthony Merlino
f979dd72c1 stm32/stm32f7 tickless: Fix clearing and checking of interrupts. 2021-04-10 23:38:16 -05:00
Anthony Merlino
dd00c6427e stm32 tickless: Fixes printf warnings 2021-04-10 23:38:16 -05:00
Xiang Xiao
3f67c67aaf arch: Fix the stack boundary calculation and check 
All supported arch uses a push-down stack:
The stack grows toward lower addresses in memory. The stack pointer
register points to the lowest, valid working address (the "top" of
the stack). Items on the stack are referenced as positive(include zero)
word offsets from sp.
Which means that for stack in the [begin, begin + size):
1.The initial SP point to begin + size
2.push equals sub and then store
3.pop equals load and then add

Signed-off-by: Xiang Xiao <xiaoxiang@xiaomi.com>
 2021-04-10 08:39:54 -07:00
Alin Jerpelea
231b8518b7 NuttX: Ken Pettit: update licenses to Apache 
Ken Pettit has submitted the ICLA and we can migrate the licenses
 to Apache.

Sebastien Lorquet has submitted the ICLA and we can migrate the licenses
 to Apache.

Gregory Nutt has submitted the SGA and we can migrate the licenses
 to Apache.

Signed-off-by: Alin Jerpelea <alin.jerpelea@sony.com>
 2021-04-10 06:42:19 -05:00
Alin Jerpelea
d2e7ea05c6 NuttX: typo fix 
Yype fix for Public Functions reported by nxstyle

Signed-off-by: Alin Jerpelea <alin.jerpelea@sony.com>
 2021-04-08 22:48:46 -05:00
Gregory Nutt
a9e2195e65 Remove unused 'running' field from freerun lower half drivers. 
That field is never used and, in most cases, is never initialized correctly.

This should have no impact to anything with the possible exception of free-running drivers.

Verified using CI builds only.
 2021-04-07 20:35:50 -03:00
Alin Jerpelea
72041911ce NuttX: Marco Krahl: update licenses to Apache 
Marco Krahl has submitted the ICLA and we can migrate the licenses
 to Apache.

Gregory Nutt, S.A has submitted the SGA and we can migrate the licenses
 to Apache.

Signed-off-by: Alin Jerpelea <alin.jerpelea@sony.com>
 2021-04-06 12:50:41 -05:00
Anthony Merlino
b21cb3308a Fixes race condition in event wait logic of SDMMC driver. 
This change makes it so that the timeout is set as part of the SDIO_WAITENABLE call instead of the SDIO_EVENTWAIT call. By doing so, you eliminate all opportunity for a race condition.

stm32h7:sdmmc Check if busy ended early
 2021-04-05 23:08:45 -05:00
Xiang Xiao
d62ae03bf8 arch: Move setjmp/longjmp to libc/machine 
Signed-off-by: Xiang Xiao <xiaoxiang@xiaomi.com>
 2021-04-04 16:30:37 -07:00
Xiang Xiao
5f3a98b5a8 libc/assert: Reference the expression in all case 
to avoid the warning "defined but not used"

Signed-off-by: Xiang Xiao <xiaoxiang@xiaomi.com>
Change-Id: I55b7c092d0f2e5882fc1784987657c10cdf2d90b
 2021-04-03 21:00:41 +01:00
Alin Jerpelea
08e5378b11 NuttX: Gregory Nutt: update licenses to Apache 
Several licenses were missed in the initial work

David Sidrane has submitted the ICLA and we can migrate the licenses
 to Apache.

Gregory Nutt has submitted the SGA and we can migrate the licenses
 to Apache.

Signed-off-by: Alin Jerpelea <alin.jerpelea@sony.com>
 2021-04-03 04:20:31 -07:00
raiden00pl
5bff5dc971 motor/foc: use motor debug messages in FOC files 2021-04-01 15:43:49 -03:00
Alin Jerpelea
190582c764 boards: stm32: Laurent Latil: update licenses to Apache 
Laurent Latil has submitted the ICLA and we can migrate the licenses
 to Apache.

Gregory Nutt has submitted the SGA and we can migrate the licenses
 to Apache.

Signed-off-by: Alin Jerpelea <alin.jerpelea@sony.com>
 2021-04-01 12:13:12 -05:00
Alin Jerpelea
0f41c3c555 NuttX: Pierre-Noel Bouteville: update licenses to Apache 
Pierre-Noel Bouteville has submitted the ICLA and we can migrate the licenses
 to Apache.

David Sidrane has submitted the ICLA and we can migrate the licenses
 to Apache.

Gregory Nutt has submitted the SGA and we can migrate the licenses
 to Apache.

Signed-off-by: Alin Jerpelea <alin.jerpelea@sony.com>
 2021-04-01 12:13:12 -05:00
Alin Jerpelea
b4a33b5ec0 NuttX: Uros Platise: update licenses to Apache 
Uros Platise has submitted the ICLA and we can migrate the licenses
 to Apache.

David Sidrane has submitted the ICLA and we can migrate the licenses
 to Apache.

Bob Feretich has submitted the ICLA and we can migrate the licenses
 to Apache.

Gregory Nutt has submitted the SGA and we can migrate the licenses
 to Apache.

Signed-off-by: Alin Jerpelea <alin.jerpelea@sony.com>
 2021-04-01 12:13:12 -05:00
Alin Jerpelea
78ccf7cb91 NuttX: Neil Hancock: update licenses to Apache 
Neil Hancock has submitted the ICLA and we can migrate the licenses
 to Apache.

Mateusz Szafoni has submitted the ICLA and we can migrate the licenses
 to Apache.

David Sidrane has submitted the ICLA and we can migrate the licenses
 to Apache.

Gregory Nutt has submitted the SGA and we can migrate the licenses
 to Apache.

Signed-off-by: Alin Jerpelea <alin.jerpelea@sony.com>
 2021-04-01 12:13:12 -05:00
Alin Jerpelea
f8aed9864d NuttX: Max Holtzberg: update licenses to Apache 
Max Holtzberg has submitted the ICLA and we can migrate the licenses
 to Apache.

Gregory Nutt has submitted the SGA and we can migrate the licenses
 to Apache.

Signed-off-by: Alin Jerpelea <alin.jerpelea@sony.com>
 2021-04-01 12:13:12 -05:00
Alin Jerpelea
dade0c36ca NuttX: Mateusz Tomasz Szafoni: update licenses to Apache 
Mateusz Tomasz Szafoni has submitted the ICLA and we can migrate the licenses
 to Apache.

Gregory Nutt has submitted the SGA and we can migrate the licenses
 to Apache.

Signed-off-by: Alin Jerpelea <alin.jerpelea@sony.com>
 2021-04-01 12:13:12 -05:00
raiden00pl
c1c4ca4ffd stm32/stm32_foc.c: add the lower-half FOC device support 2021-03-31 18:23:53 -03:00
Alin Jerpelea
c6c36e1e65 arch: arm: stm: fix nxstyle errors 
Fix nxstyle errors to pass CI

Signed-off-by: Alin Jerpelea <alin.jerpelea@sony.com>
 2021-03-31 00:59:15 -05:00
Alin Jerpelea
6ff1648b4f arch: arm: stm: Author Gregory Nutt: update licenses to Apache 
Gregory Nutt has submitted the SGA and we can migrate the licenses
 to Apache.

Signed-off-by: Alin Jerpelea <alin.jerpelea@sony.com>
 2021-03-31 00:59:15 -05:00
raiden00pl
4306910000 stm32/hardware/stm32_tim.h: fix comments 2021-03-30 01:13:39 -05:00
raiden00pl
5276077530 stm32/Kconfig: add STM32_HAVE_ADC1 option for consistency 2021-03-30 01:13:39 -05:00
raiden00pl
466ceb92cb stm32/Kconfig: cosmetics for quenco options 2021-03-30 01:13:39 -05:00
raiden00pl
b16d5341d8 stm32/stm32_serial.c: simplify DMA #ifdefs 2021-03-29 21:39:35 -03:00
raiden00pl
3c34337064 stm32: add support for serial TX DMA 2021-03-29 21:39:35 -03:00
raiden00pl
0cca102d41 stm32: fix USART1 clock for STM32F302 2021-03-29 21:39:35 -03:00
raiden00pl
63a4807f28 stm32/stm32_pwm: add interfaces to access RCR register and add interface to modify TRGO 2021-03-29 21:37:41 -03:00
raiden00pl
94ff4564b4 stm32/stm32_adc.c: move maximum number of samples cfg to Kconfig. 
The maximum number of samples which can be handled without overrun depends on various factors.
This is the user's responsibility to correctly select this value.
Since the interfece to update the sampling time is available for all supported devices,
the user can change the default vaules in the board initialization logic and avoid ADC overrun.
 2021-03-29 21:35:46 -03:00
raiden00pl
88753afb75 stm32/stm32_adc.c: fix enable/disable interrupts logic for coupled ADC 2021-03-29 21:35:46 -03:00
raiden00pl
166bf0434b stm32/stm32_adc.c: add an option to configure ANIOC_TRIGGER behavior 2021-03-29 21:35:46 -03:00
raiden00pl
58a03302d2 stm32/stm32_adc.c: add an option to configure SCAN mode for ADC IPv1 2021-03-29 21:35:46 -03:00
raiden00pl
e10a6647e9 stm32/stm32_adc.c: fix initial sample time write 2021-03-29 21:35:46 -03:00
Petteri Aimonen
3dfc4e0afd STM32 USB OTGFSDEV: Update comments 2021-03-24 11:12:40 -07:00
Petteri Aimonen
18bfef1b38 STM32 USB OTGFSDEV: Fix code style issues 2021-03-24 11:12:40 -07:00
Petteri Aimonen
3c610d5d70 STM32 USB OTGFSDEV: Fix handling of SETUP OUT longer than 64 bytes. 
For example Windows RNDIS driver issues SETUP requests that are 76 bytes
long. Previously NuttX would read them all, but only if they arrive at
the same time. If host transfer scheduling causes a pause between the
two DATA packets, stm32_ep0out_receive() would proceed with an incomplete
transfer. The rest of the data could either be skipped by the error handler
branch, or be left in NAK state forever, stopping any further communication
on the endpoint.

This commit changes it so that the whole transfer has to be received before
SETUP handler is called. Depending on CONFIG_USBDEV_SETUP_MAXDATASIZE any
excess bytes will be discarded, but doing this in a controlled way ensures
deterministic behavior. In the specific case of RNDIS, the trailing bytes
are unused padding bytes and can be safely discarded.
 2021-03-24 11:12:40 -07:00
Nathan Hartman
f83b30bda1 arch/stm32: Fix wrong Kconfig names for STM32G4xxx MCUs 
arch/arm/src/stm32/Kconfig:

    * configs ARCH_CHIP_STM32G431K, ARCH_CHIP_STM32G431C,
      ARCH_CHIP_STM32G431R, ARCH_CHIP_STM32G431M, and
      ARCH_CHIP_STM32G431V: Fix copy/paste of incorrect
      names shown in the Kconfig menu.
 2021-03-22 19:47:32 -07:00
Alin Jerpelea
37f91b023c arch: Author David Sidrane: update licenses to Apache 
David Sidrane has submitted the ICL and we can migrate the licenses
 to Apache.

Gregory Nutt has submitted the SGA and we can migrate the licenses
 to Apache.

Signed-off-by: Alin Jerpelea <alin.jerpelea@sony.com>
 2021-03-22 19:28:38 -07:00
Nathan Hartman
4653dc14d3 Fix typos (and nxstyle errors) 
ReleaseNotes,
arch/arm/src/cxd56xx/cxd56_dmac_common.h,
arch/arm/src/efm32/efm32_dma.h,
arch/arm/src/lpc54xx/lpc54_lcd.c,
arch/arm/src/rp2040/rp2040_dmac.h,
arch/arm/src/stm32/stm32_dma.h,
arch/arm/src/stm32f0l0g0/stm32_dma.h,
arch/arm/src/stm32f7/stm32_dma.h,
arch/arm/src/stm32h7/stm32_dma.h,
arch/arm/src/stm32l4/stm32l4_dma.h,
arch/renesas/src/rx65n/rx65n_dtc.h,
fs/spiffs/src/spiffs_vfs.c,
net/route/cacheroute.h,
net/route/net_cacheroute.c,
net/route/net_foreach_fileroute.c,
net/route/net_foreach_ramroute.c,
net/route/net_foreach_romroute.c, and
net/route/route.h:

    * Fix the following typos:
      - remove spurious "are"
      - "tot he" -> "to the"

arch/arm/src/stm32f0l0g0/stm32_dma.h and
arch/arm/src/stm32l4/stm32l4_dma.h:

    * Fix nxstyle errors.
 2021-03-21 21:51:14 +01:00
Alin Jerpelea
bd94263a33 arch: Makefile: Author Gregory Nutt: update licenses to Apache 
Gregory Nutt has submitted the SGA and we can migrate the licenses
 to Apache.

Signed-off-by: Alin Jerpelea <alin.jerpelea@sony.com>
 2021-03-13 05:56:43 -08:00
Gustavo Henrique Nihei
330eff36d7 sourcefiles: Fix relative path in file header 2021-03-09 23:18:28 +08:00
David Sidrane
abda656076 stm32:Ethernet Fix too big frames 2021-03-06 03:07:58 -08:00
Fotis Panagiotopoulos
f423403dfa stm32_wwdg debug log formatting 2021-03-03 19:02:04 -08:00
Nathan Hartman
3ac61053ce arch/stm32, arch/stm32f7: Fix nxstyle errors 
arch/arm/src/stm32/hardware/stm32_dma2d.h,
arch/arm/src/stm32/hardware/stm32_ltdc.h,
arch/arm/src/stm32/stm32_dma2d.c,
arch/arm/src/stm32/stm32_ltdc.c,
arch/arm/src/stm32f7/hardware/stm32_dma2d.h,
arch/arm/src/stm32f7/hardware/stm32_ltdc.h,
arch/arm/src/stm32f7/stm32_dma2d.c, and
arch/arm/src/stm32f7/stm32_ltdc.c:

    * Fix nxstyle "mixed case identifier" errors for the
      following identifiers:

      DMA2D_xGPFCCR_ALPHA         -> DMA2D_XGPFCCR_ALPHA
      DMA2D_xGPFCCR_AM            -> DMA2D_XGPFCCR_AM
      DMA2D_xGPFCCR_CCM           -> DMA2D_XGPFCCR_CCM
      DMA2D_xGPFCCR_CM            -> DMA2D_XGPFCCR_CM
      DMA2D_xGPFCCR_CS            -> DMA2D_XGPFCCR_CS
      DMA2D_xGPFCCR_START         -> DMA2D_XGPFCCR_START
      LTDC_LxBFCR_BF1             -> LTDC_LXBFCR_BF1
      LTDC_LxBFCR_BF2             -> LTDC_LXBFCR_BF2
      LTDC_LxCFBLR_CFBLL          -> LTDC_LXCFBLR_CFBLL
      LTDC_LxCFBLR_CFBP           -> LTDC_LXCFBLR_CFBP
      LTDC_LxCR_CLUTEN            -> LTDC_LXCR_CLUTEN
      LTDC_LxCR_COLKEN            -> LTDC_LXCR_COLKEN
      LTDC_LxCR_LEN               -> LTDC_LXCR_LEN
      LTDC_LxWHPCR_WHSPPOS        -> LTDC_LXWHPCR_WHSPPOS
      LTDC_LxWHPCR_WHSTPOS        -> LTDC_LXWHPCR_WHSTPOS
      LTDC_LxWVPCR_WVSPPOS        -> LTDC_LXWVPCR_WVSPPOS
      LTDC_LxWVPCR_WVSTPOS        -> LTDC_LXWVPCR_WVSTPOS
      STM32_LTDC_LxWHPCR_WHSTPOS  -> STM32_LTDC_LXWHPCR_WHSTPOS
      STM32_LTDC_LxWVPCR_WVSTPOS  -> STM32_LTDC_LXWVPCR_WVSTPOS
      STM32_LTDC_Lx_BYPP          -> STM32_LTDC_LX_BYPP
      DMA2D_xGCOLR_BLUE           -> DMA2D_XGCOLR_BLUE
      DMA2D_xGCOLR_BLUE_MASK      -> DMA2D_XGCOLR_BLUE_MASK
      DMA2D_xGCOLR_BLUE_SHIFT     -> DMA2D_XGCOLR_BLUE_SHIFT
      DMA2D_xGCOLR_GREEN          -> DMA2D_XGCOLR_GREEN
      DMA2D_xGCOLR_GREEN_MASK     -> DMA2D_XGCOLR_GREEN_MASK
      DMA2D_xGCOLR_GREEN_SHIFT    -> DMA2D_XGCOLR_GREEN_SHIFT
      DMA2D_xGCOLR_RED            -> DMA2D_XGCOLR_RED
      DMA2D_xGCOLR_RED_MASK       -> DMA2D_XGCOLR_RED_MASK
      DMA2D_xGCOLR_RED_SHIFT      -> DMA2D_XGCOLR_RED_SHIFT
      DMA2D_xGOR                  -> DMA2D_XGOR
      DMA2D_xGOR_MASK             -> DMA2D_XGOR_MASK
      DMA2D_xGOR_SHIFT            -> DMA2D_XGOR_SHIFT
      DMA2D_xGPFCCR_ALPHA_MASK    -> DMA2D_XGPFCCR_ALPHA_MASK
      DMA2D_xGPFCCR_ALPHA_SHIFT   -> DMA2D_XGPFCCR_ALPHA_SHIFT
      DMA2D_xGPFCCR_AM_MASK       -> DMA2D_XGPFCCR_AM_MASK
      DMA2D_xGPFCCR_AM_SHIFT      -> DMA2D_XGPFCCR_AM_SHIFT
      DMA2D_xGPFCCR_CM_MASK       -> DMA2D_XGPFCCR_CM_MASK
      DMA2D_xGPFCCR_CM_SHIFT      -> DMA2D_XGPFCCR_CM_SHIFT
      DMA2D_xGPFCCR_CS_MASK       -> DMA2D_XGPFCCR_CS_MASK
      DMA2D_xGPFCCR_CS_SHIFT      -> DMA2D_XGPFCCR_CS_SHIFT
      LTDC_LxBFCR_BF1_MASK        -> LTDC_LXBFCR_BF1_MASK
      LTDC_LxBFCR_BF1_SHIFT       -> LTDC_LXBFCR_BF1_SHIFT
      LTDC_LxBFCR_BF2_MASK        -> LTDC_LXBFCR_BF2_MASK
      LTDC_LxBFCR_BF2_SHIFT       -> LTDC_LXBFCR_BF2_SHIFT
      LTDC_LxCACR_CONSTA          -> LTDC_LXCACR_CONSTA
      LTDC_LxCACR_CONSTA          -> LTDC_LXCACR_CONSTA
      LTDC_LxCACR_CONSTA_MASK     -> LTDC_LXCACR_CONSTA_MASK
      LTDC_LxCACR_CONSTA_SHIFT    -> LTDC_LXCACR_CONSTA_SHIFT
      LTDC_LxCFBLNR_LN            -> LTDC_LXCFBLNR_LN
      LTDC_LxCFBLNR_LN            -> LTDC_LXCFBLNR_LN
      LTDC_LxCFBLNR_LN_MASK       -> LTDC_LXCFBLNR_LN_MASK
      LTDC_LxCFBLNR_LN_SHIFT      -> LTDC_LXCFBLNR_LN_SHIFT
      LTDC_LxCFBLR_CFBLL_MASK     -> LTDC_LXCFBLR_CFBLL_MASK
      LTDC_LxCFBLR_CFBLL_SHIFT    -> LTDC_LXCFBLR_CFBLL_SHIFT
      LTDC_LxCFBLR_CFBP_MASK      -> LTDC_LXCFBLR_CFBP_MASK
      LTDC_LxCFBLR_CFBP_SHIFT     -> LTDC_LXCFBLR_CFBP_SHIFT
      LTDC_LxCKCR_CKBLUE          -> LTDC_LXCKCR_CKBLUE
      LTDC_LxCKCR_CKBLUE          -> LTDC_LXCKCR_CKBLUE
      LTDC_LxCKCR_CKBLUE_MASK     -> LTDC_LXCKCR_CKBLUE_MASK
      LTDC_LxCKCR_CKBLUE_SHIFT    -> LTDC_LXCKCR_CKBLUE_SHIFT
      LTDC_LxCKCR_CKGREEN         -> LTDC_LXCKCR_CKGREEN
      LTDC_LxCKCR_CKGREEN         -> LTDC_LXCKCR_CKGREEN
      LTDC_LxCKCR_CKGREEN_MASK    -> LTDC_LXCKCR_CKGREEN_MASK
      LTDC_LxCKCR_CKGREEN_SHIFT   -> LTDC_LXCKCR_CKGREEN_SHIFT
      LTDC_LxCKCR_CKRED           -> LTDC_LXCKCR_CKRED
      LTDC_LxCKCR_CKRED           -> LTDC_LXCKCR_CKRED
      LTDC_LxCKCR_CKRED_MASK      -> LTDC_LXCKCR_CKRED_MASK
      LTDC_LxCKCR_CKRED_SHIFT     -> LTDC_LXCKCR_CKRED_SHIFT
      LTDC_LxCLUTWR_BLUE          -> LTDC_LXCLUTWR_BLUE
      LTDC_LxCLUTWR_BLUE          -> LTDC_LXCLUTWR_BLUE
      LTDC_LxCLUTWR_BLUE_MASK     -> LTDC_LXCLUTWR_BLUE_MASK
      LTDC_LxCLUTWR_BLUE_SHIFT    -> LTDC_LXCLUTWR_BLUE_SHIFT
      LTDC_LxCLUTWR_CLUTADD       -> LTDC_LXCLUTWR_CLUTADD
      LTDC_LxCLUTWR_CLUTADD       -> LTDC_LXCLUTWR_CLUTADD
      LTDC_LxCLUTWR_CLUTADD_MASK  -> LTDC_LXCLUTWR_CLUTADD_MASK
      LTDC_LxCLUTWR_CLUTADD_SHIFT -> LTDC_LXCLUTWR_CLUTADD_SHIFT
      LTDC_LxCLUTWR_GREEN         -> LTDC_LXCLUTWR_GREEN
      LTDC_LxCLUTWR_GREEN         -> LTDC_LXCLUTWR_GREEN
      LTDC_LxCLUTWR_GREEN_MASK    -> LTDC_LXCLUTWR_GREEN_MASK
      LTDC_LxCLUTWR_GREEN_SHIFT   -> LTDC_LXCLUTWR_GREEN_SHIFT
      LTDC_LxCLUTWR_RED           -> LTDC_LXCLUTWR_RED
      LTDC_LxCLUTWR_RED           -> LTDC_LXCLUTWR_RED
      LTDC_LxCLUTWR_RED_MASK      -> LTDC_LXCLUTWR_RED_MASK
      LTDC_LxCLUTWR_RED_SHIFT     -> LTDC_LXCLUTWR_RED_SHIFT
      LTDC_LxDCCR_DCALPHA         -> LTDC_LXDCCR_DCALPHA
      LTDC_LxDCCR_DCALPHA         -> LTDC_LXDCCR_DCALPHA
      LTDC_LxDCCR_DCALPHA_MASK    -> LTDC_LXDCCR_DCALPHA_MASK
      LTDC_LxDCCR_DCALPHA_SHIFT   -> LTDC_LXDCCR_DCALPHA_SHIFT
      LTDC_LxDCCR_DCBLUE          -> LTDC_LXDCCR_DCBLUE
      LTDC_LxDCCR_DCBLUE          -> LTDC_LXDCCR_DCBLUE
      LTDC_LxDCCR_DCBLUE_MASK     -> LTDC_LXDCCR_DCBLUE_MASK
      LTDC_LxDCCR_DCBLUE_SHIFT    -> LTDC_LXDCCR_DCBLUE_SHIFT
      LTDC_LxDCCR_DCGREEN         -> LTDC_LXDCCR_DCGREEN
      LTDC_LxDCCR_DCGREEN         -> LTDC_LXDCCR_DCGREEN
      LTDC_LxDCCR_DCGREEN_MASK    -> LTDC_LXDCCR_DCGREEN_MASK
      LTDC_LxDCCR_DCGREEN_SHIFT   -> LTDC_LXDCCR_DCGREEN_SHIFT
      LTDC_LxDCCR_DCRED           -> LTDC_LXDCCR_DCRED
      LTDC_LxDCCR_DCRED           -> LTDC_LXDCCR_DCRED
      LTDC_LxDCCR_DCRED_MASK      -> LTDC_LXDCCR_DCRED_MASK
      LTDC_LxDCCR_DCRED_SHIFT     -> LTDC_LXDCCR_DCRED_SHIFT
      LTDC_LxPFCR_PF              -> LTDC_LXPFCR_PF
      LTDC_LxPFCR_PF              -> LTDC_LXPFCR_PF
      LTDC_LxPFCR_PF_MASK         -> LTDC_LXPFCR_PF_MASK
      LTDC_LxPFCR_PF_SHIFT        -> LTDC_LXPFCR_PF_SHIFT
      LTDC_LxWHPCR_WHSPPOS_MASK   -> LTDC_LXWHPCR_WHSPPOS_MASK
      LTDC_LxWHPCR_WHSPPOS_SHIFT  -> LTDC_LXWHPCR_WHSPPOS_SHIFT
      LTDC_LxWHPCR_WHSTPOS_MASK   -> LTDC_LXWHPCR_WHSTPOS_MASK
      LTDC_LxWHPCR_WHSTPOS_SHIFT  -> LTDC_LXWHPCR_WHSTPOS_SHIFT
      LTDC_LxWVPCR_WVSPPOS_MASK   -> LTDC_LXWVPCR_WVSPPOS_MASK
      LTDC_LxWVPCR_WVSPPOS_SHIFT  -> LTDC_LXWVPCR_WVSPPOS_SHIFT
      LTDC_LxWVPCR_WVSTPOS_MASK   -> LTDC_LXWVPCR_WVSTPOS_MASK
      LTDC_LxWVPCR_WVSTPOS_SHIFT  -> LTDC_LXWVPCR_WVSTPOS_SHIFT

    * Fix all other nxstyle errors in the affected files.
 2021-03-03 18:49:20 -08:00
Xiang Xiao
9473434587 Ensure the kernel component don't call userspace API 
Signed-off-by: Xiang Xiao <xiaoxiang@xiaomi.com>
 2021-03-01 09:23:09 +09:00
Masayuki Ishikawa
d87f350831 arch, boards, drivers, include, sched, wireless: Change spinlock APIs. 
Summary:
- This commit changes spinlock APIs (spin_lock_irqsave/spin_unlock_irqrestore)
- In the previous implementation, the global spinlock (i.e. g_irq_spin) was used.
- This commit allows to use caller specific spinlock but also supports to use
  g_irq_spin for backword compatibility (In this case, NULL must be specified)

Impact:
- None

Testing:
- Tested with the following configurations
- spresnse:wifi, spresense:wifi_smp
- esp32-devkitc:smp (QEMU), sabre6-quad:smp (QEMU)
- maxi-bit:smp (QEMU), sim:smp
- stm32f4discovery:wifi

Signed-off-by: Masayuki Ishikawa <Masayuki.Ishikawa@jp.sony.com>
 2021-02-07 21:28:56 -08:00
Alan C. Assis
b0d611d3dc Replace ARM_LWL_CONSOLE with generic LWL_CONSOLE 2021-01-31 06:14:50 -08:00
David Sidrane
a2f82542ef stm32f412:Replaced Kludged pinmap with one for SoC. 
The stm32f412 was not a clean port. This is one step to fix
   it. The shortcuts taken has caused more wasted hours finding
   bad pin mappings then doing the job correctlry to begin with.

   stm32:Kconfig Add CAN2 on STM32F412
 2021-01-21 06:56:33 -08:00
David Sidrane
657088318a stm32412: Fixes pinmap CAN1 2021-01-13 11:01:44 -06:00
Nathan Hartman
7592fc17d3 arch/stm32: Fix nxstyle errors 
arch/arm/src/stm32/stm32_otghs.h:

    * Fix nxstyle issues.
 2021-01-01 18:17:03 +01:00
Nathan Hartman
588227ed7b arch/stm32: Fix nxstyle errors 
arch/arm/src/stm32/stm32_otgfs.h:

    * Fix nxstyle issues.
 2020-12-31 20:32:13 +01:00
Xiang Xiao
c647faa117 Fix nxstyle warning 
Signed-off-by: Xiang Xiao <xiaoxiang@xiaomi.com>
 2020-12-31 09:37:29 +01:00
Xiang Xiao
0defe43282 OS internal function should indicate the error by return negative value 
instead to change errno value by calling set_errno

Signed-off-by: Xiang Xiao <xiaoxiang@xiaomi.com>
 2020-12-31 09:37:29 +01:00
Nathan Hartman
81224cc596 arch/stm32: Fix nxstyle errors 
arch/arm/src/stm32/stm32_spi.h:

    * Fix nxstyle issues.
 2020-12-30 10:20:15 -06:00
Nathan Hartman
763aae8155 arch/stm32: Fix nxstyle errors 
arch/arm/src/stm32/stm32_rtc.h:

    * Fix nxstyle issues.
 2020-12-29 08:36:31 -06:00
Nathan Hartman
080b2dfceb arch/stm32: Fix nxstyle errors 
arch/arm/src/stm32/stm32_exti.h:
arch/arm/src/stm32/stm32_flash.c:
arch/arm/src/stm32/stm32_fsmc.c:
arch/arm/src/stm32/stm32_fsmc.h:
arch/arm/src/stm32/stm32_hciuart.h:
arch/arm/src/stm32/stm32_mpuinit.h:
arch/arm/src/stm32/stm32_rtc.c:

    * Fix nxstyle issues.
 2020-12-24 23:21:16 +01:00
Nathan Hartman
dad32ccd47 arch/stm32: Fix nxstyle errors 
arch/arm/src/stm32/stm32_dma.h:

    * Fix nxstyle issues.
 2020-12-23 20:35:42 -06:00
Fotis Panagiotopoulos
e26daf9357 STM32 FLASH latency is calculated based on Vin. 2020-12-23 08:13:45 -08:00
Nathan Hartman
78f308ff2c arch/stm32: Fix nxstyle errors 
arch/arm/src/stm32/stm32_dac.h:

    * Fix nxstyle issues.
 2020-12-21 20:20:17 +01:00
Nathan Hartman
4cefc5ce7a stm32g4: Fix incorrect FLASH wait states 
When the architectural support for STM32G4 family was added, the
reference manual (RM0440) was at revision 2. Since then, it has
undergone several revisions. One significant change is in the
table of FLASH wait states: section 3.3.3 table 9. The outcome
of this change is that fewer FLASH wait states are needed for
most CPU clock (HCLK) frequencies. Notably, if running the CPU
clock at the maximum 170 MHz, only 4 FLASH wait states are
needed, rather than the previously programmed 8 wait states.
This gives a noticeable performance boost.

arch/arm/src/stm32/stm32g4xxxx_rcc.c:

    * FLASH_ACR_LATENCY_SETTING: Reimplement compile-time logic
      that selects the required wait state setting to use the new
      updated table.

    * Update all comments to indicate that RM0440 Rev 5 is used.

    * Update section numbers mentioned in comments in cases where
      they have changed due to added sections in the manual.
 2020-12-21 18:43:49 +01:00
Nathan Hartman
4facd82ae0 arch/stm32: Fix nxstyle errors 
arch/arm/src/stm32/stm32_ltdc.h:
arch/arm/src/stm32/stm32_pmsleep.c:
arch/arm/src/stm32/stm32_pmstandby.c:

    * Fix nxstyle issues.
 2020-12-19 00:16:47 -06:00
chao.an
4a559807a5 arch/netdev: try tcp timer in every txavail call 
In the current implementation, the first transmission of the new
connection handshake is depends entirely by tcp_timer(), which will
caused 0.5s - 1s delay each time in connect().

This patch is mainly to improve the performance of TCP handshake.

Original:

nsh> tcp_client
[    1.536100] TCP connect start.
[    2.000200] TCP connect end. DIFF: tick: 4641, 464ms.
[    3.000300] TCP connect start.
[    4.000400] TCP connect end. DIFF: tick: 10001, 1000ms.
[    5.000500] TCP connect start.
[    6.000600] TCP connect end. DIFF: tick: 10001, 1000ms.
[    7.000700] TCP connect start.
[    8.000800] TCP connect end. DIFF: tick: 10001, 1000ms.

Optimized:

nsh> tcp_client
[    3.263600] TCP connect start.
[    3.263700] TCP connect end. DIFF: tick: 1, 0ms.
[    4.263800] TCP connect start.
[    4.263800] TCP connect end. DIFF: tick: 0, 0ms.
[    5.263900] TCP connect start.
[    5.263900] TCP connect end. DIFF: tick: 0, 0ms.
[    6.264000] TCP connect start.
[    6.264000] TCP connect end. DIFF: tick: 0, 0ms.
[    7.264100] TCP connect start.
[    7.264100] TCP connect end. DIFF: tick: 0, 0ms.

Signed-off-by: chao.an <anchao@xiaomi.com>
 2020-12-18 14:16:11 +09:00
Nathan Hartman
b960bee78b arch/stm32: Fix nxstyle errors 
arch/arm/src/stm32/stm32_tim.c:

    * Fix nxstyle errors.
 2020-12-15 19:10:30 +01:00
Nathan Hartman
3adadbe5d7 arch/stm32: Fix nxstyle errors 
arch/arm/src/stm32/stm32_usbhost.h:

    * Fix nxstyle errors.
 2020-12-15 06:47:20 +01:00
Nathan Hartman
705c64e5ff arch/stm32: Fix nxstyle errors 
arch/arm/src/stm32/stm32_wwdg.c:

    * Fix nxstyle errors.
 2020-12-13 22:54:03 +01:00
Nathan Hartman
2fda2451e3 arch/stm32: Add register definitions for STM32G4 ADC 
arch/arm/src/stm32/hardware/stm32_adc_v2g4.h:

    * New file.

arch/arm/src/stm32/hardware/stm32_adc.h:

    * Distinguish between the normal STM32 ADC IPv2 core and the
      modified IPv2 core used in the G4 family, and include either
      stm32_adc_v2.h or stm32_adc_v2g4.h as needed.
 2020-12-12 13:58:51 +01:00
Nathan Hartman
3864912dc8 arch/stm32: Fix nxstyle errors 
arch/arm/src/stm32/stm32l15xxx_rtcc.c:

    * Fix nxstyle errors.
 2020-12-11 15:04:13 -03:00
Nathan Hartman
648ec7bee4 arch/stm32: Fix nxstyle errors 
arch/arm/src/stm32/stm32l15xxx_rcc.c:

    * Fix nxstyle errors.
 2020-12-10 18:30:24 +01:00
raiden00pl
0c05f2ea38 stm32: add stm32g43x support and nucleo-g431rb board 2020-12-09 09:43:25 -03:00
Nathan Hartman
c257c458ad arch/stm32: Fix nxstyle errors 
arch/arm/src/stm32/stm32_rng.c:

    * Fix nxstyle errors.
 2020-12-09 09:21:42 +01:00
Nathan Hartman
c162069cd5 arch/stm32: Fix nxstyle errors (and one typo) 
arch/arm/src/stm32/stm32_dma2d.h
arch/arm/src/stm32/stm32_fmc.h
arch/arm/src/stm32/stm32_freerun.h
arch/arm/src/stm32/stm32_pm.h

    * Fix nxstyle errors.

arch/arm/src/stm32/hardware/stm32g4xxxx_dmamux.h

    * Fix typo in comment.
 2020-12-07 22:22:02 +01:00
raiden00pl
979a5b7fd4 stm32: convert all STM32G47X specific code to generic STM32G4 series code. 
This is an initial step towards supporting other STM32G4 chips.
 2020-12-06 13:37:02 -05:00
YAMAMOTO Takashi
330aa43f72 arch/arm/src/stm32/stm32_adc.c: Don't assume debug macro expansion 2020-12-06 09:03:09 -06:00
YAMAMOTO Takashi
ac905598ca arch/arm/src/stm32/stm32_freerun.c: Fix syslog formats 2020-12-05 08:13:32 -06:00
YAMAMOTO Takashi
c28c9387a1 arch/arm/src/stm32/stm32_freerun.c: Appease nxstyle 2020-12-05 08:13:32 -06:00
YAMAMOTO Takashi
99000d306d arch/arm/src/stm32/stm32_iwdg.c: Fix syslog formats 2020-12-05 08:13:32 -06:00
raiden00pl
a95512e05d nxstyle fixes 2020-12-05 07:46:06 -06:00
raiden00pl
9407d06d92 stm32/hardware: remove redundand ifdefs to keep headers consistent 2020-12-05 07:46:06 -06:00
Nathan Hartman
607ff94793 arch/stm32: Fix nxstyle errors 
arch/arm/src/stm32/stm32_eth.h:

    * Fix nxstyle errors.
 2020-12-04 23:15:01 +01:00
Nathan Hartman
e4c725481c arch/stm32: Fix nxstyle errors 
arch/arm/src/stm32/stm32_alarm.h,
arch/arm/src/stm32/stm32_can.h,
arch/arm/src/stm32/stm32_capture.h:

    * Fix nxstyle errors.
 2020-12-03 20:20:47 +01:00
Fotis Panagiotopoulos
09b6aca971 nxstyle fixes. 2020-12-02 11:27:15 -08:00
Fotis Panagiotopoulos
f538839720 FLASH waiting cycles are configured based on HCLK. 2020-12-02 11:27:15 -08:00
Nathan Hartman
32b49e6db8 arch/stm32: Fix a wrong bitfield definition 
arch/arm/src/stm32/hardware/stm32_adc_v2.h:

    * ADC_CFGR1_JAWD1EN: Change from (1 << 22) to (1 << 24)
      and update comment.
 2020-12-02 11:20:57 -06:00
Nathan Hartman
350a8b31a8 arch/stm32: Fix nxstyle errors 
arch/arm/src/stm32/hardware/stm32_adc.h:

    * Fix nxstyle errors.

arch/arm/src/stm32/hardware/stm32_adc_v2.h:

    * Fix nxstyle errors.
 2020-12-02 00:00:25 -06:00
Nathan Hartman
86e41979b4 arch/stm32: Fix nxstyle errors 
arch/arm/src/stm32/stm32_tim_lowerhalf.c:

    * Fix nxstyle errors.
 2020-12-01 21:01:34 +01:00
Nathan Hartman
b002698865 arch/stm32: Fix nxstyle errors 
arch/arm/src/stm32/stm32_uid.c:

    * Fix nxstyle errors.
 2020-12-01 21:01:34 +01:00
Nathan Hartman
cff63d1b1e arch/stm32: Fix nxstyle errors 
arch/arm/src/stm32/stm32_userspace.h:

    * Fix nxstyle errors.
 2020-12-01 21:01:34 +01:00
raiden00pl
756cb41a6c stm32/stm32h7: fix the configuration of PWM outputs when subsequent channels are not enabled (eg. CH1 and CH2 disabled, CH3 enabled) 
Resolves issue #2446
 2020-11-30 22:27:35 -06:00
YAMAMOTO Takashi
4d7d1665af arch/arm/src/stm32/stm32_i2s.c: Fix syslog formats 2020-11-30 05:28:17 -06:00
YAMAMOTO Takashi
fab675d442 arch/arm/src/stm32/stm32_can.c: Fix a syslog format 2020-11-30 05:28:17 -06:00
YAMAMOTO Takashi
dded464965 arch/arm/src/stm32/stm32f40xxx_rtcc.c: Fix a syslog format 2020-11-28 23:14:05 -06:00
YAMAMOTO Takashi
98f5497727 arch/arm/src/stm32/stm32_can.c: Fix syslog formats 2020-11-28 23:14:05 -06:00
YAMAMOTO Takashi
db361cdca0 arch/arm/src/stm32/stm32_i2c_v2.c: Fix syslog formats 2020-11-28 23:14:05 -06:00
YAMAMOTO Takashi
6e1a504fc5 arch/arm/src/stm32/stm32_i2c_v2.c: Appease nxstyle 2020-11-28 23:14:05 -06:00
Nathan Hartman
675c1b8457 arch/stm32: Fix nxstyle errors 
arch/arm/src/stm32/stm32_wdg.h:
arch/arm/src/stm32/stm32f40xxx_rtcc.c:
arch/arm/src/stm32/stm32l15xxx_alarm.h:

    * Fix nxstyle errors.
 2020-11-28 00:34:05 -06:00
YAMAMOTO Takashi
c696ccf1de arch/arm/src/stm32/stm32_adc.c: Fix syslog formats 2020-11-27 23:38:40 -06:00
YAMAMOTO Takashi
32950a2623 arch/arm/src/stm32/stm32_otghsdev.c: Fix syslog formats 2020-11-27 23:38:40 -06:00
YAMAMOTO Takashi
23cd2a0842 arch/arm/src/stm32/stm32_hciuart.c: Fix syslog formats 2020-11-27 05:18:57 -06:00
YAMAMOTO Takashi
c55cdc8a42 arch/arm/src/stm32/stm32l15xx_flash.c: Fix a syslog format 2020-11-27 05:18:57 -06:00
YAMAMOTO Takashi
8b212ae040 arch/arm/src/stm32/stm32_i2c_alt.c: Fix syslog formats 2020-11-27 05:18:57 -06:00
YAMAMOTO Takashi
56803db5e8 arch/arm/src/stm32/stm32_i2c.c: Fix syslog formats 2020-11-27 05:18:57 -06:00
YAMAMOTO Takashi
78bf42c91f arch/arm/src/stm32/stm32_irq.c: Fix syslog formats 2020-11-27 05:18:57 -06:00
YAMAMOTO Takashi
9fa98394f5 arch/arm/src/stm32/stm32_dma_v2.c: Fix a syslog format 2020-11-27 05:18:57 -06:00
YAMAMOTO Takashi
be4ce99410 arch/arm/src/stm32/stm32f40xxx_i2c.c: Fix a syslog format 2020-11-27 05:18:57 -06:00
YAMAMOTO Takashi
4da2eef7d2 arch/arm/src/stm32/stm32_eth.c: Fix syslog formats 2020-11-27 05:18:57 -06:00
YAMAMOTO Takashi
08dd2251ea arch/arm/src/stm32/stm32_hrtim.c: Fix a syslog format 2020-11-27 05:18:57 -06:00
YAMAMOTO Takashi
6b11286455 arch/arm/src/stm32/stm32_otghshost.c: Fix syslog formats 2020-11-27 05:18:57 -06:00
YAMAMOTO Takashi
96f012cc73 arch/arm/src/stm32/stm32_pwm.c: Fix syslog formats 2020-11-27 05:18:57 -06:00
YAMAMOTO Takashi
7276f0c206 arch/arm/src/stm32/stm32_adc.c: Fix syslog formats 2020-11-27 05:18:57 -06:00
Nathan Hartman
bcdee59929 arch/stm32: Fix nxstyle errors 
arch/arm/src/stm32/stm32_sdio.h:

    * Fix nxstyle errors.
 2020-11-26 23:10:29 +01:00
YAMAMOTO Takashi
7b31315879 arch/arm/src/stm32/stm32_dma2d.c: Fix syslog formats 2020-11-24 22:31:33 -08:00
YAMAMOTO Takashi
d289fd92af arch/arm/src/stm32/stm32_dma2d.c: Appease nxstyle 
The following errors are intentionally left.
(Hardware constants like DMA2D_xGPFCCR_CCM.)

arch/arm/src/stm32/stm32_dma2d.c:484:12: error: Mixed case identifier found
arch/arm/src/stm32/stm32_dma2d.c:692:13: error: Mixed case identifier found
arch/arm/src/stm32/stm32_dma2d.c:701:18: error: Mixed case identifier found
arch/arm/src/stm32/stm32_dma2d.c:706:18: error: Mixed case identifier found
arch/arm/src/stm32/stm32_dma2d.c:711:18: error: Mixed case identifier found
arch/arm/src/stm32/stm32_dma2d.c:725:14: error: Mixed case identifier found
arch/arm/src/stm32/stm32_dma2d.c:732:18: error: Mixed case identifier found
 2020-11-24 22:31:33 -08:00