Commit Graph

82 Commits

Author SHA1 Message Date
Gregory Nutt
3d4ce55ebd Oops.. a couple of hunks failed in the last patch. Hope I got them fixed correctly. 2016-10-24 15:25:40 -06:00
Gregory Nutt
7b7e352d6e ESP32: Add some peripheral configuration 2016-10-24 14:09:47 -06:00
Gregory Nutt
818b0171d7 ESP32: Clock configuration is not yet implemented. ESP32 will be running a XTAL frequency. 2016-10-24 07:30:11 -06:00
Gregory Nutt
4cf60022ca Xtensa: Correct some compile issues 2016-10-23 16:25:55 -06:00
Gregory Nutt
2514ddec8b Xtensa: Add NMI handler 2016-10-23 16:24:09 -06:00
Gregory Nutt
9a9488ae92 ESP32: Fix heap initialization 2016-10-23 14:20:03 -06:00
Gregory Nutt
1fcced12eb Xtensa: Timer code now compiles okay 2016-10-23 11:31:48 -06:00
Gregory Nutt
c3d76d56bc Xtensa: Fix some compilation issues 2016-10-23 10:06:30 -06:00
Gregory Nutt
9b5fedc81e Xtensa: Add implementation of system timer; Correct CFLAGS 2016-10-23 10:08:38 -06:00
Gregory Nutt
09b462e419 Xtensa: Add region protected; Implement some missing signal handling logic. 2016-10-23 09:02:50 -06:00
Gregory Nutt
112b62a14e Xtensa: Correct variou compilation issues 2016-10-23 08:04:57 -06:00
Gregory Nutt
a9a4f6384d Xtensa: Add interrupt enable/disable controls. Add dummy timer and IRQ initialization. 2016-10-23 08:00:17 -06:00
Gregory Nutt
2c83d79465 Xtensa: Remove 'virtual' interrupt support 2016-10-23 06:24:35 -06:00
Gregory Nutt
53de345f05 Xtensa: Add up_cpu_index() 2016-10-22 09:29:15 -06:00
Gregory Nutt
f07601a067 Xtensa: First cat at context switching functions 2016-10-21 10:43:59 -06:00
Gregory Nutt
363fe19ff6 Xtensa: Fix some compile issues 2016-10-20 16:42:37 -06:00
Gregory Nutt
7a89808deb ESP32: Add interrupt decode logic 2016-10-20 16:22:37 -06:00
Gregory Nutt
520513f456 Xtensa: Add interrupt decode framework 2016-10-20 14:34:51 -06:00
Gregory Nutt
11af1fc24c Xtensa: Separate context save/restore from coprocessor functions. Making to changes to interrupt handling to support NuttX. 2016-10-20 08:51:15 -06:00
Gregory Nutt
d1562a18e6 Add vectors for interrupt levels 2-6 2016-10-19 13:58:51 -06:00
Gregory Nutt
291c49afc3 Xtensa/ESP32: Move some ESP32-specific macros from xtensa_macros.h to chip_macros.h 2016-10-19 11:28:42 -06:00
Gregory Nutt
29c3acdc4e Add xtensa_testset.c 2016-10-19 09:58:12 -06:00
Gregory Nutt
8c606c4878 ESP32: Add more missing infrastructure 2016-10-18 13:18:59 -06:00
Gregory Nutt
503a2472e7 Xtensa: Add assertion logic 2016-10-18 12:42:57 -06:00
Gregory Nutt
ac97a81fb0 ESP32 core: Add linker script 2016-10-18 09:43:56 -06:00
Gregory Nutt
c5d14f9496 Xtensa: A few changes to get esp32_start.c to compile 2016-10-17 10:45:21 -06:00
Gregory Nutt
51fc3de40b Xtensa: Add CPU1 start logic 2016-10-17 09:13:12 -06:00
Gregory Nutt
c1334048c5 Xtensa: Add initial CPU0 start-up logic 2016-10-17 08:15:36 -06:00
Gregory Nutt
e7d791dd95 XTensa: Add an initial implementation of up_initialstate. Need to think through co-processor support. 2016-10-16 10:36:03 -06:00
Gregory Nutt
8c3c78f24a Xtensa: Fix register usage in up_strackframe 2016-10-16 09:26:33 -06:00
Gregory Nutt
8ffbf6d95e XTENSA: Hook xtensa_irq.S into build 2016-10-15 11:46:21 -06:00
Gregory Nutt
852330876b arch/xtensa: A little more ESP32 configuration logic 2016-10-12 14:50:28 -06:00