Changes:
- Documentation/platforms/risc-v/k230 revised for both modes
- arch/risc-v/include/k230/irq.h add S-mode IRQs
- under arch/risc-v/src/k230 folder:
- Make.defs drop use of k230_exception_m.S
- hardware/k230_clint.h add S-mode defs, revised freq
- k230_head.S unified flat/kernel mode support
- k230_irq.c add S-mode support with debug dump
- k230_mm_init.c revised for K230 S-mode
- k230_start.c revised for flat/s-mode,
- arch/risc-v/src/k230/k230_timerisr.c unified flat/s-mode support.
- under boards/risc-v/k230/canmv230 folder:
- configs/nsh/defconfig fix RAM size
- include/board_memorymap.h cleanup for S-mode
- src/.gitignore ignore romfs_boot.c
- src/Makefile add romfs support
Renames:
- under boards/risc-v/k230/canmv230/src/ folder:
- canmv_init.c from k230_appinit.c making room for more k230 devices
Dropped:
- under arch/risc-v/src/k230/
- k230_exception_m.S as hybrid mode not ready yet.
New files in boards/riscv/k230/canmv230:
- configs/knsh/defconfig S-mode config
- scripts/ld-kernel.script S-mode linker script
- src/romfs.h User space ROMFS defs needed in S-mode
- src/romfs_stub.c Stub ROMFS image
Signed-off-by: Yanfeng Liu <yfliu2008@qq.com>
The code is mainly derived from the NuttX qemu-rv/rv-virt codebase.
Major changes:
- boards/Kconfig: add new BOARD_K230_CANMV
- arch/risc-v/Kconfig: add new CHIP_K230 chip and ARCH_RV_MMIO_BITS
- arch/risc-v/src/common/riscv_mtimer.c: use ARCH_RV_MMIO_BITS to
select MMIO access width
New additions:
- arch/risc-v/include/k230/: k230 SoC definitions
- arch/risc-v/src/k230/: k230 SoC sources
- boards/risc-v/k230/canmv230/: CanMV-K230 board sources and configs
- Documentation/platforms/risc-v/k230/: simple doc
Note that only FLAT build works for canmv230 now.
This PR has changes in RiscV common layer thus may affect other RiscV ports
It changes the mtime/mtimecmp access control from using config ARCH_RV64 to
newly intorduced config ARCH_RV_MMIO_BITS.
Original design uses ARCH_RV64 to select 64bit MMIO in riscv_mtimer.c, this
can't cope with the situation with K230 --- it has ARCH_RV64 but only can do
32bit MMIO. So a new ARCH_RV_MMIO_BITS config has been introduced. Its value
depicts the MMIO width in bits. The MMIO_BITS defaults to 32/64 for RV32/
RV64 respectively. This allows the macro to replace current use of ARCH_RV64
in riscv_mtimer.c.
The new MMIO_BITS config is a derived one, and for RiscV chips with
equal CPU and MMIO widths there is no need to explicitly set it as the
default rule will do that. Only chips with different CPU and MMIO widths
need set it in Kconfig.
So by design this change should be safe but RiscV ports should be checked.
"ostest" verification has been done for:
- canmv230/nsh
- rv-vivt/nsh
- rv-virt/nsh64
configuration generation and manual check of derived RV_MMIO_BITS has been
done for:
- star64/nsh
- arty_a7/nsh
- bl602evb/nsh
Signed-off-by: Yanfeng Liu <yfliu2008@qq.com>
This PR adds support for PINE64 Ox64 64-bit RISC-V SBC, based on Bouffalo Lab BL808 SoC (T-Head C906 Core). Most of the code is derived from NuttX for Star64 JH7110. The source files are explained in the articles here: https://github.com/lupyuen/nuttx-ox64
### Modified Files
`boards/Kconfig`: Added Ox64 board
### New Files in boards/risc-v/bl808/ox64
`src/bl808_appinit.c`: Startup Code
`include/board.h`: Ox64 Definitions
`include/board_memorymap.h`: Memory Map
`src/etc/init.d/rc.sysinit`, `rcS`: Startup Script
`src/.gitignore`: Ignore the tmp filesystem
`scripts/ld.script`: Linker Script
`scripts/Make.defs`: Ox64 Makefile
`src/Makefile`: Ox64 Makefile
`Kconfig`: Ox64 Config
`configs/nsh/defconfig`: Build Config for `ox64:nsh`
### Updated Documentation
`platforms/risc-v/bl808/index.rst`: New page for Bouffalo Lab BL808 SoC
`platforms/risc-v/bl808/boards/ox64/index.rst`: Building and booting NuttX for Ox64
`platforms/risc-v/jh7110/boards/star64/index.rst`: Fix typo
Summary:
- Upgraded to xpack-riscv-none-elf-gcc-12.3.0-2 to resolve symbol recognition
issues in riscv-none-elf-gdb, as reported in
https://github.com/xpack-dev-tools/riscv-none-elf-gcc-xpack/issues/22.
Impact:
- Expected to enhance toolchain stability with no negative side effects.
Testing:
- Verified with rv-virt:netnsh and rv-virt:netnsh64 configurations
Signed-off-by: Masayuki Ishikawa <Masayuki.Ishikawa@jp.sony.com>
- migrated /README are removed from /boards
- there are a lot of READMEs that should be further converted to rst.
At the moment they are moved to Documentation/platforms and included in rst files
External JLink is required to program the board, so the console via RTT
is available anyway. It is much more convenient to use than soldering the
P4 connector and working with an external UART converter.
The board-level GPIO support is different from the already existing
button and LEDC support because it enable us to register the GPIO
pins as devices in `/dev/gpioX`. Some applications are able to use
this interface to read and write the GPIO pins.
Documentation was added regarding its usage. Please check
`Documentation/platforms/xtensa/esp32s3/boards/esp32s3-devkit/index.rst`
This PR adds support for PINE64 Star64 64-bit RISC-V SBC, based on StarFive JH7110 SoC. Most of the code is derived from NuttX for QEMU RISC-V (Kernel Mode). [The source files are explained in the articles here](https://github.com/lupyuen/nuttx-star64)
Modified Files:
boards/Kconfig: Added Star64 board
New Files in boards/risc-v/jh7110/star64:
src/jh7110_appinit.c: Startup Code
include/board.h: Star64 Definitions
include/board_memorymap.h: Memory Map
src/etc/init.d/rc.sysinit, rcS: Startup Script
src/.gitignore: Ignore the tmp filesystem
scripts/ld.script: Linker Script
scripts/Make.defs: Star64 Makefile
src/Makefile: Star64 Makefile
Kconfig: Star64 Config
configs/nsh/defconfig: NSH Build Config
Updated Documentation:
introduction/detailed_support.rst: Added StarFive JH7110 SoC and Star64 SBC
platforms/risc-v/jh7110/index.rst: New page for StarFive JH7110 SoC
platforms/risc-v/jh7110/boards/star64/index.rst: Building and booting NuttX for Star64
Add documentation referring to sim:alsa defconfig, about how to
mount host system files in the simulator using `hostfs` and
playing them using the ALSA adapter.
This implements the changes required to genreate the pdf version
of the documentation. The pdf will be generated as a build artifact
attached to the build. This is the first patch to enable this
a follow on patch to the website repo will publish the pdf to the
NuttX website.
Currently only Port UART0 is supported for Allwinner A64. This PR adds support for all UART Ports: UART1 to UART4. (Except R-UART, which is a special low-power UART)
This is required for the upcoming LTE Modem Driver (Quectel EG25-G) for PINE64 PinePhone, which uses UART3. [(Details here)](https://lupyuen.github.io/articles/lte2)
The code was adapted from the NuttX UART Driver for Allwinner A1X: [`a1x_serial.c`](https://github.com/apache/nuttx/blob/master/arch/arm/src/a1x/a1x_serial.c)
`arch/arm64/src/a64/a64_serial.c`: Added ports UART1 to UART4, based on [`a1x_serial.c`](https://github.com/apache/nuttx/blob/master/arch/arm/src/a1x/a1x_serial.c)
`arch/arm64/src/a64/a64_serial.h`: Added IRQs for UART1 to UART4. Moved UART Base Addresses to `a64_memorymap.h`
`arch/arm64/src/a64/hardware/a64_memorymap.h`: Added UART Base Addresses for UART0 to UART4
`arch/arm64/src/a64/Kconfig`: Added UART1 to UART4 to Allwinner A64 Peripheral Selection menu
`boards/arm64/a64/pinephone/configs/lcd/defconfig`, `lvgl/defconfig`, `nsh/defconfig`, `sensor/defconfig`: Fixed `UART1_SERIAL_CONSOLE` to `UART0_SERIAL_CONSOLE`
Adds support for the ES8311 codec on the ESP32-S2-Kaluga-1 board. This commit also adds basic configurations for testing and updates the board documentation.
Added examples of using the RTP Tools (`rtpdump`, in particular)
to receive RTP packets and 1) print the data and/or 2) playback
audio content through I2S.
This commit adds support to Ai-Thinker ESP32 Audio Kit V2.2 A247
board.
There are two modules of this board. The old model uses AC101 audio
and is not supported currently (AFAIK there is no AC101 driver) and
the new version uses the ES8388 audio codec. This model is supported
by this commit.
Just read the documentation to test playing an audio file.
TODO: Test audio recording.
Initial documentation page for SAMv7 MCU is added. There are still
board pages to be added in the future.
Signed-off-by: Michal Lenc <michallenc@seznam.cz>
Current implementation supports the trigger generation only from timer
capture on period value. This is sufficient for PWM synchronization but
may not be enough for other purposes as ADC triggering for example.
This change adds an option to generate the trigger based on a duty
cycle value.
Signed-off-by: Michal Lenc <michallenc@seznam.cz>
Restore some openocd information which I occassionally need.
This is a partial revert of:
```
commit 58a5e0744b
Author: Abdelatif Guettouche <abdelatif.guettouche@espressif.com>
Date: Mon Jul 26 21:43:42 2021 +0200
Documentation/esp32: Remove the rest of the OpenOCD text.
This information there is outdated and some of its content should be in
the board documentation and not the chip.
Signed-off-by: Abdelatif Guettouche <abdelatif.guettouche@espressif.com>
```
This PR adds the existing Goodix GT9XX Touch Panel Driver to the Bringup Function for PINE64 PinePhone.
With this PR, LVGL Touchscreen Apps will respond to Touch Input on PinePhone.
### Modified Files
`boards/arm64/a64/pinephone/src/pinephone_bringup.c`: Added GT9XX Touch Panel Driver to PinePhone Bringup Function
`boards/arm64/a64/pinephone/src/Makefile`: Added `pinephone_touch.c` to the Makefile
`include/nuttx/input/gt9xx.h`: Fixed a comment in GT9XX Touch Panel Driver
### New Files
`boards/arm64/a64/pinephone/src/pinephone_touch.c`, `pinephone_touch.h`: Register GT9XX Touch Panel Driver on PinePhone
`boards/arm64/a64/pinephone/configs/lvgl/defconfig`: Added PinePhone Board Config `lvgl` to support LVGL Touchscreen Apps
### Updated Documentation
`Documentation/platforms/arm/a64/boards/pinephone/index.rst`: Added PinePhone Board Config `lvgl` for LVGL Touchscreen Apps
This PR adds the Frame Buffer Driver for PINE64 PinePhone. With this driver, NuttX Apps will be able to use the standard Frame Buffer API to render graphics on PinePhone.
`boards/arm64/a64/pinephone/src/pinephone_bringup.c`: Render Test Pattern after calling `up_fbinitialize()` to start the Frame Buffer Driver
`boards/arm64/a64/pinephone/src/pinephone_display.c`: Add Frame Buffer Driver
`boards/arm64/a64/pinephone/src/pinephone_display.h`: Declare new function for rendering Test Pattern
`platforms/arm/a64/boards/pinephone/index.rst`: Add Frame Buffer as supported driver for PinePhone
This PR adds the driver for Xingbangda XBD599 LCD Panel (based on Sitronix ST7703 LCD Controller) on PINE64 PinePhone. This PR also includes:
- The driver for X-Powers AXP803 Power Mgmt IC, which calls our driver for Allwinner A64's Reduced Serial Bus. The PMIC Driver is needed to power on the MIPI DSI Interface for the LCD Panel.
- A simple Display Driver that renders a Test Pattern on the LCD Display at startup. It calls our Allwinner A64 drivers for Display Engine, Timing Controller TCON0 and MIPI Display Serial Interface.
The NuttX Frame Buffer Driver will be implemented in the next PR.
`arch/arm64/src/a64/a64_de.c`, `a64_de.h`: Changed the Frame Buffer pointer to `const` for Allwinner A64 Display Engine
`arch/arm64/src/a64/hardware/a64_memorymap.h`: Added the Base Address for PWM, for controlling the PWM Backlight
`boards/arm64/a64/pinephone/src/pinephone_bringup.c`: Call `fb_register()` to start the Display Driver at startup
`boards/arm64/a64/pinephone/src/Makefile`: Added LCD Driver, PMIC Driver and Display Driver to Makefile
`boards/arm64/a64/pinephone/Kconfig`: Added the Kconfig option for "PINE64 PinePhone > LCD Display" (`CONFIG_PINEPHONE_LCD`) which enables the LCD Driver, PMIC Driver and Display Driver
`boards/arm64/a64/pinephone/src/pinephone_lcd.c`, `pinephone_lcd.h`: Driver for Xingbangda XBD599 LCD Panel
`boards/arm64/a64/pinephone/src/pinephone_pmic.c`, `pinephone_pmic.h`: Driver for X-Powers AXP803 Power Mgmt IC
`boards/arm64/a64/pinephone/src/pinephone_display.c`: Simple Display Driver that renders a Test Pattern in `up_fbinitialize()`
`boards/arm64/a64/pinephone/configs/lcd/defconfig`: New PinePhone Board Configuration `pinephone:lcd` that enables the LCD Driver (`CONFIG_PINEPHONE_LCD`)
`platforms/arm/a64/boards/pinephone/index.rst`: Added PinePhone Board Configuration `pinephone:lcd` that enables the LCD Driver
This PR adds the driver for Reduced Serial Bus (RSB) on Allwinner A64 SoC. The RSB Driver will be called by the upcoming Power Mgmt IC Driver for PINE64 PinePhone, to power on the LCD Display.
`arch/arm64/src/a64/Kconfig`: Added the Kconfig option for "A64 Peripheral Selection > RSB" (`CONFIG_A64_RSB`), which enables the RSB Driver
`arch/arm64/src/a64/hardware/a64_memorymap.h`: Added the Base Address for RSB
`arch/arm64/src/a64/Make.defs`: Added the RSB Driver to the Makefile
`arch/arm64/src/a64/a64_de.c`: Increase PLL Timeout for Allwinner A64 Display Engine
`boards/arm64/a64/pinephone/configs/nsh/defconfig`: Set PinePhone Board Config `CONFIG_BOARD_LOOPSPERMSEC` to the value computed by `calib_udelay`
`arch/arm64/src/a64/a64_rsb.c`, `a64_rsb.h`: RSB Driver for Allwinner A64
`platforms/arm/a64/boards/pinephone/index.rst`: Added RSB as supported peripheral for PinePhone
This PR adds the driver for Display Engine 2.0 on Allwinner A64 SoC. The Display Engine Driver will be called by the upcoming LCD Driver for PINE64 PinePhone.
`arch/arm64/src/a64/Kconfig`: Added the Kconfig option for "A64 Peripheral Selection > DE" (`CONFIG_A64_DE`), which enables the Display Engine Driver
`arch/arm64/src/a64/hardware/a64_memorymap.h`: Added the Base Address for Display Engine
`arch/arm64/src/a64/Make.defs`: Added the Display Engine Driver to the Makefile
`boards/arm64/a64/pinephone/configs/nsh/defconfig`: Removed Scheduler Debug Info (`CONFIG_DEBUG_SCHED_INFO`) from the PinePhone Board Config, because it garbles the Console Output.
`arch/arm64/src/a64/a64_de.c`, `a64_de.h`: Display Engine Driver for Allwinner A64
`platforms/arm/a64/boards/pinephone/index.rst`: Added Display Engine as supported peripheral for PinePhone
This PR adds the driver for TCON0 (Timing Controller) on Allwinner A64 SoC. The TCON0 Driver will be used by the upcoming Display Driver for PINE64 PinePhone.
`arch/arm64/src/a64/Kconfig`: Added the Kconfig option for "A64 Peripheral Selection > TCON0" (`CONFIG_A64_TCON0`), which enables the TCON0 Driver
`arch/arm64/src/a64/hardware/a64_memorymap.h`: Added the Base Address for TCON0
`arch/arm64/src/a64/Make.defs`: Added the TCON0 Driver to the Makefile
`arch/arm64/src/a64/a64_tcon0.c`, `a64_tcon0.h`: TCON0 Driver for Allwinner A64
`platforms/arm/a64/boards/pinephone/index.rst`: Added TCON0 as supported peripheral for PinePhone
This PR adds the driver for Allwinner A64's MIPI Display Serial Interface (DSI) and MIPI Display Physical Layer (D-PHY).
This driver will be used by the upcoming Display Driver for PINE64 PinePhone.
- `include/nuttx/crc16.h`: Added 16-bit CRC-CCITT
- `libs/libc/misc/Make.defs`: Added 16-bit CRC-CCITT to Makefile
- `arch/arm64/src/a64/Kconfig`: Added the Kconfig option for "A64 Peripheral Selection > MIPI DSI" (`CONFIG_A64_MIPI_DSI`), which enables the MIPI DSI Driver
- `arch/arm64/src/a64/hardware/a64_memorymap.h`: Added the Base Address for MIPI DSI
- `arch/arm64/src/a64/Make.defs`: Added the MIPI DSI Driver to the Makefile
- `libs/libc/misc/lib_crc16ccitt.c`: Compute 16-bit CRC-CCITT
- `arch/arm64/src/a64/mipi_dsi.c`, `mipi_dsi.h`: Compose MIPI DSI Packets (Long, Short, Short with Parameter)
- `arch/arm64/src/a64/a64_mipi_dsi.c`, `a64_mipi_dsi.h`: MIPI DSI Driver for Allwinner A64
- `arch/arm64/src/a64/a64_mipi_dphy.c`, `a64_mipi_dphy.h`: MIPI D-PHY Driver for Allwinner A64
- `platforms/arm/a64/boards/pinephone/index.rst`: Added MIPI DSI as supported peripheral for PinePhone
Co-Authored-By: Petro Karashchenko <petro.karashchenko@gmail.com>
This PR adds the drivers for Allwinner A64 PIO (Programmable I/O) and PinePhone LEDs (Red / Green / Blue).
The PIO Driver is based on the NuttX PIO Driver for Allwinner A10: [`arch/arm/src/a1x/a1x_pio.c`](https://github.com/apache/nuttx/blob/master/arch/arm/src/a1x/a1x_pio.c)
- `arch/arm64/src/a64/Make.defs`: Add PIO Driver to Makefile
- `boards/Kconfig`: Add `ARCH_HAVE_LEDS` to PinePhone
- `boards/arm64/a64/pinephone/src/pinephone.h`: Define PinePhone LEDs
- `boards/arm64/a64/pinephone/src/pinephone_boardinit.c`: Start Auto LEDs
- `boards/arm64/a64/pinephone/src/pinephone_bringup.c`: Start User LEDs
- `boards/arm64/a64/pinephone/src/Makefile`: Add LED Driver to Makefile
- `boards/arm64/a64/pinephone/configs/nsh/defconfig`: Add `CONFIG_USERLED` to `nsh` config
- `arch/arm64/src/a64/a64_pio.c`, `a64_pio.h`: Allwinner A64 PIO Driver
- `arch/arm64/src/a64/hardware/a64_memorymap.h`: PIO Memory Map
- `arch/arm64/src/a64/hardware/a64_pio.h`: PIO Definitions
- `boards/arm64/a64/pinephone/include/board.h`: Define PinePhone LEDs
- `boards/arm64/a64/pinephone/src/pinephone_autoleds.c`: Driver for Auto LEDs
- `boards/arm64/a64/pinephone/src/pinephone_userleds.c`: Driver for User LEDs
- `introduction/supported_platforms.rst`: Add Allwinner A64 as Supported Platform
- `platforms/arm/a64/boards/pinephone/index.rst`: Add PIO and LEDs to PinePhone
Config option IMXRT_ADCx_ETC can now be used to select an external HW
trigger to be used instead of continous trigger. Continous trigger is
used if IMXRT_ADCx_ETC = -1 (default option). Otherwise the source signal
is routed through XBAR and used as a trigger.
Hardware triggering is currently limited to maximum of 8 channels.
HW trigger is automatically disabled if there are more than 8 channels.
The external triggering was tested with PWM signal as a source.
Signed-off-by: Michal Lenc <michallenc@seznam.cz>
documentation: Fixed typos in ESP32 Secure Boot section
documentation/esp32: Improved note about the MCUboot port
documentation/esp32: Improved instructions in Secure Boot section
documentation/esp32: Fix information in Secure Boot section
documentation/esp32: Added info in Secure Boot section
documentation/esp32: Fix Secure Boot Instructions
This commit allows the PWM modules to be synchronized by an external
signal (other PWM module for example). The sync source can be selected
from configuration.
PWM module can also now generate a trigger when its timer reaches the duty
cycle. This trigger is used for the synchronization of other modules. It
can also be used for triggering ADC for example in the future.
Thanks to Rastislav Pavlanin and Jan Spurek from NXP support for
suggestion which helped to solve the inter-module PWM synchronization
task.
Signed-off-by: Michal Lenc <michallenc@seznam.cz>
In order to better test the lcdddev driver and framebuffer, newer
board configs (for the TTGO T-Display and for the simulator) were
added.
Adjusted references of the sim:lvgl_(fb/lcd) config.
