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364 Commits

Author SHA1 Message Date
Paul A. Patience
c800841632 Added definitions for STM32F303K6, STM32F303K8, STM32F303C6, 
STM32F303C8, STM32F303RD, and STM32F303RE devices.
 2015-08-17 14:00:49 -04:00
Gregory Nutt
348060f5d2 SAMV7: Add QSPI Register Definition Header File 2015-08-14 18:11:01 -06:00
Anton D. Kachalov
f10b7ff09a Merge branch 'master' of https://bitbucket.org/nuttx/arch 2015-08-10 18:14:49 +03:00
Anton D. Kachalov
46444388fa Add Shared IRQ support for UART w/multi port. 
Signed-off-by: Anton D. Kachalov <mouse@yandex-team.ru>
 2015-08-10 18:13:35 +03:00
Gregory Nutt
f986d08515 SAMV71: Fix error in GPIO interrupt numbering 2015-08-05 08:57:05 -06:00
Gregory Nutt
23ed19c514 Clean-up from last commit to make sure that all files have BSD licensed header with the correct authors and that the code conforms to the NuttX coding style 2015-07-29 13:52:23 -06:00
Anton D. Kachalov
75762f1519 Add support for MoxaRT 2015-07-29 19:13:47 +03:00
David Sidrane
778c630c6b Add support for the STM32446. From David Sidrane 2015-07-22 07:26:53 -06:00
David Sidrane
e36ca25c5c STM32: Fix incorrect naming of inclusion guard in IRQ header files 2015-07-21 12:25:15 -06:00
David Sidrane
e7d039ac2b STM32: Fix incorrect naming of inclusion guard in IRQ header files 2015-07-21 11:30:45 -06:00
Gregory Nutt
9c284bb05f Syscall fixes: Add support for Cortex-M7; mount syscall has to be suppressed if there are no mountable file systems 2015-07-21 11:20:46 -06:00
Gregory Nutt
5f9b0b3a2f STM32 F7: Add USART/UART register definition 2015-07-18 15:58:59 -06:00
Gregory Nutt
12f04f8500 STM32 F7: Add heap initializatino logic; Clone the STM32 CCM allocator as the F7 DTCM allocator 2015-07-18 12:52:24 -06:00
David Sidrane
5e1a50c93e STM32: Oops. Some STM32 F7 edits accidentally went into STM32 files ;(. Fixed by David Sidrane 2015-07-18 11:05:44 -06:00
Gregory Nutt
4f307ba36a STM32F7: Clone GPIO support from the STM32 F4 2015-07-18 08:34:07 -06:00
Gregory Nutt
7eb5e7f9ec STM32F746G-DISCO: Getting closer to a build 2015-07-17 11:47:16 -06:00
Gregory Nutt
a7a7ec8850 STM32 F7: Misc naming fixes 2015-07-16 19:49:20 -06:00
Gregory Nutt
3583f8c1dc STM32 F7: Add more configuration selections 2015-07-16 18:30:40 -06:00
Gregory Nutt
d8915e9dc6 Add include/chip.h definitions and configuration support for the STM32 F7 2015-07-16 08:47:25 -06:00
Gregory Nutt
be16a06857 Create a src directory for the STM32F7 (not much in it yet) 2015-07-15 14:32:28 -06:00
Gregory Nutt
1ed5f5a3ed STM32: Move STM32F42xxx IRQ definitions out of stm32f40xxx_irq.h into their own stm32f42xxx_irq.h header file 2015-07-15 13:52:20 -06:00
Gregory Nutt
3efe60bb6d STM32 F7: Add interrupt vector definitions 2015-07-15 10:54:03 -06:00
Gregory Nutt
4a38276ff9 SAMD21: Extend SAMD USART support to include SAMD21 differences 2015-06-21 09:17:01 -06:00
Gregory Nutt
28ae44eb02 SAMD21: Add memory map header file 2015-06-20 15:02:25 -06:00
Gregory Nutt
66a960dacd SAMD21: Add interrupt vectors definitions 2015-06-20 14:40:47 -06:00
Gregory Nutt
15c8e2e00a SAMD21: Add interrupt vectors definitions 2015-06-20 14:40:36 -06:00
Gregory Nutt
d00ed2d780 Add configuration support for SAMD21 2015-06-20 14:31:53 -06:00
Gregory Nutt
75077f4728 SAML21: Add DMA descriptor management logic 2015-06-14 08:48:25 -06:00
Gregory Nutt
8c8b2d926b SAMD21: Add build framework for DMA support. Nothing there yet except for skeletal logic taken from SAM3/4. 2015-06-13 15:06:37 -06:00
Gregory Nutt
29136e51cc Clean up and review of header files for conformance to standards 2015-06-12 19:26:01 -06:00
Gregory Nutt
d6ce8220fd Clean up and review of header files for conformance to standards 2015-06-12 18:07:47 -06:00
Gregory Nutt
0742ee3c3e Add support for MK20DN--VLH5 and MK20DX---VLH5. Needed for backward compatible support for Teensy-3.0 2015-06-10 11:45:17 -06:00
Gregory Nutt
f01c04f1a7 Add support for other members of the Kinetis MK20DX---VLH7 family; undate a README 2015-06-09 18:01:32 -06:00
Gregory Nutt
0c59dd2888 Fix a missing # in the previous commit 2015-05-31 13:26:13 -06:00
Gregory Nutt
4e811aa54d Add basic support for the STM32F205RG. From SourceForge Ticket 40 (anonymous). 2015-05-31 13:06:26 -06:00
Gregory Nutt
318345fb1d Basic support for the Kinetis K20 architecture. Taken from PX4. This is the work of Jakob Odersky. 2015-05-26 15:03:35 -06:00
Gregory Nutt
9140a0fcc4 Initial support for the NXP LPC11 family and the LPC1115 MCU in particular. Contributed by Alan Carvalho de Assis. 2015-05-22 14:14:09 -06:00
Gregory Nutt
4458a34787 SAML21: Add interrupt header file + fix a few initial compile issues. Still a long way to go 2015-05-18 17:41:28 -06:00
Gregory Nutt
5ba5b5e24b SAML21: Add configuration logic and placeholders for memory man and pin configruation header files 2015-05-14 14:02:50 -06:00
Gregory Nutt
3ec627b02d Rename SAMD directories and configuration variables to SAMDL so that the same build environment can support the SAML 2015-05-14 12:25:09 -06:00
Gregory Nutt
10bfcaf939 Fix typo in arch/arm/include/kl/chip.h header file. From Michael Hope 2015-05-12 07:05:29 -06:00
Gregory Nutt
aaaa8f2e9d Adds support for STM32F302K8 and STM32F302K6. From Ben Dyer via PX4/David Sidrane. 2015-05-08 14:10:55 -06:00
Gregory Nutt
8062555384 Add support for the KL25Z64. The KL25Z64 is a lower memory variant of the KL25Z128 and is used on the Teensy LC. From Michael as SourceForge patch 50. 2015-05-07 06:47:17 -06:00
Gregory Nutt
d77a19f0a2 Two r's and only two r's in the word interrupt 2015-04-23 14:04:43 -06:00
Gregory Nutt
7a6a5b7bd0 Defines a second interface for the dma2d controller. Controlling both LTDC and DMA2D was unpractical from the programmers view because both controllers are to different. LTDC only controls the display visibility but the DMA2D controller changes the content of the frame buffer (buffer of the layer). 
The main features are:

1. DMA2D interface
   Supports the nuttx pixel formats:
   - FB_FMT_RGB8
   - FB_FMT_RGB24
   - FB_FMT_RGB16_565
   Dynamic layer allocation during runtime for the supported formats
   - The number of allocatable layer can be configured.
   Supported dma2d operation:
   - blit (Copy content from source to destination layer) also works with
     selectable area.
   - blend (Blend two layer and copy the result to a destination layer wich can
     be a third layer or one of the source layer) also works with selectable
     area.
   - fillarea (Fill a defined area of the whole layer with a specific color)

As a result of that the dma2d controller can't transfer data from the core coupled memory, CCM is disabled but usable by the ccm allocator. Currently the ccm allocator is used for allocating the layer structurei only. For the dma memory (layers frame buffer) memory is allocated from heap 2 and 3.

2. LTDC interface

   I have changed the api for the currently non implemented operations:
   - blit (Copy content from a dma2d layer to an ltdc layer) also works with
     selectable area.
   - blend (Blend two dma2d layer and copy the result to a destination ltdc
     layer) also  works with selectable area.

     Note! ltdc layer is a layer referenced by the ltdc interface. dma2d layer
     is a layer referenced by the dma2d interface.

     One of the most important questions for me was, How can i flexible use an
     ltdc layer with the dma2d interface, e.g. as source layer for dma2d
     operations?
     Get the layer id of the related dma2d layer by a special flag when using
     getlid() function of the ltdc interface and use the layer id to reference
     the specific dma2d layer by the dma2d interface.

     The ltdc coupled dma2d layers are predefined and can't be dynamically
     allocated of freed. They use the same frame buffer memory and the same
     color lookup table.

   Changes:
   - layer internal format of the clut table
   - interrupt handling for register reload (vertical vblank) instead using
     waiting loop
   - small fixes and refactoring

From Marco Krahl.
 2015-04-16 09:11:52 -06:00
Gregory Nutt
ae15c6963c Make some file section headers more consistent with standard 2015-04-08 08:04:12 -06:00
Gregory Nutt
cf8f8b8c4a SAMV6 USB updates 2015-03-26 09:49:01 -06:00
Gregory Nutt
a590bdc737 SAMV7: Quick'n'dirty port of the SAMA5D4 Ethernet MAC driver to the SAMV7. Still some unresovled issues with DCache handling 2015-03-16 13:51:37 -06:00
Gregory Nutt
8f59fc8f64 SAMV7: Quick'n'dirty port of the SAMA5 HSMCI driver to the SAMV7 2015-03-12 18:03:41 -06:00
Gregory Nutt
0d79e315fd SAMV71: Quick'n'dirty port of the SAMA5 SSC driver to the SAM7. The IP is compatible but there are still some DMA- and Cache-related issues that need to be worked out. 2015-03-12 16:00:38 -06:00