sergiotarxz/nuttx
1
0
Fork 0
Code Issues Pull Requests Releases Wiki Activity
32,735 Commits 1 Branch 0 Tags 291 MiB
81c6bda341
Commit Graph

566 Commits

Author SHA1 Message Date
Bob Feretich
fab5faf097 STM32F7: Completes architecture support for the STM32 F72x and F73x families. Adds support for the Nucleo-144 boards with STM32F722. 2017-11-18 07:55:50 -06:00
Bob Feretich
13b52da3fa stm32 f72xx and f73xx: Add register definition header files and clocking logic 2017-11-17 07:18:02 -06:00
Gregory Nutt
08fa834a6a arch/arm/include/stm32 and stm32f7: Remove ltdc.h and dma2d.h. Those header files in that location permitted inclusion into application space logic and, hence, facilitated and encouraged calling into the OS and violating the portable POSIX OS interface. The definitions in those header files were move the appropriate location in the counterpart, architecture specific files at arch/arm/src/stm32 and stm32f7 dma2d.h and ltdc.h. 
configs/stm32f429i-disco/ltdc:  This configuration has been deleted because it violated the portable POSIX OS interface.  It used apps/examples/ltdc and include ltdc.h and dma2d.h which were also removed for the same reason.
 2017-11-06 12:22:48 -06:00
Gregory Nutt
25079a9c93 BCM2708: Fleshes out GPIO interrupt logic. 2017-10-18 10:13:10 -06:00
Gregory Nutt
851fa7ba85 BCM2708: Fixes off system timer logic for the Pi Zero. 2017-10-17 14:53:11 -06:00
Gregory Nutt
0fc8978a90 Pi Zero: Add GPIO module header file. 2017-10-17 07:37:44 -06:00
Gregory Nutt
270aa2848a Squashed commit of the following: 
BCM2708:  Add enough infrastructrue (more stubs) to get a clean compilation of the Pi Zero configuration (with many undefined things at link time).

    BCM2708:  Add basic interrupt handling logic

    BCM2708: Add interrupt register definitions.

    BCM2708:  Add irq.h header file

    BCM2708/Pi zero:  bcm_boot.c and bcm_memorymap.h now compile.  Added pizero linker script.

    BCM2708/Pi Zero:  Add Make.defs needed to build.

    arch/arm/include/bcm2708, arch/arm/src/bcm2708, configs/pizero:  Add some basic build and configuration logic.

    configs/pizero:  Add some basic structure of the Rasperry Pi Zero port.

    Created directory configs/pizero.  Nothing there now but a README.txt file.

    Add initial boot.c and memorymap.c files
    Author: Alan Carvalho de Assis <acassis@gmail.com>

    Add AUX/UART/SPI registers definition
    Author: Alan Carvalho de Assis <acassis@gmail.com>

    Pizero GPIO registers
    * Initial commit to add GPIO definitions
    * Add remaining GPIO registers definition
    Alan Carvalho de Assis <acassis@gmail.com>

    BCM2708 memory map:  Add VBASE defintions; fix VCSDRAM address per Alan; move all virtual address to the bottom of the file to avoid confusion -- top is all physical address; bottom is all veritural address.

    Add initial memory map to BCM2708/BCM2835
    Alan Carvalho de Assis <acassis@gmail.com>
 2017-10-09 13:11:17 -06:00
Alan Carvalho de Assis
81d6cefd65 Add support to STM32F433RC 2017-08-28 07:05:32 -06:00
Juha Niskanen
37867ae3b9 chip.h edited online with Bitbucket: correct some STM32_NDAC 2017-08-21 07:30:58 +00:00
raiden00pl
0bed6ac8b4 STM32F33: correct STM32_NDAC 2017-08-20 20:07:50 +02:00
Gregory Nutt
42b3ee4cfc Fix a few errors that crept in with my review changes. 2017-08-02 09:19:29 -06:00
Gregory Nutt
5f2d4b8f84 Changes from review of commit e851a24329 2017-08-02 08:26:08 -06:00
Masayuki Ishikawa
e851a24329 arch/arm/src/lc823450: Initial support for ON Semiconductor LC823450 
Signed-off-by: Masayuki Ishikawa <Masayuki.Ishikawa@jp.sony.com>
 2017-08-02 21:09:43 +09:00
Titus von Boxberg
28eab902d0 No FSMC, only FMC for STM32F7 2017-07-27 18:27:01 +02:00
Gregory Nutt
c3b552e072 Minor cosmetic updates from review of last PR. 2017-07-20 07:39:57 -06:00
Titus von Boxberg
ea703b832a copied from stm32 2017-07-19 19:07:53 +02:00
Gregory Nutt
47be509d79 Rename CONFIG_STM32_STM32F40XX to CONFIG_STM32_STM32FXXXX since it is used by F4 parts other than F40x 2017-07-06 10:20:14 -06:00
Gregory Nutt
1c5ec07414 arch/: Remove dangling space at the end of lines. 2017-06-28 13:16:48 -06:00
Gregory Nutt
8b907c4c1f STM32L4: Fix a typo 2017-06-08 11:07:20 -06:00
Gregory Nutt
95fcdff1fd STM32L4: Add STM32L475 RCC definitions/logic. 2017-06-08 10:04:28 -06:00
Gregory Nutt
66e2247f30 STM32L4: Ad support for the STM32L475 family. Incomplete -- still needs pinmap, rcc, otgfs, syscfg 2017-06-08 08:52:09 -06:00
Gwenhael Goavec-Merou
02535be36a STM32F410. Add support for STM32Fr10. STM32F410 is a version of STM32F4 with 32 KB of RAM and 62 or 128 KB of flash. 2017-05-13 08:40:09 -06:00
Gregory Nutt
0de294a586 Fix lots of occurrences of 'the the', 'the there', 'the these', 'the then', 'the they. 2017-05-11 13:35:56 -06:00
Juha Niskanen
35883ff9ae Merged in juniskane/nuttx_stm32l4/l4dev (pull request #347) 
STM32L4: add support for many new MCUs from STM32L4X3XX product line and Nucleo-L452 board

Approved-by: Gregory Nutt <gnutt@nuttx.org>
 2017-05-05 15:31:07 +00:00
David Sidrane
2171523f50 Kinetis:Add TPM to K66 chip 2017-05-05 07:12:52 -06:00
Juha Niskanen
ae22eb224a STM32L4: changes needed for STM32L452 and Nucleo-L452RE board 
GPIO and UART seem similar across STMicro product matrix,
so renamed files accordingly. RCC is cloned just in case,
while conflicting differences there seem to be very minor.
 2017-05-04 15:23:38 +03:00
Juha Niskanen
a59b7bc932 STM32L4: add GPIO_PORTI definition 
Signed-off-by: Juha Niskanen <juha.niskanen@haltian.com>
 2017-05-02 07:41:14 -06:00
Juha Niskanen
b4d2651ca9 STM32L4: stm32l4_i2c: add I2C4 code 2017-04-28 08:09:16 -06:00
Juha Niskanen
f1b71e3ae7 TM32L4: Add some defines for the new peripherals in STM32L496 parts 2017-04-27 07:26:32 -06:00
Juha Niskanen
8a6662c957 TM32L4: Add some defines for the new peripherals in STM32L496 parts 2017-04-27 07:25:20 -06:00
Juha Niskanen
06e4c4aedd STM32L4: add support for the STM32L496XX family 2017-04-25 08:47:50 -06:00
Juha Niskanen (Haltian)
c04c49dac0 Add support for the STM32F09X family. 2017-04-21 08:23:25 -06:00
Gregory Nutt
73c7f05a3c Cosmetic changes to spacing and comments. 2017-04-20 14:08:08 -06:00
Gregory Nutt
d0ec395c42 Correct some spacing and some unused definition in some irq.h header files. 2017-04-20 12:39:21 -06:00
Juha Niskanen
9d0ecedf7d Add support for STM32L152CC, STM32L152RC and STM32L152VC. Update some bits and comments for other STM32L1 parts in chip.h 2017-04-20 06:30:26 -06:00
Gregory Nutt
27e212a291 Nucleo-F072RB: Various fixes to get the first clean build. 2017-04-18 10:37:05 -06:00
Gregory Nutt
8b157b034d STM32F0: Fixes to get STM32F0-Discovery build again after changes to support the STM32F07x 2017-04-17 17:13:32 -06:00
Gregory Nutt
2c01aaad59 STM32F0: Add basic support for STM32F07x family 2017-04-17 16:54:07 -06:00
Gregory Nutt
c910334ced Make sure that Alan is listed as author in new files. 2017-04-14 08:34:37 -06:00
Alan Carvalho de Assis
c3e0ec369f Add basic support for STM32F0 2017-04-14 08:34:36 -06:00
Juha Niskanen
e320e5c100 STM32: add STM32L162VE to chip.h 2017-04-03 07:59:11 -06:00
David S. Alessio
7f2c4c4274 XMC4xxx: Add FPU support 2017-03-22 12:04:32 -06:00
Gregory Nutt
805a4f65e9 XMC4xxx: Fixes to HIB domain setup, GPIO pin configuration. 2017-03-21 09:31:44 -06:00
Gregory Nutt
886dadae0a XMC4xxx: Minor updates to naming and comments 2017-03-20 18:10:23 -06:00
Gregory Nutt
b9e29d1083 XMC4xxx: Clean up memory map 2017-03-20 17:08:09 -06:00
Gregory Nutt
4ba091933e XMC4xxx: Fix for early bringup problems 2017-03-20 16:31:35 -06:00
Gregory Nutt
5c0be816a5 XMC4xxx: Add commin USIC support logic for use in all USIC configurations. 2017-03-19 12:48:37 -06:00
Gregory Nutt
5693f26a5e XMC4xx: Fix several early compilation problems. 2017-03-16 11:30:02 -06:00
Gregory Nutt
2430049e3b arch/arm/include/xmc4: More support for Infineon XMC4xxx arch. Still incomplete. 2017-03-14 13:04:09 -06:00
ahb
67c86e5aa9 add LPC4337FET256 2017-03-09 10:30:28 +01:00
Gregory Nutt
ac6e552ff7 Fixes for coding standard: '*' needs to 'snuggle' with following variable name 2017-02-28 18:37:44 -06:00
Gregory Nutt
2e0ffc0ea3 Update some comments. 2017-02-26 09:15:57 -06:00
raiden00pl
3175b74428 Add basic support for the STM32F334 2017-02-26 12:39:44 +01:00
David Sidrane
61b10c5e58 Kinetis:Add LPUART to K66 chip 
Add KINETIS_NLPUART setting it to 1 and adjust KINETIS_NUART
  to removed UART5 as the K66 dioes not have UART5
 2017-02-25 07:02:56 -10:00
David Sidrane
1ba6eadcec Kinetis:Include the PMC features 2017-02-22 10:42:52 -10:00
David Sidrane
8525c266a1 Created a kinetis PMC versioning scheme pulled in by Kinetis chip.h 
The motvations is to version the IP blocks of the Kinetis
     K series family of parts.

     This added versioning and configuration features for the
     Kinetis PMC IP block.

     It is envisioned that in the long term as a chip is added.
     The author of the new chip definitions will either find
     the exact configuration in an existing chip define and
     add the new chip to it Or add the PMC fature configuration
     #defines to the chip ifdef list in
     arch/arm/include/kinetis/kinetis_pmc.h  In either case the
     author should mark it as "Verified to Document Number:"
     taken from the reference manual.

     The version KINETIS_PMC_VERSION_UKN has been applied to
     most all the SoCs in the kinetis arch prior to this commit.

     The exceptions are the CONFIG_ARCH_CHIP_MK60FN1M0VLQ12,
     CONFIG_ARCH_CHIP_MK20DXxxxVLH7 All K64 and K66 have ben
     Verified PMC configurations.
 2017-02-22 10:42:52 -10:00
David Sidrane
5b550a37eb Kinetis:Include the SIM features 2017-02-22 10:42:52 -10:00
David Sidrane
d74f16ecb9 Kinetis:Created a kinetis SIM versioning scheme pulled in by Kinetis chip.h 
The motvations is to version the IP blocks of the Kinetis
   K series family of parts.

   This added versioning and configuration features for the
   Kinetis SIM IP block.

   It is envisioned that in the long term as a chip is added.
   The author of the new chip definitions will either find
   the exact configuration in an existing chip define and
   add the new chip to it Or add the SIM feature configuration
   #defines to the chip ifdef list in
   arch/arm/include/kinetis/kinetis_sim.h  In either case the
   author should mark it as "Verified to Document Number:"
   taken from the reference manual.

   The version KINETIS_SIM_VERSION_UKN has been applied to
   most all the SoCs in the kinetis arch prior to this commit.

   The exceptions are the CONFIG_ARCH_CHIP_MK60FN1M0VLQ12,
   All K64 and K66 which not have Verified SIM configurations.
 2017-02-22 10:42:52 -10:00
David Sidrane
14bdf3af22 Kinetis:Fixed Typo in kinetis_mcg header 2017-02-22 10:42:52 -10:00
Gregory Nutt
e803e2c3f4 Costmetic changes from review of last PR. 2017-02-07 17:16:56 -06:00
David Sidrane
ff056cf9bd arch/arm/include/kinetis/kinetis_mcg.h 2017-02-07 12:38:28 -10:00
David Sidrane
2216ed52a9 Kinetis chip Adding K66 and inlcuding MCG versioning 
This includes arch/arm/include/kinetis/kinetis_mcg.h
  to bring in the MCG versioning and defines the KINETIS_K66
  family for the added SoCs:

   --------------- ------- --- ------- ------- ------ ------ ------ -----
   PART NUMBER     CPU     PIN PACKAGE  TOTAL  PROGRAM EEPROM SRAM  GPIO
                   FREQ    CNT          FLASH  FLASH
   --------------- ------- --- ------- ------- ------ ------ ------ -----
   MK66FN2M0VMD18  180 MHz 144 MAPBGA   2   MB    —    — KB  260 KB 100
   MK66FX1M0VMD18  180 MHz 144 MAPBGA  1.25 MB  1 MB   4 KB  256 KB 100
   MK66FN2M0VLQ18  180 MHz 144 LQFP     2   MB    —    — KB  260 KB 100
   MK66FX1M0VLQ18  180 MHz 144 LQFP    1.25 MB  1 MB   4 KB  256 KB 100
 2017-02-07 12:38:28 -10:00
David Sidrane
ec567371b6 Created a kinetis MCG versioning scheme pulled in by Kinetis chip.h 
The motvations is to version the IP blocks of the Kinetis
   K series family of parts.

   This added versioning and configuration features for the
   Kinetis MCG IP block.

   It is envisioned that in the long term as a chip is added.
   The author of the new chip definitions will either find
   the exact configuration in an existing  chip define and
   add the new chip to it Or add the MCG feature configuration
   #defines to the chip ifdef list in
   arch/arm/include/kinetis/kinetis_mcg.h  In either case the
   author should mark it as "Verified to Document Number:"
   taken from the reference manual.

   The version KINETIS_MCG_VERSION_UKN has been applied to
   most all the SoCs in the kinetis arch prior to this commit.

   The exceptions are the CONFIG_ARCH_CHIP_MK60FN1M0VLQ12,
   All K64 and K66 which not have Verified MCG configurations.
 2017-02-07 12:38:28 -10:00
Gregory Nutt
9395704192 Kinetis, not Kinetics. 2017-02-07 08:20:52 -06:00
Wolfgang Reißnegger
a22dc9b1a8 SAM3/4: Add support for ATSAM4S4C. 2017-01-18 11:56:51 -08:00
Maciej Skrzypek
902c41462d Kinetis: New K60 has no Flex memory 2017-01-13 08:20:48 -06:00
Maciej Skrzypek
4becebe59f Kinetis: Fixed wrong MCG VDIV calculation on new NXP K60 2017-01-13 08:13:21 -06:00
Maciej Skrzypek
bc1826da63 Kinetis: Added CHIP_MK60FN1M0VLQ12 chip 2017-01-13 08:10:03 -06:00
Gregory Nutt
12148f0e33 Merged in paulpatience/nuttx/stm32 (pull request #180) 
STM32: Forgot to update chip.h for STM32F303x[BC]'s 4 ADCs
 2016-12-24 20:20:39 -06:00
Gregory Nutt
f063e4c5ac Remove Calypso architecture support and support for Calypso SERCOMM driver. 2016-12-13 18:35:52 -06:00
Gregory Nutt
26560cb9e1 i.MX6: Remove non-cached, inter-cpu memory region. Not a useful concept. 2016-12-13 16:59:50 -06:00
Paul A. Patience
30bbeb6c1f STM32: Forgot to update chip.h for STM32F303x[BC]'s 4 ADCs 2016-12-08 16:31:39 -05:00
Sebastien Lorquet
db24f237d7 STM32L4: Correct USART1/2 definitions. Use default mbed UART4 settings 2016-12-01 09:00:59 -06:00
Gregory Nutt
3353d9280f i.MX6: Disable non-cached region support. Add SCU register definitions. 2016-11-26 17:03:57 -06:00
Gregory Nutt
6ff6da083f Fix a few compile related issues from the last commit 2016-11-26 12:23:09 -06:00
Gregory Nutt
aae306e942 i.MX6 SMP: Inter-CPU data no saved in a non-cacheable region. 2016-11-26 12:04:02 -06:00
Gregory Nutt
f53e48199f Simplify and document some macros 2016-11-21 13:12:43 -06:00
Gregory Nutt
558784d06f Spinlocks: Added capability to provide architecture-specific memory barriers. This was for i.MX6 but does not help with the SMP problems. It is still a good feature. 2016-11-21 11:55:59 -06:00
Paul A. Patience
912fe06a86 Add architecture-specific inttypes.h 2016-10-27 16:01:38 -04:00
Marc Rechte
483f012600 Initial implemention of the STM32 F37xx SDADC module. There are also changes to ADC, DAC modules. SDADC has only been tested in DMA mode and does not support external TIMER triggers. This is a work in progress. 2016-10-25 14:14:10 -06:00
Gregory Nutt
48fb97e7b5 More of the same cloned typo 2016-10-19 10:11:45 -06:00
David Sidrane
bce382da52 Kinetis Support ARMV7 Common Vector and FPU 2016-10-18 12:00:01 -10:00
Gregory Nutt
56f2454c86 Fix names of pre-processor variables used in header file idempotence 2016-08-06 18:48:45 -06:00
Gregory Nutt
e6137ff129 Rename SAMD/L version of CONFIG_GPIO_IRQ to CONFIG_SAMDL_GPIOIRQ 2016-07-22 14:38:33 -06:00
Gregory Nutt
360efe03c1 Rename LP17xx version of CONFIG_GPIO_IRQ to CONFIG_LPC17_GPIOIRQ 2016-07-22 14:18:30 -06:00
Gregory Nutt
7a7998e4f9 Add support for the NXP Freedom-K64F board. This is primarily the work of Jordan Macintyre. I leveraged this code from https://github.com/jmacintyre/nuttx-k64f 2016-07-01 15:42:21 -06:00
Gregory Nutt
91dd3306c8 arch/arm/src/kinetis: Add basic support for the K64 family. Still moving register definition files to the kinetis/chip subdirectory. 2016-07-01 11:24:41 -06:00
David Sidrane
2de4ec2a47 Added as an author 2016-06-17 12:38:17 -10:00
Gregory Nutt
1cdc746726 Rename CONFIG_DEBUG to CONFIG_DEBUG_FEATURES 2016-06-11 14:14:08 -06:00
Konstantin Berezenko
b9e7b4ed70 Correct the can2 rx irq number for stm32f10xx chips 2016-06-10 10:52:58 -07:00
David Sidrane
d8ea955d69 Added STM32FF76xxx and STM32FF7xx families 2016-06-08 08:26:26 -06:00
Konstantin Berezenko
3fc7b6f0e5 Add stm32f105r support 2016-06-06 12:52:41 -07:00
Paul A. Patience
56b018d5db STM32: Fix typo 2016-06-06 12:02:11 -04:00
Gregory Nutt
f06a06952f LPC43xx: 1KB is 1024, not 1025. Noted by phreakuencies. 2016-05-31 06:22:10 -06:00
Konstantin Berezenko
5c6cd17d46 Add support for SPI 4 and 5 on stm32f411 chips 2016-05-27 11:08:18 -07:00
Gregory Nutt
4a63a7760a STM32: Hook 1-Wire driver into the build system 2016-05-25 12:31:32 -06:00
Alexander Vasiljev
ad6f37edfa Adds definitions for the LPC4337jet100 chip. 2016-05-24 07:03:50 -06:00
Konstantin Berezenko
a2253cdd3e Add basic configuration for stm32f411e-disco board with STM32F411VE chip 2016-05-20 16:38:25 -07:00
Aleksandr Vyhovanec
472115eda9 ARMv7-M: Add support for the IAR compiler 2016-04-02 08:14:09 -06:00
Gregory Nutt
e0249bd025 STM32L4: Fix incorrect and conflicting definitions for STM32L4_NGPIOS and STM32L4_NGPIO_PORTS. Now there is only STM32L4_NPORTS. 2016-03-20 14:12:07 -06:00