Commit Graph

15149 Commits

Author SHA1 Message Date
David Sidrane
a3bea40c46 Merged in david_s5/nuttx/master_h7 (pull request #1025)
stm32h7: bbsram issues causing no writes and  hardfaults

* stm32_pwr:Ensure data is flushed on backup domain access changes

* stm32h7:bbsram convince compiler to perform 32 bit write

Approved-by: Gregory Nutt <gnutt@nuttx.org>
2019-08-26 18:34:25 +00:00
Alin Jerpelea
3806a01c5d Merged in alinjerpelea/nuttx (pull request #1024)
noards: arm: cxd56xx: migrate common code

* boards: arm: cxd56xx: common: move boot to common

    This is a common function and can be reused by all boards.

    Signed-off-by: Alin Jerpelea <alin.jerpelea@sony.com>

* boards: arm: cxd56xx: common: move flash to common

    This is a common function and can be reused by all boards.

    Signed-off-by: Alin Jerpelea <alin.jerpelea@sony.com>

* boards: arm: cxd56xx: common: move I2C driver to common

    This is a common function and can be reused by all boards.

    Signed-off-by: Alin Jerpelea <alin.jerpelea@sony.com>

* boards: arm: cxd56xx: common: move uid to common

    This is a common function and can be reused by all boards.

    Signed-off-by: Alin Jerpelea <alin.jerpelea@sony.com>

* boards: arm: cxd56xx: common: move usbmsc to common

    This is a common function and can be reused by all boards.

    Signed-off-by: Alin Jerpelea <alin.jerpelea@sony.com>

* arch: arm: cxd56: add SPH

    The SPH is used by the ASMP implementation from the SDK.

    Signed-off-by: Alin Jerpelea <alin.jerpelea@sony.com>

Approved-by: Gregory Nutt <gnutt@nuttx.org>
2019-08-26 14:29:55 +00:00
Bernd Walter
f9e80c4a1e arch/arm/src/samd2l2/sam_i2c_master.c: Correct time calculation. 2019-08-26 08:08:56 -06:00
Michael Jung
decd07725f arch/arm/src/stm32/stm32_spi.c: TI Synchronous Serial Frame Format. The SPI macros on STM32 MCUs do support the Texas Instruments Synchronous Serial Frame Format protocol (TI protocol). Defined a new SPIDEV_MODETI and add support for it in stm32_spi.c. 2019-08-25 09:07:09 -06:00
Michael Jung
b395cde043 arch/arm/src/stm32: PLLI2S support for F427/F437. Enable support of the I2S Phase Locked Loop on STM32F427 and STM32F437 MCUs. 2019-08-25 09:01:35 -06:00
David Sidrane
e2d76e21d5 Merged in david_s5/nuttx/master_h7_typo (pull request #1023)
stm32h7:Memory Map DBGMCU is @ 0x5c001000

Fixtypo

Approved-by: Gregory Nutt <gnutt@nuttx.org>
2019-08-24 11:27:23 +00:00
David Sidrane
c7dab20318 Merged in david_s5/nuttx/master_h7 (pull request #1022)
stm32h7:Memory Map DBGMCU is @ 0x5c001000

Approved-by: Gregory Nutt <gnutt@nuttx.org>
2019-08-23 22:00:43 +00:00
Gregory Nutt
b3d609959c arch/arm/src/s32k1xx/hardware/s32k1xx_flexcan.h: Add an incomplete FlexCAN register definition header file. Still missing some bitfield definition. Also updates some README files. 2019-08-23 07:35:49 -06:00
Alin Jerpelea
6ecee7e403 Merged in alinjerpelea/nuttx (pull request #1021)
boards: cxd56xx: add SCU sensors (2/2)

* boards: cxd56xx: add cxd56_bh1721fvc initialization

    We are adding the sensor initialization for cxd56xx boards in the
    common board folder.

    Signed-off-by: Alin Jerpelea <alin.jerpelea@sony.com>

* boards: cxd56xx: add cxd56_bh1745nuc initialization

    We are adding the sensor initialization for cxd56xx boards in the
    common board folder.

    Signed-off-by: Alin Jerpelea <alin.jerpelea@sony.com>

* boards: cxd56xx: add cxd56_bm1383glv initialization

    We are adding the sensor initialization for cxd56xx boards in the
    common board folder.

    Signed-off-by: Alin Jerpelea <alin.jerpelea@sony.com>

* boards: cxd56xx: add cxd56_bm1422gmv initialization

    We are adding the sensor initialization for cxd56xx boards in the
    common board folder.

    Signed-off-by: Alin Jerpelea <alin.jerpelea@sony.com>

* boards: cxd56xx: add cxd56_bmi160 initialization

    We are adding the sensor initialization for cxd56xx boards in the
    common board folder.

    Signed-off-by: Alin Jerpelea <alin.jerpelea@sony.com>

* boards: cxd56xx: add cxd56_bmp280 initialization

    We are adding the sensor initialization for cxd56xx boards in the
    common board folder.

    Signed-off-by: Alin Jerpelea <alin.jerpelea@sony.com>

* boards: cxd56xx: add cxd56_kx022 initialization

    We are adding the sensor initialization for cxd56xx boards in the
    common board folder.

    Signed-off-by: Alin Jerpelea <alin.jerpelea@sony.com>

* boards: cxd56xx: add cxd56_lt1pa01 initialization

    We are adding the sensor initialization for cxd56xx boards in the
    common board folder.

    Signed-off-by: Alin Jerpelea <alin.jerpelea@sony.com>

* boards: cxd56xx: add cxd56_rpr0521rs initialization

    We are adding the sensor initialization for cxd56xx boards in the
    common board folder.

    Signed-off-by: Alin Jerpelea <alin.jerpelea@sony.com>

* boards: cxd56xx: add cxd56_sensors initialization

    We are adding the sensor initialization for cxd56xx boards in the
    common board folder.

    Signed-off-by: Alin Jerpelea <alin.jerpelea@sony.com>

* arch: arm: cxd56: add Backup Log driver

    The driver will be used to backup logs on crash.

    Signed-off-by: Alin Jerpelea <alin.jerpelea@sony.com>

* boards: arm: cxd56xx: common: add crashlog driver

    Add Crashlog driver with support for reset on crash

    Signed-off-by: Alin Jerpelea <alin.jerpelea@sony.com>

* boards: arm: cxd56xx: move gs2200m initialization

    Move the board gs2200m initalization to the common board folder

    Signed-off-by: Alin Jerpelea <alin.jerpelea@sony.com>

* boards: arm: cxd56xx: move ili9340 initialization

    Move the board ili9340 initalization to the common board folder

    Signed-off-by: Alin Jerpelea <alin.jerpelea@sony.com>

* boards: arm: cxd56xx: move lpm013m091a initialization

    Move the board lpm013m091a initalization to the common board folder

    Signed-off-by: Alin Jerpelea <alin.jerpelea@sony.com>

* boards: arm: cxd56xx: common: typo fixes

    HEADER: Updates on file location
    Signed-off-by: Alin Jerpelea <alin.jerpelea@sony.com>

Approved-by: Gregory Nutt <gnutt@nuttx.org>
2019-08-23 13:28:35 +00:00
Gregory Nutt
686ef9b317 arch/arm/src/s32k1xx: Clocking logic was including the wrong 'clock name' files for the S32K11x family. 2019-08-22 10:57:28 -06:00
Gregory Nutt
50e56f1d50 arch/arm/src/s32k1xx/Kconfig: Remove a duplicate configuration setting. Noted by Fabio Balzano. 2019-08-22 10:22:40 -06:00
Gregory Nutt
04dda09ed1 arch/arm/src/s32k1xx/Kconfig: Add Ethernet configuration options that were supposed to have been included in a previous commit. 2019-08-21 17:43:36 -06:00
Nathan Hartman
92bf3bfece arch/arm/src/tiva/hardware/tm4c: Fix wrong description on define TIVA_1WIRE_BASE: Was "EEPROM and Key Locker" (same as the item above). Now "1-Wire Master Module." Make DMACTL symbols visible for TM4C123: Remove "#ifdef CONFIG_ARCH_CHIP_TM4C129" guard around UART DMA Control (DMACTL) symbols. These bits are valid on TM4C123 devices, as well as on TM4C129. Also, improve the comment on UART_DMACTL_DMAERR. 2019-08-21 17:41:24 -06:00
Gregory Nutt
962ccb0f68 arch/arm/src/s32k1xx: This is a rough port of the i.MXRT Ethernet driver to the S32K1xx. The i.MXRT uses the same IP. Completely untested at this point. 2019-08-21 17:33:54 -06:00
Gregory Nutt
b4ee19f5bd arch/arm/src/s32k1xx: This commit brings in the LPSPI and LPI2C peripheral drivers from the i.MXRT which used the identical IP.
Squashed commit of the following:

    arch/arm/src/s32k1xx:  Update peripheral input clocking for the way that things are done for the S32K1XX.  Fix other misc. compilation/configuration issues.

    arch/arm/src/s32k1xx:  Clean up LPSPI and LPI2C naming for S32K1XX.  Using S32K1XX clock functions to get peripheral input clock.

    arch/arm/src/s32k1xx:  Clone i.MXRT LPSPI and LPI2C support.  i.MXRT uses the same IP as S32K1XX.
2019-08-21 11:18:40 -06:00
Nathan Hartman
be5a40c656 Fix typos in comments. 2019-08-21 09:32:59 -06:00
Ivan Ucherdzhiev
19c070e0d1 drivers/mmcsd: Added support for MMC(eMMC) bigger than 2 GB (Tested with IMXRT1050EVKB and samsung eMMC 16GB). arch/arm/src/imxrt: IMXRT uSDHC driver cmd line reset logic modified. 2019-08-21 09:23:29 -06:00
Gregory Nutt
c6026d7500 With these changes the S32K146EVB minimal NSH is function. Only verifed while running from SRAM.
arch/arm/src/s32k1xx/s32k1xx_lowputc.c:  Fix a typo that prevented LPUART1 from working.
    arch/arm/src/s32k1xx/s32k1xx_periphclocks.c and related files:  Fix yet another case of confusion between pre-decremented and non-decremented divider values.  Enforce the rule that dividers are not decremented until the moment they are written into registers.
    arch/arm/src/s32k1xx/s32k1xx_clockconfig.c:  Fix another problem related to whether a divider is pre-decremented or not.  The answer must be the divder values are never pre-decremented.  They are decremented just before being written to hardware.
    arch/arm/src/s32k1xx/s32k1xx_clockconfig.c:  Clean up some bad conditional logic.  Precedence of operators problem.
    boards/arm/s32k1xx/s32k118evb:  Add support for execution out of SRAM.  This is helpful for bringup when you want to avoid putting a lethal image in FLASH.
    arch/arm/src/s32k1xx/s32k1xx_clockconfig.h:  Remove crystal frequency, it is not used.
    arch/arm/src/s32k1xx/s32k1xx_wdog.h:  Fix a typo in a register name.i
    boards/arm/s32k1xx/s32k*evb/configs/nsh/defconfig:  Create Motorola SREC output format.
2019-08-20 14:35:36 -06:00
David Sidrane
64fb11c1b8 Merged in david_s5/nuttx/master_h7 (pull request #1012)
Master h7

* stm32h7:spi allow more clock sources

* stm32h7 has ARCH_HAVE_I2CRESET

Approved-by: Gregory Nutt <gnutt@nuttx.org>
2019-08-20 14:41:13 +00:00
David Sidrane
0f6db4e1db Merged in david_s5/nuttx/master_h7 (pull request #1011)
Master h7

* stm32h7: DMA Fix compiler warning

* stm32h7: DMA Fix coding style

* stm32h7:serial fix undefined with TERMIOS

Approved-by: Gregory Nutt <gnutt@nuttx.org>
2019-08-20 11:49:38 +00:00
Gregory Nutt
faf8bdcbf8 Eliminate some new warnings found in build testing 2019-08-19 17:50:04 -06:00
David Sidrane
d20d0227ae Merged in david_s5/nuttx/master_h7 (pull request #1008)
stm32h7:Ported UID from F7

Approved-by: Gregory Nutt <gnutt@nuttx.org>
2019-08-19 22:21:11 +00:00
David Sidrane
a9e72bb58d Merged in david_s5/nuttx/master_h7 (pull request #1007)
stm32h7:Port DTCM from F7

Approved-by: Gregory Nutt <gnutt@nuttx.org>
2019-08-19 20:42:52 +00:00
Gregory Nutt
df1294906d arch/arm/src/s32k1xx/s32k1xx_clockconfig.c and related files: Fix confusion about who decrements the rster value. Some dividers may have a function range of 1..8 but the register value is 0..7. There were several places where values were getting decremented twice: Once by higher up logic and once by the register access logic. A such dividers were reviewed and, hopefully, all were fixed. 2019-08-19 13:07:45 -06:00
Ivan Ucherdzhiev
a383a86e72 arch/arm/src/imxrt/imxrt_usdhc.c: uSDHC typo fixes and command transfer error handling modified. 2019-08-19 11:01:58 -06:00
Nathan Hartman
198723b90d arch/arm/src/tiva/common/tiva_serial.c: Fix some typos in comments. 2019-08-19 10:57:00 -06:00
Gregory Nutt
33ab25ae14 arch/arm/src/s32k1xx/s32k14x and boards/arm/s32k1xx/s32k146evb/src: Numerous fixes to get a clean build of the S32K146EVB. 2019-08-19 10:49:50 -06:00
Gregory Nutt
c3f16a46f0 This commit brings the S32K118EVB board to code complete and ready for testing. This commit adds some minor initialization fixes (like disabling the WDOG, enabling the I-cache, and initializing the MPU. It brings more files in from the Kinetis port for the IDLE loop and for GPIO functionality. This also address register definition header file for LMEM and MPU. 2019-08-18 17:26:10 -06:00
Gregory Nutt
db0641556e boards/arm/s32k1xx/s32k118evb: Implement board support for LEDs and buttons. This is taken from the Freedom-K66f with has the same LED and button configuation as the S32K116EVB and uses the same GPIO IP.
boards/arm/s32k1xx/s32k118evb/include/board.h:  Add LPUART0 pin disambiguation.

arch/arm/src/s32k1xx/hardware:  Add pin mux definitions for S32K116, 118, 142, 144, 146, and 148.

arch/arm/src/s32k1xx/s32k1xx_pin.c and .h:  Add support for PIDR register that disables a gneral purpose pin from acting as an input.

arch/arm/src/s32k1xx/s32k1xx_pin.c and .h:  The device does not support slew rate controls or open drain (on all the pins).  Only pins that are configured for a protocol that requires open-drain (e.g;, LPI2C, LPUART single-wire) will work in open-drain mode.
2019-08-18 12:02:54 -06:00
Gregory Nutt
e0d1535a1e arch/arm/src/s32k1xx/s32k1xx_edma.c: Leverage eDMA logic from i.MXRT to S32K1XX. Appears to be the same IP but with fewer channels and features than the i.MXRT implementation. 2019-08-17 16:44:13 -06:00
Gregory Nutt
be55a6542f Squashed commit of the following:
arch/arm/src/s32k1xx/:  Add logic to look up the peripheral clock frequency.  Fix baud calcuation logic in s32k1xx_lowputc.c:  In no longer tries to enable clocking.  That must be done with board logic.  Now gets the peripheral functional clock frequency to determine the baud rate.

    arch/arm/src/s32k1xx:  Add peripheral feature arrays.
2019-08-17 14:36:40 -06:00
Gregory Nutt
e7a3231d7a Squashed commit of the following:
Finishes peripheral clock initialization:

      arch/arm/src/s32k1xx/s32k11x/s32k11x_clockmapping.c
      arch/arm/src/s32k1xx/s32k14x/s32k14x_clockmapping.c
        Provide MCU-specific mapping of clock names to PCC control registers.

      boards/arm/s32k1xx/s32k118evb/src/s32k118_periphclocks.c
        Provides initial clocking for for the S32K118EVB

    arch/arm/src/s32k1xx/s32k1xx_periphclocks.c:  Add logic to initialize peripheral clocking.

    arch/arm/src/s32k1xx/s32k1xx_clockconfig.c:  Add SIM clock configuration.
2019-08-17 11:50:32 -06:00
Gregory Nutt
1f021add53 arm/arm/src/stm32f7 and h7: Fix coding standard problems found by tools/nxstyle in files modified/added in last PR. 2019-08-17 08:20:31 -06:00
David Sidrane
1bbf5c9449 Merged in david_s5/nuttx/master_h7 (pull request #1002)
stm32h7 RTC and friends  support

* stm32h7:Removed f7 in file path

* stm32f7:Fix overwritten IRQ enabled

       System boot order calls clock_initialize then up_initalize.
       clock_initialize was setting up the alarm IRQ
       up_initalize is initializing the NVIC.

       This most likely worked in the past due to a bug in the
       NVIC init code that failed to clear the Interrupt enables.
       That was fixed in 510b0f7e arch/arm/src: Correct all ARMv7-M
       architectures.  Interrupts were not be disabled correctly
       on power up.

* stm32h7:Ported over F7 RTC

* nucleo-h743zi:Add RTC

Approved-by: Gregory Nutt <gnutt@nuttx.org>
2019-08-17 14:01:28 +00:00
Gregory Nutt
f32c72f0e5 arch/arm/src/s32k1xx/hardware/s32k1xx_pmc.h: Add PMC register definition header file. 2019-08-16 17:36:27 -06:00
Gregory Nutt
5b102ff848 Squashed commit of the following:
arch/arm/src/s32k1xx/s32k1xx_clockconfig.c:  Finishes the implementation of the core clock configuration logic.
    arch/arm/src/s32k1xx/hardware/s32k1xx_smc.h:  Add SMC register definition header file.
    arch/arm/src/s32k1xx:  Bring in GPIO logic from Kinetis.  Looks like the same IP.
2019-08-16 16:18:15 -06:00
Nathan Hartman
223722d6d3 arch/arm/src/tiva: Modify preprocessor logic to support configs with no UART. Now similar to logic for other archs, such as arch/arm/src/a1x/a1x_lowputc.c and arch/arm/src/am335x/am335x_lowputc.c. This change eliminates compiler errors and warnings that were breaking the build with "No CONFIG_UARTn_SERIAL_CONSOLE Setting" when no UARTs / console were configured. 2019-08-15 18:16:24 -06:00
Gregory Nutt
a584865b47 arch/arm/src/s32k1xx/s32k1xx_clockconfig.c: First feeble fragments of clock configuration logic. 2019-08-15 18:08:35 -06:00
Gregory Nutt
74d76786de arch/arm/src/s32k1xx/Kconfig: Break out some feature configurations instead of relying os MCU selections for conditional logic. 2019-08-15 17:17:38 -06:00
Nathan Hartman
b7f1c21b36 arch/arm/src/tiva/common/tiva_irq.c: Add handling for IRQs 128 thru 159. Handling was missing for these IRQs, resulting in compiler warning(s) for 'Missing logic' and/or 'Missing output.' 2019-08-15 16:59:35 -06:00
Gregory Nutt
b0b33584ff boards/arm/s32k1xx/s32k118evb/src/s32k118_clockconfig.c: Add clock configuration data for the S32K118EVB. 2019-08-15 16:56:57 -06:00
Beat Küng
ef233507db Merged in bkueng/nuttx/serial_single-wire_pullup (pull request #994)
serial single-wire: add possibility to specify pull-up instead of open drain

Approved-by: David Sidrane <david.sidrane@nscdg.com>
Approved-by: Gregory Nutt <gnutt@nuttx.org>
2019-08-15 21:58:52 +00:00
Nathan Hartman
5a2d5fb7f9 arch/arm/src/tiva, arch/arm/include: Add support for Tiva TM4C123AH6PM. 2019-08-15 14:17:24 -06:00
Gregory Nutt
a276942f59 Fix minor typos in comments 2019-08-15 14:06:11 -06:00
Gregory Nutt
fba40c40f1 arch/arm/src/s32k1xx/s32k1xx_clockconfig.h: Add data structures that will eventually be used to configure clocking. 2019-08-15 14:03:02 -06:00
Gregory Nutt
eb4fff5221 Minor updates from review of last PR. 2019-08-15 10:05:21 -06:00
David Sidrane
77c3a06fea Merged in david_s5/nuttx/master_h7 (pull request #995)
Master h7

* stm327f:Kconfig add depends on BBSRAM

* stm32h7:memorymap fix BBSRAM name

* stm32h7:Add BBSRAM support

Approved-by: Gregory Nutt <gnutt@nuttx.org>
2019-08-15 15:42:48 +00:00
Gregory Nutt
17a4efe031 boards/arm/s32k1xx/s32k118evb: More build fixes. 2019-08-14 13:31:21 -06:00
Gregory Nutt
963031f42c arch/arm/src/s32k1xx: A few fixes. The build progresses further but still fails. 2019-08-14 12:40:51 -06:00
Pavel Pisa
50a333f55c arch/arm/src/lpc17xx_40xx/Make.defs: Cortex-M system reset is applicable to LPC17_40 too. 2019-08-14 11:03:52 -06:00
Pavel Pisa
810bf5e87a symtab/Makefile: When system wide locale is set (i.e. en_US.UTF-8) then 'read' is ordered after 'readdir' even if separator is set to quotation mark and key set to 2. When C locale is used result is correct. 2019-08-14 11:02:30 -06:00
Gregory Nutt
2a228e8650 Fleshs out a few more things needed to compile and build the S32K118EVB board configuration.
Squashed commit of the following:

    arch/arm/include:  Add interrupt IRQ numbers.
    tools/: Add support for the S32K1XX family.
2019-08-14 10:57:54 -06:00
Gregory Nutt
36d21a7a5b Clean up a some missed re-naming in the last slash and burn s32k1xx commit. 2019-08-13 19:14:50 -06:00
Gregory Nutt
e3468c8aad arch/arm/src/s32k1xx: Bring in Cortex-M0+ Systick and interrupt handling from samd2l2; bring in Cortex-M4F Systick and interrupt handling from LPC54xx. 2019-08-13 19:10:38 -06:00
Gregory Nutt
7be79b661c arch/arm/src/s32k1xx: Fix some sub-directory names. 2019-08-13 18:50:54 -06:00
Pavel Pisa
913de5e216 arch/arm/src/lpc17xx_40xx/lpc17_40_can.c: f BOARD_CCLKSEL_DIVIDER is not equal to 1 on LPC178x or LPC40xx then base clock rate is calculated incorrectly because CCLK frequency does not correspond to PLL0 clock which is used for PCLK. This is partially workaround solution. It would be probably better to define BOARD_PCLK_FREQUENCY even for LPC176x targets and use that to replace divisor by base_clock in up_dev_s. 2019-08-13 16:16:49 -06:00
Gregory Nutt
8405f6510c arch/arm/src/s32k1xx: Bring in the lpuart from i.MXRT. It is the same IP. 2019-08-13 15:00:41 -06:00
Gregory Nutt
cd49e6fbd7 arch/arm/src/imxrt: Fix some errors in the LPUART register defintion files. Correct naming of a function: up_earlyserialinit() should be imxrt_earlyserialinit(). Remove prototypes for non-existent serial initialization functions. 2019-08-13 14:59:59 -06:00
Gregory Nutt
ce90390146 arch/arm/src/s32k1xx/hardware/s32k1xx_rcm.h: Add RCM register definition file. 2019-08-13 12:45:15 -06:00
Gregory Nutt
a1db129027 arch/arm/src/s32k1xx/hardware/s32k1xx_crc.h: Add CRC register definition file. 2019-08-13 11:24:46 -06:00
Gregory Nutt
d9a3f2ac0e arch/arm/src/s32k1xx/hardware/s32k1xx_wdog.h and s32k1xx_ewm.h: Add WDOG and EWM register definition file. 2019-08-13 11:05:08 -06:00
Gregory Nutt
b6c72debcb arch/arm/src/s32k1xx/hardware/s32k1xx_dmamux.h: Add DMAMUX register definition file. 2019-08-13 10:23:07 -06:00
Gregory Nutt
248a2966c6 arch/arm/src/s32k1xx/hardware/s32k1xx_gpio.h: Add GPIO register definition file. 2019-08-13 10:06:13 -06:00
Gregory Nutt
3f7b908674 arch/arm/src/s32k1xx/hardware/s32k1xx_port.h: Add PORT register definition file. 2019-08-13 08:46:41 -06:00
Gregory Nutt
387bd5d070 arch/arm/src/s32k1xx/hardware/s32k1xx_sim.h: Add SIM register definition file. 2019-08-12 18:12:21 -06:00
Gregory Nutt
bcfabcbe53 This commit brings the initial files for a port to the NXP S32K1xx family. This is very much a work in progress and is little more that a partial configuration/build environment and some S32K1xx register definition header files
Squashed commit of the following:

    arch/arm/src/s32k1xx/hardware/s32k1xx_mcm.h:  Add MCM register definition file.
    arch/arm/src/s32k1xx/hardware/s32k1xx_memorymap.h:  Add memory map definition file.
    arch/arm/src/s32k1xx/hardware/s32k1xx_cmu.h:  Add CMU register definition file.
    arch/arm/src/s32k1xx/hardware/s32k1xx_pcc.h:  Add PCC register definition file.
    arch/arm/src/s32k1xx/hardware/s32k1xx_scg.h:  Add SCG register definition file.
    arch/arm/src/s32k1xx:  Add initial Make.defs files.
    Basic configuration logic for the S32K1 family.
2019-08-12 12:12:58 -06:00
Anthony Merlino
e649d6c21e Merged in antmerlino/nuttx/stm32f7_progmem (pull request #989)
arch/arm/src/stm32f7: Exposes stm32_flash_xxx functions.

Approved-by: Gregory Nutt <gnutt@nuttx.org>
2019-08-10 18:36:46 +00:00
raiden00pl
5ed743d58a Merged in raiden00/nuttx_f334 (pull request #974)
Master

* Revert "Merged in yanqil-br/feature-multi_chan_pwm (pull request #973)"

    This reverts commit aef0e0b538.

* arch/arm/src/{stm32/stm32f7/stm32h7/stm32l4}/stm32_pwm.c: configure multi-channel duty only if channel specified. This allows you to update duty cycle for a single channel

* nucleo-f303re/configs: add basic NSH configuration

* nucleo-f303re/configs/pwm: enable console on UART2 and set entry point to nsh_main

Approved-by: Gregory Nutt <gnutt@nuttx.org>
2019-08-10 15:14:19 +00:00
Gregory Nutt
0ed1a06016 arch/arm/include/cxd56xx/chip.h: The correction of commit c300f27130 must be applied to the CXD56xx too. 2019-08-10 08:33:47 -06:00
Yan Li
aef0e0b538 Merged in yanqil-br/feature-multi_chan_pwm (pull request #973)
multi-channel PWM with single chan selection

Approved-by: Gregory Nutt <gnutt@nuttx.org>
2019-08-09 23:57:31 +00:00
Nathan Hartman
60f777b8f4 Fix various typos in documentation and comments. 2019-08-09 14:35:07 -06:00
Anthony Merlino
7eaa47072f Merged in antmerlino/nuttx/stm32f7-usart1-dma (pull request #972)
stm32f7: USART1_RXDMA is dependent on STM32F7_DMA2 not STM32F7_DMA1

Approved-by: David Sidrane <david.sidrane@nscdg.com>
Approved-by: Alan Carvalho de Assis <acassis@gmail.com>
Approved-by: Gregory Nutt <gnutt@nuttx.org>
2019-08-09 18:24:13 +00:00
Nathan Hartman
b417ed4b40 Tiva GPTM timers: Implement 16-bit PWM mode
arch/arm/src/tiva/Kconfig:
    Remove EXPERIMENTAL dependency on TIVA_TIMER16_PWM.

arch/arm/src/tiva/common/tiva_timerlib.c:
    Fix wrong 32/16-bit ifdef checks.
    Add tiva_pwm16_sel_event() to choose GPTMCTL.TnEVENT value.
    Implement tiva_pwm_mode16().
    tiva_timer16_setinterval(): Fix wrong check for TIMER16_MODE_ONESHOT
        and TIMER16_MODE_PERIODIC. Was comparing to config->cmn.mode
        which can never have those values. This prevented interrupts being
        enabled. Compare to timer->mode instead.
    Add tiva_timer16pwm_setperiodduty() to set initial period, duty cycle,
        and enable interrupts if requested in GPTM peripheral. Interrupts
        are not enabled in NVIC until tiva_timer16_start() is called.
    Add tiva_timer16pwm_setduty() to update duty cycle at any time.

arch/arm/src/tiva/hardware/lm/lm3s_timer.h,
arch/arm/src/tiva/hardware/lm/lm4f_timer.h,
arch/arm/src/tiva/hardware/tm4c/tm4c123_timer.h,
arch/arm/src/tiva/hardware/tm4c/tm4c129_timer.h:
    Add missing defines; make surrounding defines consistent.

arch/arm/src/tiva/tiva_timer.h:
    Add new TIMER_FLAG_* configuration flags to enable configuring the
    16-bit PWM feature. Extend type of "flags" in tiva_timer32config_s
    and tiva_timer16config_s from 8- to 32-bits to allow more flags.
2019-08-09 11:03:44 -06:00
Gregory Nutt
545cfada38 This commit removes CONFIG_ARCH_INT_DISABLEALL. In the normal course of things, interrupts must occasionally be disabled using the up_irq_save() inline function to prevent contention in use of resources that may be shared between interrupt level and non-interrupt level logic. Now the question arises, if we are using BASEPRI to disable interrupts and have high priority interrupts enabled (CONFIG_ARCH_HIPRI_INTERRUPT=y), do we disable all interrupts except SVCall (we cannot disable SVCall interrupts). Or do we only disable the "normal" interrupts?
If we are using the BASEPRI register to disable interrupts, then the answer is that we must disable ONLY the "normal interrupts".  That is because we cannot disable SVCALL interrupts and we cannot permit SVCAll interrupts running at a higher priority than the high priority interrupts (otherwise, they will introduce jitter in the high priority interrupt response time.)

Hence, if you need to disable the high priority interrupt, you will have to disable the interrupt either at the peripheral that generates the interrupt or at the NVIC.  Disabling global interrupts via the BASEPRI register cannot effect high priority interrupts.
2019-08-09 10:52:35 -06:00
Gregory Nutt
c300f27130 arch/arm/include/armv7-m/nvicpri.h: In the 'normal' case, the priority of the SVCALL interrupt was the same as the priority of the high priority interrupt. This means that SVCALL interrupt processing can defer the high priority interrupt and result in the jitter in that interrupt response. Fix is to raise the priority of the high priority interrupt above the priority of the SVCALL interrupt. Suggested by Nathan Hartman. 2019-08-09 07:07:16 -06:00
David Sidrane
786d3453a2 Merged in david_s5/nuttx/master_f7_eth (pull request #970)
stm32f7:ethernet add timeout on MAC reset

Approved-by: Gregory Nutt <gnutt@nuttx.org>
2019-08-08 16:17:57 +00:00
Gregory Nutt
2730714774 Update more comments and README.txt files to reflect new organization of the boards/ sub-directory. 2019-08-08 09:17:04 -06:00
Gregory Nutt
240926c995 Beginning to update comments to reflect new organization of the boards/ sub-directory. 2019-08-08 08:46:54 -06:00
Gregory Nutt
eaaa73198b boards/Board.mk: Correct a simulator included path problem introduced by reorganization of arch/sim/src. 2019-08-08 07:17:43 -06:00
Nathan Hartman
2f0a3b6d75 arch/arm/src/tiva/common/tiva_timerlib.c: Fix one code error and some comment errors. tiva_timer16_setinterval(): Was DEBUGASSERTing on mode != TIMER16_MODE. Fixed to DEBUGASSERT on mode == TIMER16_MODE. 2019-08-07 18:58:45 -06:00
Gregory Nutt
c840ac2496 arch/sim: Even though the simulation has no chips, it needs to have CONFIG_ARCH_CHIP and chip sub-directories. Otherwise, we would have to treat it as a special case in the build system. 2019-08-07 16:05:00 -06:00
Augusto Fraga Giachero
a1f1adb878 arch/arm/src/lpc17xx_40xx/lpc17_40_ethernet.c: Fix the initialization for DP83848x PHYs. The DP83848x requires the RMII mode to be manually enabled through the MII_DP83848C_RBR register. Before querying the speed and mode it should wait for the link to be established. 2019-08-07 09:22:50 -06:00
Augusto Fraga Giachero
41d3ef5f1b arch/arm/src/lpc17xx_40xx/lpc17_40_ethernet.c: Follow the procedure listed in the LPC176x/5x User Manual when reading from and writing to the PHY's registers (section 10.11.14). I couldn't see any behavioral change after this commit, but nonetheless is a good practice to follow the manufacturer's recommended procedure. 2019-08-07 09:01:10 -06:00
Augusto Fraga Giachero
17518b4a7d arch/arm/src/lpc17xx_40xx/Kconfig: Add missing LPC17_40_PHY_CEMENT_DISABLE config to the lpc17xx Kconfig file. For some reason this config wasn't referenced anywhere else except in arch/arm/src/lpc17xx_40xx/lpc17_40_ethernet.c. 2019-08-07 08:59:38 -06:00
Nathan Hartman
06f693965c Tiva: Fix errors in low-level timer support
arch/arm/src/tiva/common/tiva_timerlib.c:
* tiva_gptm_configure() and tiva_gptm_release(): Fix error: Was calling
  tiva_emac_periphrdy() instead of tiva_gptm_periphrdy().

arch/arm/src/tiva/tiva_timer.h:
* Fix error in "abcde" description of bit flag defines.
2019-08-07 07:35:37 -06:00
Nathan Hartman
162e2e1c65 arch/arm/src/tiva/common/tiva_timerlib.c: Fix minor errors in tiva_timerlib
Fix incorrect preprocessor conditionals related to Kconfig defines:
* CONFIG_TIVA_TIMER32_EDGECOUNT -> CONFIG_TIVA_TIMER16_EDGECOUNT
* CONFIG_TIVA_TIMER32_TIMECAP -> CONFIG_TIVA_TIMER16_TIMECAP
* CONFIG_TIVA_TIMER32_PWM -> CONFIG_TIVA_TIMER16_PWM
2019-08-06 17:09:42 -06:00
David S. Alessio
ced0dc1e16 arch/arm/src/armv7-m: Add ARMv7-M setjmp/longjump functions. 2019-08-06 15:59:19 -06:00
Markus Bernet
f1462d2a2f arch/arm/src/stm32h7: Fix UART7/8 typos. Fix bug in ETH_MACQTXFCR configuration. 2019-08-06 07:37:55 -06:00
David Sidrane
1881a7216e Merged in david_s5/nuttx/master_kinetis_i2c_fix_txfer (pull request #965)
kinetis:i2c transfer ensure correct result returned

kinetis_i2c_transfer released the mutex then fetched
   the state, this resulted in returning the correct
   results.

Approved-by: Gregory Nutt <gnutt@nuttx.org>
2019-08-05 20:31:34 +00:00
Gregory Nutt
615c0ea7ee Change naming configs/ to boards in comments, Documentation, etc. Still a few more to go. 2019-08-05 07:13:48 -06:00
Alin Jerpelea
a1c991d921 Merged in alinjerpelea/nuttx (pull request #963)
Move boards to boards folder

* boards: rename configs folder to boards

    This is the proposed layout after the change:

    boards: - folder containing board folders
            <board>: - name of each board
                    drivers: - extra drivers specific for platform
                    include: - header files for the boars
                    scripts: - extra scripts specific for platform
                        src: - board specific code
                      tools: - extra tools specific for platform
                    <config>: - board specific configuration(s)

    Note:
    <xxx> names are dependent on platform

    This is a logical change to aim to the arch layout but this is a
    huge change it should be done in several steps to lower the risk.

    Signed-off-by: Alin Jerpelea <alin.jerpelea@sony.com>

* Kconfig: replace configs with boards

    The change is needed after the path change

    Signed-off-by: Alin Jerpelea <alin.jerpelea@sony.com>

* Makefile: replace configs with boards

    The change is needed after the path change

    Signed-off-by: Alin Jerpelea <alin.jerpelea@sony.com>

* Makefile.*: replace configs with boards

    The change is needed after the path change

    Signed-off-by: Alin Jerpelea <alin.jerpelea@sony.com>

* Make.defs: replace configs with boards

    The change is needed after the path change

    Signed-off-by: Alin Jerpelea <alin.jerpelea@sony.com>

* .sh: replace configs with boards

    The change is needed after the path change

    Signed-off-by: Alin Jerpelea <alin.jerpelea@sony.com>

* .mk: replace configs with boards

    The change is needed after the path change

    Signed-off-by: Alin Jerpelea <alin.jerpelea@sony.com>

* .c & .h: replace configs with boards

    The change is needed after the path change

    Signed-off-by: Alin Jerpelea <alin.jerpelea@sony.com>

* .bat: replace configs with boards

    The change is needed after the path change

    Signed-off-by: Alin Jerpelea <alin.jerpelea@sony.com>

Approved-by: Gregory Nutt <gnutt@nuttx.org>
2019-08-05 12:04:14 +00:00
Nathan Hartman
5f76eb1207 arch/arm/src/tiva: LM3S, LM4F, TM4C: Fix GPIO IRQ error, ports R, S, T. Preprocessor logic for CONFIG_TIVA_GPIOx_IRQS was setting/clearing port Q defines when it should act on ports R, S, T. gpioport2irq() was missing handling for port T. 2019-08-04 16:55:26 -06:00
Nathan Hartman
68d43d3679 Fix typos. 2019-08-04 14:50:28 -06:00
Kejun ZHOU
19b81899de Merged in zhoukejun/nuttx-rv32-vega-lite (pull request #962)
Rename the arch/risc-v/src/gap8/gap.h to arch/risc-v/src/gap8/gap8.h

Signed-off-by: zhoukejun <zhoukejun@outlook.com>

Approved-by: Gregory Nutt <gnutt@nuttx.org>
2019-08-04 13:25:07 +00:00
Nathan Hartman
a36d49e975 arch/arm/src/tiva, include/nuttx/sensors: Reinstate TM4C qencoder driver and expand its ioctls.
arch/arm/src/tiva/Kconfig:
* Add TIVA_HAVE_QEI0, TIVA_HAVE_QEI1 as applicable to each ARCH_CHIP_TM4C12*.
* Add config TIVA_QEI, TIVA_HAVE_QEI0, TIVA_HAVE_QEI1.
* Add config TIVA_QEI0, config TIVA_QEI1.

arch/arm/src/tiva/common/tiva_qencoder.c:
* Rewrite tiva_qe_setup().
* Replace tiva_qe_ppr() with tiva_qe_resetatppr().
* Add tiva_qe_resetatmaxpos(), tiva_qe_resetatindex().

arch/arm/src/tiva/hardware/tiva_qencoder.h:
* Add missing definitions: SIGMODE_QUADRATURE, SIGMODE_CLK_AND_DIR, SWAP_NO_SWAP, SWAP_PHA_PHB.

arch/arm/src/tiva/tiva_qencoder.h:
* Rename TIVA QEI ioctl QEIOC_PPR to QEIOC_RESETATPPR.
* Add TIVA QEI ioctl identifiers QEIOC_RESETATMAXPOS, QEIOC_RESETATINDEX.

include/nuttx/sensors/qencoder.h:
* Increase QE_TIVA_NCMDS from 3 to 5.
2019-08-02 15:56:05 -06:00
Markus Bernet
e7fdbd8c81 arch/arm/src/stm32h7/:
STM32H7 RCC:  Fix RCC register definitions and typos in ADC/UART
STM32H7 ADC:  Fix internal channel numbers
STM32H7 UART:  Fix typo in UART8 configuration
2019-08-02 07:09:52 -06:00
David Sidrane
2204b6506b Merged in david_s5/nuttx/master_stm_hw_hs (pull request #961)
stm32{L4|F4|H7}:serial add HW HS on UART 4 & 5

* stm32:serial add HW HS on UART 4 & 5

* stm32f7:serial update copyright date

* stm32h7:serial add HW HS on UART 4 & 5

* stm32l4:serial add HW HS on UART 4 & 5

Approved-by: Gregory Nutt <gnutt@nuttx.org>
2019-08-01 19:52:43 +00:00
David Sidrane
7712d15867 Merged in david_s5/nuttx/master_f7_uart4_5_hw_hs (pull request #960)
stm32f7:serial add HW HS on UART 4 & 5

Approved-by: Gregory Nutt <gnutt@nuttx.org>
2019-08-01 00:16:29 +00:00
Nathan Hartman
32e9ba7604 Documenation/, configs/: ix typos and one HTML syntax error. Fix HTML syntax error in Documentation/NfsHowto.html: <coce> -> <code> html tag. 2019-07-30 16:10:15 -06:00
Gregory Nutt
eef2f4599e Commit 933e9e407b broke the simulator on a 64-bit platform. 2019-07-29 14:34:29 -06:00
Nathan Hartman
c71f2fa56f arch/arm/src/tiva: Rename TM4C1294NC identifiers to TM4C1294NCPDT.
Rationale: TM4C1294NC is ambiguous:

  TM4C1294NCPDT is a 128-TQFP
  TM4C1294NCZAD is a 212-NFBGA

The TM4C1294NC part currently supported by NuttX is the TM4C1294NCPDT used on the TI EK-TM4C1294XL "Connected LaunchPad" (see configs/tm4c1294-launchpad). To ensure the correct part is fully specified, this commit updates all TM4C1294NC identifiers to TM4C1294NCPDT.

Rename:

  CONFIG_ARCH_CHIP_TM4C1294NC to CONFIG_ARCH_CHIP_TM4C1294NCPDT
  ARCH_CHIP_TM4C1294NC to ARCH_CHIP_TM4C1294NCPDT
  TM4C1294NC to TM4C1294NCPDT
2019-07-29 13:31:52 -06:00
Gregory Nutt
97265f3ca3 arch/arm/src/lpc17xx_40xx/lpc17_40_adc.c: Fix very minor coding standard problem in last PR. 2019-07-29 12:05:47 -06:00
jjlange
bc38e98862 Merged in jjlange/nuttx (pull request #957)
Only use PCLKSEL0 for ADC on LPC176x family.

Approved-by: Gregory Nutt <gnutt@nuttx.org>
2019-07-29 18:03:27 +00:00
Nathan Hartman
6e8b76c3ab arch/arm/src/tiva: Rename TM4C123GH6PMI identifiers to TM4C123GH6PM
Rationale: In terms of firmware programming, there is no functional difference between these parts:

  TM4C123GH6PMI7
  TM4C123GH6PMI7R
  TM4C123GH6PMT7
  TM4C123GH6PMT7R

From a programming standpoint, all of the above parts are TM4C123GH6PM, which means it doesn't make sense to differentiate between PM and PMI. (The PM means 64-LQFP. The I means temperature range -40C to +85C. It could be T meaning -40C to +105C. The R means it ships in Tape and Reel packaging as opposed to Tray.)

arch/arm/include/tiva/chip.h:
arch/arm/include/tiva/tm4c_irq.h:
arch/arm/src/tiva/hardware/lm/lm3s_flash.h:
arch/arm/src/tiva/hardware/tm4c/tm4c_pinmap.h:
configs/tm4c123g-launchpad/README.txt:
configs/tm4c123g-launchpad/nsh/defconfig:
  Rename: CONFIG_ARCH_CHIP_TM4C123GH6PMI to CONFIG_ARCH_CHIP_TM4C123GH6PM

arch/arm/src/tiva/Kconfig:
configs/Kconfig:
  Rename: ARCH_CHIP_TM4C123GH6PMI to ARCH_CHIP_TM4C123GH6PM

arch/arm/src/tiva/hardware/tm4c/tm4c_memorymap.h:
  Rename: CONFIG_ARCH_CHIP_TM4C123GH6PMI to CONFIG_ARCH_CHIP_TM4C123GH6PM
  Remove redundant Peripheral Base Addresses section. There were two identical copies, one for CONFIG_ARCH_CHIP_TM4C123GH6PMI and another for CONFIG_ARCH_CHIP_TM4C123GH6PM.
2019-07-29 11:15:46 -06:00
Gregory Nutt
e0f1469526 Fix warnings found in build testing. 2019-07-28 17:50:57 -06:00
Gregory Nutt
55ec857f6f arch/arm/src/imxrt/imxrt_usdhc.c: Trivial coding standard fix 2019-07-28 16:54:31 -06:00
Gregory Nutt
1af4d6a905 Merge branch 'master' of bitbucket.org:nuttx/nuttx 2019-07-28 16:53:53 -06:00
Gregory Nutt
a54d660842 configs/stm32f769i-disco/src/stm32_bringup.c: Fix more errors found in build testing. 2019-07-28 16:52:55 -06:00
Dave Marples
986a9160b9 arch/arm/src/imxrt/imxrt_clockconfig.c: Enable TRACE clocks if the divider has been defined in the board's board.h file. 2019-07-28 16:28:06 -06:00
Dave Marples
970295d0fe i.MXRT USDHC: This change completes SDIO support for IMXRT, and also adds support for WiFi using the AP6212A module based on Simon Piriou's rather excellent work. The patch should also address DavidS's concern about width setting for USDHC1 & 2.
Testing of the WiFi is minimal so far but functionality is proven. I'm specifically not happy that the driver doesn't recover elegantly from a DMA data checksum failure, but that is an issue that can be dealt with in due course ... I'm trying to get the rest of the interfaces fleshed out and the hardware proven so it can go for pre-production build. I _think_ there's only Bluetooth and USB-device left to implement now.
2019-07-28 16:20:33 -06:00
Augusto Fraga Giachero
e0bd90d8a3 arch/arm/src/lpc17xx_40xx/lpc17_40_ethernet.c: Set speed back to 10Mbps if 10Mmbps link negotiated. 2019-07-27 12:16:13 -06:00
Daniel P. Carvalho
23d5e666cc onfigs/nucleo-l432kc: ADC: Change analog pins definitions and correct DMA related issue. 2019-07-27 07:42:50 -06:00
Simon Piriou
780d4d41e8 drivers/mtd/mx25rxx.c: add support for 512B sectors
- Fix for mx25rxx driver as it does not work properly
- Add mx25rxx memory chip & smartfs support in b-l475e-iot01a/nsh config
- Update smartfs smart_scan() function
2019-07-26 09:19:26 -06:00
David Sidrane
08460ba5b1 Merged in david_s5/nuttx/master_f7 (pull request #956)
stm32f7:If only one SDMMC it is slot 0

Approved-by: Gregory Nutt <gnutt@nuttx.org>
2019-07-26 14:16:26 +00:00
Augusto Fraga Giachero
f0b74380a5 arch/arm/src/lpc17xx_40xx/lpc17_40_i2c.c: Calculate the appropriate timeout for I2C transfers. Depending on the bus frequency and transfer size, I2C transactions can take quite a bit, so a fixed timeout is not a good solution. Calculating the timeout at run time poses some overhead but still better than aborting long transactions. 2019-07-25 13:07:28 -06:00
Augusto Fraga Giachero
38b9862902 arch/arm/src/lpc17xx_40xx/lpc17_40_i2c.c: Abort I2C transfers if a timeout has occurred. If a timeout has occurred in the middle of a I2C transfer, the next I2C interrupt should abort any transfers and send a stop condition to the corresponding I2C bus. Failed to do so will result in memory corruption / undefined behavior as priv->msgs points to a region of memory it doesn't owns anymore after lpc17_40_i2c_start returns. 2019-07-25 08:33:31 -06:00
Nicholas Chin
f5ff35ad9c arch/arm/src/imxrt/imxrt_lpi2c.c: Slave addresses are now correctly shifted when sending start. TX/RX FIFOs now discarded on error to prevent FIFO underflow errors. Fixes error checking to use priv structure and removes checking of BBF flag as it is not an error. 2019-07-23 09:08:15 -06:00
Anthony Merlino
96f019a822 Merged in antmerlino/nuttx/stm32f7_otghs (pull request #951)
stm32f7: Fixes bad preprocessor logic preventing USB OTG HS to work when used without external ULPI.

Approved-by: David Sidrane <david.sidrane@nscdg.com>
Approved-by: Gregory Nutt <gnutt@nuttx.org>
2019-07-22 17:47:37 +00:00
Ouss4
2d6e4bd26b arch/mips/src/pic32mz/pic32mz-config.h: Make the PLL input clock configurable. 2019-07-21 16:11:04 -06:00
Ouss4
99111c2af8 drivers/mtd/sst26.c: Accept the 16MBit Flash when reading the JEDEC-ID at init. 2019-07-21 16:07:44 -06:00
Ouss4
145970a266 arch/mips/src/pic32mz/pic32mz-spi.c: Fix SPI Mode selection. CKE is the inversion of the CPHA. 2019-07-21 15:57:06 -06:00
Bernd Walter
1812d6f515 arch/arm/src/sam34/Kconfig: Add missing DMA configuration setting. 2019-07-21 14:56:14 -06:00
Pierre-Olivier Vauboin
994e52c7c8 arch/arm/src/stm32h7/stm32_ethernet.c: Fix typo in define. 2019-07-16 19:12:10 +02:00
David Sidrane
4da872f059 Merged in david_s5/nuttx/master_rt_fix (pull request #949)
imxrt:Fix compiler error for CONFIG_IMXRT_USDHC1 && !CONFIG_IMXRT_USDHC2

Approved-by: Gregory Nutt <gnutt@nuttx.org>
2019-07-13 16:53:57 +00:00
Gregory Nutt
a9b84eb941 arch/arm/src/stm32/Kconfig: Revert duplicate dependency introduced by 9f6361060d 2019-07-13 10:21:42 -06:00
Gregory Nutt
9f6361060d arch/arm/src/stm32/Kconfig: Segment LCD source clock selection should debug on CONFIG_STM32_LCD. 2019-07-13 10:07:02 -06:00
Alan Carvalho de Assis
b10df23454 arch/arm/src/stm32/Kconfig: Add the missing STM32 LCD Clock Source Selections. 2019-07-13 09:54:57 -06:00
Alin Jerpelea
5867fdc0e1 Merged in alinjerpelea/nuttx (pull request #948)
arch: arm: cxd56xx: add GNSS device and UART0

* arch: arm: cxd56xx: add GNSS device

    Signed-off-by: Alin Jerpelea <alin.jerpelea@sony.com>

* arch: arm: cxd56xx: add Geofence Support

    Signed-off-by: Alin Jerpelea <alin.jerpelea@sony.com>

* arch: arm: cxd56xx: add UART0 iterface

    UART0 is an interface with hardware flow control in the application subsystem.

    Signed-off-by: Alin Jerpelea <alin.jerpelea@sony.com>

* configs: spresense: path correction

    In the initial commit the path reference was not updated

    Signed-off-by: Alin Jerpelea <alin.jerpelea@sony.com>

Approved-by: Gregory Nutt <gnutt@nuttx.org>
2019-07-12 11:29:22 +00:00
Gregory Nutt
ad1adffba6 arch/arm/src/lpc11xx, arch/arm/include/lpc11xx, configs/lpcxpresso-lpc1115: Support for the LPCXpresso-LPC1115 and for the LPC1115 architecture in general was removed after NuttX-7.30. The LPC11 port was never really used (to my knowledge) and was no longer supported. A snapshot of the port is still available in the Obsoleted repository. It can be brought back into the main repository at any time if anyone is willing to provide support for the architecture. 2019-07-11 16:16:11 -06:00
Gregory Nutt
23df4a25d2 configs/lpc4088-quickstart: Remove crap configurations that do not build. 2019-07-11 12:33:32 -06:00
Gregory Nutt
7221311578 arch/arm/src/lpc11xx: Fix a few of the easy copy-paste naming problems. 2019-07-11 11:47:30 -06:00
Gregory Nutt
021a32b97d Fix some issues revealed by name changin of commit e5dfd805e6. 2019-07-11 11:19:03 -06:00
jjlange
e5dfd805e6 Merged in jjlange/nuttx/lpc40xx (pull request #946)
Add support for LPC40xx family chips

* Corrected a few peripheral definitions and pin functions for the LPC17xx family.
    Added configuration options, chip definitions, and additional pin functions for the LPC40xx family.
    Added board configurations for Embedded Artists LPC4088 Quickstart board and LPC4088 Developer's kit.  These configurations are still something of a work in progress.  In particular, the LCD functionality is untested.

* First pass rename in *.c and *.h files.

* Renamed LPC17XX to LPC17XX_40XX in config files

* Rplaced LPC17xx with LPC17xx/LPC40xx in .c files

* Replaced LPC17xx with LPC17xx/LPC40xx in .h files

* Updated some documentation

* Working on moving directories

* moved arch/arm/src/lpc17xx and arch/arm/include/lpc17xx to lpc17xx_40xx

* Renamed LPC17_* constants / configuration options to LPC17_40_*

* Updated chip family name defines

* Renamed some chip-specific files

* Updated references to renamed files

* Updated references to lpc17_ to lpc17_40_

* Renamed source files from lpc17_* to lpc17_40_*

* Clean up white space

Approved-by: Gregory Nutt <gnutt@nuttx.org>
2019-07-11 16:50:00 +00:00
Gregory Nutt
61d7fb5e41 video/videomode/videomode_lookup.c: At some additional lookups from FreeBSD. Not currently used in NuttX so ifdef'ed out for now. 2019-07-10 17:26:07 -06:00
Gregory Nutt
2811a297c7 Squashed commit of the following:
drivers/lcd/tda19988.c:  Now uses the new common videomode structure of include/nuttx/video/videomode.h as do other video components.

    video/, include/nuttx/video/videomode.h:  Separate EDID and from videomode managment.  They really are separate things.
2019-07-10 09:00:17 -06:00
Gregory Nutt
07b839965b arch/arm/src/am335x/Kconfig: Remove unused configuration settings left over from original copy-paste. 2019-07-09 19:11:50 -06:00
Petro Karashchenko
c9ff188f3e arch/arm/src/am335x: Changes related to Control Module 2019-07-09 15:38:38 -06:00
Petro Karashchenko
eed706d458 arch/arm/src/am335x/hardware/am335x_prcm.h: Rename am335x_cm.h to am335x_cm.h. 2019-07-09 14:50:07 -06:00
Gregory Nutt
8be74cdc48 configs/beaglebone-black/src/am335x_lcd.c: Can't use TDA19988 yet because there is no I2C driver. In the mean time, support LCD initialization using a fixed, configurable video mode. 2019-07-09 13:43:04 -06:00
Gregory Nutt
5c50854091 configs/beaglebone-black/src/am335x_lcd.c: Framework (only) for TDA19988 and LCD support for Beaglebone Black. 2019-07-09 10:21:38 -06:00
Michael Jung
d5ec2ab9bc On the LPC1769 there are two 16 KiB AHB SRAM blocks, which are mapped back to
back at physical address 0x2007C000 and 0x20080000 (i.e. right below and right
above a 512 KiB boundary).  Memory from those two blocks is considered
continuous when assigned to a heap.

In the protected build mode, when the memory protection unit is used, though,
it must be split into two MPU regions.  This is because MPU regions must be
naturally aligned, and the 32KiB continuous address space of the two 16KiB AHB
SRAM blocks does not start at an address divisible by 32KiB.

The only other configurations that use protected build mode on lpc17xx are
currently open1788/knsh and open1788/knxterm.  The LPC1788 has the AHB SRAM
blocks mapped more sanely (from an MPU region point of view), which is
probably why no problems emerged here.  Both still compile with my change and
other than wasting an MPU region (which would otherwise remain unused) should
work fine.  That said, I have no hardware to confirm.
2019-07-09 07:23:10 -06:00
Gregory Nutt
e5eee68d0d arch/arm/src/am335x/am335x_lcdc.c: LCDC driver is now code complete and ready for testing. 2019-07-08 15:41:32 -06:00
Gregory Nutt
6991ac37fe arch/arm/src/am335x/am335x_lcdc.c: Add logic to get/set the module reference clock. Still one more clocking interface to to. 2019-07-08 14:52:32 -06:00
Gregory Nutt
e16c73957d arch/arm/src/am335x/am335x_sysclk.c: Add a function to return a frequency of the system clock. 2019-07-08 14:08:26 -06:00
Gregory Nutt
ed91fa34a0 Squashed commit of the following:
arch/arm/src/am335x:  Add logic to map the framebuffer to a non-cached, non-buffered memory region.
    arch/arm/src/am335x:  Remove struct am335x_fbinfo_s.  Replaced with configuration settings that provide the same information.
2019-07-08 13:23:56 -06:00
Gregory Nutt
b58f598d31 This commit brings in an initial LCD driver sof the AM335x architecture. This is a work in progress and so depends on EXPERIMENTAL. The code is nearly compete, missing some clock configureation settings. It does compile properly.
Squashed commit of the following:

    arch/arm/src/am335x/am335x_lcdc.c:  LCD driver now compiles.
    arch/arm/src/am335x/am335x_lcd.c:  This brings the LCD driver to code complete.  Have not yet attempted to compile.
    arch/arm/src/am335x/am335x_edid.c:  Framebuffer is pre-allocated.  In verification of video mode, include a test to assure that the video mode can be supported by the pre-allocated framebuffer memory.
    arch/arm/src/am335x/am335x_lcd.c:  At a little bit of LCD initialization logic.  There is a long way to go.
    arch/arm/src/am335x/am335x_edid.c:  Add am335x_lcd_videomode() which provides an alternative way of initializing the LCD controller.
    arch/arm/src/am335x/am335x_edid.c:  edit.h has move to include/nuttx/video.
    arch/arm/src/am335x/hardware/am335x_cm.h:  Fix a typo in a macro name.
    arch/arm/src/am335x/am335x_edid.c:  Integrate video/edid support.
    arch/arm/src/am335x/am335x_edid.c:  Fall back to VGA mode is not valid videomode is availabe in the EDID data.
    arch/arm/src/am335x/am335x_edid.c:  Fixes for a partially clean compile.
    arch/arm/src/am335x/am335x_edid.c:  Add basic logic to convert EDID montor descriptions into a form usable for LCD configuration.
    arch/arm/src/am335x: Add framework (only) for an LCD driver.  Initial commit is simply the LPC54 framebuffer driver with naming changes.
2019-07-08 12:06:23 -06:00
Gregory Nutt
2b25d56bfd arch/arm/src/am335x/hardware/am335x_lcd.h: Fix a few typos. Add things needed by the LCDC driver. 2019-07-08 11:17:03 -06:00
Dave Marples
69e215e083 As promised, here's the patch that implements USDHC1 & 2 selection on the imxrt. If only one port is active (either 1 or 2) it will always be numbered as 0, if both are active then USDHC1 will be number 0, USDHC2 will be 1. 2019-07-07 17:07:04 -06:00
Gregory Nutt
a94970c0df arch/arm/src/am335x/hardware/am335x_cm.h: Fix a typo in a macro name. 2019-07-07 16:57:09 -06:00
Gregory Nutt
4cb8e6a0d7 Trivial, cosmetic fixes to spacing and spelling 2019-07-06 15:22:55 -06:00