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9853 Commits

Author SHA1 Message Date
Gregory Nutt
fb146abee0 All CMP platforms: Apply same fix verified on other platforms found on Xtensa. 2016-12-21 14:04:09 -06:00
Gregory Nutt
5666bf30a7 Review of last PR 2016-12-20 07:08:46 -06:00
Young
07b70fcc20 Improve the PWM logs 2016-12-20 17:05:51 +08:00
Young
9d355e12d5 Support indefinite number of pulses generation in PULSECOUNT mode 2016-12-20 14:08:31 +08:00
Young
e35406f7d6 Support PWM_PULSECOUNT feature for TI tiva 2016-12-20 13:20:04 +08:00
David Sidrane
ec85425041 STM32: Fix some STM32F7 copy paste errors 2016-12-17 08:31:12 -06:00
Gregory Nutt
4795d58e03 Back out most of 46dbbe837e. The order is correct -- or, rather, the order is the same as the order that response data is provided. Change the order will break all other drivers. 2016-12-15 07:16:24 -06:00
Gregory Nutt
f063e4c5ac Remove Calypso architecture support and support for Calypso SERCOMM driver. 2016-12-13 18:35:52 -06:00
Gregory Nutt
c83da3c48f Remove minnsh configurations and support logic: up_getc() and lowinstream. 
This was an interesting exercise to see just how small you could get NuttX, but otherwise it was not useful:  (1) the NSH code violated the OS interface layer by callup up_getc and up_putc directly, and (2) while waiting for character input, NSH would call up_getc() which would hog all of the CPU.  NOt a reasonably solution other than as a proof of concept.
 2016-12-13 18:01:23 -06:00
Gregory Nutt
26560cb9e1 i.MX6: Remove non-cached, inter-cpu memory region. Not a useful concept. 2016-12-13 16:59:50 -06:00
Frank Benkert
a36ed28790 SAMV7: MCAN: Prevent Interrupt-Flooding of ACKE when not connected to CAN-BUS. An Acknowledge-Error will occur every time no other CAN Node acknowledges the message sent. This will also occur if the device is not connected to the can-bus. The CAN-Standard declares, that the Chip has to retry a given message as long as it is not sent successfully (or it is not cancelled by the application). Every time the chip tries to resend the message an Acknowledge-Error-Interrupt is generated. At high baud rates this can lead in extremely high CPU load just for handling the interrupts (and possibly the error handling in the application). To prevent this Interrupt-Flooding we disable the ACKE once it is seen as long we didn't transfer at least one message successfully. 2016-12-13 11:22:54 -06:00
Gregory Nutt
edeee90c66 i.MX6 interrupt handling: Additional logic needed to handle nested interrupts when an interrupt stack is used 2016-12-13 10:04:38 -06:00
Gregory Nutt
113d8bdcca Fix some SMP-related compilation errors 2016-12-09 17:10:59 -06:00
Gregory Nutt
8b81cf5c7e Merged in david_s5/nuttx-3/david_s5/typo-in-stm32f76xx77xx_pinmaph-edited-on-1481298811328 (pull request #182) 
Typo in stm32f76xx77xx_pinmap.h edited online with Bitbucket
 2016-12-09 10:54:39 -06:00
Alan Carvalho de Assis
35023e4c6d LPC43xx SD card: Correct pin configuration options needed for SD card pins. 2016-12-09 10:54:17 -06:00
David Sidrane
64ae731c99 stm32_allocateheap.c edited online with Bitbucket 2016-12-09 16:35:35 +00:00
David Sidrane
e7597d1754 Typo in stm32f76xx77xx_pinmap.h edited online with Bitbucket 2016-12-09 15:53:58 +00:00
David Sidrane
df9c5b33a0 Added STM32F469 RAM size and deliberated STM32F446 size 2016-12-09 05:02:31 -10:00
Paul A. Patience
30bbeb6c1f STM32: Forgot to update chip.h for STM32F303x[BC]'s 4 ADCs 2016-12-08 16:31:39 -05:00
David Sidrane
dd309ad9e8 I was wrong - the original commit was correct. Assume a write op on the last word: address of 0xxxxxfe and count of 2. It is a valid operation and address+count is == STM32_FLASH_SIZE - so that is OK 2016-12-08 21:14:31 +00:00
David Sidrane
c77bda47d7 BUGFIX:STM32F427 was rebooting. Over reached family. 2016-12-08 20:31:56 +00:00
Gregory Nutt
ab43681f15 Update TODO and some comments. 2016-12-08 10:24:40 -06:00
Pierre-noel Bouteville
017773eda3 EFM32: Fix a compilation error 2016-12-07 09:13:13 -06:00
Gregory Nutt
a7b688e87b sched notes: Add additional note to see if/when CPU is started in SMP mode. 2016-12-07 09:08:20 -06:00
Gregory Nutt
dc79e35d65 For Cortex-A9, should also set ACTLR.FW in SMP mode to enble TLB and cache broadcasts. Does not fix SMP cache problem. 2016-12-07 09:06:41 -06:00
Gregory Nutt
b9be0279b1 Coding standard requires a blank line after every comment. 2016-12-07 06:52:15 -06:00
Gregory Nutt
cae56b825b Merged in david_s5/nuttx/upstream_to_greg_SDIO_fix (pull request #177) 
Allow a config to override the SDIO clock edge setting
 2016-12-07 12:48:11 +00:00
David Sidrane
cbf863b1ca STM32F7: Allow the config to override the clock edge setting 2016-12-06 13:43:57 -10:00
David Sidrane
7cc0a06f44 STM32: Allow the config to override the clock edge setting 2016-12-06 13:30:07 -10:00
Gregory Nutt
e190e1ee5b stm32fxxxxx_otgfs.h edited online with Bitbucket 2016-12-06 15:58:05 +00:00
Gregory Nutt
8e447453e1 Add a missing bit field definitions that was lost when stm32_otgfs.h was deleted. 2016-12-06 09:22:03 -06:00
Gregory Nutt
d6437407b1 Fix broken build. Previous commit removed a file that was being used. 2016-12-06 09:03:00 -06:00
Gregory Nutt
b6a21edb42 Merged in david_s5/nuttx/upstream_to_greg (pull request #176) 
Upstream to greg
 2016-12-06 12:22:42 +00:00
David Sidrane
885b718552 Expanded otgfs support to stm32F469 and stm32f446 
Added missing bits definitions
   Used stm32F469 and stm32f446 bit definitions
   Removed unsed header file
 2016-12-05 18:07:57 -10:00
David Sidrane
50f36f8967 Added support for stmf469 SAI and I2S PLL configuration and STM446 fixes 2016-12-05 14:21:46 -10:00
David Sidrane
8b31eda4d8 Added Timers 2-5 and control of SAI and I2S PLLs 2016-12-05 14:19:56 -10:00
Gregory Nutt
9ed0387379 Olimex-LPC1766-STK: Enable procfs in NSH configuration. Automount /proc on startup. 2016-12-05 08:52:40 -06:00
Gregory Nutt
6cff0a7012 SAMA5 PWM: Minor improvement to a loop 2016-12-04 15:48:13 -06:00
Gregory Nutt
39c4ecbcd0 SAMA5 PWM: Costmetic 2016-12-04 15:39:53 -06:00
Gregory Nutt
ff76ebfd31 SAMA5 does not build when executing from SDRAM before board frequencies are not constant. Rather, the bootloader configures the clocking and we must derive the clocking from the MCK left by the bootloader. This means lots more computations. This is untested on initial commit because I don't have a good PWM test setup right now. 2016-12-04 15:25:43 -06:00
Masayuki Ishikawa
d92a7886a4 SAM3/4: Add SMP support for the dual-core SAM4CM 2016-12-04 07:23:31 -06:00
Masayuki Ishikawa
84900298b7 ARMv7-M SMP: Applied the latest changes for ARMv7A-SMP 2016-12-04 06:49:49 -06:00
Gregory Nutt
9c65b0321d Eliminate some warnings 2016-12-04 06:24:24 -06:00
Gregory Nutt
920a9592d1 Fix a naming collision introduced in last big commit 2016-12-03 18:19:08 -06:00
Gregory Nutt
7467329a98 Eliminate CONFIG_NO_NOINTS. Lots of files changed -> lots of testing needed. 2016-12-03 16:28:19 -06:00
Gregory Nutt
ad3897531f C5471 Ethernet now supports CONFIG_NET_NOINTS 2016-12-03 12:17:55 -06:00
Gregory Nutt
43459fe75e DM09x0 Ethernet now supports CONFIG_NET_NOINTS 2016-12-03 11:42:15 -06:00
Gregory Nutt
bfa1da14e2 LM3S Ethernet now supports CONFIG_NET_NOINTS 2016-12-03 08:32:49 -06:00
Gregory Nutt
1851e9e837 SAMA5D3: Add support for CONFIG_NET_NOINTS to EMACA and GMAC driver. 2016-12-02 16:36:27 -06:00
Gregory Nutt
b95e1f656b i.MX6: Add an untested SPI driver taken directly from the i.MX1 port. 2016-12-02 13:51:07 -06:00
Alan Carvalho de Assis
cd119ad544 GPDMA driver for the LPC43xx. The GPDMA block is basically the same as the LPC17xx. Only the clock configuration is different and LPC43xx has four different DMA request sources, where LPC17xx has only two. 2016-12-01 18:01:04 -06:00
Sebastien Lorquet
db24f237d7 STM32L4: Correct USART1/2 definitions. Use default mbed UART4 settings 2016-12-01 09:00:59 -06:00
Alan Carvalho de Assis
8b3a6d1eca LPC43 SD/MMC: Correct some git definitions on SMMC control register in lpc43_sdmmc.h 2016-11-30 14:50:32 -06:00
Janne Rosberg
a03d26e88d stm32_otghshost: if STM32F446 increase number of channels to 16 2016-11-30 12:17:12 -06:00
Gregory Nutt
44668c00a0 LPC17 Ethernet: Tiny, trivial, cosmetic spacing change 2016-11-30 12:16:21 -06:00
Gregory Nutt
934aded293 arch/: Adapt all Ethernet drivers to work as though CONFIG_NET_MULTIBUFFER were set. Remove all references to CONFIG_NET_MULTIBUFFER 2016-11-29 16:06:48 -06:00
Gregory Nutt
f06d521c10 Minor extensions to some comments 2016-11-29 10:01:38 -06:00
Gregory Nutt
79bb895073 i.MX6: Don't output the alphabet if CONFIG_DEBUG_FEATURES is not set. 2016-11-29 08:34:22 -06:00
Gregory Nutt
a8b69c3efe Back out a debug change that was included in commit 2016-11-29 07:51:49 -06:00
Marc Rechté
3f91bd6056 STM32 DAC: Fix shift value whenever there are is a DAC2 and, hence, up to three interfaces. 2016-11-29 07:03:54 -06:00
Gregory Nutt
d65be718c2 sched_note: Extend OS instrumentation to include some SMP events. 2016-11-27 17:14:57 -06:00
Gregory Nutt
cbf98ae0a0 ARMv7 GIC: SGIs are non-maskable but go through the same path as other, maskable interrupts. Added logic to serialize SGI processing when necessary. 2016-11-27 13:18:34 -06:00
Gregory Nutt
21e42d18c1 ARMv7-A/i.MX6 SMP: Move SMP coherernt cache setup to earlier in initialization of CPUn, n>0 2016-11-27 11:28:24 -06:00
Gregory Nutt
cd54c71dc1 ARMv7-A/i.MX6: Modify handling of the SMP cache coherency configuration so that it is identical to the steps from the TRM. Makes no differenct, however. 2016-11-27 10:21:46 -06:00
Gregory Nutt
278d8330d6 arm_scu.c edited online with Bitbucket. Fux some typos. 2016-11-27 02:59:42 +00:00
Gregory Nutt
3f6eadc238 ARMv7-A: Fix some SCU SMP logic 2016-11-26 18:41:48 -06:00
Gregory Nutt
546e352830 i.MX6: Add some controls to enable SMP cache coherency in SMP mode 2016-11-26 17:46:20 -06:00
Gregory Nutt
3353d9280f i.MX6: Disable non-cached region support. Add SCU register definitions. 2016-11-26 17:03:57 -06:00
Gregory Nutt
8dc79bb7ef Update comments and README file 2016-11-26 16:02:37 -06:00
Gregory Nutt
b2ba12e02a SMP: Basic function 2016-11-26 14:23:23 -06:00
Gregory Nutt
785ed5faf2 SMP: A few more compile/link issues. Still problems. 2016-11-26 13:20:11 -06:00
Gregory Nutt
6ff6da083f Fix a few compile related issues from the last commit 2016-11-26 12:23:09 -06:00
Gregory Nutt
aae306e942 i.MX6 SMP: Inter-CPU data no saved in a non-cacheable region. 2016-11-26 12:04:02 -06:00
Gregory Nutt
dda0ac8b21 Update comments 2016-11-26 11:06:24 -06:00
Gregory Nutt
9376296e99 Merge remote-tracking branch 'origin/master' into imx6-smp 2016-11-26 11:02:55 -06:00
Gregory Nutt
8bacb1e426 Update comments 2016-11-26 11:02:21 -06:00
Gregory Nutt
bdf570ea08 Fix typos in comments 2016-11-26 10:42:25 -06:00
Gregory Nutt
2fba04f752 i.MX6 SMP: Beginning of non-cacheable region (incomplete) 2016-11-26 10:37:06 -06:00
Gregory Nutt
61b45a8544 i.MX6: Add some comments 2016-11-26 09:27:29 -06:00
Gregory Nutt
e3fe320e08 SMP: Add support for linking spinlocks into a special, non-cached memory region. 2016-11-26 08:47:03 -06:00
Maciej Wójcik
0d0b1b64e2 Fix for F1 RTC Clock, tested on F103 2016-11-25 06:17:18 +01:00
Gregory Nutt
b08fb33c28 SMP: Fix typos in some conditional compilation 2016-11-24 17:59:45 -06:00
Gregory Nutt
7f636f2280 SMP: Add spin_trylock(). Use this in conditions where other CPUs need to stopped but we cannot call enter_critical_section. 2016-11-24 13:33:43 -06:00
Gregory Nutt
f77dcdf323 ARMv7-A SMP: Add a little logic to signal handling. 2016-11-24 11:45:05 -06:00
Gregory Nutt
c03d126da6 arm_cpupause.c edited online with Bitbucke. What was I thinking... Back out previous change. 2016-11-24 04:45:07 +00:00
Gregory Nutt
19e7f2210e arm_cpupause.c edited online with Bitbucket. Fix a typo in a comment. 2016-11-24 04:24:40 +00:00
Gregory Nutt
4b0bbf41ca SMP: Fix backward condition in test. 2016-11-23 22:24:14 -06:00
Alan Carvalho de Assis
7dbc25b02b LPC43xx: Add timer driver; configs/bambino-200e: Add support for timer driver 2016-11-23 13:33:51 -06:00
Gregory Nutt
f90525a5d1 SMP: Update some comments; trivial improvement by inlining static function. 2016-11-22 16:48:57 -06:00
Gregory Nutt
12f830ffd5 SAM3/4: Name of method is now setcallback, not sethandler 2016-11-22 12:06:07 -06:00
Gregory Nutt
bac7153609 SMP: Add logic to avoid a deadlock condition when CPU1 is hung waiting for g_cpu_irqlock and CPU0 is waitin for g_cpu_paused 2016-11-22 11:34:16 -06:00
Sebastien Lorquet
ec586ab350 implementation of dumpgpio for stm32l4, was required for pwm debug. 2016-11-22 07:57:21 -06:00
Gregory Nutt
130bfa3f6b Remove a assertion condition that appears to rarely cause false-alarm assertions. Teported by Petteri Aimonen 2016-11-21 14:43:56 -06:00
Gregory Nutt
f53e48199f Simplify and document some macros 2016-11-21 13:12:43 -06:00
Gregory Nutt
558784d06f Spinlocks: Added capability to provide architecture-specific memory barriers. This was for i.MX6 but does not help with the SMP problems. It is still a good feature. 2016-11-21 11:55:59 -06:00
Gregory Nutt
0804286ad3 arch/: Add option to use low-priority work queue to all Ethernet drivers in arch that support CONFIG_NET_NOINTS. 2016-11-19 09:20:01 -06:00
Gregory Nutt
0db99b8c89 Trivial fix from review of last PR 2016-11-19 06:52:51 -06:00
Gregory Nutt
8705ce816a Merged in gnagflow/nuttx (pull request #173) 
Master
 2016-11-19 12:49:56 +00:00
Wolfgang Reißnegger
b23c1f8817 Typo fix in sam_udp.c 2016-11-18 17:23:22 -08:00
Wolfgang Reißnegger
d135246a7d SAM3/4: Remove 'stalled' flag in UDP driver. 
The flag is not necessary. The state of the endpoint can be determined
using 'epstate' instead.
 2016-11-18 17:23:21 -08:00