Commit Graph

1662 Commits

Author SHA1 Message Date
Gregory Nutt
f1a20f49ff SAMA5 OHCI: Fix semaphore handling bug. OHCI is now function by itself again after changes to integrate with EHCI 2013-08-25 08:57:35 -06:00
Gregory Nutt
20b1b584e7 Network ARP harvesting: Corect backward condition in netmask task. From Max Holtzberg 2013-08-25 07:33:47 -06:00
Gregory Nutt
cd84d1bec4 SAMA5: EHCI now handles low- and full-speed connections by giving them to OHCI; OHCI now uses the work queue to defer interrupt processing; If both OHCI and EHCI are enabled, EHCI is the master of the UHPHS interrupt 2013-08-24 11:34:24 -06:00
Gregory Nutt
2d5313a931 Fix #endif with missing #if condition. Reported by Andrew Bradford 2013-08-23 16:40:30 -06:00
Gregory Nutt
db1b3c421b SourceForge bug #16 Fix IO pin map. Add CONFIG_SERIAL_TERMIOS support. From CCTSAO 2013-08-23 11:48:53 -06:00
Gregory Nutt
f356586fd3 SAMA5 EHCI: No complete for bulk and control endpoints 2013-08-22 13:36:16 -06:00
Gregory Nutt
320a2e2a0a Beginning of support for SAMA5 EHCI. Not much there yet 2013-08-20 15:46:36 -06:00
Gregory Nutt
19d7c90d4e USB host: Add device address management support in preparation for USB hub support 2013-08-18 14:31:57 -06:00
Gregory Nutt
dc07d65e14 STM32 F1 I2C: Fix a typo that crept in with some recent changes. From Yiran Liao 2013-08-18 07:45:14 -06:00
Gregory Nutt
e2f68ac85f Add EHCI header file (not quite complete) 2013-08-17 14:19:18 -06:00
Gregory Nutt
11086f34d0 SAMA5 OHCI: Driver is now basically functional 2013-08-16 13:13:21 -06:00
Gregory Nutt
10daf06976 STM32 SPI: nbits interface extended to handle LSB- or MSB-first operation. From Teemu Pirinen 2013-08-16 11:35:22 -06:00
Gregory Nutt
79d5239023 SAMA5 OHCI: Use physical address and flush and/or invalidate data caches as necessary 2013-08-14 12:23:06 -06:00
Gregory Nutt
3f4b90cc3b SAMA5: Major restructuring of the the OHCI driver drivers to better handle the multiple root hub ports and concureent transfers on each port. 2013-08-13 16:48:14 -06:00
Gregory Nutt
1700d06d89 Separate wait() and enumerate() methods from struct usbhost_driver_s and move to new interface, struct usbhost_connection_s. This is part of the necessary restructuring of the USB host interface to support multiple root hub ports. 2013-08-13 15:03:46 -06:00
Gregory Nutt
9220a748bd Fix re-entry problem in SAMA5 up_putc 2013-08-13 09:42:40 -06:00
Gregory Nutt
1ec49f08b4 STM32 F3 fixes from John Wharington 2013-08-13 07:48:18 -06:00
Gregory Nutt
120a3604c9 More changes to USB host interface to support multiple downstream ports 2013-08-12 16:29:33 -06:00
Gregory Nutt
a384129490 Convert olimex-stm32-p107/nsh configuration to use kconfig-frontends tool. From Max Holtzberg 2013-08-12 15:00:28 -06:00
Gregory Nutt
e09bd50fdd First of several changes needed to support multiple USB host root hubs 2013-08-12 14:44:06 -06:00
Gregory Nutt
0da218483d SAMA5: Add logic to control VBUS power for OHCI 2013-08-12 11:59:10 -06:00
Gregory Nutt
e2d7ab9487 SAMA5: Add support for initialization of the USB host and mass storage class 2013-08-11 17:52:36 -06:00
Gregory Nutt
ed49812d2c Add untested OHCI driver for the SAMA5; structure naming and header files for USB host initialization prototypes 2013-08-11 17:11:32 -06:00
Gregory Nutt
544185c683 Added option to disable STM32 serial port re-ordering 2013-08-10 19:29:44 -06:00
Gregory Nutt
0f20d4581b Added FIONREAD and FIONWRITE to CDC/ACM driver. From Lorenz Meier 2013-08-10 19:21:39 -06:00
Gregory Nutt
82b528e0c8 Serial FIONREAD, FIONWRITE, and TERMIOS I/O processing from Mike Smith, Andrew Tridgell, and and Lorenz Meier 2013-08-10 19:14:05 -06:00
Gregory Nutt
97e13b33ab MMC/SD SDIO: Correct return values when multiple block transfers are suppressed. From Andrew Tridgell via Lorenz Meier 2013-08-10 18:29:22 -06:00
Gregory Nutt
da4cebf572 SAMA5: Fix HSMCI race condition. Now memory card interface is functional with DMA 2013-08-10 18:01:23 -06:00
Gregory Nutt
efabe4aaff SAMA5: Centralize logic for conversion between physical and virtual addresses 2013-08-09 17:25:53 -06:00
Gregory Nutt
619cd66f33 Fix some cache-related issues with the SAMA5 DMA driver 2013-08-09 15:25:13 -06:00
Gregory Nutt
bfaf64e54e Fix SAM bug: Parmaters reversed in DMA function call 2013-08-06 15:47:09 -06:00
Gregory Nutt
b0e8231fa3 SAM3,4,A5 DMAC driver fixes 2013-08-06 13:27:48 -06:00
Gregory Nutt
6a429e675f SAM3,4,A5: Fix some masked status checks that can generate false error reports 2013-08-06 12:36:56 -06:00
Gregory Nutt
fa011d9aca SAMA5: Add PIO interrupt support. Massive name changes for consistency in PIO vs GPIO naming. SAMA5D3x-EK: Add support for SD card detection PIO interrupts 2013-08-06 10:20:17 -06:00
Gregory Nutt
369bf26b20 SAMA5: Add HSMCI memory card driver support 2013-08-05 16:21:24 -06:00
Gregory Nutt
8c88dcd0c7 SAMA5: SPI Driver + AT25 FLASH work; SAM3/4: Correct an error, SPI will not be correctly configured if CONFIG_SPI_OWNBUS=n 2013-08-05 10:29:43 -06:00
Gregory Nutt
cbe8c5ed56 SAMA5: Add logic to auto-mount a file system on AT25 SPI FLASH for NSH 2013-08-05 08:24:39 -06:00
Gregory Nutt
906506c61c SAMA5D3x-EK: At support for the AT25 serial FLASH 2013-08-04 16:56:41 -06:00
Gregory Nutt
1060b232e9 SAMA5: Add register level debug option for SPI 2013-08-04 14:45:24 -06:00
Gregory Nutt
83af194db1 SAMA5: SPI driver now supports both SPI0 and SPI1 2013-08-04 12:50:20 -06:00
Gregory Nutt
163ec613b1 SAMA5: Add basic SPI suppport (untested) 2013-08-04 11:08:20 -06:00
Gregory Nutt
1ea55fc2a7 SAMA5: Add DMA suppport (untested) 2013-08-04 10:44:18 -06:00
Gregory Nutt
5cdc3db214 SAMA5: Add DMA controller register definitions 2013-08-03 12:13:42 -06:00
Gregory Nutt
6422792f57 Standard configuration variables used to enable interupt controller debug; SAMA5: Correct handling of spurious interrupts 2013-08-03 08:22:37 -06:00
Gregory Nutt
3ee10f0f08 Correct some typos int he MPADDRCS register address definitions 2013-08-02 12:06:11 -06:00
Gregory Nutt
2feb83a2f8 SAMA5: More MMU-related changes to properly initialize SDRAM 2013-08-02 11:11:57 -06:00
Gregory Nutt
2ac9669a87 SAMA5: Add logic to initialize SAMA5D3x-EK on-board SDRAM 2013-08-01 16:58:55 -06:00
Gregory Nutt
8b8fe4d073 SAMA5: Add DDR controller register definitions 2013-08-01 12:27:41 -06:00
Gregory Nutt
b148465beb ARMv7-A: Map all of .text, .bss, .data., stacks before enabling the MMU and caching. This is simpler and avoids fears I have about caching 2013-08-01 10:05:33 -06:00
Gregory Nutt
f2195a16b2 ARMv7-A: Separate CONFIG_PAGING start-up logic into a different startup file. Too much conditional compilation. 2013-08-01 07:41:00 -06:00
Gregory Nutt
8b44b8fce7 Prep for NuttX-6.29 release 2013-07-31 14:25:06 -06:00
Gregory Nutt
ffdd034c35 SAMA5: Add an NSH configuration of the SAMA5D3x-EK board 2013-07-31 10:46:13 -06:00
Gregory Nutt
2c6b370c4a Add ARMv7-A irqdisable() inline function 2013-07-30 11:37:09 -06:00
Gregory Nutt
5a94767c52 STM32 F3 I2C driver from John Wharington 2013-07-30 10:35:17 -06:00
Gregory Nutt
b57f54fbd0 STM32 DAC DMA fixes from John Wharington 2013-07-30 08:54:32 -06:00
Gregory Nutt
36b1cd0a6b SAMA5: Separate cache operations into separate files 2013-07-29 18:38:02 -06:00
Gregory Nutt
1728594259 SAMA5: Add a little NuttX debug program to help debugger programs in NOR flash 2013-07-29 13:57:32 -06:00
Gregory Nutt
f96c6793b9 Add SAMA5 HSMC register definitions and logic to reconfigure the NOR FLASH 2013-07-29 10:56:21 -06:00
Gregory Nutt
4ba648aaae SAMA5: Add file structure to support board-specific initialization of NOR flash 2013-07-29 07:41:53 -06:00
Gregory Nutt
9a94a3707c SAMA5: The ostest configuration have been converted to run out of NOR flash. There is more to be done, however 2013-07-28 15:07:35 -06:00
Gregory Nutt
7dc8dd4b50 SAMA5: Correct a clock configuration bug; clarify some MMU memory types 2013-07-28 12:44:06 -06:00
Gregory Nutt
dc92037e67 Add a hello world configuration to help with the SAMA5 bringup 2013-07-26 15:28:01 -06:00
Gregory Nutt
70f0ffdfc5 Finally... renamed all CONFIG_DRAM_ settings to CONFIG_RAM_ 2013-07-26 10:09:17 -06:00
Gregory Nutt
55df28dbcf Fix an uninitialized register error that crept into the ARM9 start up code many years ago and was recently cloned into the Cortex-A5. Obviously no on has used NuttX with ARM9 for years 2013-07-24 20:12:04 -06:00
Gregory Nutt
77e1c27005 Update SAMA5D3x-EK board configuration to support on-board UART connections, LEDs, and push buttons 2013-07-24 12:27:12 -06:00
Gregory Nutt
04b3bb1826 Revamp the way external memory regions are configured; Add logic to add SAMA5 external memory regions to the heap 2013-07-24 10:08:32 -06:00
Gregory Nutt
535048a73c Improve some ARMv7-A/M floating point register save time; Add floating point register save logic for ARMv7-A 2013-07-23 17:52:06 -06:00
Gregory Nutt
812bf02972 ARMv7-A: Need 8-byte stack alignment when callign C code from interrupt handlers. This change needs to be ported to other ARM architectures as well 2013-07-23 14:47:16 -06:00
Gregory Nutt
14df812735 SAMA5: Adapt clocking for different boot modes. New header files for AXI matrix, BSC, and SFR 2013-07-23 13:54:49 -06:00
Gregory Nutt
afdd6320ee Add SAMA5D3 pin multiplexing definitions 2013-07-23 09:47:01 -06:00
Gregory Nutt
f07d09aa48 Add SAMA5 GPIO configuration support 2013-07-22 20:59:47 -06:00
Gregory Nutt
339a55f1ea Add support SAMA5 UART and serial driver 2013-07-22 19:16:37 -06:00
Gregory Nutt
e67d610347 SAMA5 clock configuration should now agree with Atmel sample code; Added header file with macros to enable and disable peripheral clocking 2013-07-22 17:00:02 -06:00
Gregory Nutt
a9b0f304e6 Add SAMA5 clock logic. Cloned from SAM3U and not yet verified 2013-07-22 14:42:05 -06:00
Gregory Nutt
1350b2a576 SAMA5 interrupt handling logic 2013-07-22 11:54:39 -06:00
Gregory Nutt
87f54f7d0b Add system timer logic for the SAMA5 2013-07-21 15:49:17 -06:00
Gregory Nutt
543b5b7e03 A few more Cortex-A5 and SAMA5 files 2013-07-21 12:52:38 -06:00
Gregory Nutt
66259bfc53 Misc Cortex-A5 changes include new file for cache operations 2013-07-20 13:06:00 -06:00
Gregory Nutt
4a81d47c86 Basic framework to support the AT91SAMA5D3 family and the SAMA5D3x-EK board(s) in particular 2013-07-19 15:23:03 -06:00
Gregory Nutt
8f2ad7eec1 Some initial frame for Cortex-A5 support. No much yet 2013-07-18 15:20:47 -06:00
Gregory Nutt
c960273afd Build/test framework for the Zmodem sz and rz commands which are on their way 2013-07-12 16:01:37 -06:00
Gregory Nutt
352c313fa7 Fix typo/compilation error with USB device DMA memory allocation is enabled 2013-07-12 07:09:24 -06:00
Gregory Nutt
c6b141d190 Fix typoes in drivers/rwbuffer.c from Chia Cheng Tsao 2013-07-09 07:59:28 -06:00
Gregory Nutt
7536b4654b Ticket #16: STM32 OTG FS device driver endpoint allocation. From Chia Cheng Tsao 2013-07-08 08:55:05 -06:00
Gregory Nutt
4d8a4b69a4 Add CRC16 support 2013-07-07 17:35:35 -06:00
Gregory Nutt
25c393f371 prohibit re-entrance into sam_configgpio() 2013-07-05 17:15:54 -06:00
Gregory Nutt
37ed44a1ee Fix type in the USB composite device driver 2013-07-04 07:47:32 -06:00
Gregory Nutt
94e2f4ceb4 Fix SAM34 interrupt handling for ports D-F; fix MISO logic in Arduino Due touchscreen driver 2013-07-03 08:12:45 -06:00
Gregory Nutt
e1dab23711 Add a general bit-bang SPI lower-half driver and implement the bit-bang driver for the Arduino ITEAD TFT shield 2013-07-01 16:50:16 -06:00
Gregory Nutt
8b68ea2f94 Add a general bit-bang SPI upper-half driver 2013-07-01 12:23:26 -06:00
Gregory Nutt
09faaccc02 Created new directories to hold SPI-related files 2013-07-01 08:11:54 -06:00
Gregory Nutt
8ba8ad39f9 SAM3U-EK touchscreen is now functional; created an NxWM configuration to test it further 2013-06-28 17:07:58 -06:00
Gregory Nutt
2ba00060bc SAM33/4: Need to disable write protection before modify PIO pin configuration 2013-06-28 15:34:51 -06:00
Gregory Nutt
3505ca7556 Add an NSH configuration for the Arduino Due; Pluse several fixes related to the Due and to the SAM3X in general 2013-06-28 14:32:08 -06:00
Gregory Nutt
e0310e2cc8 Flesh out the Arduino Due board configuratino and integrate it with the build and configuration system 2013-06-27 14:24:27 -06:00
Gregory Nutt
bc7ac20616 Add peripheral configuration logic for the SAM3X/3A; Change all references to SAM3/4 SPI to SPI0 for compatibity with the SAM3X/3A which has SPI0 and SPI1; Add directory which will eventually holdl an Arduino Due port 2013-06-26 18:46:44 -06:00
Gregory Nutt
d4b7efb34e Add SAM3X/3A pin multiplexing and GPIO encoding header files 2013-06-26 17:02:43 -06:00
Gregory Nutt
f668abaed1 Add SAM3X/3A memory map 2013-06-26 14:37:57 -06:00
Gregory Nutt
3692dfaf26 Add SAM3X/3A peripheral clock controls 2013-06-26 14:00:26 -06:00
Gregory Nutt
b089263e1c Add SAM3X/3A interrupt vectors 2013-06-26 12:59:56 -06:00