Gregory Nutt
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16ac25fd09
|
Clean up some LP17xx and STM32 USB host configuration compilation errors due to the massive changes to the USB host interfaces needed to support the SAMA5
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2013-08-13 17:43:19 -06:00 |
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Gregory Nutt
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3f4b90cc3b
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SAMA5: Major restructuring of the the OHCI driver drivers to better handle the multiple root hub ports and concureent transfers on each port.
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2013-08-13 16:48:14 -06:00 |
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Gregory Nutt
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1700d06d89
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Separate wait() and enumerate() methods from struct usbhost_driver_s and move to new interface, struct usbhost_connection_s. This is part of the necessary restructuring of the USB host interface to support multiple root hub ports.
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2013-08-13 15:03:46 -06:00 |
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Gregory Nutt
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a65ac5bc72
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Back out most of the changes of 3b04d08043742b9e65cf38d45988b35bff91daed
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2013-08-13 14:12:27 -06:00 |
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Gregory Nutt
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b575450a04
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Separate SAMA5 OHCI interrupt handling into separate functions
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2013-08-13 13:34:35 -06:00 |
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Gregory Nutt
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ad258cb3b7
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SAMA5 OHCI: Fix some erors in the loop that waits for device connection changes
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2013-08-13 09:44:16 -06:00 |
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Gregory Nutt
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9220a748bd
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Fix re-entry problem in SAMA5 up_putc
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2013-08-13 09:42:40 -06:00 |
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Gregory Nutt
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1ec49f08b4
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STM32 F3 fixes from John Wharington
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2013-08-13 07:48:18 -06:00 |
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Gregory Nutt
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120a3604c9
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More changes to USB host interface to support multiple downstream ports
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2013-08-12 16:29:33 -06:00 |
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Gregory Nutt
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e09bd50fdd
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First of several changes needed to support multiple USB host root hubs
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2013-08-12 14:44:06 -06:00 |
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Gregory Nutt
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0da218483d
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SAMA5: Add logic to control VBUS power for OHCI
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2013-08-12 11:59:10 -06:00 |
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Gregory Nutt
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ed49812d2c
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Add untested OHCI driver for the SAMA5; structure naming and header files for USB host initialization prototypes
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2013-08-11 17:11:32 -06:00 |
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Gregory Nutt
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dd3c682443
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SAMA5: Some improvements to the HSCMI card removal/insertion logic
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2013-08-11 11:13:11 -06:00 |
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Gregory Nutt
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d6264c2c1f
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Add CAN configuration to STM32 config menu
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2013-08-10 19:37:35 -06:00 |
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Gregory Nutt
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054468d151
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STM32: Fix STM32 serial init for non-reordered serial ports. From Lorenz Meier
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2013-08-10 19:33:16 -06:00 |
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Gregory Nutt
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544185c683
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Added option to disable STM32 serial port re-ordering
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2013-08-10 19:29:44 -06:00 |
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Gregory Nutt
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da4cebf572
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SAMA5: Fix HSMCI race condition. Now memory card interface is functional with DMA
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2013-08-10 18:01:23 -06:00 |
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Gregory Nutt
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968b2553cd
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Rearrange configuration settings so that ARCH_HAVE_SDIO is moved to higher, sharable level
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2013-08-10 09:06:53 -06:00 |
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Gregory Nutt
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c5e66ae051
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Extend the virtual-to-physical address conversion logic to handle NFS SRM, UDPH SRAM, and external SRAM and PSRAM.
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2013-08-09 17:55:27 -06:00 |
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Gregory Nutt
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efabe4aaff
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SAMA5: Centralize logic for conversion between physical and virtual addresses
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2013-08-09 17:25:53 -06:00 |
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Gregory Nutt
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619cd66f33
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Fix some cache-related issues with the SAMA5 DMA driver
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2013-08-09 15:25:13 -06:00 |
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Gregory Nutt
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628f50ba61
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SAM3,4,A5 DMA fixes; SAMA5 SPI driver now supports DMA transfers
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2013-08-09 13:12:16 -06:00 |
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Gregory Nutt
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417636e1de
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SAMA5: Use RDR/TDR registers for DMA, not FIFO registers; change DMA bit settings to match Atmel example. Still no DMA
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2013-08-08 15:51:16 -06:00 |
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Gregory Nutt
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83cbd61c8c
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SAMA5 DMA: Need to flush caches; DMA channel depends upon direction of DMA; the maximum transfer size in bytes depends on the number of bytes per transfer
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2013-08-08 13:15:52 -06:00 |
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Gregory Nutt
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9d81d4727c
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More SAMA5 DMAC driver fixes. Still does not work.
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2013-08-07 17:19:48 -06:00 |
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Gregory Nutt
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2df1d56a01
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SAMA3,4,A5: Misc corrections to DMA and HSMCI drivers
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2013-08-07 11:32:08 -06:00 |
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Gregory Nutt
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bfaf64e54e
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Fix SAM bug: Parmaters reversed in DMA function call
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2013-08-06 15:47:09 -06:00 |
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Gregory Nutt
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b0e8231fa3
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SAM3,4,A5 DMAC driver fixes
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2013-08-06 13:27:48 -06:00 |
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Gregory Nutt
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6a429e675f
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SAM3,4,A5: Fix some masked status checks that can generate false error reports
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2013-08-06 12:36:56 -06:00 |
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Gregory Nutt
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ce9eb71495
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SAMA5: A few early, easy bug fixes. The rest will all be difficult
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2013-08-06 11:29:53 -06:00 |
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Gregory Nutt
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fa011d9aca
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SAMA5: Add PIO interrupt support. Massive name changes for consistency in PIO vs GPIO naming. SAMA5D3x-EK: Add support for SD card detection PIO interrupts
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2013-08-06 10:20:17 -06:00 |
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Gregory Nutt
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369bf26b20
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SAMA5: Add HSMCI memory card driver support
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2013-08-05 16:21:24 -06:00 |
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Gregory Nutt
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8c88dcd0c7
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SAMA5: SPI Driver + AT25 FLASH work; SAM3/4: Correct an error, SPI will not be correctly configured if CONFIG_SPI_OWNBUS=n
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2013-08-05 10:29:43 -06:00 |
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Gregory Nutt
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cbe8c5ed56
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SAMA5: Add logic to auto-mount a file system on AT25 SPI FLASH for NSH
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2013-08-05 08:24:39 -06:00 |
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Gregory Nutt
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906506c61c
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SAMA5D3x-EK: At support for the AT25 serial FLASH
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2013-08-04 16:56:41 -06:00 |
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Gregory Nutt
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1060b232e9
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SAMA5: Add register level debug option for SPI
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2013-08-04 14:45:24 -06:00 |
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Gregory Nutt
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83af194db1
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SAMA5: SPI driver now supports both SPI0 and SPI1
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2013-08-04 12:50:20 -06:00 |
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Gregory Nutt
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163ec613b1
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SAMA5: Add basic SPI suppport (untested)
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2013-08-04 11:08:20 -06:00 |
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Gregory Nutt
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1ea55fc2a7
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SAMA5: Add DMA suppport (untested)
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2013-08-04 10:44:18 -06:00 |
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Gregory Nutt
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5cdc3db214
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SAMA5: Add DMA controller register definitions
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2013-08-03 12:13:42 -06:00 |
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Gregory Nutt
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6422792f57
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Standard configuration variables used to enable interupt controller debug; SAMA5: Correct handling of spurious interrupts
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2013-08-03 08:22:37 -06:00 |
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Gregory Nutt
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3c404ea742
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Various changes to get SAMA5 SDRAM working. Marginally functional, but there is more to be done
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2013-08-02 18:30:27 -06:00 |
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Gregory Nutt
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3ee10f0f08
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Correct some typos int he MPADDRCS register address definitions
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2013-08-02 12:06:11 -06:00 |
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Gregory Nutt
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2feb83a2f8
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SAMA5: More MMU-related changes to properly initialize SDRAM
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2013-08-02 11:11:57 -06:00 |
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Gregory Nutt
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2ac9669a87
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SAMA5: Add logic to initialize SAMA5D3x-EK on-board SDRAM
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2013-08-01 16:58:55 -06:00 |
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Gregory Nutt
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8b8fe4d073
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SAMA5: Add DDR controller register definitions
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2013-08-01 12:27:41 -06:00 |
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Gregory Nutt
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b148465beb
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ARMv7-A: Map all of .text, .bss, .data., stacks before enabling the MMU and caching. This is simpler and avoids fears I have about caching
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2013-08-01 10:05:33 -06:00 |
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Gregory Nutt
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f2195a16b2
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ARMv7-A: Separate CONFIG_PAGING start-up logic into a different startup file. Too much conditional compilation.
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2013-08-01 07:41:00 -06:00 |
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Gregory Nutt
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ffdd034c35
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SAMA5: Add an NSH configuration of the SAMA5D3x-EK board
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2013-07-31 10:46:13 -06:00 |
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Gregory Nutt
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7dfef5e22e
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SAMA5: Modification of some CPSR-related inline functions
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2013-07-31 09:11:24 -06:00 |
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Gregory Nutt
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fde3777e9e
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Fix Cortex-A CPSR register field definition
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2013-07-30 19:05:24 -06:00 |
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Gregory Nutt
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bfa1a9545b
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SAMA5: Change mapping of vector tables to work around that fact that I don't understand how the AXI MATRIX remap works
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2013-07-30 16:19:52 -06:00 |
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Gregory Nutt
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8bfdf70766
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ARMv7-A: Add cp15_disable_dcache(); SAMA5: nor_main.c no disables MMU and caches; Should not remap ISRAM to address 0x0 unless we booted into ISRAM
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2013-07-30 13:20:33 -06:00 |
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Gregory Nutt
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c4c222ca3a
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More DAC changes from John Wharington
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2013-07-30 11:41:53 -06:00 |
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Gregory Nutt
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2c6b370c4a
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Add ARMv7-A irqdisable() inline function
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2013-07-30 11:37:09 -06:00 |
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Gregory Nutt
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5a94767c52
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STM32 F3 I2C driver from John Wharington
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2013-07-30 10:35:17 -06:00 |
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Gregory Nutt
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b57f54fbd0
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STM32 DAC DMA fixes from John Wharington
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2013-07-30 08:54:32 -06:00 |
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Gregory Nutt
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413aba0bf5
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SAMA5: More cache and mmu inline utility functions
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2013-07-29 19:57:15 -06:00 |
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Gregory Nutt
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36b1cd0a6b
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SAMA5: Separate cache operations into separate files
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2013-07-29 18:38:02 -06:00 |
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Gregory Nutt
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5351598323
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Changes to ARMv7-A boot logic to handle the case where we execute out of NOR FLASH
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2013-07-29 17:54:56 -06:00 |
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Gregory Nutt
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f96c6793b9
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Add SAMA5 HSMC register definitions and logic to reconfigure the NOR FLASH
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2013-07-29 10:56:21 -06:00 |
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Gregory Nutt
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4ba648aaae
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SAMA5: Add file structure to support board-specific initialization of NOR flash
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2013-07-29 07:41:53 -06:00 |
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Gregory Nutt
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9a94a3707c
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SAMA5: The ostest configuration have been converted to run out of NOR flash. There is more to be done, however
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2013-07-28 15:07:35 -06:00 |
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Gregory Nutt
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7dc8dd4b50
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SAMA5: Correct a clock configuration bug; clarify some MMU memory types
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2013-07-28 12:44:06 -06:00 |
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Gregory Nutt
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263678e05b
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SAMA5: Correct vector mapping
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2013-07-28 09:44:11 -06:00 |
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Gregory Nutt
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f0e3011fc3
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Removed unused ARMv7-A cache function
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2013-07-27 14:03:02 -06:00 |
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Gregory Nutt
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efa21b82bc
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SAMA5: Fix heap allocation bugs
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2013-07-27 11:28:31 -06:00 |
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Gregory Nutt
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c4ec723089
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SAMA5 page table is cached; need to flush the cache each time that the page table is updated
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2013-07-27 09:27:37 -06:00 |
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Gregory Nutt
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6fc4b9aacc
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Correct an error in Cortex-A5 intermediate MMU mapping
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2013-07-26 17:26:53 -06:00 |
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Gregory Nutt
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dc92037e67
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Add a hello world configuration to help with the SAMA5 bringup
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2013-07-26 15:28:01 -06:00 |
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Gregory Nutt
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70f0ffdfc5
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Finally... renamed all CONFIG_DRAM_ settings to CONFIG_RAM_
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2013-07-26 10:09:17 -06:00 |
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Gregory Nutt
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ec8a56259c
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SAMA5: If the page table is in high memory, make sure that it is excluded from the heap
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2013-07-26 09:16:46 -06:00 |
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Gregory Nutt
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0fb58d2cf1
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Fix some bad page table definitions of last commit
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2013-07-25 18:11:25 -06:00 |
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Gregory Nutt
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49f9b7040e
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Misc Cortex-A5 MMU-related fix -- still does not boot
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2013-07-25 16:37:55 -06:00 |
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Gregory Nutt
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55df28dbcf
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Fix an uninitialized register error that crept into the ARM9 start up code many years ago and was recently cloned into the Cortex-A5. Obviously no on has used NuttX with ARM9 for years
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2013-07-24 20:12:04 -06:00 |
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Gregory Nutt
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e6beda428a
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Fix SAMA5 vector linking issue
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2013-07-24 12:51:42 -06:00 |
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Gregory Nutt
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77e1c27005
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Update SAMA5D3x-EK board configuration to support on-board UART connections, LEDs, and push buttons
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2013-07-24 12:27:12 -06:00 |
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Gregory Nutt
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04b3bb1826
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Revamp the way external memory regions are configured; Add logic to add SAMA5 external memory regions to the heap
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2013-07-24 10:08:32 -06:00 |
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Gregory Nutt
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3860fc17f0
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Improve Cortex-A5 context switching so that a little less copying is done
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2013-07-24 07:47:51 -06:00 |
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Gregory Nutt
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d6ae8db987
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ARMv7-N: Fix a copy error introduced in the previous check-in
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2013-07-23 19:09:17 -06:00 |
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Gregory Nutt
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535048a73c
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Improve some ARMv7-A/M floating point register save time; Add floating point register save logic for ARMv7-A
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2013-07-23 17:52:06 -06:00 |
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Gregory Nutt
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812bf02972
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ARMv7-A: Need 8-byte stack alignment when callign C code from interrupt handlers. This change needs to be ported to other ARM architectures as well
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2013-07-23 14:47:16 -06:00 |
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Gregory Nutt
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14df812735
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SAMA5: Adapt clocking for different boot modes. New header files for AXI matrix, BSC, and SFR
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2013-07-23 13:54:49 -06:00 |
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Gregory Nutt
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afdd6320ee
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Add SAMA5D3 pin multiplexing definitions
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2013-07-23 09:47:01 -06:00 |
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Gregory Nutt
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f07d09aa48
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Add SAMA5 GPIO configuration support
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2013-07-22 20:59:47 -06:00 |
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Gregory Nutt
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339a55f1ea
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Add support SAMA5 UART and serial driver
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2013-07-22 19:16:37 -06:00 |
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Gregory Nutt
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e67d610347
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SAMA5 clock configuration should now agree with Atmel sample code; Added header file with macros to enable and disable peripheral clocking
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2013-07-22 17:00:02 -06:00 |
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Gregory Nutt
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a9b0f304e6
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Add SAMA5 clock logic. Cloned from SAM3U and not yet verified
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2013-07-22 14:42:05 -06:00 |
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Gregory Nutt
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1350b2a576
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SAMA5 interrupt handling logic
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2013-07-22 11:54:39 -06:00 |
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Gregory Nutt
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5bbc86f894
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SAMA5/Cortex-A: Improve irqsave/restore inlines + add irqenable. Add skeleton file for SAMA5 interrupt management. Also change from last commit that was left in the editor
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2013-07-21 17:08:40 -06:00 |
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Gregory Nutt
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87f54f7d0b
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Add system timer logic for the SAMA5
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2013-07-21 15:49:17 -06:00 |
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Gregory Nutt
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543b5b7e03
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A few more Cortex-A5 and SAMA5 files
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2013-07-21 12:52:38 -06:00 |
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Gregory Nutt
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66259bfc53
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Misc Cortex-A5 changes include new file for cache operations
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2013-07-20 13:06:00 -06:00 |
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Gregory Nutt
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b26d5c7164
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A few more SAMA5D3 files
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2013-07-19 17:45:28 -06:00 |
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Gregory Nutt
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4a81d47c86
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Basic framework to support the AT91SAMA5D3 family and the SAMA5D3x-EK board(s) in particular
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2013-07-19 15:23:03 -06:00 |
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Gregory Nutt
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5356bd1bbd
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More ARMv7-A files that are just copies of the ARMv4/5 files for now
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2013-07-19 11:43:04 -06:00 |
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Gregory Nutt
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53a4f3443c
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Minor but fatal typo introduced in last checkin
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2013-07-18 15:45:21 -06:00 |
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Gregory Nutt
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8f2ad7eec1
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Some initial frame for Cortex-A5 support. No much yet
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2013-07-18 15:20:47 -06:00 |
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Gregory Nutt
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a7ae91c716
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NSH cmp command by Andrew Twidgell
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2013-07-18 08:24:29 -06:00 |
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Gregory Nutt
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f9b9bf6e04
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STM32 SDIO driver: Add supported for data block end (DBCKEND) interrupt. From Chia Cheng Tsao
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2013-07-08 09:04:05 -06:00 |
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