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3506 Commits

Author SHA1 Message Date
Gregory Nutt
bb76c88f19 Tiva Ethernet: Configure external PHY interrupt pin 2015-01-03 10:59:12 -06:00
Gregory Nutt
84c809afe4 Tiva Ethernet: Removed logic that holds the PHY and re-ordered some reset logic. Can not ping the DK 2015-01-03 09:28:54 -06:00
Gregory Nutt
1f013b220d Tive Ethernet: Wait for EMAC to come out of reset before accessing any registers 2015-01-03 06:52:19 -06:00
Gregory Nutt
24f8fd53ab Tiva serial: Add volatile to fix a wait loop that was not waiting; CR really should preced LF in CR-LF expansion 2015-01-02 14:05:42 -06:00
Gregory Nutt
52aeabb4b2 Cosmetic changes 2015-01-02 13:59:47 -06:00
Gregory Nutt
44cefe90a9 Tiva: Fix typos in conditional compilation 2015-01-02 13:59:30 -06:00
Gregory Nutt
5009feb414 Tiva Ethernet: Add lots of debug output for testing 2015-01-02 13:10:25 -06:00
Gregory Nutt
213eb321db Tiva: If peripheral ready register not available, then lets say the peripheral is ready 2015-01-02 12:58:20 -06:00
Gregory Nutt
51544be0e2 Tiva: Wait for the console UART to be ready before configuring it 2015-01-02 12:57:41 -06:00
Gregory Nutt
6358e7c23c Tiva Ethernet: Fix compile problem when debug enabled 2015-01-02 12:04:22 -06:00
Gregory Nutt
c6e72df007 Tiva GPIO: Fix a compiler error when debug is enabled with TM4C129X 2015-01-02 11:53:02 -06:00
Gregory Nutt
c989f68a6d Tiva Ethernet: MMC interrupts need to be disable initially 2015-01-02 11:40:48 -06:00
Gregory Nutt
9461b88edc Tiva Ethernet: Update DMA BUSMODE settings based on TI example code 2015-01-02 11:10:41 -06:00
Gregory Nutt
339f71a315 Tiva Ethernet: Update PHY initialization 2015-01-02 10:11:57 -06:00
Gregory Nutt
00f414d11b STM32 RTC: Add Kconfig options needed with the preceding commit 2015-01-02 06:45:45 -06:00
Gregory Nutt
5e0571f5a8 stm32-rtc: Add support for the internal low speed clock (LSI) 
Some boards do not have the external 32khz oscillator installed, for those boards we must fallback to the crummy to the crummy internal RC clock.  Turn on by defining CONFIG_RTC_LSICLOCK.

From Kevin Hester <kevinh@geeksville.com> via Lorenz Meier.
 2015-01-02 06:32:40 -06:00
Gregory Nutt
a40c9e1d8f Cosmetic update to some comments 2015-01-02 06:07:56 -06:00
Gregory Nutt
84519f8077 Cosmetic change to file formatting 2015-01-01 15:55:33 -06:00
Gregory Nutt
78d0d911b3 TM4C129X Ethernet: Add logic to get pre-programmed MAC address from user FLASH registers 2015-01-01 12:28:46 -06:00
Gregory Nutt
4d7ed265ce Tiva FLASH: Add FLASH register definitions for the TM4C129 family 2015-01-01 11:44:35 -06:00
Gregory Nutt
f67363e1ff Tiva PHY: Hard code some properties of the internal PHY 2015-01-01 08:11:17 -06:00
Gregory Nutt
aef65efd38 Tiva Ethernet: Update Ethernet intializaiton logic. Still things to be done 2015-01-01 07:55:15 -06:00
Gregory Nutt
9b04fb5318 Tiva: Add peripheral ready header file; fix typos in clock/pwr enable header files 2015-01-01 07:54:31 -06:00
Gregory Nutt
51b220c6d5 Ethernet skeleton: Add some more example logic 2014-12-31 13:45:19 -06:00
Gregory Nutt
4782acb012 Tiva Ethernet: Integrate use of workqueue so the network processing is not done at the interrupt level 2014-12-31 13:03:00 -06:00
Gregory Nutt
f9775de8ca Tiva Ethernet: Add basic clock/power controls for Ethernet and internal PHY 2014-12-31 11:40:01 -06:00
Gregory Nutt
448ab48f8d Tiva Ethernet: First cut at TM4C129X Ethernet driver. Initial commit is basically just the STM32 Ethernet driver with modifications for a clean compilation in the Tiva environment 2014-12-31 11:34:24 -06:00
Gregory Nutt
24ab902dff Tiva Ethernet: Minor naming update for compatibility 2014-12-31 09:39:00 -06:00
Gregory Nutt
84485b2601 Tiva Ethernet: Add DMA descriptor definitions 2014-12-31 07:32:11 -06:00
Gregory Nutt
54142ae9a6 Mostly cosmetic 2014-12-30 17:00:15 -06:00
Gregory Nutt
bec4cc0483 Tiva Ethernet: Completes TM4C129X Ethernet register definition header file 2014-12-30 13:42:19 -06:00
Gregory Nutt
dd31c12ed5 Don't error out if no ethernet definitions available 2014-12-30 13:26:18 -06:00
Gregory Nutt
094eb69ca0 Tiva Ethernet: More progress with register bit definitions 2014-12-30 11:08:18 -06:00
Gregory Nutt
9f0b5fa394 Tiva Ethernet: More progress with register bit definitions 2014-12-30 09:22:24 -06:00
Gregory Nutt
6f113fc8f4 TM4C129G Ethernet: Add Ethernet register addresses. Header files still incomplete 2014-12-30 08:09:09 -06:00
Gregory Nutt
0eaa52df4e Tiva: Add framework to support the uniqueu TM4C Ethernet register definitions 2014-12-30 07:07:16 -06:00
Gregory Nutt
901e717d5e stm32: update description and code documentation. Also fixes a few code formattings. 
Signed-off-by: Marco Krahl <ocram.lhark@gmail.com>
 2014-12-29 09:59:46 -06:00
Gregory Nutt
3e6307d8ec stm32: fix wait upon vertical blank. This should never have occurred before. 
Signed-off-by: Marco Krahl <ocram.lhark@gmail.com>
 2014-12-29 09:48:25 -06:00
Gregory Nutt
c149b1625c stm32: fix faulty access to non existing layer. This disables operation that requires double layer support, when configured for single layer only. 
Signed-off-by: Marco Krahl <ocram.lhark@gmail.com>
 2014-12-29 09:45:30 -06:00
Gregory Nutt
9d2311e4a2 Tiva SSI: Fix oversight in last commit. Would only fixe the case where the single SSI enabled was SSI0 2014-12-28 16:58:36 -06:00
Gregory Nutt
788541aecf Tiva SSI: Fix some recent breakage to the Tiva SSI driver for the case where only one SSI modules is enabled 2014-12-28 16:55:47 -06:00
Gregory Nutt
089578319a STM32 Serial: PX4 HW workarround for flaky STM32 RTS. From David Sidrane 2014-12-27 18:58:18 -06:00
Gregory Nutt
33f7151cd9 Remove STM32-specific RX flow control logic from the upper level serial driver to the lower level STM32 serial driver 2014-12-27 09:45:45 -06:00
Gregory Nutt
aefde565d3 Serial Upper Half: Add watermarks to RX flow control logic 2014-12-27 07:43:06 -06:00
Gregory Nutt
1c39b67e32 STM32: Fix some incorrectly placed conditional logic 2014-12-26 12:41:35 -06:00
Gregory Nutt
85963aa469 EFM32 Timer/PWM: Add support for timer/PWM EFM32GG. From Pierre-noel Bouteville 2014-12-26 09:55:19 -06:00
Gregory Nutt
fc3765b5ae ARMv7M: More runtine stack checking logic. From David Sidrane 2014-12-26 08:46:25 -06:00
Gregory Nutt
a2f0afd222 STM32 I2C: Add strings to decode trace events. From David Sidrane 2014-12-26 08:35:21 -06:00
Gregory Nutt
8f433bb731 Add support for run time stack checking for the STM32. From David Sidrane 2014-12-26 08:30:42 -06:00
Gregory Nutt
7a3e125461 Tiva: Update UART header file for TM4C129X 2014-12-22 14:11:56 -06:00
Gregory Nutt
e503352bbc Tiva: Upate GPIO header file for TM4C129X 2014-12-22 12:59:13 -06:00
Gregory Nutt
cbeb82cb89 TM4C129X: Simplify be removing unnecessary temporary variable 2014-12-22 12:01:33 -06:00
Gregory Nutt
9fb1cccb37 TM4C129X: Simplify be removing unnecessary temporary variable 2014-12-22 11:53:31 -06:00
Gregory Nutt
1bb168abd6 TM4C129X: First cut at new Tiva clock configuration logic 2014-12-22 11:45:10 -06:00
Gregory Nutt
dd89bd2233 TM4C129X: A small step toward understanding new Tiva clocking 2014-12-22 09:30:41 -06:00
Gregory Nutt
c4d0e0a8dd Tiva: Rename TIVA_CRC_BASE to TIVA_CCM_BASE 2014-12-21 17:44:11 -06:00
Gregory Nutt
197cfbf798 Tiva: Add support for I2C6-9 2014-12-21 17:20:16 -06:00
Gregory Nutt
fe12140f94 Tiva SSI and board configurations: hange negative Tiva logic CONFIG_SSIx_DISABLE to positive logic CONFIG_TIVA_SSIx. Add support for SSI2 and SSI3 2014-12-21 15:23:37 -06:00
Gregory Nutt
467521ba33 Improved comments 2014-12-21 14:09:04 -06:00
Gregory Nutt
240b57428f TM4C129X: Increated power/clocking macros into I2C driver 2014-12-21 13:02:12 -06:00
Gregory Nutt
582966260d TM4C129X: Add macros to enable/disable peripheral power 2014-12-21 11:40:39 -06:00
Gregory Nutt
c24c0021b0 Tiva SSI: Use portable macros to enable peripheral clocking 2014-12-21 11:16:21 -06:00
Gregory Nutt
6c937a3bd3 Tiva: More run mode clock enable macros 2014-12-21 11:02:56 -06:00
Gregory Nutt
1289674a54 TM4C129X: Framework for new Tiva clocking logic (details not yet implemented) 2014-12-21 10:14:40 -06:00
Gregory Nutt
70970d06a1 Tiva: Completes first cut at system control header file 2014-12-20 12:05:22 -06:00
Gregory Nutt
fa358ecdb9 Tiva: More TM4C129 system control register definitions 2014-12-20 11:10:10 -06:00
Gregory Nutt
6e3d693c5c Tiva: More TM4C129 system control register definitions 2014-12-20 09:59:21 -06:00
Gregory Nutt
8aa9f27925 Tiva: Add a configuration setting to better distinguish TM4C123 and 129 families. Reanem tm4c_syscontrol.h to tm4c123_syscontrol.h; rename tm4c129x_syscontrol.h to tm4c129_syscontrol.h 2014-12-20 08:38:11 -06:00
Gregory Nutt
e0678813c1 Tiva: Updates to system control regiser definitions 2014-12-20 08:22:17 -06:00
Gregory Nutt
fa5dffbc18 STM32 LTDC: Move ltdc.h from include/nuttx/video to arch/arm/include/stm32; Trivial updates after general review 2014-12-19 14:52:17 -06:00
Gregory Nutt
4e5c2b7976 stm32: Add configuration option for ltdc 
This adds the following ltdc configuration options:
- dither support
- cmap support, is this the right place for CONFIG_FB_CMAP?
- support for extended ltdc interface

Signed-off-by: Marco Krahl <ocram.lhark@gmail.com>
 2014-12-19 13:58:39 -06:00
Gregory Nutt
4ac49f514d stm32: implements ltdc frambuffer and support for ltdc layer operation 
This implements the framebuffer support for the generic nuttx framebuffer
interface, (see nuttx/video/fb.h)

This also implements the interface to perform hardware accelerated layer
operation by the ltdc controller and dma2d controller later (see
nuttx/video/ltdc.h).

The following methods are supported by the ltdc interface:

- getvideoinfo
  Get video information of the layer

- getplaneinfo
  Get plane information of the layer

- getlid
  Handle specific layer identifier. This allows to detect to current layer
  state (e.g. important for layer flipping)

- setclut
  Set the layer color lookup table. Up to 256 color entries supported.

- getclut
  Get the layer color lookup table

- setcolor
  Set the default layer color. In the context of the ltdc layer this means set
  the default color outside the active area or if the layer is disabled.

- getcolor
  Get the default layer color

- setcolorkey
  Set the layer colorkey (chromakey). Colorkey is enabled by blendmode
  LTDC_BLEND_COLORKEY

- getcolorkey
  Get the layer colorkey

- setalpha
  Set the constant alpha value. If blend mode LTDC_BLEND_SRCPIXELALPHA or
  LTDC_BLEND_DESTPIXELALPHA is defined than the blended color is calculated
  by the formel:
    Cdest = Pixelalpha * Constalpha * Csrc.
  Otherwise:
    Cest = Constalpha * Csrc

- getalpha
  get the alpha value

- setblendmode
  Set the layer blendmode.
  Supported blendmodes:
    non blendmode (do not perform blend operation independent on the layers
                   alpha and colorkey)
    alpha          alpha blending (transparency)
    destpixelalpha use pixel alpha value for the top layer (Layer2)
    srcpixelalpha  use pixel alpha value for the subjacent layer (Layer1)
    colorkey       enable colorkey

- getblendmode
  Get the layer blendmode

- setarea
  Set the active layer area, the visible rectangle inside the whole layer.
  This also allows to change the position of the whole layer which is visible in
  the selected area independent on the area position.

- getarea
  Get the active layer area

- update
  Reload the layer shadow register and make changes visible. Also supports
  layer flipping.

Note! Dithering and background color are static parameter and can only changed
at build time.

Implementation details:

The implementation of ltdc interface was inspired by SDL and DirectFB.
All layer settings are shadowed before they become active (except setclut).
They are still inactive until the layer is updated. This is done by the update
method. Should clut only active after an update or not? Clut is used for drawing
while the other settings usually used for blend or blit operations. So i think
this should be the right way.

The implementation of ltdc interface was inspired by SDL and DirectFB.
All layer settings shadowed before they become active (except clut).
They are still inactive until the layer is updated. This is done by the update
call. Should clut only activated after an update or not? Clut is used for draw
operation while the other settings usually used for blend or blit operations.
So i think this should be the right way.

Deviations from the ltdc hardware implementation:

- Shadow register update of both layer (Layer1 or Layer2) is independent as long
  LTDC_UPDATE_SIM is not set. This flag allows to update both layer simultaneous.
  Otherwise only the desired layer is updated.

Layer operation:

Keep in mind, both layer are allways active (of course if both enabled by the
configuration). First the Layer 1 is blended with the background color and the
result is blended with the Layer2. To avoid blend effects, set the Layer2 in non
blend mode. This is equal to blend with alpha = 255. Enable blending of Layer2
with the background color by enable blending of Layer1 and disable the opacity
by setting the alpha value to 0.

Layer flip:

A layer flip usual mean swapping two framebuffer. So the current inactive buffer
can refreshed with data while the active framebuffer is visible. A flip
operation changes the inactive layer to the active one and vice versa.

The ltdc implementation supports layer flip. This can be done by the update call
and the flag LTDC_UPDATE_FLIP. In this case ltdc makes the inactive layer
invisible. In detail, the inactive layer is disabled and the blendmode reset.
Detection of the current layer state (e.g. active or inactive) is supported
by the getlid method combined with one of the LTDC_LAYER_* flags.
Maybe an additional method "flip" for flip operation should be added to the ltdc
interface? But this make no sence from my view if the layer is a non LTDC layer,
e.g. playing with dma2d only.

Supported and tested nuttx pixel formats:

Single Layer without LTDC interface support:
- FB_FMT_RGB8 (cmap support required)
- FB_FMT_RGB16_565
- FB_FMT_RGB24

Single Layer with LTDC interface support:
- FB_FMT_RGB8 (cmap support required)
- FB_FMT_RGB16_565
- FB_FMT_RGB24

Dual Layer with LTDC interface support:
- FB_FMT_RGB8 (cmap support required)
- FB_FMT_RGB16_565
- FB_FMT_RGB24

Why is FB_FMT_ARGB8888 missing?

Changes:
- Remove unused register debug method.

Todo:
- Add support for backlight, currently not neccessary

Did i forgot something? Take a look in the ltdc example or the interface
description (see nuttx/include/video/ltdc.h).

Thanks to Ken for the base layout. ;)

Signed-off-by: Marco Krahl <ocram.lhark@gmail.com>
 2014-12-19 13:48:53 -06:00
Gregory Nutt
10934fb6a2 stm32: Add infrastructure for dma2d support 
Signed-off-by: Marco Krahl <ocram.lhark@gmail.com>
 2014-12-19 13:41:08 -06:00
Gregory Nutt
7edfddfc96 stm32: Add common stm32 layer description. This defines a common layer description for the ltdc and dma2d controller. 
Signed-off-by: Marco Krahl <ocram.lhark@gmail.com>
 2014-12-19 13:37:08 -06:00
Gregory Nutt
24a2f8a0a4 stm32: configure PLLSAI clock to enable ltdc register access 
Signed-off-by: Marco Krahl <ocram.lhark@gmail.com>
 2014-12-19 13:30:58 -06:00
Gregory Nutt
7999e7519c stm32: Add missing clut register definition 
Signed-off-by: Marco Krahl <ocram.lhark@gmail.com>
 2014-12-19 13:28:42 -06:00
Gregory Nutt
3e640a37d2 stm32: rename CFBLR register name to the name used in the reference manual 
Signed-off-by: Marco Krahl <ocram.lhark@gmail.com>
 2014-12-19 13:26:04 -06:00
Gregory Nutt
a34208d698 stm32: rename PLLSAI register name to this one in the reference manual 
Signed-off-by: Marco Krahl <ocram.lhark@gmail.com>
 2014-12-19 13:21:39 -06:00
Gregory Nutt
93bcd3e03e TM4C129X: Add custom system control header file (incomplete) 2014-12-19 12:12:52 -06:00
Gregory Nutt
6cc9716d55 Tiva: Fix configuration logic for IRQ interrupts. The various parts support varying numbers of GPIO blocks and with varying capabilities to support interrupts on the pins of different GPIO blocks 2014-12-18 15:33:52 -06:00
Gregory Nutt
a5fcd71af0 Tiva: Change negative logic CONFIG_TIVA_DISABLE_GPIOx_IRQS to positive logic CONFIG_TIVA_GPIOx_IRQS 2014-12-18 15:19:16 -06:00
Gregory Nutt
ddad16a7b7 Tiva: Add GPIO interrupt support for the TMS4C129X 2014-12-18 11:52:06 -06:00
Gregory Nutt
55a3c57399 DK-TM4C129X: Fixes to get clean build. Logic is still not complete, however 2014-12-18 08:24:24 -06:00
Gregory Nutt
d27fb63862 TM4C129X: Add pin multiplexing 2014-12-17 11:55:45 -06:00
Gregory Nutt
c1851296b2 Tiva TM4C129X: Fix some errors in memory map 2014-12-17 09:42:37 -06:00
Gregory Nutt
2990c913b4 Add memory map for the TM4C129X 2014-12-17 09:40:56 -06:00
Gregory Nutt
3c6616f86a Add interrupt definitions for the TM4C129X 2014-12-17 08:19:23 -06:00
Gregory Nutt
dfed763f4e Tiva: Better distinguish features of the TM4C1294xx and the TM4C129Xxx 2014-12-16 18:02:59 -06:00
Gregory Nutt
09b16e3819 Remove packaging indications for TM4C129 configuration variables 2014-12-16 16:22:52 -06:00
Gregory Nutt
18c61b6e64 Add TM4C129XNCZAD and TM4C1294NCPDT to the Tiva configuration system 2014-12-16 16:02:21 -06:00
Gregory Nutt
ae18f9dacd Unify sensor debug. ADX driver was using input debug; LM75 and QENCODE that their own custom debug. Now all use CONFIG_DEBUG_SENSOR, sndbg() 2014-12-16 09:54:32 -06:00
Gregory Nutt
ae29667564 More changes associated with GPIO interrupt for the KL architecture from Alan Carvalho de Assis 2014-12-13 17:30:25 -06:00
Gregory Nutt
47919eb274 Add GPIO interrupt capability for the KL architecture. The patch is almost the same as kinetis_pinirq.c, just minor modifications and rename kl_pinirq to kl_gpioirq to make it more generic to developers. From Alan Carvalho de Assis 2014-12-13 17:27:06 -06:00
Gregory Nutt
626fa0719a STM32 LTDC: Fix a typo in conditional compilation 2014-12-13 07:45:42 -06:00
Gregory Nutt
002d4c40a4 STM32 OTG HS DEV (in FS mode): Disable ULPI clock enable in RCC AHB1 Register. If Both ULPI and the FS clock enable bits are set in FS mode, then the ARM never awakens froom WFI due to a chip issue. From Ken Pettit 2014-12-13 07:44:13 -06:00
Gregory Nutt
a1e05721d8 Tiva I2C: Don't try to ACK and STOP on the same byte. Improve logic that suppresses STOP on a repeated start 2014-12-12 12:13:31 -06:00
Gregory Nutt
3ac6379bbe Tiva I2C: Legacy mode reset logic ommitted in last commit 2014-12-12 09:31:17 -06:00
Gregory Nutt
c8d1f87571 Tiva I2C: Add logic to reset I2C when busy hangs with busy 2014-12-12 09:26:10 -06:00
Gregory Nutt
fb6661aaa4 STM32 OTGHS Device: Fix for OTGHS core working in FS mode. From Ken Pettit 2014-12-12 07:43:32 -06:00
Gregory Nutt
1c569b85f8 Cosmetic change to force compliance with coding standard 2014-12-12 07:14:16 -06:00
Gregory Nutt
b818691a3a Tiva I2C: Fix how I2C transactions are started and some I2C error reporting 2014-12-11 12:31:42 -06:00
Gregory Nutt
a190aeeeba Tiva I2C: All SDA pins should be open drain, but all SCL pins should be digital output 2014-12-11 12:30:48 -06:00
Gregory Nutt
c7adcf5af2 Tiva I2C: Add register-level debug capability 2014-12-11 09:34:03 -06:00
Gregory Nutt
3958661ae5 Tiva I2C: Minor clean-up to I2C tracing 2014-12-11 08:11:32 -06:00
Gregory Nutt
475d2c3137 Tiva I2C: Fix error in assertion logic 2014-12-11 07:02:14 -06:00
Gregory Nutt
98d9ceb582 Tiva I2C: Add I2C options to Kconfig 2014-12-10 13:56:00 -06:00
Gregory Nutt
bf5179d0ac Tiva I2C: Add workaround for errata; clean up some error handling 2014-12-10 13:01:47 -06:00
Gregory Nutt
58d0e169c7 Tiva I2C: Driver is code complete but untested 2014-12-10 12:43:46 -06:00
Gregory Nutt
03e1ecd6aa Tiva i2C: Lots of compilation fixes 2014-12-10 08:47:34 -06:00
Gregory Nutt
86577c2282 Simplify I2C master/slave addresing to simplify driver development 2014-12-10 08:47:07 -06:00
Gregory Nutt
0daa071f2a Tiva I2C: Finishes initialization logic 2014-12-10 07:31:44 -06:00
Gregory Nutt
c16ab05135 Tiva: Do I2C clock initialization without using legacy registers. Necessary for I2C3-5 2014-12-09 15:28:10 -06:00
Gregory Nutt
20b4417e48 Add a little bit more Tiva I2C initialization logic 2014-12-09 14:48:24 -06:00
Gregory Nutt
b05fefc15a Fix typo in Tiva UART regiser address definition. SourceForge Ticket #37 2014-12-09 12:18:41 -06:00
Gregory Nutt
f5c124e081 Tiva: Add build framework and skeleton files for Tiva I2C driver. Initial commit is just the STM32 I2C driver with name changes and STM32-specific logic removed 2014-12-09 12:18:40 -06:00
Gregory Nutt
928bc5ca84 Update the Tiva I2C register definitions for the TM4C123 and TM4C129 2014-12-09 08:42:12 -06:00
Gregory Nutt
63ba9bdf17 Set the GPIO_SPEED_50MHz on all F2 and F4 SPI pin configurations. This is based on an F411 SPI1 errata but the fixed is generalized to all SPI and all F2 and F4 (let me know if this introduces any other issues). Discovered and fixed by Sebastien Lorquet after much consternation. 2014-12-08 09:51:52 -06:00
Gregory Nutt
1f2447502f SAMA5D3 Xplained: Add support for the Itead Joystick shield 2014-12-03 12:24:23 -06:00
Gregory Nutt
56a5d59a96 STM32: Add MCO configuration for the STM32L1xx. From Jussi Kivilinna 2014-12-02 10:19:37 -06:00
Gregory Nutt
4016ca3495 STM32L15: Fix typo in MCO pin definition. From Jussi Kivilinna 2014-12-02 10:18:02 -06:00
Gregory Nutt
1fa790cf8e Update comments 2014-11-29 15:28:28 -06:00
Gregory Nutt
dc4c66c2f1 STM32 F4 I2C: Port Tridge's I2C noise resiliance logic from the PX4 repository. 2014-11-29 13:37:45 -06:00
Gregory Nutt
997fa4b749 Fix one warning. There are a couple of others that look like real problems 2014-11-28 11:49:24 -06:00
Gregory Nutt
50285b91fe EFM32 Serial: Add support for termios TCGET and TCSET. For the moment, only set/get speed is implemetned. From Pierre-noel Bouteville 2014-11-27 19:14:10 -06:00
Gregory Nutt
2021130e35 Forgot too add file before last commit 2014-11-27 06:14:09 -06:00
Gregory Nutt
a1c8e97c12 Enable support for STM32F102. https://github.com/PX4/NuttX/pull/28.diff 2014-11-27 06:12:35 -06:00
Gregory Nutt
70981eb7d5 Initial support for the LPC4357-EVB provided by Toby Duckworth 2014-11-26 15:18:24 -06:00
Gregory Nutt
2994448d85 More fixes to problems noted by cppcheck. Some are kind of risky; some are real bugs. 2014-11-25 13:15:09 -06:00
Gregory Nutt
ad36e75a40 Fixes for more issues found by cppcheck 2014-11-24 17:00:26 -06:00
Gregory Nutt
7cfd619167 More bugs/warnings found by cppcheck 2014-11-24 13:24:51 -06:00
Gregory Nutt
1d2ec9d2bb Various issues/bugs detected by cppcheck 2014-11-24 12:59:52 -06:00
Gregory Nutt
fc804e29af I2C header file for the Freescale KL family. From Alan Carvalho de Assis. 2014-11-23 16:49:00 -06:00
Gregory Nutt
5d231b25f0 SAMA5D3 Xplained: Add an apps/examples/bridge configuration 2014-11-20 16:24:30 -06:00
Gregory Nutt
cba8179c28 STM32 F4 OTGHS device controller driver from Brennan Ashton 2014-11-20 07:19:04 -06:00
Gregory Nutt
2d51315e66 SAM EMAC: Fix typo in the check for successfull allocation of a timer 2014-11-18 14:20:31 -06:00
Gregory Nutt
2134d0df43 SAMA5D4-EK EMAC1: Correct name of EMAC1 configuration variable 2014-11-18 11:02:22 -06:00
Gregory Nutt
a03b6af57a Cosmetic fixes to comments 2014-11-18 07:19:10 -06:00
Gregory Nutt
a1598152d1 Update ChangeLog 2014-11-17 12:48:01 -06:00
Gregory Nutt
63526fb1ef Rename CONFIG_NET_BUFSIZE to CONFIG_NET_ETH_MTU is all MCU Ethernet drivers 2014-11-16 08:10:06 -06:00
Gregory Nutt
c2c37abf47 EFM32 USART setup: Computation of BAUD includes shift; Eliminate additional shift. From Pierre-noel Bouteville 2014-11-16 07:57:57 -06:00
Gregory Nutt
1055ba464d SAM3/4: Add missing SPI0 clock configuartion macro for the SAM4S 2014-11-16 06:43:08 -06:00
Gregory Nutt
25a9005ce7 Remove use of NET_LL_HDRLEN from Ethernet drivers. Use ETH_HDRLEN instead 2014-11-15 09:05:34 -06:00
Gregory Nutt
388ef8db1a Netwoek: Ada a parameter to netdev_register() to indicate the link protocol supported by the driver. Use this value to replace some logic commited yesterday 2014-11-15 08:22:51 -06:00
Gregory Nutt
66dbce8cf6 Cosmetic updates; updates to README 2014-11-14 09:54:00 -06:00
Gregory Nutt
db12ac1f14 EFM32: Finishes USB naming fixup. Still some missing initialization logic 2014-11-14 08:36:18 -06:00
Gregory Nutt
7358c3c641 EFM32: More USB naming updates. Still not finished 2014-11-14 07:20:13 -06:00
Gregory Nutt
9dc834e723 EFM32: More USB register name corrections. Still incomplete 2014-11-13 12:25:42 -06:00
Gregory Nutt
e6ff1518f6 EFM32: Finishes USB naming changes for device 2014-11-13 10:45:47 -06:00
Gregory Nutt
c3aadcdef5 Correct a typo in the STM32 OTGFS register bit definitions 2014-11-13 10:43:54 -06:00
Gregory Nutt
9160054188 EFM32: Tweaks to get EFM32GG-STK3700 running NSH over LEUART0 2014-11-12 12:50:09 -06:00