Gregory Nutt
af6919cd76
LPC17 OHCI: Fix an error in ED list removal
2015-04-25 14:52:01 -06:00
Gregory Nutt
e46cb394f9
Fixes some crashes when the hub is removed and/or reinserted
2015-04-25 12:16:22 -06:00
Gregory Nutt
e7792435c7
Add missing logic to destroy a class when the device is no longer connected to the hub port
2015-04-25 11:17:37 -06:00
Gregory Nutt
0ce4330433
USB OHCI: Need to preserve the speed bit when reconfiguring ep0
2015-04-25 07:48:20 -06:00
Gregory Nutt
7793523dd8
Copy some control port framework from LPC17 to SAMA5 OHCI; Copy some speed handling from SAMA5 OHCI to LPC17
2015-04-25 06:46:44 -06:00
Gregory Nutt
ed5287855f
LPC17 USB host: Direction bit being set wrong from allocated control endpoints
2015-04-24 19:46:00 -06:00
Gregory Nutt
becfe4ef9d
HUB class must cancel any pending interrupt IN transfers before destroying the endpoint
2015-04-24 12:18:25 -06:00
Gregory Nutt
7d7ab442e1
If asynchronous tranfers are supported, then there must also be a mechanism to cancel the pending transfer
2015-04-24 11:23:52 -06:00
Gregory Nutt
2768f13153
USB hub: Fixes for some port status change handling
2015-04-24 09:57:59 -06:00
Gregory Nutt
d11af85ddf
Merge remote-tracking branch 'origin/master' into usbhub
2015-04-23 14:06:18 -06:00
Gregory Nutt
0092f79696
Two r's and only two r's in the word interrupt
2015-04-23 14:04:43 -06:00
Gregory Nutt
ab17603ceb
Fix USB hub bugs: Don't allocate port EP0 until needed, otherwise run out of endpoints; using wrong pointer to access child endpoint array in a few places
2015-04-23 09:42:58 -06:00
Gregory Nutt
215dad9984
Fix USB host polling; fix a typo in LPC17 HCD
2015-04-23 07:13:31 -06:00
Gregory Nutt
be2ed7eba7
Merge in from Master
2015-04-23 06:34:49 -06:00
Gregory Nutt
64496a635c
USB hub: Add some hub-related configuration settings
2015-04-22 17:16:35 -06:00
Gregory Nutt
9c61847203
USB Hub: Initial implementation asynchronous pipe I/O in the LPC17 HCD needed for hub support
2015-04-22 15:03:25 -06:00
Gregory Nutt
f7ec9b0831
USB hub: Change to connection interface so that applications can deal with external hubs
2015-04-22 12:28:19 -06:00
Gregory Nutt
85df251093
STM32 RTC counter: Include enable/disable backup domain within critical section. Per recommendtion of Alexander Oryshchenko.
2015-04-21 18:08:31 -06:00
Gregory Nutt
8e9fd9b838
USB HCDs: Add hooks for the async method
2015-04-21 15:43:12 -06:00
Gregory Nutt
2afe696012
LPC17 USB HCD: Adapted to new interface
2015-04-21 13:11:32 -06:00
Gregory Nutt
fde0bf650e
USB host: Integrate logic to assign device function address
2015-04-21 12:17:49 -06:00
Gregory Nutt
ef813e2c72
SAMA5 EHCI: Fix some compile errors when debug is enabled
2015-04-21 09:28:42 -06:00
Gregory Nutt
eedce63bd6
SAMA5 EHCI: Remove unused variable from structure
2015-04-21 09:18:31 -06:00
Gregory Nutt
db3b235fe6
SAMA5 OHCI and EHCI: Now conform to new interfaces to support hubs
2015-04-21 08:59:30 -06:00
Gregory Nutt
320d678d89
STM32 F1 RT Counter: Another fix from Darcy Gong
2015-04-19 07:05:39 -06:00
Gregory Nutt
10eeff30e7
STM32 F1 RTC Counter: Now need to enable backup domain write access when setting the time. From Darcy Gong
2015-04-19 06:58:07 -06:00
Gregory Nutt
244a30b6a9
Fix an error introduced into stm32_pwr_enablebkp(). That function must preserve the previous state of backup domain access on return.
2015-04-18 07:31:20 -06:00
Gregory Nutt
c54adf248a
STM32 - cosmetic changes to indentation
2015-04-16 16:35:06 -06:00
Gregory Nutt
a08aabe102
STM32 DMA2D: Use helper function when freeing layers. From Marco Krahl
2015-04-16 11:16:14 -06:00
Gregory Nutt
eb28a666b4
Add support for the new DMA2D features to the STM32F429i-Disco LTDC configuration. From Marco Krahl.
2015-04-16 09:11:53 -06:00
Gregory Nutt
8ed4b1acfa
Defines a second interface for the dma2d controller. Controlling both LTDC and DMA2D was unpractical from the programmers view because both controllers are to different. LTDC only controls the display visibility but the DMA2D controller changes the content of the frame buffer (buffer of the layer).
...
The main features are:
1. DMA2D interface
Supports the nuttx pixel formats:
- FB_FMT_RGB8
- FB_FMT_RGB24
- FB_FMT_RGB16_565
Dynamic layer allocation during runtime for the supported formats
- The number of allocatable layer can be configured.
Supported dma2d operation:
- blit (Copy content from source to destination layer) also works with
selectable area.
- blend (Blend two layer and copy the result to a destination layer wich can
be a third layer or one of the source layer) also works with selectable
area.
- fillarea (Fill a defined area of the whole layer with a specific color)
As a result of that the dma2d controller can't transfer data from the core coupled memory, CCM is disabled but usable by the ccm allocator. Currently the ccm allocator is used for allocating the layer structurei only. For the dma memory (layers frame buffer) memory is allocated from heap 2 and 3.
2. LTDC interface
I have changed the api for the currently non implemented operations:
- blit (Copy content from a dma2d layer to an ltdc layer) also works with
selectable area.
- blend (Blend two dma2d layer and copy the result to a destination ltdc
layer) also works with selectable area.
Note! ltdc layer is a layer referenced by the ltdc interface. dma2d layer
is a layer referenced by the dma2d interface.
One of the most important questions for me was, How can i flexible use an
ltdc layer with the dma2d interface, e.g. as source layer for dma2d
operations?
Get the layer id of the related dma2d layer by a special flag when using
getlid() function of the ltdc interface and use the layer id to reference
the specific dma2d layer by the dma2d interface.
The ltdc coupled dma2d layers are predefined and can't be dynamically
allocated of freed. They use the same frame buffer memory and the same
color lookup table.
Changes:
- layer internal format of the clut table
- interrupt handling for register reload (vertical vblank) instead using
waiting loop
- small fixes and refactoring
From Marco Krahl.
2015-04-16 09:11:52 -06:00
Gregory Nutt
1f193dd515
Calypso/Compal_e86 update from Craig Comstock
2015-04-16 09:11:47 -06:00
Gregory Nutt
69b7d3abd3
More places where watchodg mispelled
2015-04-15 21:36:30 -06:00
Gregory Nutt
e6c302bdba
STM32 IWDG typo fix. from chenming582892
2015-04-15 20:13:56 -06:00
Gregory Nutt
811dc14c33
Update comments
2015-04-15 16:38:08 -06:00
Gregory Nutt
ded44679e9
Add option to enable stackcheck per architecture
2015-04-12 06:30:24 -06:00
Gregory Nutt
068fc43170
Revert commit b80e8be652dfa52e97daa65aa3e550cf31cb2409
2015-04-12 06:26:50 -06:00
Gregory Nutt
63c0de86fe
Remove all traces of CONFIG_ARMV7M_STACKCHECK
2015-04-11 10:01:44 -06:00
Gregory Nutt
2a9cc61223
STM32 changes from David Sidrane
2015-04-11 07:19:20 -06:00
Gregory Nutt
eed7cc66ad
STM32 CAN: More places where FR instead FIR used
2015-04-09 19:30:19 -06:00
Gregory Nutt
3840c2a14b
Fix several typos in comments
2015-04-09 16:13:03 -06:00
Gregory Nutt
c49f7a8e87
Missing i found by David Sidrane
2015-04-09 15:16:05 -06:00
Gregory Nutt
2aa80e06f5
Remove executable flag from more .c and .h files
2015-04-09 08:20:57 -06:00
Gregory Nutt
2c53894065
Cosmetic
2015-04-09 07:59:31 -06:00
Gregory Nutt
e113be1bff
SAMA5 Serial: Reading IMR and disabling interrupt must be atomic
2015-04-08 15:27:31 -06:00
Gregory Nutt
2a9bd3ad73
SAM3/4 and SAMV7 UART: The IMR register is read-only. This means that sam_restoreints() does not actually re-enable UART interrupts.
2015-04-08 15:04:10 -06:00
Gregory Nutt
98b0659abf
SAMA5 Serial: Fix a couple of errors backporting termios and flowcontrol
2015-04-08 14:35:04 -06:00
Gregory Nutt
662757c77a
SAM3/4 and SAMV7 Serial: Serial interrupts left disabled.
...
A side-effect of changing serial settings via TERMIOS (such as tcsetattr) is that serial interrupts were being left disabled. This is not a problem if the serial configuration is changed when there are no open references to the serial device. In that case, serial interrupts are disabled and will not be enabled enabled until the serial device is first opened. But it is fatal if the serial device is already opened and if there is a task waiting to receive data. In that case, the side-effect of disabling interrupts is fatal: That task is then left hanging with interrupts disabled.
2015-04-08 14:14:01 -06:00
Gregory Nutt
0a635653c2
SAMA5D Serial: Backup support for flowcontrol and termios from SAM3/4 -- UNVERIFIED
2015-04-08 14:13:08 -06:00
Gregory Nutt
16814e2b00
Make some file section headers more consistent with standard
2015-04-08 08:04:12 -06:00
Gregory Nutt
190c9adef0
Implements CONFIG_TIME_EXTENDED as we discussed relative to providing the last 3 members of the tm struct and support for filling them in and even using the wday in the STM32 RTC. From David Sidrane.
2015-04-08 06:56:43 -06:00
Gregory Nutt
0bebd62bc0
STM32: Another fix to RTC magic register from David Sidrane
2015-04-06 17:21:53 -06:00
Gregory Nutt
c12c253cc6
Add conditional logic so that people who use F1 don't have to be bother with meaningless RTC MAGIC settings
2015-04-06 16:35:56 -06:00
Gregory Nutt
4d5cb13c9d
STM32 RTCC: Make back-up register and magic value used by RTCC configurable. From David Sidrane
2015-04-06 16:26:59 -06:00
Gregory Nutt
6058d3dc73
Typo fixes from David Sidrane
2015-04-06 15:27:37 -06:00
Gregory Nutt
65d9d18159
Minor changes to SAMV7 USB register definition file from review
2015-04-06 13:00:48 -06:00
Gregory Nutt
0c40f93c42
SAMV7 USB device: Finish option to force full speed mdoe
2015-04-06 10:07:12 -06:00
Gregory Nutt
9487f4628f
Calypso: SPI built only if CONFIG_SPI
2015-04-05 13:26:25 -06:00
Gregory Nutt
fca4c51420
Update comments and README
2015-04-05 07:22:46 -06:00
Gregory Nutt
cf4bbae526
SAMV7: Fix SDRAM initialization instabiilties by changing the order of initialization
2015-04-04 19:58:31 -06:00
Gregory Nutt
c1886c6181
SAMV7: Apparently the data sheet is wrong, SDRAM clocking must be enabled at the PMC or the SDRAM does not work! The data sheet says that there is no clock control for SDRAMC
2015-04-04 19:04:29 -06:00
Gregory Nutt
8aeaff1e95
SAMV7: Fix a errort in GPIO bit encoding. Correct naming of a variable
2015-04-04 16:54:53 -06:00
Gregory Nutt
fda98ebeab
SAMV7: Fix typo in some GPIO definitions
2015-04-04 14:04:58 -06:00
Gregory Nutt
0cf5088475
SAMV71-XULT ILI9488 LCD driver is code complete but untested
2015-04-03 16:36:58 -06:00
Gregory Nutt
b72cf3366c
SAMV7: Add SMC register definition header file; SAMV71-Xult: Add an LCD driver. The initial commit is simply the SAVM4E-EK ILI9375 driver will bogus name changes to ILI9488.
2015-04-03 10:28:32 -06:00
Gregory Nutt
0ec67181c9
Move include/nuttx/timer.h, rtc.h and watchdog.h to include/nuttx/timers/.
2015-04-01 12:37:44 -06:00
Gregory Nutt
eb21ad0cf2
SAMV71-XULT: Add option to support connection of the maXTouch Xplained Pro on the 50-pin LCD connector
2015-03-31 09:01:38 -06:00
Gregory Nutt
8aa133029f
SAMV7 Ethernet: Fix a write-past-end-of-buffer and trash-the-heap problem
2015-03-29 16:45:05 -06:00
Gregory Nutt
f1c79423e1
The STM32F4Discovery board doesn't come with a Low speed external oscillator so the default LSE source for the RTC doesn't work.
...
In stm32_rtcc.c the up_rtcinitialize() logic doesn't work with the LSI. The check on RTC_MAGIC on the BK0R register lead to rtc_setup() call that rightfully enables the lsi clock; but the next times, when the rtc is already setup, the rtc_resume() call does NOT start the lsi clock!
The right place to put LSE/LSI initialisation is inside stm32_stdclockconfig() in stm32fxxxxx_rcc.c. Doing this I checked the possible uses of the LSI and the LSE sources: the LSI can be used for RTC and/or the IWDG, while the LSE only for the RTC (and to output the MCO1 pin)..
This change is not verifed for any other platforms.
From Leo Aloe3132
2015-03-29 15:34:48 -06:00
Gregory Nutt
dab3dbc75b
Cortex-M7: Add support for enabled the D-Cache in write only mode.
...
SAMV7 Ethernet: I- and D-Cache are now enabled in the netnsh/ configuration. D-Cache is enabled in write-though mode. This mode is necessary because the DMA descriptors are each 8-bytes in size but the D-Cache cache line is 32-bits in size. So it is impossible make coherency for every 8-byte DMA descriptor without write-through.
2015-03-29 14:42:03 -06:00
Gregory Nutt
4593fe3797
SAMV7/Cortex-M7: Add support for write through D-Cache. SAMV7 Ethernet look like it needs this
2015-03-29 13:09:22 -06:00
Gregory Nutt
a60fa12e86
Clean up pointer handling to make code more readability. This re-introduces the compiler optimization problem but this is the correct thing to do. I will have to drop back from -Os to -O2.
2015-03-28 14:46:35 -06:00
Gregory Nutt
d2fd139ebc
SAMV7 EMAC: Fix alignment issue: RX buffers need to be invalidated. This means the alignment of buffers must be at least to the data cache line size at both ends of the buffer
2015-03-28 13:09:01 -06:00
Gregory Nutt
d7dbdfef58
SAMV7 EMAC: Sometimes TX is not started when TSTART is set??? Workaround seems to be to set it twice. Restored full optimization. Also CONFIG_NET_NOINTS is set so that interrupt level provessing is avoided
2015-03-28 09:42:45 -06:00
Gregory Nutt
79734c3c13
SAMV7 Ethernet: Fix some errors in circular queue handling
2015-03-27 13:04:43 -06:00
Gregory Nutt
72c923ff0b
Fix another typo in the modified assertion logi
2015-03-27 13:02:46 -06:00
Gregory Nutt
ee506c42f5
Fix a typo in the last commit
2015-03-27 10:58:52 -06:00
Gregory Nutt
66670c1738
SAMV7 Ethernet+USB Updates
2015-03-27 10:47:03 -06:00
Gregory Nutt
459bf9e885
ARMv7-M: Add logic to dump all stack usage on a crash
2015-03-27 10:45:39 -06:00
Gregory Nutt
3c433f7f35
Updated comments/README
2015-03-26 12:33:03 -06:00
Gregory Nutt
6f4116add0
SAMV6 USB updates
2015-03-26 09:49:01 -06:00
Gregory Nutt
0ec1407add
SAMV7 USB: Move clock initialization back to sam_clockconfig.c; add seperate UTMI register definition header file; fix a couple of typo bugs
2015-03-26 07:56:26 -06:00
Gregory Nutt
8bce3f19d8
SAMV7 USB: Replace 0 with something a little more informative
2015-03-25 18:59:59 -06:00
Gregory Nutt
3568dcd22f
SAMV7 USB: Add some conditioned out test code
2015-03-25 18:45:04 -06:00
Gregory Nutt
8a9d5aa465
Add UTMI register definitions
2015-03-25 18:09:41 -06:00
Gregory Nutt
8b1475665c
SAMV7 USB: More changes
2015-03-25 17:19:36 -06:00
Gregory Nutt
dd06cef845
SAMV7 USB: more updates
2015-03-25 15:56:10 -06:00
Gregory Nutt
2b3aee6940
SAMV7 USB DCD: A few more fixed from early intergration. Still does not work
2015-03-25 09:04:51 -06:00
Gregory Nutt
7e69535daf
SAMV7 USB: More fixes at beginning of testing. Still a long way from working
2015-03-25 08:06:59 -06:00
Gregory Nutt
6ef2911dbf
SAMV7 USB DCD is code complete and ready for test
2015-03-24 14:30:53 -06:00
Gregory Nutt
9a79129dd4
SAMV7 USB: Updates to interrupt handling logic
2015-03-24 14:07:20 -06:00
Gregory Nutt
2b8853f4fd
SAMV7 USB: Updates to endpoint configuration logic
2015-03-24 11:19:34 -06:00
Gregory Nutt
c0c92411ce
SAMV7 USB: Updates to early initialization logic
2015-03-24 10:05:21 -06:00
Gregory Nutt
f747b36d95
Fix typo from last commit
2015-03-23 18:40:35 -06:00
Gregory Nutt
e5fbfd2508
Tiva: Remove unconditional debug output from GPIO code
2015-03-23 18:28:18 -06:00
Gregory Nutt
3b0111de9c
Tiva: Fix compile errors when GPIO interrupts are not enabled
2015-03-23 17:51:13 -06:00
Gregory Nutt
3875e86436
SAMV7: Add framework for USB DCD. Initial check-in is just the SAMA5 USB DCD with naming changes to get a clean compilation. Needs careful review and comparison with datasheet and, of course, testing
2015-03-23 14:06:53 -06:00
Gregory Nutt
17db74c453
Update some recent Tiva changes so that old LM3S parts at least still build (but have not been retested)
2015-03-23 11:21:26 -06:00
Gregory Nutt
f3ad3efcb4
- ADC driver has been re-organized; configuration is now handled in code
...
instead of Kconfig to help reduce bloat and confusion.
- Timer changed to remove ADC coupling in Kconfig to code and moved
configuration up from arch/arm/src/tiva to configs/tm4c123g-launchpad/src.
- GPIO driver needed small fixes in the configuration routines and
discovered false-positive bugs in interrupt testing: interrupts are now
verified to actually be working reliably.
- Attempt to apply some consistency in the tiva arch/ level's interface
to the config/board/ level driver configuration.
From Calvin Maguranis
2015-03-23 09:12:52 -06:00
Gregory Nutt
5ed5187175
PIC23MX Starter Kit: Looks like we need to use a different linker script with Pinguino
2015-03-21 15:40:22 -06:00
Gregory Nutt
b41738ed62
SAMV7: A little more USB-related stuff
2015-03-21 08:54:01 -06:00
Gregory Nutt
b2bfebff23
SAMV7: Add configuration logic and clock setup for USB device
2015-03-21 07:28:59 -06:00
Gregory Nutt
7ebb54abaa
SAMA5: Fix a typo in the Kconfig file
2015-03-21 06:22:04 -06:00
Gregory Nutt
a5831081ce
SAMV7: Add USBHS register defintiion header file
2015-03-20 14:08:33 -06:00
Gregory Nutt
d64e8e6732
Include chip/sam_spi.h in sam_spi.h
2015-03-20 11:09:36 -06:00
Gregory Nutt
7242a6194c
SAMA5D3: Fix typos in timer/counter header file. From Bob Doiron
2015-03-20 09:19:10 -06:00
Gregory Nutt
d877b1bd50
STM32 RTC lower-half: Fix some errors that cause compilation failures. From shilo.xyz
2015-03-19 12:56:47 -06:00
Gregory Nutt
08fcf035dd
SAMV5 EMAC: A few more fixes. Neccessary but not sufficient
2015-03-19 08:54:50 -06:00
Gregory Nutt
256da4837e
SAMV7 Ethernet: Fix an order problem that left RX and TX disabled
2015-03-18 18:07:07 -06:00
Gregory Nutt
dd50e03666
SAMV7: Add a sneak internal interface that will allow us to set the MAC address before NSH even starts
2015-03-18 17:23:40 -06:00
Gregory Nutt
6763128345
SAMV7: Updates to Ethernet driver based on comparison with Atmel sample code. Add configuration for other PHY GPIOs. Still no Ethernet interrupts
2015-03-18 15:55:00 -06:00
Gregory Nutt
714af6ebb8
SAMV7 Ethernet: Support getting IP address from the XULT AT24 EEPROM
2015-03-17 14:29:41 -06:00
Gregory Nutt
26923b39de
SAMV7 EMAC: Fix range of MCK dividers
2015-03-17 11:19:46 -06:00
Gregory Nutt
42c33033a8
SAMV7: Use D-Cache clean/flush/invalidate by range in EMAC and XDMAC drivers
2015-03-17 09:28:27 -06:00
Gregory Nutt
fdbbab013b
Break ARMv7E-M cache operations into separate files; Finish the unimplemented cache operations
2015-03-17 08:48:41 -06:00
Gregory Nutt
32aadd9cc2
SAMV7: Quick'n'dirty port of the SAMA5D4 Ethernet MAC driver to the SAMV7. Still some unresovled issues with DCache handling
2015-03-16 13:51:37 -06:00
Gregory Nutt
0abe4e701b
SAMV7: Add Ethernet MAC register definition header file
2015-03-16 11:46:20 -06:00
Gregory Nutt
28ead380ea
This commit enables HSMCI functionality in the SAMV71-XULT. TX DMA is, unfortunately, currently disabled.
2015-03-15 12:17:39 -06:00
Gregory Nutt
5fcdb09791
SAMA5: Fix a bug in SAMA5 HSMCI. The bitfield mask and shift values were reversed resulting in a trashed value for the number of blocks in the BLOCKR register. This was sufficient to prevent DMA writes from working.
2015-03-15 09:35:48 -06:00
Gregory Nutt
9e2587ffe9
SAMV7 XDMA: Fix a problem with invalidating the cache on RX DMA
2015-03-14 15:25:32 -06:00
Gregory Nutt
dd342bb4a7
EFM32: Add I2C driver. From Pierre-noel Bouteville
2015-03-14 14:47:53 -06:00
Gregory Nutt
3b0615ece8
SAMV7: More SDRAM logic. It does still does not work
2015-03-14 13:27:00 -06:00
Gregory Nutt
cc497202ed
SAMV71-XULT: Add support for SDRAM (unverified)
2015-03-14 11:00:46 -06:00
Gregory Nutt
cbdaa0dc77
Include correct chip file
2015-03-14 09:15:11 -06:00
Gregory Nutt
867bd20f5c
SAMV7: Add SDRAMC register definition header file
2015-03-14 09:13:51 -06:00
Gregory Nutt
9c5205142f
SAMV7 HSMCI: Change system bus interfaces seems to eliminate DMA failures.
2015-03-13 14:35:36 -06:00
Gregory Nutt
0b64c51a13
Minor updates from initial debugging.
2015-03-13 13:46:27 -06:00
Gregory Nutt
db786ea654
SAMV7 HSMCI: Reading response registers at the wrong time can cause loss of response data.
2015-03-13 12:46:33 -06:00
Gregory Nutt
ad216583b7
SAMV7: Fix some cloning errors. SAMA5->SAM7
2015-03-13 10:38:10 -06:00
Gregory Nutt
74548a5ed4
Fix a typo in a Cortex-M7 address
2015-03-13 10:37:21 -06:00
Gregory Nutt
ce0021e753
STM32 serial: Make input hardware flow-control work with RX DMA. From Jussi Kivilinna
2015-03-13 07:18:21 -06:00
Gregory Nutt
6cb5b48300
STM32: Fix RX DMA setup for UART5. From Jussi Kivilinna.
2015-03-13 07:06:46 -06:00
Gregory Nutt
4580af6d0b
SAMV7: Quick'n'dirty port of the SAMA5 HSMCI driver to the SAMV7
2015-03-12 18:03:41 -06:00
Gregory Nutt
743fd5ac50
SAMV71: Quick'n'dirty port of the SAMA5 SSC driver to the SAM7. The IP is compatible but there are still some DMA- and Cache-related issues that need to be worked out.
2015-03-12 16:00:38 -06:00
Gregory Nutt
da3233a527
SAMV71-XULT: Enable I2C and the I2C tool in the NSH configuration
2015-03-12 12:27:06 -06:00
Gregory Nutt
109b9910f6
SAMV7: Add TWI/I2C driver (untested)
2015-03-12 10:58:11 -06:00
Gregory Nutt
00a841c417
SAMV7: Add SPI header files and driver
2015-03-12 09:12:37 -06:00
Gregory Nutt
0b8248b33c
stm32: usbdev: Fix stale initialization invalidating later NULL check. From Juha Niskanen
2015-03-12 08:08:50 -06:00
Gregory Nutt
9997fa77ad
ARMv7-M MPU. Bad syntax will cause failure to write the correct value to the MPU_RASR register. From Juha Niskanen
2015-03-12 08:00:53 -06:00
Gregory Nutt
99f4e31b69
stm32_i2c: Add missing NULL check. From Juha Niskanen
2015-03-12 07:53:41 -06:00
Gregory Nutt
70e7dcba71
Bringing PPPD yet closer to the NuttX coding style
2015-03-11 18:47:04 -06:00
Gregory Nutt
90bc4b81ee
SAMV7-XULT: Integrate button support and apps/examples/buttons into the NSH configuration
2015-03-11 14:41:58 -06:00
Gregory Nutt
3d60cc7768
SAMV7: Correct low-level console output
2015-03-11 14:39:32 -06:00
Gregory Nutt
ca8165dd10
SAMV71-XULT: Enable 64-bit floating point support
2015-03-11 12:30:14 -06:00
Gregory Nutt
da844f1a88
SAMV71-XULT: Switch to the ARM GNU tools for Embbeded tools that actually support Cortex-M7
2015-03-11 12:16:27 -06:00
Gregory Nutt
508d96b571
SAMV7-XULT: Enable I- and D-caches, correct polaty of LEDs
2015-03-11 11:23:19 -06:00
Gregory Nutt
65e34be9b4
Update COPYING file with special license requirements for PPPD
2015-03-11 09:14:15 -06:00
Gregory Nutt
834072815b
SAMV71-XULT: Some bugfixes from early bring-up work
2015-03-10 16:11:28 -06:00
Gregory Nutt
fe1aaf76fc
Tiva TimerLib: Fix a typo in peripheral waiting logic: gptm, not gpio. From Bradley Noyes
2015-03-10 12:16:40 -06:00
Gregory Nutt
426888efb5
SAMV7: Add logic to enable/disable TCMs
2015-03-10 11:32:05 -06:00
Gregory Nutt
36e88e504a
SAMV7: Update floating point and TCM configuration options. Update TODO list. Update comments. Refresh a configuration
2015-03-10 07:50:32 -06:00
Gregory Nutt
26dec2c333
Cosmetic changes to conditional compilation
2015-03-09 18:14:31 -06:00
Gregory Nutt
4e306087af
Remove some traiilng whitespace
2015-03-09 15:42:35 -06:00
Gregory Nutt
e39077775d
Cortex-M7: Add cache operations
2015-03-09 15:42:07 -06:00
Gregory Nutt
d3033efa9c
Cortex-M7: Add cache operations
2015-03-09 15:41:48 -06:00
Gregory Nutt
66d48615c6
SAMV7: Leverage XDMAC driver from the SAMA5D4.
2015-03-09 10:11:12 -06:00
Gregory Nutt
cfca6b08c5
SAMV71-XULT: Add support for on-board LEDs. Includes partial support for on-board buttons. Some corrections fo to egg-stk37000 and sam4e-ek discovered during leveraging. Add board READEM.txt file
2015-03-09 08:23:09 -06:00
Gregory Nutt
5515f26de4
SAMV7: Add GPIO interrupt support
2015-03-08 19:32:05 -06:00
Gregory Nutt
6fdbbe6c4b
SAMV71: Add GPIO library support
2015-03-08 19:12:30 -06:00
Gregory Nutt
9cb9e8102c
SAMV7: Add PIO register definition header file
2015-03-08 17:34:26 -06:00
Gregory Nutt
73bd97e537
SAMV71: Add pin mapping definitions
2015-03-08 13:24:32 -06:00
Gregory Nutt
55c5d04c84
SAMV71: Fix a few typos; Use factional value in BAUD calculation
2015-03-08 12:27:55 -06:00
Gregory Nutt
2cb3c03678
SAMV7: Add serial driver
2015-03-08 10:15:42 -06:00
Gregory Nutt
6c608a05c7
SAMV71: Add UART register definition header file
2015-03-08 08:42:22 -06:00
Gregory Nutt
fe629e76b3
EFM32 updates from Pierre-noel Bouteville
2015-03-08 07:12:47 -06:00
Gregory Nutt
967e8bbc7b
SAMV71-XULT: Add heap allocation logic
2015-03-07 11:46:54 -06:00
Gregory Nutt
adbc25a05c
SAMV7: Add interrupt-related logic
2015-03-07 11:16:44 -06:00
Gregory Nutt
b3403dee6a
SAMV7: Add basic clock and timer ISR configuration logic
2015-03-07 10:32:47 -06:00
Gregory Nutt
839dd9baef
SAMV71: Add EEFC register definition header file
2015-03-06 16:39:18 -06:00
Gregory Nutt
8cb93302e9
SAMV71: Add Supply Controller register definition header file
2015-03-06 15:27:51 -06:00
Gregory Nutt
3440c94861
SAMV71: Add PMC register definition header files
2015-03-06 14:58:13 -06:00
Gregory Nutt
36d161fc2b
SAMV71: More updates on the way to a clean build. Still more to do to complete that journey
2015-03-06 12:13:09 -06:00
Gregory Nutt
4cde63eead
Cortex-M7/SAMV71-XULT: Various fixes for building Cortex-M7 with SAMV71.
2015-03-06 10:53:57 -06:00
Gregory Nutt
d18ed4569c
Add a bare bones framework that will do nothing more than support configuration for the Atmel SAMV71 Xplained Ultra board. Very much a work in progress.
2015-03-06 08:56:44 -06:00
Gregory Nutt
6cd282ccc2
Add new common lazy FPU state saving option for ARMv7-M. Not yet verified
2015-03-06 08:26:43 -06:00
Gregory Nutt
2d666e897b
SAM3/4: Leverage some start-up logic from STM32
2015-03-05 17:45:13 -06:00
Gregory Nutt
eaecd27998
SAMV7: Add SAMV71 peripheral IDs and interrupt vector definitions
2015-03-05 16:34:22 -06:00
Gregory Nutt
4bbb561193
Fix typo in file name
2015-03-05 15:48:48 -06:00
Gregory Nutt
6c8366ef5f
SAMV71: Add memory map header file
2015-03-05 15:47:29 -06:00
Gregory Nutt
58c7e16960
SAMV7 Kconfig: Add peripheral selections
2015-03-05 13:51:39 -06:00
Gregory Nutt
f573dab044
Make ARM build system Cortex-M7 ready
2015-03-05 11:25:27 -06:00
Gregory Nutt
eedd5e0bbb
Add basic build directories and configuration logic for the SAMV7 family
2015-03-05 10:00:24 -06:00
Gregory Nutt
b5bfb6762d
Fix some BBRAM return values (from David Sidrane). Also some MTD-related cosmetic changes
2015-03-05 08:08:11 -06:00
Gregory Nutt
404fef74d9
Fix two uses of DEBUG_COLORATION vs STACK_COLORATION (from David Sidrane). Also some corrected comments
2015-03-05 06:41:14 -06:00
Gregory Nutt
76007d28f5
Add support for dumping board-specific information on assertion. From David Sidrane
2015-03-04 07:00:29 -06:00
Gregory Nutt
38f250cde3
Add missing SPI callback functions to the STM32 SPI driver. From Freddie Chopin
2015-03-04 06:52:46 -06:00
Gregory Nutt
cb5cb96bc9
Fix issues when AES support was added for the STM32L1. From Juha Niskanen
2015-03-04 06:38:03 -06:00
Gregory Nutt
2fc99df452
Add support for new STM32L1 chip variant. From Juha Niskanen
2015-03-04 06:33:44 -06:00
Gregory Nutt
c880446962
STM32 BBSRAM driver updated by David Sidrane
2015-03-03 16:05:24 -06:00
Gregory Nutt
032155078b
Adds architecture support for the STM32F372 and F373 (no board support yet). Only tested on STM32F373CC, but should work on the rest. Contributed by Marten Svanfeldt.
2015-03-02 10:33:42 -06:00
Gregory Nutt
beaf976626
arch/: board function prototypes are now in include/nuttx/board.h. Remove from architecture header file; Add inclusion of nuttx/board.h to all files referencing board functions
2015-02-27 17:19:38 -06:00
Gregory Nutt
94a3028c9e
Tiva ADC: Drive updates from Calvin Maguranis
2015-02-25 13:38:22 -06:00
Gregory Nutt
234cc5b7bf
SAM4CM free-running time: Change overflow type from uint16 to uint32. From Max Neklyudov.
2015-02-25 08:12:31 -06:00
Gregory Nutt
4435103316
Eliminate some warnings
2015-02-25 08:05:35 -06:00
sauttefk
15618613ab
Fix SSI TX and RX legacy mapping of TM4C1294NC
2015-02-24 03:31:12 +01:00
Gregory Nutt
54c16a78ca
STM32: Fix for compilation introduced by last backup RAM change. Not sure it it is correct, be now things do compile
2015-02-21 17:51:03 -06:00
Gregory Nutt
f0349fa24e
Adds the ability to use the STM32F2 and STM32F4 Battery Backedup SRAM in the file system. With an option to Save Panic context to one of the files. From David Sidrane.
2015-02-21 15:15:51 -06:00
Gregory Nutt
1106469a7c
Changes to support fully write protecting the backup domain. N.B. stm32_pwr_enablebkp did not account for the delay from enable to the domain being writable. The KISS solution is a up_udelay. A more complex solution would be a negated write test with restore. From David Sidrane.
2015-02-21 14:53:33 -06:00
Gregory Nutt
0260620fdc
Tiva GPIO clean-up by Calvin Maguranis
2015-02-20 13:40:25 -06:00
Gregory Nutt
f79306d9e6
Tiva: Move GPIIO prototypes out of arch/arm/include/tiva/irq.h to arch/arm/tiva/tiva_gpio.h where they belong
2015-02-20 13:31:43 -06:00
Gregory Nutt
cded7ea682
Fix some time value changes; mostly changing greater than 1000000000 to greater than or equal to 1000000000. From Juha Niskanen
2015-02-20 07:07:36 -06:00
Gregory Nutt
63ab39b274
VFS: The inode unlink method should not be support if operations on the root pseudo-filesystem are disabled.
2015-02-18 09:34:58 -06:00
Gregory Nutt
e2336a07bb
The RTC ioctl() method is now a configuration option
2015-02-18 08:23:10 -06:00
Gregory Nutt
f94e601981
Add an IOCTL method to the RTC interface
2015-02-18 08:05:31 -06:00
Gregory Nutt
e07d2abcbd
Tiva ADC: Should not have its own ADC debug. Should use the common Analog debug
2015-02-17 14:54:56 -06:00
Gregory Nutt
c81412f822
Tiva: Updated files to allow for ADC triggering by the timer. I’ve cleaned up some parts of the ADC code, too, and fleshed out the PWM triggering ioctl. From Calvin Maguranis
2015-02-17 13:50:30 -06:00
Gregory Nutt
af31df7396
Tiva SPI: Cosmetic improvements
2015-02-17 12:45:47 -06:00
Gregory Nutt
3424796c71
EFM32 USB Device: Is not basically functional with this change. From Pierre-noel Bouteville.
2015-02-16 15:45:49 -06:00
Gregory Nutt
e2bde7037f
Fix a compilation error. From Macs Neklyudov
2015-02-16 14:30:15 -06:00
Gregory Nutt
51bff04402
Missed a Kconfig definition in the last commit
2015-02-16 10:41:12 -06:00
Gregory Nutt
47e9b4a272
STM32 RTC: Extend the RTC interface to support reading subseconds. From Jussi Kivilinna
2015-02-16 07:18:09 -06:00
Gregory Nutt
f477c9b275
Add support for RTC driver to the STM32F4-Discovery board
2015-02-15 10:11:01 -06:00
Gregory Nutt
a919e70121
Remove an unused variable
2015-02-15 08:51:39 -06:00
Gregory Nutt
5cb233f712
RTC: A little more clean-up of the RTC driver
2015-02-15 08:19:23 -06:00
Gregory Nutt
f4e7e14e00
STM32 RTC: Implement the rdtime() method of the RTC lower half interface
2015-02-13 13:56:22 -06:00
Gregory Nutt
9e80f7d8d2
STM32 RTC driver lower half: Implement the settime method of the RTC interface
2015-02-13 13:36:15 -06:00
Gregory Nutt
faa16d06ac
Break out a new internal interface, stm32_rtc_setdatetime(). This eliminates some un-necessary time conversions. From Freddie Chopin.
...
Add a skeleton implementation of the RTC lower half interface at arch/arm/src/stm32/stm32_rtc_lowerhalf.c. This is just the framework for the RTC lower half. None of the interface methods have yet been implemetned.
2015-02-13 12:56:58 -06:00
Gregory Nutt
5fb51bf962
Forgot to add a file in the last commit
2015-02-13 10:05:10 -06:00
Gregory Nutt
3724a5e98e
RTC: Remove all backdoor interfaces from rtc.h
2015-02-13 08:41:34 -06:00
Gregory Nutt
7c61b61adf
Merge commit 'd000b0ac237cb6b17e3d355b55250c3ca7e9f2d6'
2015-02-11 18:07:03 -06:00
sauttefk
dc402d8d3e
Add TI EK-TM4C1294XL launchpad support
2015-02-12 00:30:38 +01:00
Gregory Nutt
bdb4893ced
Kinetis: Add architectural support for the K26Z128VLH4. From Derek B. Noonburg
2015-02-11 07:15:45 -06:00
Gregory Nutt
5bb723c2e1
LP17 Ethernet Driver: Fix some compile problems when IPv6 is enabled
2015-02-10 15:23:11 -06:00
Gregory Nutt
3859ee90f8
LPC17xx: Add IPv6 support to the LPC17 Ethernet driver. Untested... I no longer have a proper environment for LPC17 debug.
2015-02-10 14:04:08 -06:00
Gregory Nutt
601d99183b
SAM4 Ethernet Driver: No supports operation using the high priority work queue so that packet processing can occur outside of interrupt level processing.
...
SAM4E-EK: The nsh configuration now configures the Ethernet driver for execution on the HP work thread.
2015-02-10 11:10:55 -06:00
Gregory Nutt
761d4bdbba
Fix some warning
2015-02-09 18:24:31 -06:00
Gregory Nutt
4b74554fd2
Clone the SAMA5D4 IPv6 support to the SAM4E EMAC and SAMAd3 EMAC and GMAC drivers.
2015-02-09 17:16:55 -06:00
Gregory Nutt
4f9998b4a8
Big, very risky change: Remove all occurrences of up_maskack_irq() that disable and enable interrupts with up_ack_irq() that only acknowledges the interrupts. This is only used in interrupt decoding logic. Also remove the logic that unconditionally re-enables interrupts with the interrupt exits. This interferes with the drivers ability to control the interrupt state. This is a necessary, sweeping, global change and unfortunately impossible to test.
2015-02-09 16:12:11 -06:00
Gregory Nutt
25067a58e8
SAMA5D Ethernet: Add support for CONFIG_NET_NOTINTS so that the driver can operate from the work queue thread instead of doing everything from the interrupt level.
2015-02-09 15:26:05 -06:00
Gregory Nutt
ac2a1f0bb1
ARMv7-A interrupt handler: Should not automatically re-enable interrupts on interrupt return. That interferes with the driver's ability to manage interrupts.
2015-02-09 15:24:31 -06:00
Gregory Nutt
94d3c68013
Oops... Conditioned on IPv4 wheren IPv6 was intended
2015-02-09 14:16:32 -06:00
Gregory Nutt
3384274087
Fix IPv4-dependend debug output
2015-02-09 13:18:31 -06:00
Gregory Nutt
66e456161f
SAMA5D4 EMAC: Add support for Multicast address matching and IPv6
2015-02-09 10:50:38 -06:00
Gregory Nutt
ef2d314235
Add logic so that STM32 Ethernet drivier can avoid interrupt level processing and, instead, execute on the work thread.
2015-02-09 08:33:29 -06:00
Gregory Nutt
3465cb6138
SYSLOG: Add an option to use the syslog'ing device as the system consolution. This option enables a low-level, write-only console device at /dev/console (similar to the low-level UART console device). From Pierre-noel Bouteville.
2015-02-08 06:53:24 -06:00
Gregory Nutt
93ed9dc8d3
STM32 SPI: Clean-up asymmetric configuration of SPI6
2015-02-07 18:59:06 -06:00
Gregory Nutt
6f335dc6c6
STM32 SPI: The source clock for SPI 4,5, and 6 should be PCLK2, not PCLK1 (for F411, F427, and F429). Per David Sidrane.
2015-02-07 13:59:45 -06:00
Gregory Nutt
8f4bbdd057
Updated Tiva ADC files
2015-02-06 16:56:12 -06:00
Gregory Nutt
2502835fe8
Tiva ADC: Add Kconfig options for ADC. From Calvin Maguranis
2015-02-05 19:05:13 -06:00
Gregory Nutt
0d316326c2
Tiva ADC: Partial build support. Still missing Kconfg changes
2015-02-05 18:01:18 -06:00
Gregory Nutt
9ad18d827e
Tiva ADC: Adds a Tiva ADC driver. From Calvin Maguranis
2015-02-05 17:36:23 -06:00
Gregory Nutt
a122910566
Tiva ADC: Register definitiona header file from Calvin Maguranis
2015-02-05 16:29:17 -06:00
Gregory Nutt
971c5c98fe
Adds support for TM4C123G timers; integrates with the TM4C123G Launchpad. From Calvin Maguranis
2015-02-05 13:51:32 -06:00
Gregory Nutt
c7f71c99a5
Networking: Changes need to build ICMPv6 'router' configuration on STM32 with network debug enabled
2015-02-05 11:47:56 -06:00
Gregory Nutt
cc63543b80
STM32: Add an IPv6 configuration for the STM32F4-Discovery board (witht he STM32-DISCO_BB base board). Verify that the STM32 Ethernet driver works with IPv6.
2015-02-05 11:21:04 -06:00
Gregory Nutt
a9c71630e1
Add IPv6 support to network driver skeleton and to SAMA5D4 Ethernet driver (which, unfortunately is still missing address filtering logi)
2015-02-05 10:49:32 -06:00
Gregory Nutt
6568d94902
ICMPv6: Add logic to behave like a router (if so configured): NuttX will not send the router advertisement message in response to any router solicitation messages.
2015-02-05 09:43:29 -06:00
Gregory Nutt
24d800398e
Networking: Break out Ethernet definitions into a separate file; add IPv6 multicast addresses as common globals, Ethernet drivers need to filter link-local, all nodes Ethernet address
2015-02-04 14:51:20 -06:00
Gregory Nutt
72645e184d
Minor update to Kconfig file selections
2015-02-04 08:21:32 -06:00
Gregory Nutt
778d326c51
Re-arrange condition logic from the last change to avoid having STM32-specific conditional logic outside of the STM32 sandbox.
2015-02-04 07:24:19 -06:00