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3149 Commits

Author SHA1 Message Date
Gregory Nutt
47d4b41bad Freescale Kinetis KL25Z PIT and TPM module register definitions 2013-09-15 17:00:50 -06:00
Gregory Nutt
ec03861315 SAMA4 EMAC buffer allocation logic 2013-09-15 14:26:25 -06:00
Gregory Nutt
45e4425687 SAMA5 Ethernet: Add support for PHY interrupts 2013-09-15 12:24:42 -06:00
Gregory Nutt
7c13790901 SAMA5: Update Ethernet initalization logic to handle both EMAC and GMAC 2013-09-14 08:19:36 -06:00
Gregory Nutt
7b6a1a57eb SAMA5 EMAC: Create a empty, skeleton file that will eventually become the SAMA5 EMAC driver 2013-09-13 15:04:46 -06:00
Gregory Nutt
64825db9c2 STM32: Support for the LeafLabs Maple and Maple Mini boards. From Librae 2013-09-13 12:45:33 -06:00
Gregory Nutt
e31f62e1b5 STM32 Kconfig: Fix STM32 UART7/8 kconfig names and UART DMA. Provided by Lorenz Meier 2013-09-13 11:45:32 -06:00
Gregory Nutt
1b17b8fbea Make filter register accessible for CAN1 and CAN2. Provided by Lorenz Meier 2013-09-13 11:20:10 -06:00
Gregory Nutt
363df90d81 SAMA5 EMAC and GMAC: More additions to register definition files 2013-09-13 03:35:56 -06:00
Gregory Nutt
91a065e9fc SAMA5: Beginning of EMAC and GMAC register definition header files 2013-09-12 15:45:12 -06:00
Gregory Nutt
9f937bc0e4 SAMA5D3x-EK README update 2013-09-12 14:17:56 -06:00
Gregory Nutt
1d40c068fb SAMA5 TWI: Misc improvements during debug (still not getting interupts) 2013-09-12 12:25:31 -06:00
Gregory Nutt
3bb6a8b164 SAMA5 TWI: Cleanup compilation errors that occur when I2C debug is enabled 2013-09-12 09:46:20 -06:00
Gregory Nutt
950ea5830a SAMA5 TWI: Add support for I2C readwrite and transfer methods 2013-09-11 17:52:23 -06:00
Gregory Nutt
42b547f73c SAMA5: Barebones TWI driver implementation 2013-09-11 16:48:56 -06:00
Gregory Nutt
f2a5c43b25 SAMA5: Framework for a TWI driver (incomplete) 2013-09-11 12:28:52 -06:00
Gregory Nutt
f9afaf89fc SAMA5: TWI register definition file 2013-09-11 10:23:46 -06:00
Gregory Nutt
11a515eca0 SAMA5D3x-EK demo configuration now supports HSMCI0 and HSMCI1 2013-09-11 09:50:36 -06:00
Gregory Nutt
dac363d43e Clean-up a few USB trace formats 2013-09-10 16:17:06 -06:00
Gregory Nutt
9f3e2e3bec SAMA5: Add tracing support to the OHCI driver 2013-09-10 16:01:44 -06:00
Gregory Nutt
92aa5785bf SAMA5 EHCI: Did not work with DEBUG off. Appears to be because of some D-Cache flushing that was performed only with DEBUG ON. Now is unconditional 2013-09-10 10:12:51 -06:00
Gregory Nutt
a4e6a3b80f Extent the the USB host trace logic to include verbose debug output 2013-09-09 17:27:21 -06:00
Gregory Nutt
1a18d1e3e7 USB monitor extended so that it can also be used with USB host trace data 2013-09-09 15:02:33 -06:00
Gregory Nutt
8f69c6c66c Beginning of support for USB host side tracing 2013-09-09 14:01:52 -06:00
Gregory Nutt
31e1e7506a USB MSC host class driver: Don't bother retrying to initialize the FLASH if the interface is returning fatal transfer errors 2013-09-09 10:00:16 -06:00
Gregory Nutt
10a9fcff30 Trivial updates assocaited with USB host mass storage and SAMA5 EHCI 2013-09-08 13:42:56 -06:00
Gregory Nutt
e5841a74a9 SAMA5: Add support EHCI/OHCI to sama5d3x-ek/demo (does not work yet); Fix some EHCI/OHCI compilation issues when DEBUG is disabled 2013-09-07 11:43:06 -06:00
Gregory Nutt
6e5df6259e SAMA5D3x-EK: Add a new 'demo' configuration 2013-09-06 11:40:46 -06:00
Gregory Nutt
1fcc8894e6 CDC/ACM and PL2303 device drivers: Don't use the max packet size assigned to an endpoint in order to determine the request buffer size. The endpoint has not yet been configured that max packet size may be wrong. 2013-09-05 18:00:16 -06:00
Gregory Nutt
ec01a41da7 SAMA5 UDPHS: Fix bad setup for sam_req_write call introduce in last commit 2013-09-05 15:51:27 -06:00
Gregory Nutt
54d5e1a49d SAMA5 UDPHS: Major changes to DMA interrupt and request handling to better handle DMA 2013-09-05 14:33:27 -06:00
Gregory Nutt
9861f18ee1 SAMA5 UDPHS: Fix DMA channel vs. matching endpoint 2013-09-04 15:08:19 -06:00
Gregory Nutt
75b53ad12b SAMA5 UDPHS: More USB fixes mostly related to byte counts, endpoint configuration, and dma configuration 2013-09-04 13:36:52 -06:00
Gregory Nutt
2d9c62d3ef SAMA5 UDPHS: More zero length packet fixes; revamped request queue structures 2013-09-04 09:48:08 -06:00
Gregory Nutt
c09b08f4a5 SAMA5 UDPHS: Fixes related to null packet and SETUP OUT data handling 2013-09-03 19:13:34 -06:00
Gregory Nutt
3e505efe73 SAMA5 UDPHS: Small change to zero length packet handling 2013-09-03 16:24:11 -06:00
Gregory Nutt
adc7248d6c SAMA5 UDPHS: Fix some issues with TX interrupt handling 2013-09-03 14:53:10 -06:00
Gregory Nutt
74d0e02850 SAMA5 UDPHS: A little debugging progress. Not all transfers are working yet 2013-09-03 13:09:50 -06:00
Gregory Nutt
4e2894c6ae SAMA5 UDPHS: Changes from initial debug session. Still a long way to go 2013-09-02 16:59:07 -06:00
Gregory Nutt
abd29a5ede SAMA5 UDPHS: Fixes related to soft connect pullup and DMA buffer allocation 2013-09-02 14:55:33 -06:00
Gregory Nutt
df39b67fd6 SAMA5 UDPHS: Some very early debug corrections. Not yet working. 2013-09-02 12:26:15 -06:00
Gregory Nutt
8905de3826 SAMA5 UDPHS: Add logic to handle deferred address setting; add logic to handle EP0 SETUP OUT data 2013-09-02 10:08:18 -06:00
Gregory Nutt
928d0ddd8a STM32 Timer Register Bit Definitions: Some CCER bit settings changed per SourceForge bug #18 submitted by CCCTSAO 2013-09-02 08:01:09 -06:00
Gregory Nutt
4cbe61cdd3 SAMA5 UDPHS: Clean up some write request handling 2013-09-01 16:56:22 -06:00
Gregory Nutt
7fd159779e SAMA5 UDPHS: Resolve a few of easier REVISIT pre-processor warnings 2013-09-01 15:36:17 -06:00
Gregory Nutt
80a498aa8b SAMA5 UPPHS: Fix a small mountain of compilation errors. Still things to REVISIT so it is not ready for test 2013-09-01 11:31:12 -06:00
Gregory Nutt
3ba3dfd9bc SAMA5 UDPHS: Support USPHS clock configuration 2013-09-01 11:29:51 -06:00
Gregory Nutt
06355a17e1 SAMA UDPHS: Add pull-up and stall logic. Added to build system but does not yet build 2013-08-31 17:37:51 -06:00
Gregory Nutt
5693f4b8b0 Remove empty README.txt files 2013-08-31 13:17:04 -06:00
Gregory Nutt
30cf03d3e8 SAMA5 UDPHS: Add endpoint configuration and read DMA logic 2013-08-31 12:20:00 -06:00
Gregory Nutt
f22b388cb4 SAMA5 UDPHS: Bring in UDPHS endpoint interrupt handling logic 2013-08-31 10:43:58 -06:00
Gregory Nutt
ab1c21609d SAMA5 UDPHS: Write DMA logic added. Still incomplete 2013-08-30 15:41:06 -06:00
Gregory Nutt
07ffab9308 SAMA5: Updated UDPHS driver. Still incomplete 2013-08-30 14:51:41 -06:00
Gregory Nutt
ca2709296d SAMA5 UDPHS interrupt decoding logic 2013-08-29 18:11:34 -06:00
Gregory Nutt
eeaeb369fe SAMA5 UDPHS interrupt decoding logic 2013-08-29 17:34:05 -06:00
Gregory Nutt
a4f58596d4 SAMA5: Initial framework for a UDPHS USB device side driver 2013-08-29 16:29:27 -06:00
Gregory Nutt
b47e1933f5 SAMA5: Add high-speed USB register definition header file 2013-08-28 17:50:05 -06:00
Gregory Nutt
4508986dbb SAMA5 EHCI: Implemented (but did not test) interrupt endpoint logic 2013-08-28 13:07:35 -06:00
Gregory Nutt
6acb286c39 SAMA5 EHCI: Correct and extend pool allocation logic; Fix data toggle values 2013-08-28 10:03:48 -06:00
Gregory Nutt
556446e3a1 SAMA5: Fixes a bug in the way that the heap regions were being allocated 2013-08-27 16:43:19 -06:00
Gregory Nutt
e1fe1c3037 SAMA5 OHCI+EHCI: Using cp15_clean instead of cp15_coherent; EHCI: Need to set alt pointer in order to handle short transfers. 2013-08-27 13:07:21 -06:00
Gregory Nutt
56f9092a87 Fix all occurrences of "the the" in documentation and comments 2013-08-27 09:40:19 -06:00
Gregory Nutt
a55dda98b3 Add hooks to select Cortex-A8 2013-08-27 08:46:37 -06:00
Gregory Nutt
f69688422f SAMA4 EHCI: Correct some backward conditional compilation; fix some warnings 2013-08-26 17:03:52 -06:00
Gregory Nutt
56f2b3b963 Add a new method to the USB host driver interface: getdevinfo. This method will return information about the currently connected device. At present, it only returns the device speed. The speed is needed by the enumeration logic in order to set a credible initial EP0 max packet size 2013-08-26 15:46:16 -06:00
Gregory Nutt
f500338401 SAMA5 EHCI: Status phase is the opposite direction as the data phase 2013-08-26 14:28:13 -06:00
Gregory Nutt
78812d5b80 SAMA5 EHCI: Taking direction from wrong bit in SETUP request; need to flush data buffer before starting SETUP request 2013-08-26 11:05:23 -06:00
Gregory Nutt
57eb83da9d #17 Fix if CONFIG_SDIO_BLOCKSETUP defined, OS will crash. From CCTSAO 2013-08-26 08:54:46 -06:00
Gregory Nutt
250956c803 SAMA5 EHCI: Data toggle and status phase fixes 2013-08-25 14:45:08 -06:00
Gregory Nutt
d35e1c6bd4 EHCI reset bit was not being set correctly 2013-08-25 10:46:41 -06:00
Gregory Nutt
21566c02d6 SAMA5 OHCI: Fix semaphore handling bug. OHCI is now function by itself again after changes to integrate with EHCI 2013-08-25 08:57:35 -06:00
Gregory Nutt
254ebdaa4c SAMA5 OHCI: Fix backward conditional compilation. Clean-up OHCI/EHCI debug output 2013-08-25 08:30:21 -06:00
Gregory Nutt
02fc7a5a08 SAMA5D3x-EK: Fix some backward conditional compilation 2013-08-24 14:06:47 -06:00
Gregory Nutt
26c03779f8 SAMA5: OHCI various bugfixes for interrupt handling 2013-08-24 13:03:15 -06:00
Gregory Nutt
28a103f1f2 SAMA5: EHCI now handles low- and full-speed connections by giving them to OHCI; OHCI now uses the work queue to defer interrupt processing; If both OHCI and EHCI are enabled, EHCI is the master of the UHPHS interrupt 2013-08-24 11:34:24 -06:00
Gregory Nutt
1f3cebdb40 SAMA5 EHCI: Added logic to detect port speed. Handling is insufficient 2013-08-24 07:36:05 -06:00
Gregory Nutt
3786e72947 Fix #endif with missing #if condition. Reported by Andrew Bradford 2013-08-23 16:40:30 -06:00
Gregory Nutt
d7cba5e5ca SAMA5/ECHI: Debug register access, add logic to determine transfer size, fix setting of control bit in token 2013-08-23 16:23:15 -06:00
Gregory Nutt
e36a0e868d SourceForge bug #16 Fix IO pin map. Add CONFIG_SERIAL_TERMIOS support. From CCTSAO 2013-08-23 11:48:53 -06:00
Gregory Nutt
1383701e7e SAMA5 EHCI: cosmetic changes 2013-08-23 11:26:17 -06:00
Gregory Nutt
189174e26b SAMA5: Add support for sharing ports when both OHCI and EHCI are enabled 2013-08-23 10:58:30 -06:00
Gregory Nutt
e59924a9e6 SAMA5 EHCI: Fix some list traversal bugs 2013-08-22 19:32:24 -06:00
Gregory Nutt
b7330bc849 SAMA5 EHCI: Initial debug changes 2013-08-22 17:25:00 -06:00
Gregory Nutt
e581bfeb29 SAMA5 EHCI: No complete for bulk and control endpoints 2013-08-22 13:36:16 -06:00
Gregory Nutt
ea2e4c11f8 SAMA5 EHCI: Add data transfer logic for asynchronous endpoints 2013-08-22 10:27:46 -06:00
Gregory Nutt
da3ff83fc3 SAMA5 EHCI: Add IOC error handling 2013-08-22 09:23:01 -06:00
Gregory Nutt
73efdf8d05 SAMA5 EHCI: transfer termination logic. Incomplete 2013-08-21 17:08:12 -06:00
Gregory Nutt
f831c8fe94 SAMA5 EHCI: Hardware initialization logic 2013-08-21 13:45:54 -06:00
Gregory Nutt
c109c39be7 Move all SAMA5 EHCI interrupt handling to the worker thread 2013-08-21 11:07:42 -06:00
Gregory Nutt
9f6ae9332f SAMA5 EHCI: At list-oriented cache operations 2013-08-20 18:06:04 -06:00
Gregory Nutt
514826eeb1 Add SAMA5 EHCI list traversal logic 2013-08-20 17:01:30 -06:00
Gregory Nutt
6a79cea2c0 Beginning of support for SAMA5 EHCI. Not much there yet 2013-08-20 15:46:36 -06:00
Gregory Nutt
609dc65235 Add kernel/user memalign functions. Not fully integrated 2013-08-20 13:04:49 -06:00
Gregory Nutt
4d5789dfdd SAMA5 OHCI+EHCI mostly cosmetic changes 2013-08-19 15:03:14 -06:00
Gregory Nutt
4bf3dbe149 USB host: Add device address management support in preparation for USB hub support 2013-08-18 14:31:57 -06:00
Gregory Nutt
a6e6b4ba2d Add few more EHCI definitions 2013-08-18 13:01:13 -06:00
Gregory Nutt
07bd7c2168 STM32 F1 I2C: Fix a typo that crept in with some recent changes. From Yiran Liao 2013-08-18 07:45:14 -06:00
Gregory Nutt
b33de2b618 Add EHCI header file (not quite complete) 2013-08-17 14:19:18 -06:00
Gregory Nutt
a0837fca6c SAMA5 OHCI: Driver is now basically functional 2013-08-16 13:13:21 -06:00
Gregory Nutt
db42d9350c SAMA5 OHCI: Re-organize some endpoint list data structures.. Strange things happen when semaphores lie in DMA memory which is occasionally invalidated 2013-08-16 11:36:51 -06:00
Gregory Nutt
ddc93e1da3 STM32 SPI: nbits interface extended to handle LSB- or MSB-first operation. From Teemu Pirinen 2013-08-16 11:35:22 -06:00
Gregory Nutt
94bcdc66b0 SAMA5 OHCI: Don't prealloc RH port TDs and EDs. Allocate from a free list like other cases 2013-08-15 17:15:08 -06:00
Gregory Nutt
41c068f652 SAMA5 OHCI: Fix errors in cache handling; Don't add ED to control list until port is connected 2013-08-15 15:28:27 -06:00
Gregory Nutt
e23a92243c SAMA5: ports should not be reset state (seems to make no difference) 2013-08-14 17:33:31 -06:00
Gregory Nutt
49f3831e11 SAMA5: Alternatie clock configuration that yields a perfect 48MHz full speed USB clock and a CPU clock of 384MHz 2013-08-14 15:16:04 -06:00
Gregory Nutt
e32b60a78c SAMA5 OHCI: Use physical address and flush and/or invalidate data caches as necessary 2013-08-14 12:23:06 -06:00
Gregory Nutt
bdbe4a4f25 Clean up some LP17xx and STM32 USB host configuration compilation errors due to the massive changes to the USB host interfaces needed to support the SAMA5 2013-08-13 17:43:19 -06:00
Gregory Nutt
8f429fd54d SAMA5: Major restructuring of the the OHCI driver drivers to better handle the multiple root hub ports and concureent transfers on each port. 2013-08-13 16:48:14 -06:00
Gregory Nutt
34418d12bb Separate wait() and enumerate() methods from struct usbhost_driver_s and move to new interface, struct usbhost_connection_s. This is part of the necessary restructuring of the USB host interface to support multiple root hub ports. 2013-08-13 15:03:46 -06:00
Gregory Nutt
b4645f73ec Back out most of the changes of 3b04d08043742b9e65cf38d45988b35bff91daed 2013-08-13 14:12:27 -06:00
Gregory Nutt
d0fbea35eb Separate SAMA5 OHCI interrupt handling into separate functions 2013-08-13 13:34:35 -06:00
Gregory Nutt
7339c1c5e6 SAMA5 OHCI: Fix some erors in the loop that waits for device connection changes 2013-08-13 09:44:16 -06:00
Gregory Nutt
6d72cccdf0 Fix re-entry problem in SAMA5 up_putc 2013-08-13 09:42:40 -06:00
Gregory Nutt
f3bfd6a515 STM32 F3 fixes from John Wharington 2013-08-13 07:48:18 -06:00
Gregory Nutt
a4c195482f More changes to USB host interface to support multiple downstream ports 2013-08-12 16:29:33 -06:00
Gregory Nutt
39696cbf96 First of several changes needed to support multiple USB host root hubs 2013-08-12 14:44:06 -06:00
Gregory Nutt
f5a0ce709c SAMA5: Add logic to control VBUS power for OHCI 2013-08-12 11:59:10 -06:00
Gregory Nutt
dfe6452b8e Add untested OHCI driver for the SAMA5; structure naming and header files for USB host initialization prototypes 2013-08-11 17:11:32 -06:00
Gregory Nutt
9cf1365cde SAMA5: Some improvements to the HSCMI card removal/insertion logic 2013-08-11 11:13:11 -06:00
Gregory Nutt
69bc6afbd3 Add CAN configuration to STM32 config menu 2013-08-10 19:37:35 -06:00
Gregory Nutt
03130ca5a3 STM32: Fix STM32 serial init for non-reordered serial ports. From Lorenz Meier 2013-08-10 19:33:16 -06:00
Gregory Nutt
217ed87aad Added option to disable STM32 serial port re-ordering 2013-08-10 19:29:44 -06:00
Gregory Nutt
3c38992727 SAMA5: Fix HSMCI race condition. Now memory card interface is functional with DMA 2013-08-10 18:01:23 -06:00
Gregory Nutt
6622714c5d Rearrange configuration settings so that ARCH_HAVE_SDIO is moved to higher, sharable level 2013-08-10 09:06:53 -06:00
Gregory Nutt
75d0fc2a10 Extend the virtual-to-physical address conversion logic to handle NFS SRM, UDPH SRAM, and external SRAM and PSRAM. 2013-08-09 17:55:27 -06:00
Gregory Nutt
d8b3921972 SAMA5: Centralize logic for conversion between physical and virtual addresses 2013-08-09 17:25:53 -06:00
Gregory Nutt
ad6b8726c2 Fix some cache-related issues with the SAMA5 DMA driver 2013-08-09 15:25:13 -06:00
Gregory Nutt
a2ba8992a9 SAM3,4,A5 DMA fixes; SAMA5 SPI driver now supports DMA transfers 2013-08-09 13:12:16 -06:00
Gregory Nutt
2b36e7e266 SAMA5: Use RDR/TDR registers for DMA, not FIFO registers; change DMA bit settings to match Atmel example. Still no DMA 2013-08-08 15:51:16 -06:00
Gregory Nutt
53c4a1e647 SAMA5 DMA: Need to flush caches; DMA channel depends upon direction of DMA; the maximum transfer size in bytes depends on the number of bytes per transfer 2013-08-08 13:15:52 -06:00
Gregory Nutt
05242e41ef More SAMA5 DMAC driver fixes. Still does not work. 2013-08-07 17:19:48 -06:00
Gregory Nutt
e015c6edd6 SAMA3,4,A5: Misc corrections to DMA and HSMCI drivers 2013-08-07 11:32:08 -06:00
Gregory Nutt
159635bc2a Fix SAM bug: Parmaters reversed in DMA function call 2013-08-06 15:47:09 -06:00
Gregory Nutt
d1da100cf0 SAM3,4,A5 DMAC driver fixes 2013-08-06 13:27:48 -06:00
Gregory Nutt
03f24c7a1d SAM3,4,A5: Fix some masked status checks that can generate false error reports 2013-08-06 12:36:56 -06:00
Gregory Nutt
dfe42d0254 SAMA5: A few early, easy bug fixes. The rest will all be difficult 2013-08-06 11:29:53 -06:00
Gregory Nutt
e8a34ea3ac SAMA5: Add PIO interrupt support. Massive name changes for consistency in PIO vs GPIO naming. SAMA5D3x-EK: Add support for SD card detection PIO interrupts 2013-08-06 10:20:17 -06:00
Gregory Nutt
a68a3a0366 SAMA5: Add HSMCI memory card driver support 2013-08-05 16:21:24 -06:00
Gregory Nutt
cff3e713f1 SAMA5: SPI Driver + AT25 FLASH work; SAM3/4: Correct an error, SPI will not be correctly configured if CONFIG_SPI_OWNBUS=n 2013-08-05 10:29:43 -06:00
Gregory Nutt
36f4cb53dd SAMA5: Add logic to auto-mount a file system on AT25 SPI FLASH for NSH 2013-08-05 08:24:39 -06:00
Gregory Nutt
412aaa83a2 SAMA5D3x-EK: At support for the AT25 serial FLASH 2013-08-04 16:56:41 -06:00
Gregory Nutt
5fe6e4df26 SAMA5: Add register level debug option for SPI 2013-08-04 14:45:24 -06:00
Gregory Nutt
d516baa73f SAMA5: SPI driver now supports both SPI0 and SPI1 2013-08-04 12:50:20 -06:00
Gregory Nutt
487866b2b6 SAMA5: Add basic SPI suppport (untested) 2013-08-04 11:08:20 -06:00
Gregory Nutt
8194e6bbcf SAMA5: Add DMA suppport (untested) 2013-08-04 10:44:18 -06:00
Gregory Nutt
a93b095ce4 SAMA5: Add DMA controller register definitions 2013-08-03 12:13:42 -06:00
Gregory Nutt
8b317e9ea3 Standard configuration variables used to enable interupt controller debug; SAMA5: Correct handling of spurious interrupts 2013-08-03 08:22:37 -06:00
Gregory Nutt
c7293535fe Various changes to get SAMA5 SDRAM working. Marginally functional, but there is more to be done 2013-08-02 18:30:27 -06:00
Gregory Nutt
08a1ff5c79 Correct some typos int he MPADDRCS register address definitions 2013-08-02 12:06:11 -06:00
Gregory Nutt
b00d72a7f2 SAMA5: More MMU-related changes to properly initialize SDRAM 2013-08-02 11:11:57 -06:00
Gregory Nutt
894618f894 SAMA5: Add logic to initialize SAMA5D3x-EK on-board SDRAM 2013-08-01 16:58:55 -06:00
Gregory Nutt
70e1028d41 SAMA5: Add DDR controller register definitions 2013-08-01 12:27:41 -06:00
Gregory Nutt
35c3a49e1c ARMv7-A: Map all of .text, .bss, .data., stacks before enabling the MMU and caching. This is simpler and avoids fears I have about caching 2013-08-01 10:05:33 -06:00
Gregory Nutt
f0e6d4f101 ARMv7-A: Separate CONFIG_PAGING start-up logic into a different startup file. Too much conditional compilation. 2013-08-01 07:41:00 -06:00
Gregory Nutt
b0045bc7e2 SAMA5: Add an NSH configuration of the SAMA5D3x-EK board 2013-07-31 10:46:13 -06:00
Gregory Nutt
8695c89aa4 SAMA5: Modification of some CPSR-related inline functions 2013-07-31 09:11:24 -06:00
Gregory Nutt
db20c5fc43 Fix Cortex-A CPSR register field definition 2013-07-30 19:05:24 -06:00
Gregory Nutt
391d300d4d SAMA5: Change mapping of vector tables to work around that fact that I don't understand how the AXI MATRIX remap works 2013-07-30 16:19:52 -06:00
Gregory Nutt
16371b50e4 ARMv7-A: Add cp15_disable_dcache(); SAMA5: nor_main.c no disables MMU and caches; Should not remap ISRAM to address 0x0 unless we booted into ISRAM 2013-07-30 13:20:33 -06:00
Gregory Nutt
6f99994722 More DAC changes from John Wharington 2013-07-30 11:41:53 -06:00
Gregory Nutt
b75a0cf8be Add ARMv7-A irqdisable() inline function 2013-07-30 11:37:09 -06:00
Gregory Nutt
84150fd7ed STM32 F3 I2C driver from John Wharington 2013-07-30 10:35:17 -06:00
Gregory Nutt
4bdcceb3b3 STM32 DAC DMA fixes from John Wharington 2013-07-30 08:54:32 -06:00
Gregory Nutt
547f9be80f SAMA5: More cache and mmu inline utility functions 2013-07-29 19:57:15 -06:00
Gregory Nutt
95998c715f SAMA5: Separate cache operations into separate files 2013-07-29 18:38:02 -06:00
Gregory Nutt
f658bcdb13 Changes to ARMv7-A boot logic to handle the case where we execute out of NOR FLASH 2013-07-29 17:54:56 -06:00
Gregory Nutt
4e90fae5e8 Add SAMA5 HSMC register definitions and logic to reconfigure the NOR FLASH 2013-07-29 10:56:21 -06:00
Gregory Nutt
27a9da98f4 SAMA5: Add file structure to support board-specific initialization of NOR flash 2013-07-29 07:41:53 -06:00
Gregory Nutt
65c8abddb8 SAMA5: The ostest configuration have been converted to run out of NOR flash. There is more to be done, however 2013-07-28 15:07:35 -06:00
Gregory Nutt
7dfabf3507 SAMA5: Correct a clock configuration bug; clarify some MMU memory types 2013-07-28 12:44:06 -06:00
Gregory Nutt
f191ac94c0 SAMA5: Correct vector mapping 2013-07-28 09:44:11 -06:00
Gregory Nutt
9a5311296f Removed unused ARMv7-A cache function 2013-07-27 14:03:02 -06:00
Gregory Nutt
ae6ed8ca52 SAMA5: Fix heap allocation bugs 2013-07-27 11:28:31 -06:00
Gregory Nutt
3d16c9afc7 SAMA5 page table is cached; need to flush the cache each time that the page table is updated 2013-07-27 09:27:37 -06:00
Gregory Nutt
87af1517ed Correct an error in Cortex-A5 intermediate MMU mapping 2013-07-26 17:26:53 -06:00
Gregory Nutt
14093ef76a Add a hello world configuration to help with the SAMA5 bringup 2013-07-26 15:28:01 -06:00
Gregory Nutt
2f772c84fd Finally... renamed all CONFIG_DRAM_ settings to CONFIG_RAM_ 2013-07-26 10:09:17 -06:00
Gregory Nutt
f87963accd SAMA5: If the page table is in high memory, make sure that it is excluded from the heap 2013-07-26 09:16:46 -06:00
Gregory Nutt
4ea9e1eb6e Fix some bad page table definitions of last commit 2013-07-25 18:11:25 -06:00
Gregory Nutt
696f6d0482 Misc Cortex-A5 MMU-related fix -- still does not boot 2013-07-25 16:37:55 -06:00
Gregory Nutt
d1be1e6698 Fix an uninitialized register error that crept into the ARM9 start up code many years ago and was recently cloned into the Cortex-A5. Obviously no on has used NuttX with ARM9 for years 2013-07-24 20:12:04 -06:00
Gregory Nutt
f337f3a977 Fix SAMA5 vector linking issue 2013-07-24 12:51:42 -06:00
Gregory Nutt
213780bc43 Update SAMA5D3x-EK board configuration to support on-board UART connections, LEDs, and push buttons 2013-07-24 12:27:12 -06:00
Gregory Nutt
63f136dd7e Revamp the way external memory regions are configured; Add logic to add SAMA5 external memory regions to the heap 2013-07-24 10:08:32 -06:00
Gregory Nutt
a81abd3514 Improve Cortex-A5 context switching so that a little less copying is done 2013-07-24 07:47:51 -06:00
Gregory Nutt
2e8fcc7229 ARMv7-N: Fix a copy error introduced in the previous check-in 2013-07-23 19:09:17 -06:00
Gregory Nutt
cb3f394d53 Improve some ARMv7-A/M floating point register save time; Add floating point register save logic for ARMv7-A 2013-07-23 17:52:06 -06:00
Gregory Nutt
9e24c4fcd5 ARMv7-A: Need 8-byte stack alignment when callign C code from interrupt handlers. This change needs to be ported to other ARM architectures as well 2013-07-23 14:47:16 -06:00
Gregory Nutt
596cdf2982 SAMA5: Adapt clocking for different boot modes. New header files for AXI matrix, BSC, and SFR 2013-07-23 13:54:49 -06:00
Gregory Nutt
ae3f2b2876 Add SAMA5D3 pin multiplexing definitions 2013-07-23 09:47:01 -06:00
Gregory Nutt
e9f8689cee Add SAMA5 GPIO configuration support 2013-07-22 20:59:47 -06:00
Gregory Nutt
50cd6352fa Add support SAMA5 UART and serial driver 2013-07-22 19:16:37 -06:00
Gregory Nutt
9665c0d267 SAMA5 clock configuration should now agree with Atmel sample code; Added header file with macros to enable and disable peripheral clocking 2013-07-22 17:00:02 -06:00
Gregory Nutt
571308c27a Add SAMA5 clock logic. Cloned from SAM3U and not yet verified 2013-07-22 14:42:05 -06:00
Gregory Nutt
fb8a7a91fb SAMA5 interrupt handling logic 2013-07-22 11:54:39 -06:00
Gregory Nutt
ca9b52b07f SAMA5/Cortex-A: Improve irqsave/restore inlines + add irqenable. Add skeleton file for SAMA5 interrupt management. Also change from last commit that was left in the editor 2013-07-21 17:08:40 -06:00
Gregory Nutt
b26d506514 Add system timer logic for the SAMA5 2013-07-21 15:49:17 -06:00
Gregory Nutt
0b46176b43 A few more Cortex-A5 and SAMA5 files 2013-07-21 12:52:38 -06:00
Gregory Nutt
0d9250fae5 Misc Cortex-A5 changes include new file for cache operations 2013-07-20 13:06:00 -06:00
Gregory Nutt
6f0e07d071 A few more SAMA5D3 files 2013-07-19 17:45:28 -06:00
Gregory Nutt
137cd94b6a Basic framework to support the AT91SAMA5D3 family and the SAMA5D3x-EK board(s) in particular 2013-07-19 15:23:03 -06:00
Gregory Nutt
c294e9b374 More ARMv7-A files that are just copies of the ARMv4/5 files for now 2013-07-19 11:43:04 -06:00
Gregory Nutt
15ae557793 Minor but fatal typo introduced in last checkin 2013-07-18 15:45:21 -06:00
Gregory Nutt
28a90ba46d Some initial frame for Cortex-A5 support. No much yet 2013-07-18 15:20:47 -06:00
Gregory Nutt
91313feac2 NSH cmp command by Andrew Twidgell 2013-07-18 08:24:29 -06:00
Gregory Nutt
78bffd06c2 STM32 SDIO driver: Add supported for data block end (DBCKEND) interrupt. From Chia Cheng Tsao 2013-07-08 09:04:05 -06:00
Gregory Nutt
d649c2a462 Ticket #16: STM32 OTG FS device driver endpoint allocation. From Chia Cheng Tsao 2013-07-08 08:55:05 -06:00
Gregory Nutt
dcb4545afb prohibit re-entrance into sam_configgpio() 2013-07-05 17:15:54 -06:00
Gregory Nutt
d5f274ac76 Fix SAM34 interrupt handling for ports D-F; fix MISO logic in Arduino Due touchscreen driver 2013-07-03 08:12:45 -06:00
Gregory Nutt
348304fcb4 Several fixes to get a clean compile of the Arduino touch screen 2013-07-02 13:52:09 -06:00
Gregory Nutt
a954eb76b2 Created new directories to hold SPI-related files 2013-07-01 08:11:54 -06:00
Gregory Nutt
5c86557971 Update LM FLASH definitions for LM4F120. From Vinti 2013-06-29 07:02:56 -06:00
Gregory Nutt
4db87105e9 SAM33/4: Need to disable write protection before modify PIO pin configuration 2013-06-28 15:34:51 -06:00
Gregory Nutt
880d7f261b Add an NSH configuration for the Arduino Due; Pluse several fixes related to the Due and to the SAM3X in general 2013-06-28 14:32:08 -06:00
Gregory Nutt
4fe041a10b Arduino Due: Fixes to FLASH address, flash wait states, updated Comments. Now boots and runs a bit before crashing 2013-06-28 11:29:14 -06:00
Gregory Nutt
8f41963efd With these changes the Arduino Due port builds without errors 2013-06-27 15:07:07 -06:00
Gregory Nutt
2ecac742b6 Flesh out the Arduino Due board configuratino and integrate it with the build and configuration system 2013-06-27 14:24:27 -06:00
Gregory Nutt
3910edbf90 Review and update of SAM3/4 header files and conditional logic for SAM3X/A support 2013-06-27 11:06:13 -06:00
Gregory Nutt
77b36e0bc1 Add peripheral configuration logic for the SAM3X/3A; Change all references to SAM3/4 SPI to SPI0 for compatibity with the SAM3X/3A which has SPI0 and SPI1; Add directory which will eventually holdl an Arduino Due port 2013-06-26 18:46:44 -06:00
Gregory Nutt
69bd94290a Add SAM3X/3A pin multiplexing and GPIO encoding header files 2013-06-26 17:02:43 -06:00
Gregory Nutt
87cfee43af Add SAM3X/3A memory map 2013-06-26 14:37:57 -06:00
Gregory Nutt
ae6dbb9bf9 Add SAM3X/3A peripheral clock controls 2013-06-26 14:00:26 -06:00
Gregory Nutt
8865cf8be0 Add SAM3X/3A interrupt vectors 2013-06-26 12:59:56 -06:00
Gregory Nutt
2812f5be67 Add support for SAM3X and 3A chips, interrupts, and peripheral IDs 2013-06-26 12:28:32 -06:00
Gregory Nutt
64d149233b Fix integration of RAM test into the build and configuration system 2013-06-26 10:54:12 -06:00
Gregory Nutt
e00a8397bc Add support for a separate CCM memory allocator for members of the STM32 family that support CCM memory 2013-06-25 09:13:30 -06:00
Gregory Nutt
22c3d49807 SAM4L Xplained SLCD driver is complete 2013-06-23 09:05:20 -06:00
Gregory Nutt
c21986c418 Beginning of a driver for the SAM4L LED1 module 2013-06-21 17:42:09 -06:00
Gregory Nutt
7a65c32d4b Straighten out issues about who calls C++ initializers with CXXTEST or HELLOXX are built as NSH applications; Add an ofstream test to CXXTEST suggested by Michael; Update many defconfig fiels to that they set configurations to handle C++ constructors just as before these configuration changes 2013-06-21 09:32:57 -06:00
Gregory Nutt
4fded8a25c More KL25Z SPI fixes 2013-06-20 19:58:45 -06:00
Gregory Nutt
6e2fe7ccaf KL25Z GPIO register dump function now compiles 2013-06-20 18:00:56 -06:00
Gregory Nutt
d088cbec5b Fix backward wait condition in KL24Z SPI driver 2013-06-20 17:39:42 -06:00
Gregory Nutt
2e40a98c74 Add framework for managing SPI-related discretes on the Freedom KL25Z board. 2013-06-20 13:50:16 -06:00
Gregory Nutt
3c05e28e6d More Freedom KL25Z changed to and from Alan Carvalho de Assis 2013-06-19 20:50:27 -06:00
Gregory Nutt
bdc68f73ad Fix errors in KL25Z SPI driver reported by Alan Carvalho de Assis 2013-06-19 19:32:13 -06:00
Gregory Nutt
f3781d1eec Add SAM4L PDCA register definition file 2013-06-19 18:38:31 -06:00
Gregory Nutt
e377bab446 SPI register definition file updated to include a few differences for the SAM4L 2013-06-19 16:03:19 -06:00
Gregory Nutt
c9ed0f9120 SAM4L LCDCS register definitions 2013-06-19 13:59:47 -06:00
Gregory Nutt
23579f3af4 Add SPI driver for the Freescale KL25Z 2013-06-19 12:10:01 -06:00
Gregory Nutt
5368531d60 Add SPI register definitions for the Freescale KL25Z 2013-06-19 09:56:32 -06:00
Gregory Nutt
49ad89dd70 Fix test of NULL pointer in the SAM3/4 SPI driver 2013-06-18 12:16:52 -06:00
Gregory Nutt
a56bf3f8b3 Freescale KL25Z support from Alan Carvalho de Assis 2013-06-18 11:20:57 -06:00
Gregory Nutt
7e372171c2 SAM3/4 SPI phase control (CPHA) is inverted 2013-06-18 09:29:55 -06:00
Gregory Nutt
2d6a50a1ce Corrections to the Kinetis TSI header file from Alan Carvalho de Assis 2013-06-18 07:14:05 -06:00
Gregory Nutt
db66a5a313 SAM3U-EK: Correct polarity of the PENIRQ signal 2013-06-16 14:31:18 -06:00
Gregory Nutt
ab84bdd2d8 Re-architected SAM3/4 SPI interface; Change BUSY bit handling in the ADS7843E driver 2013-06-16 10:09:21 -06:00
Gregory Nutt
20fdf8161f Add support for the SAM4L Xplained Pro I/O1 module 2013-06-15 10:56:08 -06:00
Gregory Nutt
d7fb126a61 Fixes for SAM4S and 4L due to recent changes to SAM3S; Updated README files 2013-06-14 08:54:24 -06:00
Gregory Nutt
c5169b092a SAM3/4S GPIO interrupt changes 2013-06-13 18:53:14 -06:00
Gregory Nutt
f7edd7a31c SAM3/4: Loop counter for PLL delay must be volatile or it may get optimized away 2013-06-13 16:18:25 -06:00