Commit Graph

15520 Commits

Author SHA1 Message Date
SPRESENSE
a03b09c34d arch: cxd56xx: Fix bug when watchdog restart
Fix a bug that watchdog is expired in less time than the specified time
when restarting without clearing interrupt.
2023-07-04 10:37:17 -03:00
Michal Lenc
d470c3f268 samv7/sam_serial.c: reset all DMA pointers on DMA setup
This small fix ensures all DMA pointers are correctly reseted during
DMA setup (when the driver is opened). Without this there could be rare
occurrence of driver pointer to incorrect (invalidate) DMA buffer and thus
saving incorrect characters to upper layer.

Signed-off-by: Michal Lenc <michallenc@seznam.cz>
2023-07-03 17:09:20 +03:00
Michal Lenc
49f153abb1 samv7/sam_xdmac.c: use sam_freelinklist only if circular buffer not used
Circular buffer does not use DMA linked list therefore function
sam_freelinklist() cannot be called as it would fail on assertion (csa
not defined). Peripheral that calls DMA should care of buffer invalidation
instead.

Signed-off-by: Michal Lenc <michallenc@seznam.cz>
2023-07-03 17:09:20 +03:00
raiden00pl
76cf66165a arch/nrf91: simplyfy modem option names 2023-07-03 00:52:01 +08:00
raiden00pl
1a6d507422 arch/{nrf52|nrf53|nrf91}: rename NRFxx to nRFxx to be compatible with the manufacturer's nomenclature 2023-07-03 00:52:01 +08:00
raiden00pl
56961d9f34 arch/arm: initial support for NRF91
Port based on arch/arm/nrf53.

Modem not fully supported yet. At the moment, initialization and AT interface work.
Sockets and GNSS interface will be added later.
2023-07-02 10:10:35 -03:00
ThomasNS
f51d6b8c72 add userled driver initialization 2023-06-30 10:29:33 -03:00
ThomasNS
7864bf4870 spi4 working xmc4700-relax 2023-06-30 10:29:33 -03:00
Jorge Rodriguez Herranz
a40f07640f Fix gpio outputs from being configured as interrupts in stm32f0l0g0 gpio driver 2023-06-30 02:28:37 +08:00
Alexander Lunev
7af151aa51 arch/arm: move -mthumb option back to ARCHCPUFLAGS
CONFIG_ARM_TOOLCHAIN_GNU_EABI build got broken when -mthumb option was moved
from ARCHCPUFLAGS to ARCHOPTIMIZATION variable:

arm-none-eabi-ld: error: .../build/nuttx/nuttx uses VFP register arguments, /usr/lib/gcc/arm-none-eabi/5.4.1/libgcc.a(_fixunsdfdi.o) does not
arm-none-eabi-ld: failed to merge target specific data of file /usr/lib/gcc/arm-none-eabi/5.4.1/libgcc.a(_fixunsdfdi.o)
arm-none-eabi-ld: error: .../build/nuttx/nuttx uses VFP register arguments, /usr/lib/gcc/arm-none-eabi/5.4.1/libgcc.a(_udivmoddi4.o) does not
arm-none-eabi-ld: failed to merge target specific data of file /usr/lib/gcc/arm-none-eabi/5.4.1/libgcc.a(_udivmoddi4.o)
2023-06-29 18:18:23 +08:00
Mingjie Shen
1d6e51220d cxd56_dmac, lcd_dev: fix null pointer dereference
Check return values of following functions for null:
   - board_lcd_getdev
   - get_device

Signed-off-by: Mingjie Shen <shen497@purdue.edu>
2023-06-28 10:16:38 +03:00
Michal Lenc
9a9c35fa45 samv7: fix compile warnings for sam_wdt.c
Incorrect types in wdinfo and wderr functions were fixed to PRIu32 and
PRIx32.

Signed-off-by: Michal Lenc <michallenc@seznam.cz>
2023-06-27 10:03:25 -03:00
GD32-MCU
ec2a62c397 add gd32f470 support 2023-06-27 14:59:33 +08:00
Xiang Xiao
7f80b4aeba clock: Move the content of include/nuttx/time.h to include/nuttx/clock.h
and remove include/nuttx/time.h to reduce the nuttx specific header files

Signed-off-by: Xiang Xiao <xiaoxiang@xiaomi.com>
2023-06-26 19:14:08 +03:00
Xiang Xiao
b5c48f3ed8 binfmt: Always include arch/elf.h in include/nuttx/elf.h
since symbols defined in arch/elf.h is also used in other case, for example:
CC:  pthread/pthread_testcancel.c machine/arm/gnu_unwind_find_exidx.c:32:8: error: unknown type name '__EIT_entry'
   32 | static __EIT_entry *__exidx_start_elf;
      |        ^~~~~~~~~~~

Signed-off-by: Xiang Xiao <xiaoxiang@xiaomi.com>
2023-06-25 19:02:53 -03:00
Mingjie Shen
cbe4edd479 arch/arm/imxrt: Fix implicit function declaration
The function 'imxrt_config_gpio' was implicitly declared.
Fix by include the header 'imxrt_gpio.h'.

Signed-off-by: Mingjie Shen <shen497@purdue.edu>
2023-06-25 11:29:42 -03:00
Mingjie Shen
49afeb4d63 arch/arm/stm: Fix duplicate include guard
The following macros
  __ARCH_ARM_SRC_STM32F7_HARDWARE_STM32F74XX75XX_FLASH_H
  __ARCH_ARM_SRC_STM32L4_HARDWARE_STM32L4X6XX_RCC_H
are used in other header files.

Signed-off-by: Mingjie Shen <shen497@purdue.edu>
2023-06-25 12:23:23 +03:00
Xiang Xiao
0eeca0f375 build: Replace "$(shell $(INCDIR) $(CC) ...)" with $(INCDIR_PREFIX)
to unify the way to get include directories

Signed-off-by: Xiang Xiao <xiaoxiang@xiaomi.com>
2023-06-23 00:11:25 +03:00
simbit18
f0a74eb492 Fix Kconfig style
Remove spaces from Kconfig files
2023-06-22 11:46:09 +09:00
simbit18
f930b4f6f5 Fix Kconfig style
Remove TABs from Kconfig files
Replace help => ---help---
Add comments
2023-06-20 12:54:50 -03:00
simbit18
3f4151525d Fix Kconfig style
Remove TABs from Kconfig files
Add comments
2023-06-19 20:05:57 +03:00
Richard Tucker
225d347306 stm32 tickless: stop assertion when calling up_timer_gettime before initialised
up_timer_gettime can be called before module is initialised when
CONFIG_SCHED_IRQMONITOR is enabled.

This fix aligns with stm32f7 implementation.
2023-06-17 11:05:40 -03:00
raiden00pl
2f58b55b4d arch/{nrf52|nrf53}/usbd: various fixes to improve USB stability
USBD has many limitation that make it hard to work properly:
- only one EasyDMA channel which must be shared for all EPs
- only one DMA transfer can take place at a time
- some registers are unavailable during DMA transfer
- in case of any problems, the peripheral silently blocks,
  or lose the transmitted bytes without information for the user

This commit is trying to fix these problem and makes the USBS stack more reliable.

Tested with high-speed CDCACM data transfers and that's the best I've been able to get in terms of stability.
2023-06-14 16:23:25 -03:00
SPRESENSE
b1f3d5e573 arm/cxd56xx: Fix build error in CONFIG_PM=y 2023-06-14 08:49:19 +02:00
chao an
2369e3cbc8 arm/dataabort: fix compile warning
Error: arm/arm_dataabort.c:146:10: error: format '%x' expects argument of type 'unsigned int',
                                          but argument 3 has type 'uint32_t' {aka 'long unsigned int'} [-Werror=format=]
  146 |   _alert("Data abort. PC: %08x FAR: %08x FSR: %08x\n",
      |          ^~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
  147 |          regs[REG_PC], far, fsr);

Signed-off-by: chao an <anchao@xiaomi.com>
2023-06-12 13:36:08 +08:00
Xiang Xiao
d920bfba10 mm: include malloc.h in mm/mm.h
to remove the forward declaration of mallinfo and mallinfo_task

Signed-off-by: Xiang Xiao <xiaoxiang@xiaomi.com>
2023-06-11 19:37:04 +03:00
Petro Karashchenko
509a808e84 arch/arm/stm32f7: fix typo
Signed-off-by: Petro Karashchenko <petro.karashchenko@gmail.com>
2023-06-11 12:55:29 +08:00
Petro Karashchenko
1b801a5bbc style: remove extra spaces and align parameters
Signed-off-by: Petro Karashchenko <petro.karashchenko@gmail.com>
2023-06-11 12:55:29 +08:00
Petro Karashchenko
2a38c38b03 style: fix style issues found during code review
Signed-off-by: Petro Karashchenko <petro.karashchenko@gmail.com>
2023-06-11 12:54:52 +08:00
Ville Juven
a636edcbe4 addrenv/kstack: Allocate the kernel stack before initializing tcb
This is preparation to use kernel stack for everything when the user
process enters the kernel. Now the user stack is in use when the user
process runs a system call, which might not be the safest option.
2023-06-09 13:53:27 +08:00
Fotis Panagiotopoulos
b89215a11f Fixed Kconfig options for the obsolete GD32F4_TICKLESS_SYSTICK & STM32WB_TICKLESS_SYSTICK options. 2023-06-07 11:10:34 -06:00
Fotis Panagiotopoulos
a57cd563d5 stm32: Removed unused Kconfig option.
The option STM32_TICKLESS_SYSTICK is not used anywhere and the
stm32 arch does not have the capability to use systick as a
tickless timer.
2023-06-07 09:40:55 -03:00
GD32-MCU
fdfc25cf56 add sdio driver for GD32F4 2023-06-07 16:43:55 +08:00
chao an
b7b3c3c550 arm/backtrace: validate PC register before process unwind
Signed-off-by: chao an <anchao@xiaomi.com>
2023-06-07 01:40:30 +08:00
Alexander Merkle
961a68b4cf arch/arm: initial FPU support for armv8r aarch32
CortexR52 can have a optional FPU.
- VFPv3 with FP16
- Option 1: 16 x double-prevision registers - -mfpu=vfpv3-d16-fp16
- Option 1: 32 x double-prevision registers - -mfpu=vfpv3-fp16
2023-06-04 16:49:34 -03:00
Alexander Merkle
2b6209147e arch/arm: cleanup arm_head.S for armv8-r aarch32 2023-06-04 16:49:34 -03:00
simbit18
7f551aa33f Fix Kconfig style
Remove TABs from Kconfig files
2023-06-01 23:45:42 +08:00
Alexander Merkle
c661e26e86 board: add CortexR52 FVP AEMv8R platform
see board/arm/fvp-v8r-aarch32/fvp-armv8r-aarch32/scripts/readme.txt

Port is highly based on fvp-v8r AARCH32 port.
2023-06-01 09:51:03 -03:00
Alexander Merkle
f6695738e1 arch/arm: add ARMv8-r(Cortex-R52) support
Basic work required for uniprocessor CortexR52 (ARMv8R AARCH32) using
GICv3 and CP15 mapped arch timer.

Tested on ARM FVP 11.20.

Port is based on ARMv8R AARCH64 and ARMv7R code. Excuse possible copy-paste leftovers.
2023-06-01 09:51:03 -03:00
raiden00pl
66c2d2ecc4 arch/nrf53/Kconfig: move GPIO configuration menu to match nrf52 2023-05-31 22:28:50 +03:00
raiden00pl
5f814b1da8 arch/{nrf52|nrf53}/Kconfig: hide SPI_MASTER options if SPI_MASTER not enabled 2023-05-31 22:28:50 +03:00
raiden00pl
81b0ae064c arch/{nrf52|nrf53}/Kconfig: hide I2C_MASTER options if I2C_MASTER not enabled 2023-05-31 22:28:50 +03:00
raiden00pl
a3b91bc183 arch/{nrf52|nrf53}/Kconfig: hide PWM options if PWM not enabled 2023-05-31 22:28:50 +03:00
raiden00pl
2d56197792 arch/{nrf52|nrf53}: validate if EasyDMA transfer is possible
Add an interface that validate if EasyDMA transfer is possible.
EasyDMA cannot access flash memory which can cause hard to detect silent bugs.
This feature is enabled if CONFIG_DEBUG_FEATURES=y and CONFIG_DEBUG_ASSERTIONS=y.
2023-06-01 00:40:17 +08:00
raiden00pl
b98acb9a44 arch/nrf53: add progmem support 2023-05-31 23:12:21 +08:00
Filipe Cavalcanti
3fea2923d7 arch/arm/src/tiva: start FPU before gpio config 2023-05-31 22:47:55 +08:00
raiden00pl
1facea635b nrf52: add MCUboot support 2023-05-31 10:44:08 +08:00
raiden00pl
20af03b31e arch/{nrf52|nrf53}/usbd: fix IN endpoint completion logic
Confirmation of the IN request must be done immediately after all data has been transferred,
otherwise sending data when more than one request has been added to the queue will
not work properly.
2023-05-27 18:52:16 +08:00
TimJTi
27fb0c76c9 SAMA5D2, improve LCD support 2023-05-27 14:03:51 +08:00
liaoao
db53c7abcf procfs:add armv8-m cpuinfo
Signed-off-by: liaoao <liaoao@xiaomi.com>
2023-05-27 03:29:41 +08:00
liaoao
1abe90c7cd procfs:add armv7-r cpuinfo
Signed-off-by: liaoao <liaoao@xiaomi.com>
2023-05-27 03:29:41 +08:00
liaoao
5c5d9420af procfs:add armv7-a cpuinfo
Signed-off-by: liaoao <liaoao@xiaomi.com>
2023-05-27 03:29:41 +08:00
liaoao
108c47c07b procfs:add armv7-m cpuinfo
Signed-off-by: liaoao <liaoao@xiaomi.com>
2023-05-27 03:29:41 +08:00
TimJTi
c12a122663 Add touchscreen calibration IOCTLs, necessary structs, and implement for ATSAMA5D2
CI error
2023-05-26 13:47:41 +08:00
raiden00pl
8b89730e61 arch/nrf53: add QSPI support 2023-05-25 22:41:34 +08:00
raiden00pl
5ff6c8b403 arch/nrf53: add HFCLK192M clock support
The HFCLK192M clock is required for QSPI to work
2023-05-25 22:41:34 +08:00
raiden00pl
8943d528fd arch/nrf52: add an option to configure QSPI sampling delay for RX data
The default RX delay value may not be suitable for high QSPI frequencies
2023-05-25 22:39:16 +08:00
Michael Jung
efa2a95163 Update stm32l562e-dk:nsh
- Update TrustedFirmare-M instructions to latest version of STM32CubeL5
- Increase idle thread stack size to not overflow during system init
- Select ARCH_HAVE_TRUSTZONE for STM32L5
- Set CONFIG_ARCH_TRUSTZONE_NONSECURE for stm32l562e-dk:nsh, since NuttX
  is running in the Non-secure world.

See https://github.com/apache/nuttx/issues/9316

Signed-off-by: Michael Jung <michael.jung@secore.ly>
2023-05-25 16:04:30 +08:00
Peter van der Perk
0cadb0cf83 S32K3XX EMAC MCAST support
Fix compile warning when ioctl is not enabled
2023-05-24 13:08:02 -03:00
raiden00pl
0133831a70 arch/stm32f0l0g0: fix compilation for L0 pinmap 2023-05-24 22:30:45 +08:00
raiden00pl
6d11fe315d arch/nrf53/nrf53_gpiote.c: fix compilation for GPIOTE1 2023-05-24 09:54:55 +08:00
raiden00pl
0117260d8c arch/nrf53: add USBD support
USB device role is now supported for NRF53
2023-05-24 09:54:55 +08:00
hujun5
35b597ec2c arch/all: in smp pthread_cancel occasionally deadlock except for arm64
please reference the issue here for more information:
https://github.com/apache/nuttx/pull/9065

Signed-off-by: hujun5 <hujun5@xiaomi.com>
2023-05-23 15:48:35 +09:00
Petro Karashchenko
70fd6f1642 arch/arm/samv7: remove alignment check that is not needed
SAMv7 QSPI peripheral does not copy-in/out directly into/from
user provided buffer, but use a dedicated memory that is interfaces
using byte copy. The QSPI command buffer can point to memory with
any alignment

Signed-off-by: Petro Karashchenko <petro.karashchenko@gmail.com>
2023-05-23 02:52:35 +08:00
TimJTi
672302bd57 SAMA5D2 SPI DMA fix and Performance Enhancements 2023-05-23 01:26:08 +08:00
simbit18
e4ffce3355 Fix Kconfig style
Remove spaces from Kconfig files
2023-05-23 00:03:25 +08:00
simbit18
46e1916a91 arch/arm/src/nrf53/Kconfig: Fix config I2C3 Master
correct config NRF53_I2C3_MASTER ( NRF53_I2C2_MASTER -> NRF53_I2C3_MASTER )
2023-05-22 17:17:50 +02:00
Xiang Xiao
7990f90915 Indent the define statement by two spaces
follow the code style convention

Signed-off-by: Xiang Xiao <xiaoxiang@xiaomi.com>
2023-05-21 09:52:08 -03:00
raiden00pl
1de1b8adb7 arch/nrf53: add SPI support 2023-05-20 10:18:49 -07:00
David Sidrane
b4a6c63d47 s32k3xx:edma {s|d}last needs to be total xfer size 2023-05-20 18:32:01 +08:00
David Sidrane
280bf95d8a s32k1xx:edma {s|d}last needs to be total xfer size 2023-05-20 18:32:01 +08:00
David Sidrane
cd92cf4496 kinetis:edma {s|d}last needs to be total xfer size 2023-05-20 18:32:01 +08:00
raiden00pl
3493ea399f arch/nrf53: add I2C support 2023-05-19 21:36:49 -07:00
raiden00pl
22d4a492e4 arch/nrf53: UART0-3, SPI0-3 and TWI0-3 instances share the same interrupt vectors 2023-05-19 21:36:49 -07:00
simbit18
8a124f1a6f arch/arm/src: Fix Kconfig style
Remove spaces from Kconfig files
2023-05-19 21:18:51 +08:00
simbit18
5d0bbf20f7 arch/arm/src/imxrt/Kconfig: Fix Kconfig style
Remove spaces from Kconfig files
2023-05-19 21:18:51 +08:00
simbit18
09fcec8fae arch/arm/src/stm32f7/Kconfig: Fix Kconfig style
Remove spaces from Kconfig files
2023-05-19 21:18:51 +08:00
simbit18
fe8289bbc0 arch/arm/src/gd32f4/Kconfig: Fix texts GD32F4_TIMER0_CH3O
correct  GD32F4_TIMER0_CHANNEL2 -> GD32F4_TIMER0_CHANNEL3
fix texts
Remove spaces from Kconfig files
2023-05-19 21:18:51 +08:00
zhangyuan21
3b074b153b arch/armv8-m: add ARMV8M_TRUSTZONE_HYBRID feature
Some chips only have one core that supports secure in smp mode,
so need change EXC_RETURN to non-secure when switching to a core that
does not support secure.

Signed-off-by: zhangyuan21 <zhangyuan21@xiaomi.com>
2023-05-19 11:55:18 +08:00
jturnsek
ba411fb53d Wrong dlastsga or slast setting if doff or soff larger than one 2023-05-19 10:23:29 +08:00
jturnsek
8976ded08a Base address missing from imxrt_flexio_get_shifter_buffer_address returned address 2023-05-19 10:23:19 +08:00
Petro Karashchenko
e85afaf6cf arch/arm/src/cxd56xx: fix style issues
Signed-off-by: Petro Karashchenko <petro.karashchenko@gmail.com>
2023-05-19 02:40:38 +08:00
simbit18
c2779e5171 arch\arm\src\lpc54xx\Kconfig: Fix indentation
Remove TABs
2023-05-18 15:43:22 +03:00
simbit18
0b97979378 arch/arm/src/stm32h7/stm32_usbhost.c: Fix nxstyle errors
error: Long line found
2023-05-18 20:14:45 +08:00
zhangyuan21
3d47505ec7 arch/arm: Add a "cc" flag to instructions that may modify condition flag.
Notify the compiler that the condition flag has changed to prevent the
compiler from optimizing and reordering instructions, which may cause exceptions.

Signed-off-by: zhangyuan21 <zhangyuan21@xiaomi.com>
2023-05-18 17:23:16 +08:00
zhangyuan21
150680d677 arch/arm: set arm_testset to weak function
Some chips require the implementation of
their own unique test set function.

Signed-off-by: zhangyuan21 <zhangyuan21@xiaomi.com>
2023-05-18 13:46:27 +08:00
Xiang Xiao
7dc0d70092 arch: Save sigdeliver into xcp in the case of signal self delevery
to avoid the infinite recusive dispatch:
*0  myhandler (signo=27, info=0xf3e38b9c, context=0x0) at ltp/testcases/open_posix_testsuite/conformance/interfaces/sigqueue/7-1.c:39
*1  0x58f1c39e in nxsig_deliver (stcb=0xf4e20f40) at signal/sig_deliver.c:167
*2  0x58fa0664 in up_schedule_sigaction (tcb=0xf4e20f40, sigdeliver=0x58f1bab5 <nxsig_deliver>) at sim/sim_schedulesigaction.c:88
*3  0x58f19907 in nxsig_queue_action (stcb=0xf4e20f40, info=0xf4049334) at signal/sig_dispatch.c:115
*4  0x58f1b089 in nxsig_tcbdispatch (stcb=0xf4e20f40, info=0xf4049334) at signal/sig_dispatch.c:435
*5  0x58f31853 in nxsig_unmask_pendingsignal () at signal/sig_unmaskpendingsignal.c:104
*6  0x58f1ca09 in nxsig_deliver (stcb=0xf4e20f40) at signal/sig_deliver.c:199
*7  0x58fa0664 in up_schedule_sigaction (tcb=0xf4e20f40, sigdeliver=0x58f1bab5 <nxsig_deliver>) at sim/sim_schedulesigaction.c:88
*8  0x58f19907 in nxsig_queue_action (stcb=0xf4e20f40, info=0xf4049304) at signal/sig_dispatch.c:115
*9  0x58f1b089 in nxsig_tcbdispatch (stcb=0xf4e20f40, info=0xf4049304) at signal/sig_dispatch.c:435
*10 0x58f31853 in nxsig_unmask_pendingsignal () at signal/sig_unmaskpendingsignal.c:104
*11 0x58f1ca09 in nxsig_deliver (stcb=0xf4e20f40) at signal/sig_deliver.c:199
*12 0x58fa0664 in up_schedule_sigaction (tcb=0xf4e20f40, sigdeliver=0x58f1bab5 <nxsig_deliver>) at sim/sim_schedulesigaction.c:88
*13 0x58f19907 in nxsig_queue_action (stcb=0xf4e20f40, info=0xf40492d4) at signal/sig_dispatch.c:115
*14 0x58f1b089 in nxsig_tcbdispatch (stcb=0xf4e20f40, info=0xf40492d4) at signal/sig_dispatch.c:435
*15 0x58f31853 in nxsig_unmask_pendingsignal () at signal/sig_unmaskpendingsignal.c:104
*16 0x58f1ca09 in nxsig_deliver (stcb=0xf4e20f40) at signal/sig_deliver.c:199
*17 0x58fa0664 in up_schedule_sigaction (tcb=0xf4e20f40, sigdeliver=0x58f1bab5 <nxsig_deliver>) at sim/sim_schedulesigaction.c:88
*18 0x58f19907 in nxsig_queue_action (stcb=0xf4e20f40, info=0xf40492a4) at signal/sig_dispatch.c:115
*19 0x58f1b089 in nxsig_tcbdispatch (stcb=0xf4e20f40, info=0xf40492a4) at signal/sig_dispatch.c:435
*20 0x58f31853 in nxsig_unmask_pendingsignal () at signal/sig_unmaskpendingsignal.c:104
*21 0x58f1ca09 in nxsig_deliver (stcb=0xf4e20f40) at signal/sig_deliver.c:199
*22 0x58fa0664 in up_schedule_sigaction (tcb=0xf4e20f40, sigdeliver=0x58f1bab5 <nxsig_deliver>) at sim/sim_schedulesigaction.c:88
*23 0x58f19907 in nxsig_queue_action (stcb=0xf4e20f40, info=0xf4049274) at signal/sig_dispatch.c:115
*24 0x58f1b089 in nxsig_tcbdispatch (stcb=0xf4e20f40, info=0xf4049274) at signal/sig_dispatch.c:435
*25 0x58f31853 in nxsig_unmask_pendingsignal () at signal/sig_unmaskpendingsignal.c:104
*26 0x58f1ca09 in nxsig_deliver (stcb=0xf4e20f40) at signal/sig_deliver.c:199
*27 0x58fa0664 in up_schedule_sigaction (tcb=0xf4e20f40, sigdeliver=0x58f1bab5 <nxsig_deliver>) at sim/sim_schedulesigaction.c:88
*28 0x58f19907 in nxsig_queue_action (stcb=0xf4e20f40, info=0xf4049244) at signal/sig_dispatch.c:115
*29 0x58f1b089 in nxsig_tcbdispatch (stcb=0xf4e20f40, info=0xf4049244) at signal/sig_dispatch.c:435
*30 0x58f31853 in nxsig_unmask_pendingsignal () at signal/sig_unmaskpendingsignal.c:104
*31 0x58f1ca09 in nxsig_deliver (stcb=0xf4e20f40) at signal/sig_deliver.c:199

Signed-off-by: Xiang Xiao <xiaoxiang@xiaomi.com>
2023-05-17 11:53:18 -06:00
Xiang Xiao
7a8cf7ff70 Indent the include statement by two spaces
follow the coding style

Signed-off-by: Xiang Xiao <xiaoxiang@xiaomi.com>
2023-05-16 12:34:32 -03:00
Lwazi Dube
555506a584 arch/arm/sama5: Make EHCI work with slow devices.
Make low/full speed devices work with EHCI while OHCI is disabled. A
high speed USB hub has to be plugged into the root hub. This change
will also allow the optional use of a full speed hub between the
high speed hub and the low/full speed device. A recursive mutex is
used to avoid deadlocks.
2023-05-16 08:14:54 +02:00
raiden00pl
507aa430c9 stm32h7/Kconfig: fix CI 2023-05-16 03:11:29 +08:00
Sebastien Lorquet
567a3ca37c Fix some warnings in STM32H7 IWDG 2023-05-15 19:34:17 +08:00
raiden00pl
5c3fa2d788 stm32h7/otg: allow USBDEV and USBHOST to work simultaneously 2023-05-15 17:32:32 +08:00
raiden00pl
eee25ea1eb stm32h7/otg: move sanity checks to common header file for use USBDEV and USBHOST 2023-05-15 17:32:32 +08:00
simbit18
ac392b5306 arch/arm/src/stm32f7/stm32_usbhost.c: Fix nxstyle errors
error: Long line found
2023-05-15 10:44:17 +08:00
TimJTi
b4b9a180c0 Add ATSAMA5D2/D4 Secure Fuse Controller (SFC) driver 2023-05-12 16:29:48 -03:00
simbit18
aa0cb3f76f Fix typos (s/FRQUENCY/FREQUENCY/)
Fix various typos FRQUENCY -> FREQUENCY
2023-05-13 00:31:26 +08:00
raiden00pl
d205c8c0e0 arch/stm32f7: fixes for pinmap 2023-05-12 11:43:08 +08:00
Alan Carvalho de Assis
54d92d1a0f Fix typo -EACESS -> -EACCES 2023-05-12 06:29:35 +03:00
Lwazi Dube
d66282a893 usbhost: Fix function address generation for multi-port root hubs.
Devices connected to the same USB bus should have unique function addresses.
This was not true for root hubs with multiple ports. After this change,
enumeration is more reliable on the sama5d3-xplained board when both root hub
ports are used.

This change amounts to using one usbhost_devaddr_s object per root hub
instead of one per root hub port. For the majority of boards only one
root hub port is available so no change in behavior should be expected.
2023-05-11 09:44:18 +02:00
Takumi Ando
08eef2a700 stm32f0l0g0: Fix GPIO port definitions
These series have the following GPIO ports:
- STM32F03X: A to D, and F
- STM32F05/07/09X: A to F
- STM32G0X: A to F
- STM32L0X: A to E, and H

Signed-off-by: Takumi Ando <t-ando@advaly.co.jp>
2023-05-10 18:01:07 +08:00
Takumi Ando
94eb8a0ee0 stm32f0l0g0: Add GPIOE to STM32G0x
All STM32G0x series have 6 GPIO ports A to F.

Refered: RM0444, RM0454

Signed-off-by: Takumi Ando <t-ando@advaly.co.jp>
2023-05-10 18:01:07 +08:00
David Sidrane
8068dc0238 stm32h7:sdmmc It is not an error if no wait was needed
If the CONFIG_MMCSD_SDIOWAIT_WRCOMPLETE is enabled and the
   card is found to be ready in the waitenable call. Then
   we do not need a Watchdog nor to configure the pin for
   IRQ to detect ready.

   This was reported as an error, and it is not, it simply means
   we do not have to wait.
2023-05-10 00:46:44 +08:00
simbit18
58ebf26b98 arch/arm/src/tlsr82/Kconfig: Fix indentation
Remove spaces from Kconfig
Add TABs
2023-05-10 00:45:29 +08:00
simbit18
79d6d56532 arch/arm/src/sama5/Kconfig: Fix indentation
Remove spaces from Kconfig
Add TABs
2023-05-10 00:45:29 +08:00
simbit18
64c4fb0a53 arch/arm/src/s32k3xx/Kconfig: Fix indentation
Remove spaces from Kconfig
Add TABs
2023-05-10 00:45:29 +08:00
simbit18
02c9e20b8d arch/arm/src/lpc43xx/Kconfig: Fix indentation
Remove spaces from Kconfig
2023-05-10 00:45:29 +08:00
simbit18
1fc6a4469a arch/arm/src/kinetis/Kconfig: Fix indentation
Remove spaces from Kconfig
2023-05-10 00:45:29 +08:00
simbit18
75b02b037c arch/arm/src/imx6/Kconfig: Fix indentation
Remove spaces from Kconfig
Add TABs
2023-05-10 00:45:29 +08:00
Filipe Cavalcanti
c5f3d3d596 arch/arm/src/common/tiva_i2c.c: Update the current message buffer before writing to I2C data register. 2023-05-09 12:22:48 +03:00
Lwazi Dube
5a553db88a arch/arm/sama5: Fix OHCI SchedulingOverrun interrupt storm.
The following message is printed continuously and the nsh
shell is unusable on sama5d3-xplained.
"OHCI ERROR: Unhandled interrupts pending: 000001". This
happens when a keyboard is removed and reinserted on
port3 (lower port) while a bluetooth dongle is in port2.
2023-05-09 10:18:34 +08:00
simbit18
8a0729ac18 arch/arm/src/stm32h7/kconfig
Remove spaces from Kconfig
2023-05-08 12:42:54 -03:00
simbit18
5ed2d90c31 arch/arm/src/sama5/kconfig: Fix indentation
Remove spaces from Kconfig
Add TABs
2023-05-08 12:42:54 -03:00
simbit18
4d48e4626d arch/arm/src/imxrt/Kconfig: Fix indentation
Remove spaces from Kconfig
2023-05-08 12:42:54 -03:00
Filipe Cavalcanti
9355bd9d01 boards/arm/tiva: mpu6050 driver binding to TM4C1294
Fixed printf warning during compilation and added MPU6050 to bringup of tm4c.
2023-05-08 11:48:06 -03:00
Xiang Xiao
6f6fce95a2 Replace all sprintf with snprintf
Signed-off-by: Xiang Xiao <xiaoxiang@xiaomi.com>
2023-05-08 09:57:01 +02:00
hujun5
0f243bde33 arch: fix the issue of asynchronous signal processing
in SMP, signal processing cannot be nested, we use xcp.sigdeliver to identify whether there is currently a signal being processed, but this state does not match the actual situation
One possible scenario is that signal processing has already been completed, but an interrupt occurs, resulting in xcp.sigdeliver not being correctly set to NULL,
At this point, a new signal arrives, which can only be placed in the queue and cannot be processed immediately
Our solution is that signal processing and signal complete status are set in the same critical section, which can ensure status synchronization

Signed-off-by: hujun5 <hujun5@xiaomi.com>
2023-05-08 09:11:14 +02:00
zhangyuan21
841b178782 assert: show stacks with the sp from regs
1. Get the value of sp from dump regs when an exception occurs,
   to avoid getting the value of fp from up_getsp and causing
   incomplete stack printing.
2. Determine which stack the value belongs to based on the value
   of SP to avoid false reports of stack overflow

Signed-off-by: zhangyuan21 <zhangyuan21@xiaomi.com>
2023-05-05 13:40:04 +08:00
zhangyuan21
884be2bdb9 assert: Distinguish between assert and exception
CURRENT_REGS may change during assert handling, so pass
in the 'regs' parameter at the entry point of _assert.

Signed-off-by: zhangyuan21 <zhangyuan21@xiaomi.com>
2023-05-03 14:49:32 +08:00
Lwazi Dube
e2083354f1 arch/arm/sama5: Use a recursive mutex to fix OHCI deadlock.
Unplugging a USB device from an OHCI root hub will cause
a deadlock if DRVR_EPFREE is called from sam_rhsc_bottomhalf. A
typical call chain looks like this: sam_rhsc_bottomhalf->
CLASS_DISCONNECTED->usbhost_destroy->DRVR_EPFREE. In this case
DRVR_EPFREE tries to lock a locked mutex. A recursive mutex
prevents this deadlock.
2023-05-03 12:53:30 +08:00
Xiang Xiao
3c54e66683 mtd/nand: Fix the comment and remove the uneeded inclusion
Signed-off-by: Xiang Xiao <xiaoxiang@xiaomi.com>
2023-05-01 22:47:00 +03:00
TimJTi
9c66f14e38 SAMA5D2 Class D 2023-04-29 13:46:04 +08:00
zhangyuan21
4a4386c822 Revert "arch/armv7ar: use robust code sequences for cache maintenance"
This reverts commit 69fd539886.

Signed-off-by: zhangyuan21 <zhangyuan21@xiaomi.com>
2023-04-27 20:21:57 +08:00
chao an
60d188353c arm/unwind: EABI unwind needs frame pointer support
Signed-off-by: chao an <anchao@xiaomi.com>
2023-04-27 16:38:40 +08:00
zouboan
4b5c18b9b2 arm/Toolchain.defs: fix error sed:-e expression #1,character 1:unknown command:' in Windows native build
arm/Toolchain.defs: fix error sed:-e expression #1,character 1:unknown command:' in Windows native build
2023-04-27 00:32:15 +08:00
zhangyuan21
eb0e05be0d arch/armv7-r: add armv7-r smp support
Signed-off-by: zhangyuan21 <zhangyuan21@xiaomi.com>
2023-04-26 10:54:30 +08:00
jturnsek
bcc8801480 Initial FlexIO support 2023-04-26 10:16:18 +08:00
Michal Lenc
40d07760f6 samv7: add support for adjtime() interface
This commit adds deifiniton of get_timer_period() and adj_timer_period()
functions used by adjtime() interface.

Signed-off-by: Michal Lenc <michallenc@seznam.cz>
2023-04-25 14:37:50 -03:00
Fotis Panagiotopoulos
70e42f5bfe stm32_f7/h7_eth: Added error handling for abnormal interrupts. 2023-04-25 15:20:09 +02:00
Ville Juven
d48114a4b7 sched/addrenv.c: Implement re-entrancy for addrenv_select()
Store the old environment in a local context so another temporary address
environment can be selected. This can happen especially when a process
is being loaded (the new process's mappings are temporarily instantiated)
and and interrupt occurs.
2023-04-25 14:33:19 +02:00
Ville Juven
20623d7369 sem/sem_init: Change sem_xxx -> nxsem_xxx in kernel modules
Use the kernel space api nxsem_xxx when inside the kernel.
2023-04-25 13:41:51 +02:00
zhangyuan21
6605f95133 l2cc: Do not repeat disabling the cache when the cache is already disabled
When l2cc is already in disable state, performing a disable operation
again will flush incorrect cache data to memory

Signed-off-by: zhangyuan21 <zhangyuan21@xiaomi.com>
2023-04-25 15:36:10 +08:00
zhangyuan21
69fd539886 arch/armv7ar: use robust code sequences for cache maintenance
Invalidate operations at DDI0246H_l2c310_r3p3_trm:
If there is a stale entry in the L2 cache, the system enables the invalidation of
the L1 cache. But before the controller invalidates the L2 cache, it allocates a
line from the L2 cache to an L1 cache.

The robust code sequence for invalidation with a non-exclusive cache arrangement is:
1. InvalLevel2 Address ; forces the address out past level 2
2. CACHE SYNC ; Ensures completion of the L2 inval
3. InvalLevel1 Address ; This is broadcast within the cluster
4. DSB ; Ensure completion of the inval as far as Level 2.

This sequence ensures that, if there is an allocation to L1 after the L1 invalidation, the data
picked up is the new data and not stale data from the L2

Signed-off-by: zhangyuan21 <zhangyuan21@xiaomi.com>
2023-04-25 15:35:37 +08:00
Masayuki Ishikawa
fb6bef2c2d arch: imx6: Add support for AR8031 gigabit ethernet phy
Summary:
- This commit adds AR8031 gigabit ethernet phy for the
  sabre-6quad board.

Impact:
- None

Testing:
- Tested with sabre-6quad:netnsh_ar8031 (will be added later)

Signed-off-by: Masayuki Ishikawa <Masayuki.Ishikawa@jp.sony.com>
2023-04-25 11:45:19 +08:00
Masayuki Ishikawa
dc914f43ea arch: imx6: Fix CONFIG_IMX_ENET_ENHANCEDBD related code
Summary:
- This commit applies the changes from imxrt
- See 3a4542f3c4

Impact:
- imx6 ethernet with d-cache

Testing:
- Tested with imx6_with_ar8031 (will be added later)

Signed-off-by: Masayuki Ishikawa <Masayuki.Ishikawa@jp.sony.com>
2023-04-25 11:45:19 +08:00
chao an
b8780fe906 arch/arm: relax compiler check for workaround with "GCC 12.2"
1. relax compiler check for workaround with "GCC 12.2"
2. export GCCVER to environment

Signed-off-by: chao an <anchao@xiaomi.com>
2023-04-24 19:00:52 +03:00
zhangyuan21
d7de93f906 arch/arm: Resolving warnings for assembly instructions
arm/arm_saveusercontext.S:61: Warning: duplicated register (r14) in register list

Signed-off-by: zhangyuan21 <zhangyuan21@xiaomi.com>
2023-04-24 23:49:33 +08:00
Xiang Xiao
51dc67ad5f fs: Add g_ prefix for all global file_operations instances
Signed-off-by: Xiang Xiao <xiaoxiang@xiaomi.com>
2023-04-24 16:13:29 +02:00
raiden00pl
d416ead27c arch/nrf52: reimplement I-Cache control operations in nrf52_start.c 2023-04-22 01:42:01 +08:00
raiden00pl
c70c178a7d arch/nrf52: nvmc and flash should depends on ALLOW_BSD_COMPONENTS=y 2023-04-22 01:42:01 +08:00
raiden00pl
bd9bfa9302 arch/nrf53: add RPMSG HCI controller support 2023-04-22 01:37:24 +08:00
Fotis Panagiotopoulos
873abcb9ab stm32_eth: Added error handling for abnormal interrupts. 2023-04-22 01:30:48 +08:00
raiden00pl
cc7826df4d arch/nrf52: add QSPI support 2023-04-22 01:12:27 +08:00
zhangyuan21
1e726a914a arch/arm: change up_saveusercontext to assembly code
minidump will backtrace failure when use C code to save user context,
because the stack push operation in C code can disrupt the stack information.

Signed-off-by: zhangyuan21 <zhangyuan21@xiaomi.com>
2023-04-22 01:11:00 +08:00
David Sidrane
ac6ad45045 stm32l5:pinmap Add suffix to all pins and add legacy pinmap
Pinmaps should not have contained GPIO_SPEED_xxx settings and
   all pins should have had suffixes to allow any pins attributes to
   be set. This is board dependent.

   This change adds CONFIG_STM32L5_USE_LEGACY_PINMAP to allow for
   lazy migration to using pinmaps with suffixes.

   The work required to do this can be aided by running tools/stm32_pinmap_tool.py.
   The tools will take a board.h file and a legacy pinmap and outut the required
   changes that one needs to make to a board.h file.

   Eventually, CONFIG_STM32L5_USE_LEGACY_PINMAP will be deprecated and the legacy
   pinmaps removed from NuttX.

   Any new boards added should set CONFIG_STM32L5_USE_LEGACY_PINMAP=n and
   fully define the pins in board.h
2023-04-19 09:58:11 +02:00
David Sidrane
7e48b58993 stm32wb:pinmap Add suffix to all pins and add legacy pinmap
Pinmaps should not have contained GPIO_SPEED_xxx settings and
   all pins should have had suffixes to allow any pins attributes to
   be set. This is board dependent.

   This change adds CONFIG_STM32WB_USE_LEGACY_PINMAP to allow for
   lazy migration to using pinmaps with suffixes.

   The work required to do this can be aided by running tools/stm32_pinmap_tool.py.
   The tools will take a board.h file and a legacy pinmap and outut the required
   changes that one needs to make to a board.h file.

   Eventually, CONFIG_STM32WB_USE_LEGACY_PINMAP will be deprecated and the legacy
   pinmaps removed from NuttX.

   Any new boards added should set CONFIG_STM32WB_USE_LEGACY_PINMAP=n and
   fully define the pins in board.h
2023-04-19 09:58:11 +02:00
David Sidrane
a8093281c4 stm32f0l0g0:stm32f0{3|5|7|9}x_pinmap & stm32g0_pinmap Remove GPIO_SPEED_xxx and add legacy pinmap
Pinmaps should not have contained GPIO_SPEED_xxx settings.
   This is board dependent.

   This change adds CONFIG_STM32F0G0L0_USE_LEGACY_PINMAP to allow for
   lazy migration to using pinmaps without speeds.

   The work required to do this can be aided by running tools/stm32_pinmap_tool.py.
   The tools will take a board.h file and a legacy pinmap and outut the required
   changes that one needs to make to a board.h file.

   Eventually, CONFIG_STM32F0G0L0_USE_LEGACY_PINMAP will be deprecated and the legacy
   pinmaps removed from NuttX.

   Any new boards added should set CONFIG_STM32F0G0L0_USE_LEGACY_PINMAP=n and
   fully define the pins in board.h
2023-04-19 09:58:11 +02:00
David Sidrane
77cf6ce273 stm32l4:stm32l4x{3|4|5|6|r}xx_pinmap pinmap Remove GPIO_SPEED_xxx and add legacy pinmap
Pinmaps should not have contained GPIO_SPEED_xxx settings.
   This is board dependent.

   This change adds CONFIG_STM32L4_USE_LEGACY_PINMAP to allow for
   lazy migration to using pinmaps without speeds.

   The work required to do this can be aided by running tools/stm32_pinmap_tool.py.
   The tools will take a board.h file and a legacy pinmap and outut the required
   changes that one needs to make to a board.h file.

   Eventually, CONFIG_STM32L4_USE_LEGACY_PINMAP will be deprecated and the legacy
   pinmaps removed from NuttX.

   Any new boards added should set CONFIG_STM32L4_USE_LEGACY_PINMAP=n and
   fully define the pins in board.h
2023-04-19 09:58:11 +02:00
David Sidrane
1ece250b18 stm32:stm32f10{0|2|3{c|r|v|z}|5{r|v}|7v}_pinmap refactor
replace all GPIO_MODE_xxMHz with GPIO_MODE_2MHz provide GPIO_ADJUST_MODE
    and add legacy pinmap

    For the stm32F1 pinmaps should not have contained GPIO_MODE_50MHz settings
    on all pins. Speed is board dependent.

    This change adds CONFIG_STM32_USE_LEGACY_PINMAP to allow for
    lazy migration to using pinmaps that can have the GPIO_MODE_xxMHz set.

    The work required to do this can be aided by running tools/stm32_pinmap_tool.py.
    The tools will take a board.h, and use all the defconfigs with the legacy
    pinmap and output the required changes that one needs to make to a board.h
    file.

    Eventually, CONFIG_STM32_USE_LEGACY_PINMAP will be deprecated and the legacy
    pinmaps removed from NuttX.

    Any new boards added should set CONFIG_STM32_USE_LEGACY_PINMAP=n and
    fully define the pins in board.hf1
2023-04-19 09:58:11 +02:00
David Sidrane
ee6fb7880b stm32:stm32l15xxx pinmap Remove GPIO_SPEED_xxx and add legacy pinmap
Pinmaps should not have contained GPIO_SPEED_xxx settings.
   This is board dependent.

   This change adds CONFIG_STM32_USE_LEGACY_PINMAP to allow for
   lazy migration to using pinmaps without speeds.

   The work required to do this can be aided by running tools/stm32_pinmap_tool.py.
   The tools will take a board.h file and a legacy pinmap and outut the required
   changes that one needs to make to a board.h file.

   Eventually, STM32_USE_LEGACY_PINMAP will be deprecated and the legacy
   pinmaps removed from NuttX.

   Any new boards added should set STM32_USE_LEGACY_PINMAP=n and
   fully define the pins in board.h
2023-04-19 09:58:11 +02:00
David Sidrane
5d025d5d50 stm32:stm32g4xx{c|k|r|m|v|q} pinmap Remove GPIO_SPEED_xxx and add legacy pinmap
Pinmaps should not have contained GPIO_SPEED_xxx settings.
   This is board dependent.

   This change adds CONFIG_STM32_USE_LEGACY_PINMAP to allow for
   lazy migration to using pinmaps without speeds.

   The work required to do this can be aided by running tools/stm32_pinmap_tool.py.
   The tools will take a board.h file and a legacy pinmap and outut the required
   changes that one needs to make to a board.h file.

   Eventually, STM32_USE_LEGACY_PINMAP will be deprecated and the legacy
   pinmaps removed from NuttX.

   Any new boards added should set STM32_USE_LEGACY_PINMAP=n and
   fully define the pins in board.h
2023-04-19 09:58:11 +02:00
David Sidrane
98cd82f905 stm32:stm32f3{0|3|7}xxx pinmap Remove GPIO_SPEED_xxx and add legacy pinmap
Pinmaps should not have contained GPIO_SPEED_xxx settings.
   This is board dependent.

   This change adds CONFIG_STM32_USE_LEGACY_PINMAP to allow for
   lazy migration to using pinmaps without speeds.

   The work required to do this can be aided by running tools/stm32_pinmap_tool.py.
   The tools will take a board.h file and a legacy pinmap and outut the required
   changes that one needs to make to a board.h file.

   Eventually, STM32_USE_LEGACY_PINMAP will be deprecated and the legacy
   pinmaps removed from NuttX.

   Any new boards added should set STM32_USE_LEGACY_PINMAP=n and
   fully define the pins in board.h
2023-04-19 09:58:11 +02:00
David Sidrane
35258a26c0 stm32:stm32f20xxx pinmap Remove GPIO_SPEED_xxx and add legacy pinmap
Pinmaps should not have contained GPIO_SPEED_xxx settings.
   This is board dependent.

   This change adds CONFIG_STM32_USE_LEGACY_PINMAP to allow for
   lazy migration to using pinmaps without speeds.

   The work required to do this can be aided by running tools/stm32_pinmap_tool.py.
   The tools will take a board.h file and a legacy pinmap and outut the required
   changes that one needs to make to a board.h file.

   Eventually, STM32_USE_LEGACY_PINMAP will be deprecated and the legacy
   pinmaps removed from NuttX.

   Any new boards added should set STM32_USE_LEGACY_PINMAP=n and
   fully define the pins in board.h
2023-04-19 09:58:11 +02:00
David Sidrane
39c5931462 stm32:f4/f412 pinmap Remove GPIO_SPEED_xxx and add legacy pinmap
Pinmaps should not have contained GPIO_SPEED_xxx settings.
   This is board dependent.

   This change adds CONFIG_STM32_USE_LEGACY_PINMAP to allow for
   lazy migration to using pinmaps without speeds.

   The work required to do this can be aided by running tools/stm32_pinmap_tool.py.
   The tools will take a board.h file and a legacy pinmap and outut the required
   changes that one needs to make to a board.h file.

   Eventually, STM32_USE_LEGACY_PINMAP will be deprecated and the legacy
   pinmaps removed from NuttX.

   Any new boards added should set STM32_USE_LEGACY_PINMAP=n and
   fully define the pins in board.h
2023-04-19 09:58:11 +02:00
David Sidrane
1ce84fff01 stm32f7:pinmap Remove GPIO_SPEED_xxx and add legacy pinmap
Pinmaps should not have contained GPIO_SPEED_xxx settings.
   This is board dependent.

   This change adds CONFIG_STM32F7_USE_LEGACY_PINMAP to allow for
   lazy migration to using pinmaps without speeds.

   The work required to do this can be aided by running tools/stm32_pinmap_tool.py.
   The tools will take a board.h file and a legacy pinmap and outut the required
   changes that one needs to make to a board.h file.

   Eventually, STM32F7_USE_LEGACY_PINMAP will be deprecated and the legacy
   pinmaps removed from NuttX.

   Any new boards added should set STM32F7_USE_LEGACY_PINMAP=n and
   fully define the pins in board.h
2023-04-19 09:58:11 +02:00
David Sidrane
14a0e08386 stm32h7:pinmap Remove GPIO_SPEED_xxx and add legacy pinmap
Pinmaps should not have contained GPIO_SPEED_xxx settings.
  This is board dependent.

  This change adds CONFIG_STM32H7_USE_LEGACY_PINMAP to allow for
  lazy migration to using pinmaps without speeds.

  The work required to do this can be aided by running tools/stm32_pinmap_tool.py.
  The tools will take a board.h file and a legacy pinmap and outut the required
  changes that one needs to make to a board.h file.

  Eventually, STM32H7_USE_LEGACY_PINMAP will be deprecated and the legacy
  pinmaps removed from NuttX.

  Any new boards added should set STM32H7_USE_LEGACY_PINMAP=n and
  fully define the pins in board.h
2023-04-19 09:58:11 +02:00
David Sidrane
c5f7620c42 stm32u5:stm32u585xx_pinmap Fix typo 2023-04-19 09:58:11 +02:00
David Sidrane
7e171da63f stm32wl5:pinmap Fix typo 2023-04-19 09:58:11 +02:00
zhangyuan21
c00498c164 arch/arm: update running task when context switch occurred
The text describes an issue related to the running task in code.
The running task is only used when calling the _assert function
to indicate the task that was running before an exception occurred.
However, the current code only updates the running task during
irq_dispatch, which is suitable for ARM-M architecture but not
for ARM-A or ARM-R architecture, because their context switches
are not done through irq handler. Therefore, if the following
process is followed, the value of the running task will be incorrect:

1. task1 is running, this_task()=task1
2. do_irq is executed, setting running task()=task1
3. task1 switches to task2
4. task2 is running and generates a data abort
5. In the data abort, the _assert function is called,
   and the running task obtained is still task1, but
   the actual task that generated the exception is task2.

Signed-off-by: zhangyuan21 <zhangyuan21@xiaomi.com>
2023-04-19 10:14:05 +09:00
raiden00pl
642358e68f stm32h7/rcc: make VOS0 configurable from board.h also for stm32h7x7xx
Over-drive can be forced to a given state by adding define to the
board.h configuration file:

   #define STM32_VOS_OVERDRIVE 1 - force over-drive enabled,
   #define STM32_VOS_OVERDRIVE 0 - force over-drive disabled,
   #undef STM32_VOS_OVERDRIVE    - autoselect over-drive by the default RCC logic
2023-04-17 04:23:40 -04:00
raiden00pl
876b7a5e8e stm32h7/rcc: make VOS0 configurable from board.h
It seems that over-drive is not required for ULPI but it can be a workaround solution for boards with poor signal integration.
Higher core voltage means faster clock signal edges, which may be sufficient to synchronize the high-speed clock and data on poorly designed boards.

Over-drive can be forced to a given state by adding define to the
board.h configuration file:

   #define STM32_VOS_OVERDRIVE 1 - force over-drive enabled,
   #define STM32_VOS_OVERDRIVE 0 - force over-drive disabled,
   #undef STM32_VOS_OVERDRIVE    - autoselect over-drive by the default RCC logic
2023-04-17 04:23:40 -04:00
Ville Juven
b982c1747b sched/addrenv: Miscellaneous clean-up and fixes
- Remove the temporary "saved" variable when temporarily changing MMU
  mappings to access another process's memory. The fact that it has an
  address environment is enough to make the choice
- Restore nxflat_addrenv_restore-macro. It was accidentally lost when
  the address environment handling was re-factored.
2023-04-15 13:21:48 +09:00
zhangyuan21
024b13f3ed arch/arm: enable eoimode only select CONFIG_XXX_GIC_EOIMODE
On a GICv2 implementation, setting GICC_CTLR.EOImode to 1 separates
the priority drop and interrupt deactivation operations.

Signed-off-by: zhangyuan21 <zhangyuan21@xiaomi.com>
2023-04-11 08:54:45 +02:00
zhangyuan21
c239d19df0 nuttx: add more dependent header file
Signed-off-by: zhangyuan21 <zhangyuan21@xiaomi.com>
2023-04-11 09:13:32 +03:00
wangming9
a7fc26124d arch/arm64: the arm64 perf interface supports pmu
Summary:
- Support arm64 pmu api, Currently only the cycle counter function is supported.
- Using ARM64 PMU hardware capability to implement perf interface, modify all
  perf interface related code.
- Support for pmu init under smp.

Signed-off-by: wangming9 <wangming9@xiaomi.com>
2023-04-10 16:23:49 -03:00
raiden00pl
5e5fcd8076 fix copy-paste errors for d356ad633f 2023-04-10 03:21:36 -07:00
Petro Karashchenko
665a8e5b93 arch/arm/samv7: fix operation of TC8 and TC11
Signed-off-by: Petro Karashchenko <petro.karashchenko@gmail.com>
2023-04-07 12:28:45 -03:00
Petro Karashchenko
4f3faded71 arch/arm/samv7: fix comment in freerun timer
Signed-off-by: Petro Karashchenko <petro.karashchenko@gmail.com>
2023-04-07 12:28:45 -03:00
raiden00pl
d356ad633f {stm32,stm32f7,stm32h7,stm32l4,efm32}/otg: rasie an assertion if IN request is not possible to transfer
Otherwise, a request will never be transferred and there is no
information to the user that something is wrong.
For example, when using default values for TXFIFO in HS mode,
USBMSC will never work because the maximum request len is 512B
which is lower than the default TXFIFO size for IN EP.
2023-04-06 19:30:53 +03:00
raiden00pl
62ff3f484e {stm32f7,stm32h7,stm32l4}/sdmmc: callback support requires HPWORK 2023-04-06 18:10:59 +03:00
raiden00pl
1ace09cf10 stm32h7/otgdev: FS transceiver must be enabled if OTGFS enabled 2023-04-05 13:34:09 -03:00
raiden00pl
83cdaeb593 stm32h7/otg: add support for external ULPI 2023-04-04 09:25:00 -07:00
raiden00pl
f89d2be99f stm32h7/rcc: OTGHS ULPI works only in VOS0
This is not documented by ST at all but otherwise ULPI is dead.
2023-04-04 09:25:00 -07:00
raiden00pl
d76b7c20ad stm32h7: update ULPI pins 2023-04-04 09:25:00 -07:00
yinshengkai
cafd3af160 arch/boards: fix stm32f411-mininum:nsh compilation failure after enabling IRQMONITOR 2023-04-03 09:05:21 +02:00
raiden00pl
71d7028c4a stm32h7/stm32_sdmmc.c: fix compilation 2023-04-02 17:20:17 -04:00
Huang Qi
7f27129896 tools: Move Rust relative settings to Rust.defs
Signed-off-by: Huang Qi <huangqi3@xiaomi.com>
2023-04-01 16:45:11 +03:00
GD32-MCU
6a799fef6c add littlefs support for gd32f450zk-eval board 2023-04-01 10:38:16 -03:00
raiden00pl
9bd865301c nrf52: add usb support 2023-03-30 09:28:55 -03:00
Huang Qi
536739d2da tools: Export LLVM style arch info for non-c language
Current Toolchain.defs set the compile flags directly, it's OK for
target specified gcc toolchain.

But some LLVM based toolchains (Rust/Zig etc) use single toolchain to handle all supported paltform.

In this patch, arch level Toolchain.defs export standard LLVM style arch flags, and let <Lang>.defs to map them into internal style,

This will simplify the intergration of non-c language.

Signed-off-by: Huang Qi <huangqi3@xiaomi.com>
2023-03-29 09:26:38 -03:00
raiden00pl
d23759d457 arch/nrf53: add tickless support 2023-03-28 19:43:35 -03:00
raiden00pl
f9f41bbd95 arch/nrf53: add RTC support 2023-03-28 19:43:35 -03:00
raiden00pl
bcecf2023f arch/nrf53: add GPIOTE support 2023-03-28 19:43:19 -03:00
raiden00pl
74b0e8c2c8 arch/nrf53: rename nrf53_gpioe.h to nrf53_gpiote.h 2023-03-28 19:43:19 -03:00
Petro Karashchenko
6c6a54b0c9 ld: fix warning reported by GCC 12 linker
warning: nuttx has a LOAD segment with RWX permissions

Signed-off-by: Petro Karashchenko <petro.karashchenko@gmail.com>
2023-03-27 12:38:28 +08:00
chao an
0eae218b49 arm/chip/sdio/muxbus: comment all undefined symbols
comment all undefined symbols to avoid build break if CONFIG_SDIO_MUXBUS enabled

Signed-off-by: chao an <anchao@xiaomi.com>
2023-03-26 13:04:48 -03:00
Lwazi Dube
21ffb4de72 boards/sama5d3-xplained: Make hot plugging more reliable. 2023-03-26 13:03:21 -03:00
raiden00pl
2ddc96ff66 arch/stm32/stm32.h: do not include stm32_usbdev.h if not supported 2023-03-25 23:41:32 -07:00
raiden00pl
68f6fb2edd {stm32,stm32l4,stm32f0l0g0}/otg: move STM32_NENDPOINTS definitions to header files
This value is useful for users when initializing a USB composite device in a board-specific logic
2023-03-25 23:41:32 -07:00
raiden00pl
2c97c76577 nrf53_clockconfig.c: add comment about oscillator configuration 2023-03-25 22:24:36 +02:00
raiden00pl
1d4d008564 nrf53: UART1 available only on the app core 2023-03-25 22:24:36 +02:00
raiden00pl
bca927e203 nrf52/nrf53/sdc: define BLE max connection if NET_BLUETOOTH=n 2023-03-25 22:24:36 +02:00
raiden00pl
620c6cfd58 nrf52/nrf53: lowputc: fix compilation if flow control enabled 2023-03-25 22:24:36 +02:00
raiden00pl
3571ff3c54 arch/nrf53: add SAADC support 2023-03-25 18:37:51 +02:00
liuxuanfu
87852e8cbe arch/arm/src/stm32/hardware: Fix register define 2023-03-24 14:55:09 -03:00
liuxuanfu
945e4c6d81 arch/arm/src/stm32/hardware: Add stm32g4 rcc apb1 timer enable compatibility 2023-03-24 14:55:09 -03:00
raiden00pl
a1aecd7369 {stm32/stm32l4/stm32f7/stm32h7/efm32}/otgdev: remove invalid use of the priv field for EP
This field is for use in the class driver, not in the controller logic
2023-03-24 09:13:05 -07:00
raiden00pl
13a96c7eb7 {stm32f7,stm32h7}/otg: fix compilation for USBDEV when USB_DEBUG=y 2023-03-24 08:16:06 -07:00
Matthias Grob
d1113110f3 armv7-m irq: avoid uninitialized warning/error
arm-none-eabi-gcc 12.2.0 gives the following warnings:
error: 'primask' is used uninitialized
error: 'primask' may be used uninitialized

We use Werror and the file is indirectly included in different
places. I suggest telling the compiler to ignore these warnings
since primask is initialized on the first assembly line.

This is the only problem I encountered so far when upgrading the compiler.
2023-03-23 04:02:43 -07:00
SPRESENSE
e317af0a84 arch: cxd56xx: Fix SPI transfer without DMA
SPI transfers are dynamically determined to use DMA or not.
The flag to judge is removed in a previous simple refactoring commit.
Revert the logic and fix an issue that SPI transfer fails.
2023-03-23 08:34:29 +01:00
jturnsek
1d7383d4a1 imxrt_flexpwm independent output B support added 2023-03-21 21:03:39 +02:00
Lwazi Dube
84a3ddd79b boards/sama5d3-xplained: Fix OHCI clock.
Choose a divider value that matches the description provided within
the same header file.
Include stddef.h to fix compiler errors because NULL is not defined.
Make logs print protocol, vid and pid consistently, (decimal hex hex).
2023-03-21 14:08:03 -03:00
ligd
bb281eedfa cache: add up_get_xcache_linesize() support
Signed-off-by: ligd <liguiding1@xiaomi.com>
2023-03-20 17:17:22 +08:00
Lwazi Dube
f5575b1b85 boards/sama5d3-xplained: Add reboot support.
The peripheral reset flag was added to speed up the reboot.
Rebooting takes too long (15 seconds) if this flag is not set.
2023-03-20 09:13:37 +01:00
zhangyuan21
cf56e4113a arch: remove unnecessary sem_setprotocol code
Signed-off-by: zhangyuan21 <zhangyuan21@xiaomi.com>
2023-03-17 16:53:19 -03:00
raiden00pl
0976cddd03 arch/nrf52/nrf52_tickless_rtc.c: fix tickless operations - ostest fail without this change 2023-03-15 22:34:07 +01:00
raiden00pl
33b19e967c arch/nrf52/nrf52_tickless_rtc.c: check configuration 2023-03-15 22:34:07 +01:00
raiden00pl
93ac27ff63 arch/nrf53: add PWM support 2023-03-15 22:08:27 +01:00
raiden00pl
c2abd16dd7 arch/nrf53: add pwm register defintions 2023-03-15 22:08:27 +01:00
raiden00pl
8d2451da0c arch/nrf53: add TIM support 2023-03-14 19:22:45 -03:00
raiden00pl
b15244d4b2 arch/nrf52/gpiote: add an interface automatically selecting a free GPIOTE channel for pin interrupts 2023-03-14 19:17:31 -03:00
raiden00pl
bf531fa24a arch/nrf52/gpiote: fix doc strings 2023-03-14 19:17:31 -03:00
raiden00pl
fef4871b01 arch/{nrf52|nrf53}/uid: specify the length of the UID array 2023-03-14 01:28:27 +02:00
raiden00pl
fd7611f144 arch/nrf53: add UID support 2023-03-14 01:28:27 +02:00
raiden00pl
1c9c6e94f0 arch/nrf53: initialize PM 2023-03-13 22:24:28 +02:00
raiden00pl
74158db707 arch/nrf52/nrf52_adc.c: fix device shutdown 2023-03-13 16:25:47 -03:00
zhangyuan21
12bb4f04f1 arch: fixed error in the calculation of nwords caused an out of bounds
Signed-off-by: zhangyuan21 <zhangyuan21@xiaomi.com>
2023-03-13 16:12:11 +09:00
Petro Karashchenko
9b72ad4f7d arch/arm/sama5: switch from spaces to TABs in Kconfig
Signed-off-by: Petro Karashchenko <petro.karashchenko@gmail.com>
2023-03-09 16:27:07 -03:00
Petro Karashchenko
4581a84064 nuttx: fix indentation issue
Signed-off-by: Petro Karashchenko <petro.karashchenko@gmail.com>
2023-03-09 16:27:07 -03:00
raiden00pl
1a0aecb0ce arch/nrf53: initial support for rptun 2023-03-09 14:21:42 +08:00
raiden00pl
fb861c0a29 arch/nrf53: add more register definitions (ported from nrf52) and some cosmetics for nrf52 2023-03-09 03:59:57 +08:00
Karel Kočí
62661600b2 treewide: add DOWNLOAD variable as unification of curl call
This is a followup to the commit
03b164f59c.
2023-03-08 17:05:05 +08:00
chao an
815f40c8f1 armv8-m/cortex-m85: add support of PACBTI(Authentication and Branch Target Identification Extension)
Reference:
https://developer.arm.com/documentation/100748/0617/Security-features-supported-in-Arm-Compiler-for-Embedded/PACBTI-M-extension-mitigations-against-ROP-and-JOP-style-attacks
https://developer.arm.com/documentation/101754/0619/armclang-Reference/armclang-Command-line-Options/-mbranch-protection

Signed-off-by: chao an <anchao@xiaomi.com>
2023-03-07 07:34:05 +02:00
Michal Lenc
f97d93903c samv7: add support for dead time delay to PWM driver
This commit adds support for dead time delay to SAMv7 PWM driver. The
dead time can be used to delay an active PWM output at the begining
of the period. This can be used for H bridge control for example.

The values are to be set from the application level. It is required
to allow config option PWM_DEADTIME in order to support dead time delay.

Signed-off-by: Michal Lenc <michallenc@seznam.cz>
2023-03-07 01:30:01 +08:00
chao an
b48f9d9b96 arch/arm: correct ARCH_HAVE_DSP to ARM_HAVE_DSP
Signed-off-by: chao an <anchao@xiaomi.com>
2023-03-07 01:27:28 +08:00
Karel Kočí
eab9e688d8 samv7: switch from printing numbers as signed to unsigned in QSPI
This switches from PRId32 to PRIu32. Those variables have unsigned type
and thus we should print them as such.
2023-03-06 18:51:50 +02:00
chao an
34a032b486 arm/armv8-m: add missing zig flags
Signed-off-by: chao an <anchao@xiaomi.com>
2023-03-06 10:54:08 -03:00
Huang Qi
bcf5700e8a tools/arm: Add missing -mcpu param for zig
Signed-off-by: Huang Qi <huangqi3@xiaomi.com>
2023-03-06 11:27:53 +01:00
raiden00pl
9dc8f27dda arch/nrf53: add SoftDevice support 2023-03-05 19:31:07 -03:00
raiden00pl
5fd321e54d arch/nrf53: add systimer configuration 2023-03-05 19:31:07 -03:00
raiden00pl
3b92819792 arch/nrf53: initial clock configuration 2023-03-05 19:31:07 -03:00
raiden00pl
15a932f8e1 arch/nrf53: add more registers definitions 2023-03-05 19:31:07 -03:00
raiden00pl
242606a7d9 arch/nrf52/nrf52_sdc: fix memory configuration for MULTIROLE 2023-03-05 21:32:11 +02:00
raiden00pl
238b606057 arch/nrf52: fix configuration for SoftDevice, LFCLK is required but it doesn't have to be XTAL 2023-03-05 21:32:11 +02:00
raiden00pl
cf5cd222d6 Revert "arch/nrf52/Kconfig: update comment about SoftDevice used PPI channels"
This reverts commit 688d2bb820.

It's not clear how many PPI channels is required.
Let's assume the worst case scenario, which is the previous version.
2023-03-05 21:32:11 +02:00
Bernd Walter
5ca9adbe61 Copy I2C_M_NOSTART support from sam7v/sam_twihs.c driver 2023-03-06 01:39:21 +08:00
Huang Qi
e7bf464c7a arch/imx6: Fix a compilation error with UBSan
Signed-off-by: Huang Qi <huangqi3@xiaomi.com>
2023-03-05 11:06:48 +02:00
raiden00pl
99b0bad94e arch/armv8-m: DSP extension is optional 2023-03-05 09:43:52 +08:00
Michal Lenc
1d88bceb79 samv7: raise input flow control warning only for serial drivers
Hardware flow control for serial requires the usage of DMAC channels
which is not yet supported for SAMv7 MCU. However the same config option
CONFIG_SERIAL_IFLOWCONTROL is also used for USB CDC/ACM flow control which
works well. Therefore the warning message should be raised only if
flow control is configured for USART driver and not for USB CDC/ACM.

Signed-off-by: Michal Lenc <michallenc@seznam.cz>
2023-03-04 23:22:00 +08:00
raiden00pl
84d8b821e0 armv8-m/arm_ramvec_initialize.c: fix printf warning 2023-03-04 22:33:53 +08:00
raiden00pl
342fb22c3f arch/nrf52/.gitignore: clean up after SoftDevice update 2023-03-04 22:33:53 +08:00
raiden00pl
688d2bb820 arch/nrf52/Kconfig: update comment about SoftDevice used PPI channels 2023-03-04 22:33:53 +08:00
raiden00pl
bac798af07 arch/nrf52/sdc: remove no more needed core_cm4.h 2023-03-04 22:33:53 +08:00
raiden00pl
49446c8e76 arch/nrf53: support for APPROTECT, and disable it at default for now 2023-03-04 12:35:14 +09:00
raiden00pl
ad4af9b9c9 arch/nrf53: boot the net core 2023-03-04 12:35:14 +09:00
raiden00pl
150b3622a8 arch/nrf53_gpio: add interface to assign GPIO to the net core 2023-03-04 12:35:14 +09:00
raiden00pl
e3008e13f3 arch/nrf53_gpio: MCUSEL is available only for the app core 2023-03-04 12:35:14 +09:00
raiden00pl
7cbaa98d88 nrf52/nrf53_serial: remove redundant include 2023-03-04 12:35:14 +09:00
raiden00pl
d58753725e arch/nrf53: add initial register definitions for CTRL-AP, RESET and UICR 2023-03-04 12:35:14 +09:00
zhangyuan21
392eebf5e2 arch/armv7-a: fixed scu cpu tagram mask define issue
Signed-off-by: zhangyuan21 <zhangyuan21@xiaomi.com>
2023-03-03 11:41:33 +08:00
raiden00pl
eda99e35bb arch/nrf52: use the lates SoftDevice release (v2.3.0)
A list of breaking changes:
- SoftDevice libraries was renamed and libaries are now cmpatible with all platfroms with a given faimily.
- The random number generator was decoupled from the controller and must now be provided by the user.
  We use arc4random_buf NuttX API for this.
- sdc_support_ API must be called before sdc_cfg_set()
- update public API terms to Bluetooth Core Specification v5.3 (mainly change slave/master to central/peripheral)
  NuttX NRF52 configuration options properly updated.
- BLE features are supported only if the proper BLE role is selected
- sdc_hci_evt_get() and sdc_hci_data_get() have been replaced by sdc_hci_get()
2023-03-03 09:41:17 +08:00