sergiotarxz/nuttx
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1418 Commits

Author SHA1 Message Date
Almir Okato
8f3c425067 xtensa/esp32s3: Enable booting from MCUboot bootloader 
Add support for booting from MCUboot bootloader on ESP32-S3.

Signed-off-by: Almir Okato <almir.okato@espressif.com>
 2022-12-15 00:42:13 +08:00
Lucas Saavedra Vaz
773e3fad43 arch/xtensa/esp32: Add initial support for touch pad polling 2022-12-14 22:38:10 +08:00
Lucas Saavedra Vaz
b8ef8daef9 arch/xtensa/esp32: Add missing macros to iomux 2022-12-14 22:38:10 +08:00
Lucas Saavedra Vaz
2280b33eea arch/xtensa/esp32: Add functions to get RTC clock 2022-12-14 22:38:10 +08:00
Lucas Saavedra Vaz
f9a9512d3c arch/xtensa/esp32: Fix typo in SENS registers 2022-12-14 22:38:10 +08:00
Lucas Saavedra Vaz
15dadd0099 arch/xtensa/esp32: Remove redundant RTC registers 2022-12-14 22:38:10 +08:00
chao an
47fbfa215e fs/hostfs: mode_t of mkdir(2) should use the nuttx prototype 
Signed-off-by: chao an <anchao@xiaomi.com>
 2022-12-13 18:16:20 +08:00
田昕
0382b63f5d move common assert logic together. 
Signed-off-by: 田昕 <tianxin7@xiaomi.com>
 2022-12-12 17:05:02 +08:00
Alan Carvalho de Assis
fbdd246878 esp32: Fix maximum I2C FIFO size (now SSD1306 will work) 2022-12-09 02:23:28 +08:00
Gustavo Henrique Nihei
236ee5c80d xtensa/esp32: Rename linker scripts into more meaningful names 
Signed-off-by: Gustavo Henrique Nihei <gustavo.nihei@espressif.com>
 2022-12-08 21:55:29 +08:00
Gustavo Henrique Nihei
1ecaa4e672 xtensa/esp32s3: Configure the PMS peripheral for Protected Mode 
Signed-off-by: Gustavo Henrique Nihei <gustavo.nihei@espressif.com>
 2022-12-07 03:07:45 +08:00
Gustavo Henrique Nihei
bfc40c74d0 xtensa/esp32s3: Add support for Protected Mode 
Signed-off-by: Gustavo Henrique Nihei <gustavo.nihei@espressif.com>
 2022-12-07 03:07:45 +08:00
Lucas Saavedra Vaz
4320eed4a1 arch/xtensa/esp32: Optimize macros and ensure overwrite protection 2022-12-07 00:02:28 +08:00
Lucas Saavedra Vaz
9cdbec3769 arch/xtensa/esp32: Modify REG_[GET/SET]_FIELD to use [get/set]reg32 2022-12-06 10:53:06 +08:00
Xiang Xiao
c6e9edcbb6 net: Rename arp_arpin to arp_input 
align with other similar function(e.g. ipv4_input and ipv6_input)

Signed-off-by: Xiang Xiao <xiaoxiang@xiaomi.com>
 2022-12-04 20:39:21 +08:00
Xiang Xiao
6d30726a1b Remove the unnecessary "return;" at the end of function 
Signed-off-by: Xiang Xiao <xiaoxiang@xiaomi.com>
 2022-11-27 22:23:50 +01:00
chao an
6fa60627eb net/devif/ip: build l2 header on the IP layer 
Signed-off-by: chao an <anchao@xiaomi.com>
 2022-11-27 12:13:45 +08:00
chao an
8850dee746 net/devif: move preprocess of txpoll into common code 
Signed-off-by: chao an <anchao@xiaomi.com>
 2022-11-27 12:11:12 +08:00
Tiago Medicci Serrano
d3ffeb40a7 libc/machine/xtensa: make longjmp safe against context switch 
In order to turn longjmp context-switch safe, it's necessary
to disable interrupts before modifying windowbase and windowstart.
Otherwise, after a context switch, windowstart and windowbase
would be different, leading to a wrongly set windowstart bit due to
longjmp writing it based on the windowbase before the context switch.
This corrupts the registers at the next window overflow reaching
that wrongly set bit.

*Background:*
This PR is related to an issue first observed on ESP-IDF
https://github.com/espressif/esp-idf/issues/5229 and it was, then,
checked on NuttX using a test application.

*The test application:*
To check if the problem affects ESP32, ESP32-S2 and ESP32-S3 on
NuttX, it was created an application based on:
https://en.cppreference.com/w/c/program/longjmp

The application creates 16 tasks (`#define NUMBER_OF_TASKS  16`)
that implements the following daemon:

```
static int setjmp_longjmp_daemon(int argc, char *argv[])
{
  for (int i = 0; i < NUMBER_OF_TASKS * 2; i++)
    {
      jmp_buf env;

      volatile int count = 0;
      if (setjmp(env) != UINT16_MAX)
        {
          foo(&env, ++count);
        }
    }

  sem_post(&g_sem);

  return EXIT_SUCCESS;
}
```

The main function also initializes a semaphore to avoid application
exiting before tasks return successfully:

```
  sem_init(&g_sem, 0, -NUMBER_OF_TASKS);
```

Finally, the round-robin interval was lowered to 1ms to raise the
chances of the longjmp being interrupted by a context switch
(`CONFIG_RR_INTERVAL=1).

This setup was able to reproduce the problem prior to this patch
being applied.
 2022-11-22 19:34:44 +01:00
zhangyuan21
d8051ba979 nuttx/sched: merge up_block_task and up_unblock_task 2022-11-22 22:59:08 +08:00
zhangyuan21
a8fa51e6bf arch: rename arch special function name 2022-11-22 16:27:56 +08:00
zhangyuan21
5c1b518314 nuttx/sched: move reprioritize process to public function 2022-11-22 15:29:00 +09:00
zhangyuan21
08f7152d9f nuttx/sched: remove nxsched_remove_readytorun from up_block_task 
It takes about 10 cycles to obtain the task list according to the task
status. In most cases, we know the task status, so we can directly
add the task from the specified task list to reduce time consuming.
 2022-11-22 15:29:00 +09:00
zhangyuan21
e54b602208 nuttx/sched: remove nxsched_remove_blocked from up_unblock_task 
It takes about 10 cycles to obtain the task list according to the task
status. In most cases, we know the task status, so we can directly
delete the task from the specified task list to reduce time consuming.
 2022-11-22 15:29:00 +09:00
Tiago Medicci Serrano
d492a5b092 esp32s2/i2s: implement I2S receiver module 
- Add ioctl method to enable allocating the apb buffer.
- Add RX methods to set data width, sample rate, channels and
for receiving data from the I2S peripheral.
- Update the i2schar defconfig to enable the I2S receiver.
- Add nxlooper defconfig to enable testing the RX interface.
- Add specific bindings on ESP32-S2  bringup to enable nxlooper
to work without the need of any specific codec.
 2022-11-21 23:46:47 +08:00
Tiago Medicci Serrano
aa208bd52c esp32/i2s: remove "esp32_" prefix from private functions 2022-11-15 17:01:47 -03:00
Tiago Medicci Serrano
3b5ab27893 esp32/i2s: implement I2S receiver module 
- Add ioctl method to enable allocating the apb buffer.
- Add RX methods to set data width, sample rate, channels and
for receiving data from the I2S peripheral.
- Update the i2schar defconfig to enable the I2S receiver.
- Add nxlooper defconfig to enable testing the RX interface.
- Add specific bindings on ESP32 bringup to enable nxlooper
to work without the need of any specific codec.
 2022-11-15 17:01:47 -03:00
Tiago Medicci Serrano
7ae4152f47 esp32[-s2]/i2s: fix gpio setting when slave mode is selected 2022-11-15 17:01:47 -03:00
Xiang Xiao
a8a25cb09f arch: Remove xxx_sem[take|give] and call nxmuex_[lock|unlock] directly 
Signed-off-by: Xiang Xiao <xiaoxiang@xiaomi.com>
 2022-11-14 09:34:04 +09:00
anjiahao
a4563b8744 Fix the coding style and typo issue 
Signed-off-by: anjiahao <anjiahao@xiaomi.com>
Signed-off-by: Xiang Xiao <xiaoxiang@xiaomi.com>
 2022-11-14 09:34:04 +09:00
anjiahao
d07792a343 Initialize global mutext/sem by NXMUTEX_INITIALIZER and SEM_INITIALIZER 
Signed-off-by: anjiahao <anjiahao@xiaomi.com>
Signed-off-by: Xiang Xiao <xiaoxiang@xiaomi.com>
 2022-11-14 09:34:04 +09:00
Lucas Saavedra Vaz
3f3b5ab75e arch/xtensa: Add missing SENS registers to ESP32 2022-11-12 02:58:33 +08:00
Tiago Medicci Serrano
6317f6d597 esp32s2/i2s: use internal buffer to handle multiple audio formats 2022-11-07 13:46:44 +08:00
Tiago Medicci Serrano
d98df37f35 xtensa/esp32s2: add i2s_mclkfrequency to set master clock on I2S 2022-11-07 13:46:44 +08:00
Tiago Medicci Serrano
20d8a55181 esp32/i2s: replace nxsem when used as a lock to nxmutex 2022-11-05 00:37:00 +08:00
Tiago Medicci Serrano
9ecc345c02 esp32/i2s: use internal buffer to handle multiple audio formats 2022-11-05 00:37:00 +08:00
yinshengkai
85f727f232 tools: replace INCDIR to Makefile variable 
In the past, header file paths were generated by the incdir command
Now they are generated by concatenating environment variables

In this way, when executing makefile, no shell command will be executed,
it will improve the speed of executing makfile
Signed-off-by: yinshengkai <yinshengkai@xiaomi.com>
 2022-11-03 19:59:55 +08:00
Gustavo Henrique Nihei
f5c77933cb arch: Fix linking of multiple preprocessed linker script files 
Only the last item from the ARCHSCRIPT list was being suffixed with
".tmp".

Signed-off-by: Gustavo Henrique Nihei <gustavo.nihei@espressif.com>
 2022-11-02 09:15:27 +08:00
Xiang Xiao
b607f80cf3 arch: Remove the unnecessary nosanitize_address from backtrace source code 
Signed-off-by: Xiang Xiao <xiaoxiang@xiaomi.com>
 2022-10-29 08:26:04 +02:00
Gustavo Henrique Nihei
2a20db7697 xtensa: Define COMMON_CTX_REGS for chips without FPU (e.g. ESP32-S2) 
Signed-off-by: Gustavo Henrique Nihei <gustavo.nihei@espressif.com>
 2022-10-27 23:28:47 +08:00
Gustavo Henrique Nihei
facdd4f2b9 esp32[-s2/-s3/-c3]: Re-sort SPI Flash configs 
- Reduce "SPI Flash configuration" menu dependency on SPI Flash driver
  just to MTD-related configs.
- Move SPI Flash Mode and Frequency configs to SPI Flash configuration
  menu.

Signed-off-by: Gustavo Henrique Nihei <gustavo.nihei@espressif.com>
 2022-10-27 10:07:40 +08:00
Tiago Medicci Serrano
0bf7afad25 xtensa/esp32: add i2s_mclkfrequency to set master clock on I2S 2022-10-27 00:09:01 +08:00
Tiago Medicci Serrano
16b99ee013 xtensa/esp32s2: add initial support for I2S 
Add initial support for the I2S peripheral on ESP32S2.
Add I2S character driver and generic I2S audio driver.
Include i2schar defconfig for ESP32-S2-Saola-1 board.
 2022-10-22 15:18:35 +08:00
anjiahao
e1ca516488 use SEM_INITIALIZER inside of NXSEM_INITIALIZER 
Signed-off-by: anjiahao <anjiahao@xiaomi.com>
 2022-10-22 14:50:48 +08:00
anjiahao
5724c6b2e4 sem:remove sem default protocl 
Signed-off-by: anjiahao <anjiahao@xiaomi.com>
 2022-10-22 14:50:48 +08:00
Gustavo Henrique Nihei
ae8ea29379 xtensa: Save SCOMPARE1 on context switches 
Signed-off-by: Gustavo Henrique Nihei <gustavo.nihei@espressif.com>
 2022-10-21 11:10:51 +08:00
Alan Carvalho de Assis
0e4c2fed93 esp32s2: Add DMA support to SPI 2022-10-20 10:11:26 +08:00
Alan Carvalho de Assis
a0a7375911 Fix esp32s2_spi.h offset 2022-10-20 10:11:26 +08:00
Lucas Saavedra Vaz
b0f96fc204 esp32/i2c: Add macros to conform with other peripherals and fix typos 
Fix coding style

Co-authored-by: Petro Karashchenko <petro.karashchenko@gmail.com>
 2022-10-19 20:31:29 -03:00
Lucas Saavedra Vaz
cc04e2137a esp32/i2s: Reduce MCLK multiple to support existing boards 2022-10-20 00:40:24 +08:00
Xiang Xiao
6b31918b42 Remove the unnecessary cast for main_t, NULL and argv 
Signed-off-by: Xiang Xiao <xiaoxiang@xiaomi.com>
 2022-10-18 08:51:45 +02:00
Alan Carvalho de Assis
0e091b2486 esp32_qencoder: Fix small issues and typos reported by Tiago Medicci 2022-10-18 03:03:28 +08:00
anjiahao
dee38ce3e8 arch: Replace critical section with nxmutex in i2c/spi/1wire initialization 
Signed-off-by: anjiahao <anjiahao@xiaomi.com>
Signed-off-by: Xiang Xiao <xiaoxiang@xiaomi.com>
 2022-10-17 15:59:46 +09:00
anjiahao
d1d46335df Replace nxsem API when used as a lock with nxmutex API 
Signed-off-by: anjiahao <anjiahao@xiaomi.com>
Signed-off-by: Xiang Xiao <xiaoxiang@xiaomi.com>
 2022-10-17 15:59:46 +09:00
Alan Carvalho de Assis
655faa33d4 ESP32: Add support to Quadrature Encoder 
Reviewed-by: Petro Karashchenko <petro.karashchenko@gmail.com>
 2022-10-17 00:30:53 +02:00
Alan Carvalho de Assis
c297ecaa5d esp32s2: Add missing ESP32S2 SPIRAM config 2022-10-13 01:41:47 +08:00
Gustavo Henrique Nihei
73678c4839 xtensa/esp32: Allow allocation of user data in SPI RAM 
Signed-off-by: Gustavo Henrique Nihei <gustavo.nihei@espressif.com>
 2022-10-04 21:32:42 +02:00
Tiago Medicci Serrano
18c715ba92 xtensa/esp32: add initial support for I2S 
Add initial support for the I2S peripheral on ESP32.
Add I2S character driver and generic I2S audio driver.
Include i2schar defconfig for ESP32-DevKitC board.
 2022-09-30 17:23:17 -03:00
Xiang Xiao
e38248ee08 Return -EINVAL for the internal API 
Signed-off-by: Xiang Xiao <xiaoxiang@xiaomi.com>
 2022-09-30 17:54:56 +02:00
Xiang Xiao
bdeaea3742 Remove the unnessary empty line after label 
Signed-off-by: Xiang Xiao <xiaoxiang@xiaomi.com>
 2022-09-30 17:54:56 +02:00
chao an
6bc4baa4ca arch/makefile: preprocess link script to make configure more flexibly 
Signed-off-by: chao an <anchao@xiaomi.com>
 2022-09-29 17:06:47 +08:00
yinshengkai
5c9b094d65 tools: Replace mkallsyms.sh with mkallsyms.py 
Signed-off-by: yinshengkai <yinshengkai@xiaomi.com>
 2022-09-29 08:33:04 +08:00
Xiang Xiao
40ef5bc6db libc: Move queue.h from include to include/nuttx 
to avoid the conflict with libuv's queue.h

Signed-off-by: Xiang Xiao <xiaoxiang@xiaomi.com>
 2022-09-26 08:04:58 +02:00
Xiang Xiao
70290b6e38 arch: Change the linker generated symbols from uint32_t to uint8_t * 
and remove the duplicated declaration

Signed-off-by: Xiang Xiao <xiaoxiang@xiaomi.com>
 2022-09-24 21:26:56 +02:00
Xiang Xiao
3c1c29f2c4 arch: move non arm g_current_regs defintion to common place 
to avoid the code duplicaiton

Signed-off-by: Xiang Xiao <xiaoxiang@xiaomi.com>
 2022-09-21 22:23:11 +02:00
chao an
f23a736c80 nxstyle: correct the file path 
Signed-off-by: chao an <anchao@xiaomi.com>
 2022-09-18 01:35:21 +08:00
ligd
e2df52390a SMP: fix crash when switch to new task which is still running 
Situation:

Assume we have 2 cpus, and busy run task0.

CPU0                                CPU1
task0 -> task1                      task2 -> task0
1. remove task0 form runninglist
2. take task1 as new tcb
3. add task0 to blocklist
4. clear spinlock
                                    4.1 remove task2 form runninglist
                                    4.2 take task0 as new tcb
                                    4.3 add task2 to blocklist
                                    4.4 use svc ISR swith to task0
                                    4.5 crash
5. use svc ISR swith to task1

Fix:
Move clear spinlock to the end of svc ISR

Signed-off-by: ligd <liguiding1@xiaomi.com>
 2022-09-17 17:37:47 +09:00
Xiang Xiao
a7b3217c37 boards/arch: Remove FAR from 32bit/64bit arch 
Signed-off-by: Xiang Xiao <xiaoxiang@xiaomi.com>
 2022-09-16 10:22:12 +02:00
ligd
a3f9bd3786 backtrace: fix busy loop backtrace 
Situation:
1. user call assert
2. crash in assert
3. crash happend, do backtrace
4. backtrace interrupt stack successful
5. busy loop backtrace user stack with CURRENT_REGS

Fix:
use rtcb->regs instead

Signed-off-by: ligd <liguiding1@xiaomi.com>
 2022-09-10 12:48:11 +08:00
Victor Benso
2892f18f15 Fix some register's values, enable TWAI extended registers and add a missing prototype. 
Also, replaced critical_sections with spinlocks.
 2022-09-09 15:30:35 +08:00
Xiang Xiao
e17b678a16 compiler.h: Rename inline_function to always_inline_function 
reserve inline_function macro for inline keyword

Signed-off-by: Xiang Xiao <xiaoxiang@xiaomi.com>
 2022-09-07 10:24:04 +02:00
Gustavo Henrique Nihei
a5b006a891 xtensa: Avoid including handlers when no coprocessor is available 
Signed-off-by: Gustavo Henrique Nihei <gustavo.nihei@espressif.com>
 2022-09-02 23:43:16 +08:00
Huang Qi
32a21a1b67 UBSan: Allow custom the sanitizer in Kconfig 
Signed-off-by: Huang Qi <huangqi3@xiaomi.com>
 2022-09-02 19:07:09 +08:00
wangbowen6
b15d38246c up_nputs: fix AddressSanitizer: global-buffer-overflow problem 
==2117790==ERROR: AddressSanitizer: global-buffer-overflow on address 0x64d9e3c0 at pc 0x59ac4e16 bp 0xcefe8058 sp 0xcefe8048
READ of size 1 at 0x64d9e3c0 thread T0
    #0 0x59ac4e15 in up_nputs sim/up_nputs.c:54
    #1 0x59a67e4c in syslog_default_write syslog/syslog_channel.c:220
    #2 0x59a67823 in syslog_default_write syslog/syslog_write.c:101
    #3 0x59a67f10 in syslog_write syslog/syslog_write.c:153
    #4 0x59a651c3 in syslogstream_flush syslog/syslog_stream.c:60
    #5 0x59a6564e in syslogstream_addchar syslog/syslog_stream.c:104
    #6 0x59a6576f in syslogstream_putc syslog/syslog_stream.c:140
    #7 0x5989fc4d in vsprintf_internal stdio/lib_libvsprintf.c:952
    #8 0x598a1298 in lib_vsprintf stdio/lib_libvsprintf.c:1379
    #9 0x59a64ea4 in nx_vsyslog syslog/vsyslog.c:223
    #10 0x598a601a in vsyslog syslog/lib_syslog.c:68
    #11 0x59b0e3dc in AIOTJS::logPrintf(int, char const*, ...) src/ajs_log.cpp:45
    #12 0x59b03d56 in jse_dump_obj src/jse/quickjs/jse_quickjs.cpp:569
    #13 0x59b03ea1 in jse_dump_error1(JSContext*, unsigned long long) src/jse/quickjs/jse_quickjs.cpp:602
    #14 0x59b03dd9 in jse_dump_error(JSContext*) src/jse/quickjs/jse_quickjs.cpp:591
    #15 0x59bed615 in ferry::DomComponent::callHook(char const*) src/framework/dom/component.cpp:65
    #16 0x59bfe0ff in ferry::DomComponent::initialize() src/framework/dom/component.cpp:645
    #17 0x59bb141d in dom_create_component(JSContext*, unsigned long long, unsigned long long, unsigned long long) (/home/wangbowen/project/central/vela_miot_bes_m0/bin/audio+0x365c41d)
    #18 0x59b4c0d3 in AIOTJS::__createComponent(JSContext*, unsigned long long, int, unsigned long long*) (/home/wangbowen/project/central/vela_miot_bes_m0/bin/audio+0x35f70d3)
    #19 0x5a56ec17 in js_call_c_function quickjs/quickjs.c:16108

Signed-off-by: wangbowen6 <wangbowen6@xiaomi.com>
 2022-09-01 11:51:48 +08:00
Gustavo Henrique Nihei
a5fd1140cb arch/xtensa: Remove non-existent ARCH_HAVE_TESTSET support for ESP32-S2 
Signed-off-by: Gustavo Henrique Nihei <gustavo.nihei@espressif.com>
 2022-08-27 06:14:57 +02:00
Gustavo Henrique Nihei
2fb8af0c20 xtensa: Refactor up_fpucmp to only consider enabled coprocessors 
Signed-off-by: Gustavo Henrique Nihei <gustavo.nihei@espressif.com>
 2022-08-26 11:57:06 +08:00
Gustavo Henrique Nihei
fe2d37aa33 xtensa: Fix allocation of FPU registers in exception context 
Signed-off-by: Gustavo Henrique Nihei <gustavo.nihei@espressif.com>
 2022-08-26 11:57:06 +08:00
Gustavo Henrique Nihei
5ed2ee85c9 arch: Improve documentation for up_fpucmp function 
Signed-off-by: Gustavo Henrique Nihei <gustavo.nihei@espressif.com>
 2022-08-26 11:57:06 +08:00
Gustavo Henrique Nihei
e31e69aa30 xtensa: Fix comparison result for up_fpucmp function 
Signed-off-by: Gustavo Henrique Nihei <gustavo.nihei@espressif.com>
 2022-08-26 11:57:06 +08:00
Huang Qi
e4e3208180 Replace all strncpy with strlcpy for safety 
Signed-off-by: Huang Qi <huangqi3@xiaomi.com>
 2022-08-25 13:38:36 +08:00
Gustavo Henrique Nihei
96f77cb6a6 xtensa/esp32s3: Fix alignment of FPU registers in exception context 
Signed-off-by: Gustavo Henrique Nihei <gustavo.nihei@espressif.com>
 2022-08-25 10:07:25 +08:00
Xiang Xiao
c44a7cbf88 arch: Add ARCH_COVERAGE_ALL option 
so the user could disable the full image instrumentation,
but enable the instrumentation by files or directories.

Signed-off-by: Xiang Xiao <xiaoxiang@xiaomi.com>
 2022-08-23 17:50:52 +02:00
Xiang Xiao
f1355680ca mm/kasan: Add MM_KASAN_ALL option 
so the user could disable the full image instrumentation,
but enable the instrumentation by files or directories.

Signed-off-by: Xiang Xiao <xiaoxiang@xiaomi.com>
 2022-08-23 17:50:52 +02:00
Huang Qi
a06ec54cd0 debug: Introduce portion of UBSan 
without UBSan
```
 text    data     bss     dec     hex filename
  85612     208  142258  228078   37aee nuttx
```

with UBSan:
```
   text    data     bss     dec     hex filename
 194290   98164  208634  501088   7a560 nuttx
```

```c
int main(int argc, FAR char *argv[])
{
  uint32_t ptr[32];
  printf("Hello, World!! %lu\n", ptr[64]);
  return 0;
}
```
Try to run this sample:
```
nsh> hello
ubsan_prologue: ================================================================================
ubsan_prologue: UBSAN: array-index-out-of-bounds in hello_main.c:39:37
__ubsan_handle_out_of_bounds: index 64 is out of range for type 'uint32_t [32]'
ubsan_epilogue: ================================================================================
Hello, World!! 1070182368
nsh>
```

Signed-off-by: Huang Qi <huangqi3@xiaomi.com>
 2022-08-22 13:57:29 +08:00
Xiang Xiao
2b37909c9e libc: Move crc8.h, crc16.h and crc32.h from include to include/nuttx 
to avoid the conflict with the 3rd party library

Signed-off-by: Xiang Xiao <xiaoxiang@xiaomi.com>
 2022-08-13 13:28:24 +03:00
Alan Carvalho de Assis
0b4ef1406d xtensa/esp32s2: Add basic support to SPI 2022-08-11 15:49:55 +03:00
Nathan Hartman
20bdd44e7b Remove executable permission from source and build files. 2022-08-04 12:48:18 -03:00
zhuyanlin
031c89db89 power: add PM_IDLE_DOMAIN to pm.h and remove definations 
Signed-off-by: zhuyanlin <zhuyanlin1@xiaomi.com>
 2022-07-29 11:15:40 +08:00
Xiang Xiao
13a7ae3d06 arch: Call board_reset before up_irq_save and spin_trylock 
since board_reset may call some kernel functions which try
to acquire the lock again

Signed-off-by: Xiang Xiao <xiaoxiang@xiaomi.com>
 2022-07-28 08:18:24 -04:00
Jiuzhu Dong
9d4549d48b arch: limit output maximum size stackdump when sp is not within stack 
Signed-off-by: Jiuzhu Dong <dongjiuzhu1@xiaomi.com>
 2022-07-27 20:48:33 +08:00
Jiuzhu Dong
136b1d6d42 arch: using remain to ignore invalid stack content when sp is not within stack 
Signed-off-by: Jiuzhu Dong <dongjiuzhu1@xiaomi.com>
 2022-07-27 20:48:33 +08:00
Jiuzhu Dong
0ca02a5564 arch/xtensa: optimize stackdump 
Signed-off-by: Jiuzhu Dong <dongjiuzhu1@xiaomi.com>
 2022-07-27 20:48:33 +08:00
Jiuzhu Dong
5c8fd46126 arch/stack: rename do_stack_check with arch prefix 
Signed-off-by: Jiuzhu Dong <dongjiuzhu1@xiaomi.com>
 2022-07-27 20:48:33 +08:00
Jiuzhu Dong
79597d0caf arch/up_stack_check: using running_task to get correct task context 
Signed-off-by: Jiuzhu Dong <dongjiuzhu1@xiaomi.com>
 2022-07-27 20:48:33 +08:00
Abdelatif Guettouche
ae1cbc47ef esp32&c3/Kconfig: CONFIG_ESP32(C3)_WIRELESS doesn't need to be user 
selectable.

Signed-off-by: Abdelatif Guettouche <abdelatif.guettouche@espressif.com>
 2022-07-20 22:02:28 +03:00
Abdelatif Guettouche
4ccedb176e arch/esp32: Re-organise shared functions and options for ESP32 Wireless code 
- Introduce the ESP32_WIFI option to replace the broader
ESP32_WIRELESS option.  ESP32_WIRELESS is used by both WIFI and BLE.

 - Move common functions from esp32_wifi_adapter to esp32_wireless.

 - Change the order of including the external libraries to avoid undefined references.

Signed-off-by: Abdelatif Guettouche <abdelatif.guettouche@espressif.com>
 2022-07-20 22:02:28 +03:00
Abdelatif Guettouche
770147ffe3 arch/esp32: Introduce the ESP32_RTC option. 
Signed-off-by: Abdelatif Guettouche <abdelatif.guettouche@espressif.com>
 2022-07-20 22:01:25 +03:00
Xiang Xiao
2166c98809 Add printflike and scanflike to all printf/scanf like functions 
Signed-off-by: Xiang Xiao <xiaoxiang@xiaomi.com>
 2022-07-18 14:14:36 +03:00
Xiang Xiao
aad5fbd2fb arch: Add up_nputs function to handle the non '\0' string correctly 
and change up_puts as a simple macro

Signed-off-by: Xiang Xiao <xiaoxiang@xiaomi.com>
 2022-07-17 17:31:19 +03:00
Gustavo Henrique Nihei
68c722c051 xtensa/esp32: Build patched IDFBoot for Protected Mode support 
Signed-off-by: Gustavo Henrique Nihei <gustavo.nihei@espressif.com>
 2022-07-14 14:57:57 +08:00
Gustavo Henrique Nihei
60b7479f12 xtensa/esp32: Avoid ROM functions due to error with PIDs 2-7 
Signed-off-by: Gustavo Henrique Nihei <gustavo.nihei@espressif.com>
 2022-07-14 14:57:57 +08:00
Gustavo Henrique Nihei
27fc3c959d xtensa/esp32: Configure the PID controller for privilege separation 
Signed-off-by: Gustavo Henrique Nihei <gustavo.nihei@espressif.com>
 2022-07-14 14:57:57 +08:00
Gustavo Henrique Nihei
76acfef5ec xtensa/esp32: Add support for Protected Mode 
Signed-off-by: Gustavo Henrique Nihei <gustavo.nihei@espressif.com>
 2022-07-14 14:57:57 +08:00
Gustavo Henrique Nihei
e24621d545 arch: Convert DEBUGASSERT(false) into more intuitive DEBUGPANIC() 
Signed-off-by: Gustavo Henrique Nihei <gustavo.nihei@espressif.com>
 2022-07-14 12:08:45 +08:00
Gustavo Henrique Nihei
8a4c9c3489 arch: Fix typo in "register" word 
Signed-off-by: Gustavo Henrique Nihei <gustavo.nihei@espressif.com>
 2022-07-13 22:57:19 +03:00
Alan Carvalho de Assis
7d3eefbdce Review: Small improvements 
Fixes suggested by Gustavo and Petro
 2022-07-13 14:28:36 -03:00
Alan Carvalho de Assis
1e03a70258 Add DMA support to SPI and small issues on SPI driver 2022-07-13 14:28:36 -03:00
Alan Carvalho de Assis
368d65459c xtensa/esp32s3: Add DMA support to SPI 2022-07-13 14:28:36 -03:00
Alan Carvalho de Assis
1cb3c0d630 xtensa/esp32s3: Add support to Generic DMA 2022-07-13 14:28:36 -03:00
Nathan Hartman
849f760b77 Fix various typos 2022-07-08 02:15:54 +08:00
Xiang Xiao
3daa18b661 arch: Remove the unnecessary #if/#endif in assert 
Signed-off-by: Xiang Xiao <xiaoxiang@xiaomi.com>
 2022-07-07 19:25:47 +03:00
Xiang Xiao
9ff0971d3f arch: Correct the order of stack related information in assert 
forget to update in this patch:
commit b02db04e00
Author: Xiang Xiao <xiaoxiang@xiaomi.com>
Date:   Sun Jun 5 17:10:19 2022 +0800

    arch/assert: Keep the thread dump column order same as ps

    Signed-off-by: Xiang Xiao <xiaoxiang@xiaomi.com>

Signed-off-by: Xiang Xiao <xiaoxiang@xiaomi.com>
 2022-07-07 19:25:47 +03:00
Gustavo Henrique Nihei
f3e8decad2 xtensa: Build sources required for supporting CONFIG_BUILD_PROTECTED 
Signed-off-by: Gustavo Henrique Nihei <gustavo.nihei@espressif.com>
 2022-07-05 23:07:00 +08:00
Gustavo Henrique Nihei
cd1ed92844 xtensa: Build sources for supporting CONFIG_SCHED_BACKTRACE 
Signed-off-by: Gustavo Henrique Nihei <gustavo.nihei@espressif.com>
 2022-07-05 23:07:00 +08:00
Gustavo Henrique Nihei
b9703619b5 xtensa: Unify common options within a single Make.defs 
Signed-off-by: Gustavo Henrique Nihei <gustavo.nihei@espressif.com>
 2022-07-05 23:07:00 +08:00
Alan Carvalho de Assis
922ebe5b96 Fix IOMUX function number 2022-07-01 23:34:21 +08:00
Xiang Xiao
3d1ce144df arch: Move up_getsp from arch.h to irq.h 
since all other special register operation in irq.h

Signed-off-by: Xiang Xiao <xiaoxiang@xiaomi.com>
 2022-07-01 10:44:55 -03:00
Gustavo Henrique Nihei
5ce77fad1b arch: Remove "0x" prefix preceding "%p" specifier on format string 
The "p" format specifier already prepends the pointer address with "0x"
when printing.

Signed-off-by: Gustavo Henrique Nihei <gustavo.nihei@espressif.com>
 2022-06-30 22:08:58 +03:00
Gustavo Henrique Nihei
ea829cf7d5 xtensa/esp32s3: Add driver for I2C peripheral in Master mode 
Signed-off-by: Gustavo Henrique Nihei <gustavo.nihei@espressif.com>
 2022-06-30 00:32:17 +03:00
Gustavo Henrique Nihei
0657621848 xtensa/esp32s2: Add driver for I2C peripheral in Master mode 
Signed-off-by: Gustavo Henrique Nihei <gustavo.nihei@espressif.com>
 2022-06-30 00:32:02 +03:00
Gustavo Henrique Nihei
31cddc922c xtensa/esp32s2: Sync GPIO driver implementation with ESP32-S3 
Sync driver interfaces, also fixes the handling of special pin value for
esp32s2_gpio_matrix_in and esp32s2_gpio_matrix_out functions

Signed-off-by: Gustavo Henrique Nihei <gustavo.nihei@espressif.com>
 2022-06-30 00:10:41 +08:00
Gustavo Henrique Nihei
2d6cd7e580 xtensa/esp32s2: Fix the number of GPIO IRQs 
Signed-off-by: Gustavo Henrique Nihei <gustavo.nihei@espressif.com>
 2022-06-30 00:10:41 +08:00
Nimish Telang
4afd25b567 this flag is meaningless for the linker 2022-06-27 20:03:03 -03:00
Alan Carvalho de Assis
4eddde90b0 esp32s3: Add support to USBSERIAL to use as console 2022-06-16 17:20:32 +03:00
Abdelatif Guettouche
996995245d xtensa: Remove old references to co-processors. 
Signed-off-by: Abdelatif Guettouche <abdelatif.guettouche@espressif.com>
 2022-06-15 22:06:08 +03:00
Abdelatif Guettouche
9bac291236 arch/xtensa/*.S: Remove some old comments and fix others. 
Signed-off-by: Abdelatif Guettouche <abdelatif.guettouche@espressif.com>
 2022-06-15 18:07:51 +03:00
Abdelatif Guettouche
fe8fa4ff75 arch/xtensa: Move the new saving area directly to A2. 
Signed-off-by: Abdelatif Guettouche <abdelatif.guettouche@espressif.com>
 2022-06-15 18:07:51 +03:00
Abdelatif Guettouche
5ab888692e arch/xtensa/xtensa_context: Place the functions in EXCEPTION_HANDLER 
section (IRAM for ESP32xx chips).

Signed-off-by: Abdelatif Guettouche <abdelatif.guettouche@espressif.com>
 2022-06-15 18:07:51 +03:00
Abdelatif Guettouche
73a1e0fc58 arch/xtensa: Refactor exceptions' entry and exit. 
Signed-off-by: Abdelatif Guettouche <abdelatif.guettouche@espressif.com>
 2022-06-15 18:07:51 +03:00
Abdelatif Guettouche
1c94cb5324 arch/xtensa: Refactor the differences in ABI calls. 
Signed-off-by: Abdelatif Guettouche <abdelatif.guettouche@espressif.com>
 2022-06-15 18:07:51 +03:00
Abdelatif Guettouche
48f20af8bc arch/xtensa/xtensa_int_handlers.S: Remove unused macro. 
Signed-off-by: Abdelatif Guettouche <abdelatif.guettouche@espressif.com>
 2022-06-15 18:07:51 +03:00
Abdelatif Guettouche
fc22eddc38 arch/xtensa: Refactor the code that's used to get the pre-exception 
backtrace.

Signed-off-by: Abdelatif Guettouche <abdelatif.guettouche@espressif.com>
 2022-06-15 18:07:51 +03:00
Abdelatif Guettouche
05d412f6b5 arch/xtensa/xtensa_user_handler.S: Use the ps_setup macro when possible. 
Signed-off-by: Abdelatif Guettouche <abdelatif.guettouche@espressif.com>
 2022-06-15 18:07:51 +03:00
Abdelatif Guettouche
0aa14f91da arch/xtensa/esp32_rtc_lowerhalf.c: nitialize ret variable to avoid 
warnings.

Signed-off-by: Abdelatif Guettouche <abdelatif.guettouche@espressif.com>
 2022-06-15 21:29:55 +08:00
Abdelatif Guettouche
1f90e5a5b0 arch/xtensa: Don't build xtensa_coproc.S, it has only macros and is 
included when needed.

Signed-off-by: Abdelatif Guettouche <abdelatif.guettouche@espressif.com>
 2022-06-13 21:32:23 +03:00
Norman Rasmussen
e6376c72d7 Fix CONFIG_ALLSYMS for arm, risc-v and xtensa after #5496 2022-06-13 11:39:06 +08:00
Xiang Xiao
28b25e0391 arch: dump "<noname>" as the task name if CONFIG_TASK_NAME_SIZE equals 0 
Signed-off-by: Xiang Xiao <xiaoxiang@xiaomi.com>
 2022-06-07 20:17:23 +03:00
Xiang Xiao
2b2830c252 arch/assert: Replace twice strlcpy with single snprintf 
Signed-off-by: Xiang Xiao <xiaoxiang@xiaomi.com>
 2022-06-07 20:17:23 +03:00
Xiang Xiao
b02db04e00 arch/assert: Keep the thread dump column order same as ps 
Signed-off-by: Xiang Xiao <xiaoxiang@xiaomi.com>
 2022-06-07 20:17:23 +03:00
Xiang Xiao
c52a19c8dc arch: Include nuttx/tls.h in *_assert.c 
to avoid error: "invalid use of undefined type 'struct task_info_s'

Signed-off-by: Xiang Xiao <xiaoxiang@xiaomi.com>
 2022-06-07 20:17:23 +03:00
ligd
118fd3902c dump_task: also dump thread param when dump thread name 
Signed-off-by: ligd <liguiding1@xiaomi.com>
 2022-06-07 20:17:23 +03:00
Abdelatif Guettouche
8217c646a7 arch/xtensa/xtensa_coproc.S: Fix the condition to save the coprocessors 
state.

Signed-off-by: Abdelatif Guettouche <abdelatif.guettouche@espressif.com>
 2022-06-07 19:50:50 +08:00
Abdelatif Guettouche
060df22968 arch/xtensa: Initialize the internal heap early. 
We might have a situation where an allocation will be requested before
the call to `up_initialize` is performed.  For the current code, this
situation is the stack for the CPUs in SMP mode.

Beside this issue, it's natural to have the internal heap initialized
with the other heaps.

Signed-off-by: Abdelatif Guettouche <abdelatif.guettouche@espressif.com>
 2022-06-07 02:32:30 +08:00
Xiang Xiao
11e1a8b28b arch: Define WCHAR_[MIN|MAX] in arch/include/limits.h 
follow up the below change:
commit 6357523892
Author: Xiang Xiao <xiaoxiang@xiaomi.com>
Date:   Mon Nov 1 12:40:51 2021 +0800

    arch: Add _wchar_t typedef like other basic types

Signed-off-by: Xiang Xiao <xiaoxiang@xiaomi.com>
 2022-06-03 22:25:49 +03:00
zhanghongyu
035d925864 devif: remove all devif_timer 
Signed-off-by: zhanghongyu <zhanghongyu@xiaomi.com>
 2022-06-02 20:11:50 -03:00
Abdelatif Guettouche
c7823f7914 arch/xtensa/xtensa_sigdeliver.c: Remove old code that was preventing 
jumping back to the assembly signal trampoline and getting into its
infinite loop.

Signed-off-by: Abdelatif Guettouche <abdelatif.guettouche@espressif.com>
 2022-05-31 17:40:54 +08:00
Abdelatif Guettouche
c99776659f xtensa: Delete the assembly signal trampoline. 
Signed-off-by: Abdelatif Guettouche <abdelatif.guettouche@espressif.com>
 2022-05-31 17:40:54 +08:00
chao.an
3f65b562bb arch: inline up_interrupt_context() 
inline the up_interrupt_context() to avoid unnecessary stack pushes

Signed-off-by: chao.an <anchao@xiaomi.com>
 2022-05-26 04:36:07 +08:00
Alan Carvalho de Assis
d4b0fc9eb4 xtensa/esp32s3: Add basic support to SPI 
Co-authored-by: Petro Karashchenko <petro.karashchenko@gmail.com>
Co-authored-by: Gustavo Henrique Nihei <gustavo.nihei@espressif.com>
 2022-05-25 16:10:29 -03:00
Gustavo Henrique Nihei
b4392f7323 xtensa/esp32: Fix leak of semaphores created by Wi-Fi kernel thread 
Signed-off-by: Gustavo Henrique Nihei <gustavo.nihei@espressif.com>
 2022-05-25 09:46:30 +09:00
zhuyanlin
0e478e559f xtensa: coproc: modify coproc_save/restore to macro 
As coproc_save/restore only used in context_restore/save.
Use macro instead of function.
Some register use optimize.
Unify with arm/riscv.

Signed-off-by: zhuyanlin <zhuyanlin1@xiaomi.com>
 2022-05-24 14:11:58 +09:00
Abdelatif Guettouche
2a8b2cad17 esp32_cpuidlestack.c: Remove unnecessary code. 
Signed-off-by: Abdelatif Guettouche <abdelatif.guettouche@espressif.com>
 2022-05-24 08:59:10 +09:00
zhuyanlin
23d35336ad xtensa:esp32: enable cp processor of app core 
Signed-off-by: zhuyanlin <zhuyanlin1@xiaomi.com>
 2022-05-23 22:02:24 +02:00
YAMAMOTO Takashi
0b547e2384 esp32: Implement up_textheap_heapmember 2022-05-20 21:16:42 +08:00
zhuyanlin
b71a1f77c3 xtensa: add perf counter 
Signed-off-by: zhuyanlin <zhuyanlin1@xiaomi.com>
 2022-05-18 19:11:32 +03:00
Gustavo Henrique Nihei
aefe78a884 xtensa: Add missing input operand on sys_call6 inline ASM 
Signed-off-by: Gustavo Henrique Nihei <gustavo.nihei@espressif.com>
 2022-05-18 15:46:57 +02:00
Xiang Xiao
b30e0a26ef Move "-nostartfiles -nodefaultlibs" from Make.defs to Toolchian.defs 
and replace "-nostartfiles -nodefaultlibs" with "-nostdlib"

Signed-off-by: Xiang Xiao <xiaoxiang@xiaomi.com>
 2022-05-18 08:26:02 -04:00
Abdelatif Guettouche
06f2c67fc2 xtensa.h: Remove old prototype. 
Signed-off-by: Abdelatif Guettouche <abdelatif.guettouche@espressif.com>
 2022-05-16 23:38:09 +08:00
zhuyanlin
883337c3a0 xtensa:fpu: add up_fpucmp and enable CONFIG_ARCH_FPU macro 
For arch with CP_NUM > 0, enable ARCH_FPU

Signed-off-by: zhuyanlin <zhuyanlin1@xiaomi.com>
 2022-05-16 12:30:39 +03:00
Xiang Xiao
1f920e55d3 Move warning option from Make.defs to Toolchain.defs 
Signed-off-by: Xiang Xiao <xiaoxiang@xiaomi.com>
 2022-05-15 15:40:35 +03:00
Xiang Xiao
8b7c5b039d arch: Move -fsanitize=kernel-address to ARCHOPTIMIZATION 
Signed-off-by: Xiang Xiao <xiaoxiang@xiaomi.com>
 2022-05-15 15:40:35 +03:00
Xiang Xiao
2976accd9f arch: Remove the extra space before the function prototype 
Signed-off-by: Xiang Xiao <xiaoxiang@xiaomi.com>
 2022-05-15 13:55:58 +03:00
Xiang Xiao
1fb8c13e5e Replace nxsem_timedwait_uninterruptible with nxsem_tickwait_uninterruptible 
Signed-off-by: Xiang Xiao <xiaoxiang@xiaomi.com>
 2022-05-15 13:55:58 +03:00
Xiang Xiao
816ce73ab4 Replace nxsem_timedwait with nxsem_tickwait 
Signed-off-by: Xiang Xiao <xiaoxiang@xiaomi.com>
 2022-05-15 13:55:58 +03:00
Gustavo Henrique Nihei
be9fc59b07 xtensa: Implement syscalls required for Protected Mode 
Signed-off-by: Gustavo Henrique Nihei <gustavo.nihei@espressif.com>
 2022-05-14 21:38:12 +08:00
zhuyanlin
ad57791fe0 arch:xtensa: remove struct xtensa_cpstate_s as no need used 
Signed-off-by: zhuyanlin <zhuyanlin1@xiaomi.com>
 2022-05-13 15:28:45 +02:00
zhuyanlin
f423f94d08 arch:xtensa: modify xtensa_context_save/restore function 
with FPU registers in xcp context, use pointer instead of double
pointer

Signed-off-by: zhuyanlin <zhuyanlin1@xiaomi.com>
 2022-05-13 15:28:45 +02:00
zhuyanlin
1dc39689ff xtensa: move fpu register to XCPTCONTEXT_REGS 
1 move fpu register to XCP_REGS
2 move save & restore fpu register to context_save/restore

Consistency with other archs.

Signed-off-by: zhuyanlin <zhuyanlin1@xiaomi.com>
 2022-05-13 15:28:45 +02:00
Gustavo Henrique Nihei
ba2829adb2 xtensa: Fix argument passing for sys_call5 and sys_call6 functions 
Signed-off-by: Gustavo Henrique Nihei <gustavo.nihei@espressif.com>
 2022-05-13 10:43:00 +09:00
Xiang Xiao
1ba316b5c7 arch: Remove board/libboard$(LIBEXT) from the rerequest of export_startup 
Signed-off-by: Xiang Xiao <xiaoxiang@xiaomi.com>
 2022-05-12 23:34:31 +03:00
wangbowen6
bc61e71b94 crypto: change type uint32_t to size_t in aes_cypher() arguments. 
Signed-off-by: wangbowen6 <wangbowen6@xiaomi.com>
 2022-05-12 22:28:54 +08:00
zhuyanlin
b99ba04a8c arch:xtensa: Add SYS_flush_context syscall 
This syscall do nothing as flush context was done in interrupt handler.

Signed-off-by: zhuyanlin <zhuyanlin1@xiaomi.com>
 2022-05-11 10:48:53 +02:00
Abdelatif Guettouche
12453bb623 xtensa_sigtramp.S: Remove the ENTRY instruction. 
_xtensa_sig_trampoline is returned to after a context switch and not called
by the usual Window call instructions (call4, call8 and call12),
thus does not need the entry instruction.  Furthermore, the ENTRY instruction
in this case is messing up the backtrace as it creates an extra frame.

Signed-off-by: Abdelatif Guettouche <abdelatif.guettouche@espressif.com>
 2022-05-11 08:17:25 +09:00
Abdelatif Guettouche
3f632bf12b xtensa_sigtramp.S: Fix call0 instruction. 
Signed-off-by: Abdelatif Guettouche <abdelatif.guettouche@espressif.com>
 2022-05-11 08:17:25 +09:00
Abdelatif Guettouche
1cf2fa75c4 arch/xtensa: Fix some typos and comments. 
Signed-off-by: Abdelatif Guettouche <abdelatif.guettouche@espressif.com>
 2022-05-11 08:17:25 +09:00
Xiang Xiao
8634e8de64 Replace all sem_xxx with nxsem_xxx 
Signed-off-by: Xiang Xiao <xiaoxiang@xiaomi.com>
 2022-05-10 15:08:36 +03:00
Xiang Xiao
e84e5f0e1d arch: Add gcov related config for arm/risc-v/xtensa 
Signed-off-by: Xiang Xiao <xiaoxiang@xiaomi.com>
 2022-05-06 14:43:57 -03:00
Xiang Xiao
45fb96c508 esp32x/wlan: Fix error: increment of a boolean expression 
Signed-off-by: Xiang Xiao <xiaoxiang@xiaomi.com>
 2022-05-05 16:23:32 -03:00
Abdelatif Guettouche
b19b931722 arch/xtensa/src/common/xtensa_coproc.S: Use the first allocated memory 
for the local variable.

Signed-off-by: Abdelatif Guettouche <abdelatif.guettouche@espressif.com>
 2022-05-04 01:39:07 +08:00
Xiang Xiao
1fde7e17bb arch: Move -fstack-protector-all from Make.defs to Toolchain.defs 
Signed-off-by: Xiang Xiao <xiaoxiang@xiaomi.com>
 2022-05-01 23:54:15 +03:00
Xiang Xiao
aeb9c5d822 boards: Move -fno-strict-aliasing from Make.defs to Toolchain.defs 
and migrate MAXOPTIMIZATION into ARCHOPTIMIZATION

Signed-off-by: Xiang Xiao <xiaoxiang@xiaomi.com>
 2022-05-01 11:36:41 +03:00
Xiang Xiao
a021177de8 arch: Fix the style found in review 
Signed-off-by: Xiang Xiao <xiaoxiang@xiaomi.com>
 2022-05-01 11:29:44 +03:00
Xiang Xiao
94cb0c6072 arch: Move -nostdinc++ to Tooolchain.defs 
Signed-off-by: Xiang Xiao <xiaoxiang@xiaomi.com>
 2022-04-29 21:08:14 -03:00
Abdelatif Guettouche
da273fce0b arch/xtensa: Replace the xcp context with stack context to improve context switching 
Signed-off-by: Abdelatif Guettouche <abdelatif.guettouche@espressif.com>
 2022-04-29 02:51:41 +08:00
Abdelatif Guettouche
98d8d2a1ff arch/xtensa: Group all the macros in one file. 
Signed-off-by: Abdelatif Guettouche <abdelatif.guettouche@espressif.com>
 2022-04-27 08:57:53 -03:00
Abdelatif Guettouche
541eabb535 xtensa_int_handlers.S: Refactor the calls to ps_setup. 
Signed-off-by: Abdelatif Guettouche <abdelatif.guettouche@espressif.com>
 2022-04-27 08:57:53 -03:00
Abdelatif Guettouche
aaa5316235 arch/xtensa: Simply use xtensa_createstack for CPU1 idle task. 
Signed-off-by: Abdelatif Guettouche <abdelatif.guettouche@espressif.com>
 2022-04-26 01:36:54 +08:00
Xiang Xiao
8f8ee25a9c boards: Move -g from Make.defs to Toolchain.defs 
Signed-off-by: Xiang Xiao <xiaoxiang@xiaomi.com>
 2022-04-25 16:23:03 +03:00
Xiang Xiao
75326e563d boards: Move -fno-common from Make.defs to Toolchain.defs 
Signed-off-by: Xiang Xiao <xiaoxiang@xiaomi.com>
 2022-04-25 07:57:29 +03:00
Abdelatif Guettouche
3942f4d133 arch/xtensa: No need to save SP in EXCSAVE_1 when linking the interrupt 
frame with the previous frame.  The SP is already saved in A12.

Signed-off-by: Abdelatif Guettouche <abdelatif.guettouche@espressif.com>
 2022-04-23 10:19:23 +08:00
Abdelatif Guettouche
f130d8c143 xtensa_user_handler.S: Fix backtrace. 
Signed-off-by: Abdelatif Guettouche <abdelatif.guettouche@espressif.com>
 2022-04-23 10:19:23 +08:00
Abdelatif Guettouche
7a3ad4b224 xtensa_user_handler.S: Use the ps_setup macro when dealing with an 
exception.

Signed-off-by: Abdelatif Guettouche <abdelatif.guettouche@espressif.com>
 2022-04-23 10:19:23 +08:00
Xiang Xiao
5a565e753c pm: Move pm_initialize call from driver_initialize to xxx_pminitialize 
since it's too late with the below commit:
ommit a594a5d7a8
Author: chao.an <anchao@xiaomi.com>
Date:   Mon Apr 11 19:44:26 2022 +0800

    sched/init: drivers_initialize() should be late than up_initialize()

    up_initialize
    |
     ->up_serialinit
       |
        ->uart_register  /* ("/dev/console", &CONSOLE_DEV); */

    drivers_initialize
    |
     ->syslog_console_init
       |
        ->register_driver /* ("/dev/console", &g_consoleops, 0666, NULL); */

Signed-off-by: Xiang Xiao <xiaoxiang@xiaomi.com>
 2022-04-22 14:36:27 +03:00
chao.an
1c8e12406e compile/opt: add config DEBUG_LINK_MAP 
Selecting this option will pass "-Map=$(TOPDIR)$(DELIM)nuttx.map" to ld
when linking NuttX ELF. That file can be useful for verifying
and debugging magic section games, and for seeing which
pieces of code get eliminated with DEBUG_OPT_UNUSED_SECTIONS.

Signed-off-by: chao.an <anchao@xiaomi.com>
 2022-04-22 01:37:23 +08:00
chao.an
64d7326ed5 compile/opt: add config DEBUG_OPT_UNUSED_SECTIONS 
Enable this option to optimization the unused input sections with the
linker by compiling with " -ffunction-sections -fdata-sections ", and
linking with " --gc-sections ".

Signed-off-by: chao.an <anchao@xiaomi.com>
 2022-04-22 01:37:23 +08:00
Abdelatif Guettouche
56ecd44f63 arch/xtensa: Color the other CPUs task when they are created. 
Signed-off-by: Abdelatif Guettouche <abdelatif.guettouche@espressif.com>
 2022-04-22 01:12:55 +08:00
Abdelatif Guettouche
64e4c9ca02 arch/xtensa: Move xtensa_save_context to up_saveusercontext for 
consistency with other archs.

Signed-off-by: Abdelatif Guettouche <abdelatif.guettouche@espressif.com>
 2022-04-21 01:59:34 +08:00
Abdelatif Guettouche
6db910a1aa arch/xtensa: Use syscall interface for xtensa_save/restore_context. 
Signed-off-by: Abdelatif Guettouche <abdelatif.guettouche@espressif.com>
 2022-04-21 01:59:34 +08:00
Huang Qi
95ab7b973b arch/sparc,xtensa: Control output by $(Q) as other arch 
Signed-off-by: Huang Qi <huangqi3@xiaomi.com>
 2022-04-20 12:04:17 +02:00
Xiang Xiao
d28892e454 arch/xtensa: Remove unneeded group_addrenv call which handled by xtensa_irq_dispatch 
Signed-off-by: Xiang Xiao <xiaoxiang@xiaomi.com>
 2022-04-18 18:34:12 +03:00
Xiang Xiao
6bc61b5752 arch/xtensa: Remove FAR from chip and board folder 
Signed-off-by: Xiang Xiao <xiaoxiang@xiaomi.com>
 2022-04-17 18:42:38 +03:00
chao.an
c08d9047b2 arch/Toolchain.defs: replace all ${/$} with $(/$) 
Signed-off-by: chao.an <anchao@xiaomi.com>
 2022-04-17 00:58:34 +08:00
Petro Karashchenko
09b3fb25ab drivers: remove unimplemented open/close/ioctl interfaces 
Signed-off-by: Petro Karashchenko <petro.karashchenko@gmail.com>
 2022-04-15 16:56:25 +08:00
Alan C. Assis
c232be541c Add SPIRAM to ESP32-S2 2022-04-14 22:10:23 +08:00
chao.an
b3d47e246f arch/stack_color: correct the stack top of running task 
This PR to ensure the stack pointer is locate to the stack top

Signed-off-by: chao.an <anchao@xiaomi.com>
 2022-04-14 16:48:19 +08:00
Abdelatif Guettouche
6d12ee19e2 arch: Move the DUMP_ON_EXIT logic after nxtask_exit. 
Otherwise we will try to dump the state of the current task, however the
exit handler has already started doing some cleanup and invalidated its
group.  Accessing the group from dumponexit will crash.

Signed-off-by: Abdelatif Guettouche <abdelatif.guettouche@espressif.com>
 2022-04-13 21:59:23 +08:00
Abdelatif Guettouche
d6c952c56f arch: Fix compile error when enabling CONFIG_DUMP_ON_EXIT 
"error: incompatible types when assigning to type 'struct filelist *' from type 'struct filelist'
   filelist = tcb->group->tg_filelist;"

Signed-off-by: Abdelatif Guettouche <abdelatif.guettouche@espressif.com>
 2022-04-13 21:59:23 +08:00
chao.an
ff210e1c2d arch/stack_color: correct the end address of stack color 
The different optimization of compilers will cause ambiguity in
obtaining sp through up_getsp() in arm_stack_color(), if compile
with clang and enable the optimization flag (-Ofast), up_getsp()
call will be earlier than push {r0-r9,lr}, the end address of color
stack will overlap with saved registers.

Compile line:
clang --target=arm-none-eabi -c "-Ofast" -fno-builtin -march=armv8.1-m.main+mve.fp+fp.dp \
-mtune=cortex-m55 -mthumb -mfpu=fpv5-d16 -mfloat-abi=hard -D__NuttX__ -common/arm_checkstack.c -o  arm_checkstack.o

Assembler code:
llvm-objdump -aS arm_checkstack.o
------------------------------------
|00000000 <arm_stack_color>:
|;   start = INT32_ALIGN_UP((uintptr_t)stackbase);
|       0: c2 1c         adds  r2, r0, #3
|       2: 22 f0 03 02   bic r2, r2, #3
|;   end   = nbytes ? INT32_ALIGN_DOWN((uintptr_t)stackbase + nbytes) :
|       6: 19 b1         cbz r1, 0x10 <arm_stack_color+0x10> @ imm = #6
|       8: 08 44         add r0, r1
|       a: 20 f0 03 00   bic r0, r0, #3
|       e: 00 e0         b 0x12 <arm_stack_color+0x12> @ imm = #0
|;   __asm__
|      10: 68 46         mov r0, sp                               <--- fetch the sp before push {r7 lr}
|      12: 80 b5         push  {r7, lr}                           <--- sp changed
|;   nwords = (end - start) >> 2;
|      14: 80 1a         subs  r0, r0, r2
|      16: 80 08         lsrs  r0, r0, #2
|; }
|      18: 08 bf         it  eq
|      1a: 80 bd         popeq {r7, pc}
|      1c: 4b f6 ef 63   movw  r3, #48879
|      20: cd f6 ad 63   movt  r3, #57005
|      24: a0 ee 10 3b   vdup.32 q0, r3
|;   while (nwords-- > 0)
|      28: 20 f0 01 e0   dlstp.32  lr, r0
|;       *ptr++ = STACK_COLOR;                                    <--- overwrite
|      2c: a2 ec 04 1f   vstrw.32  q0, [r2], #16
|      30: 1f f0 05 c0   letp  lr, 0x2c <arm_stack_color+0x2c> @ imm = #-8
|; }
|      34: 80 bd         pop {r7, pc}
------------------------------------

Signed-off-by: chao.an <anchao@xiaomi.com>
 2022-04-13 09:37:54 +08:00
Alan C. Assis
1090e1a8ea xtensa/esp32: Add support to TWAI/CANBus controller 2022-04-06 15:09:46 +03:00
zhuyanlin
6a761ff087 arch:tcbinfo: update tcbinfo as xcpcontext update 
Signed-off-by: zhuyanlin <zhuyanlin1@xiaomi.com>
 2022-04-05 13:33:00 +02:00
Abdelatif Guettouche
f527abc324 arch/xtensa: Build the xtensa_tcbinfo.c file for S2 and S3. 
Signed-off-by: Abdelatif Guettouche <abdelatif.guettouche@espressif.com>
 2022-04-04 21:25:47 +08:00
Abdelatif Guettouche
11807abd4e arch/xtensa: Add xtensa_tcbinfo struct that contains helpful offsets. 
Signed-off-by: Abdelatif Guettouche <abdelatif.guettouche@espressif.com>
 2022-04-02 10:39:14 +08:00
chao.an
253562f11f arch/xtensa: add syscall note support in the flat build 
Signed-off-by: chao.an <anchao@xiaomi.com>
 2022-04-01 21:04:51 +08:00
Gustavo Henrique Nihei
06d0a9f1ad xtensa|risc-v: Make CXX exception and RTTI depend on Kconfig options 
Signed-off-by: Gustavo Henrique Nihei <gustavo.nihei@espressif.com>
 2022-03-30 11:19:29 +08:00
Gustavo Henrique Nihei
c7311829e0 xtensa: Build OS-assisted atomic operations on ESP32-S2 
ESP32-S2 lacks support for conditional load/store instructions.

Signed-off-by: Gustavo Henrique Nihei <gustavo.nihei@espressif.com>
 2022-03-30 11:19:29 +08:00
Gustavo Henrique Nihei
7926bce26b xtensa: Move XCHAL_SWINT_CALL definition into syscall header 
This is required to avoid the interface header (syscall.h) depending on
the xtensa_swi.h header from the implementation

Signed-off-by: Gustavo Henrique Nihei <gustavo.nihei@espressif.com>
 2022-03-30 11:19:29 +08:00
zhuyanlin
d7391bf6bc xtensa: add xtensa arch oneshot ops 
As xtensa timer is common in all xtensa chips,
Use oneshot ops, implement a common xtensa oneshot timer.

Signed-off-by: zhuyanlin <zhuyanlin1@xiaomi.com>
 2022-03-28 22:55:00 +08:00
zhuyanlin
c0c0ffdf2f xtensa: add xtensa_spill_window declaration 
Signed-off-by: zhuyanlin <zhuyanlin1@xiaomi.com>
 2022-03-28 12:33:07 +02:00
Xiang Xiao
8c8c60f70a arch: Add -fsanitize=kernel-address to ARCHCPUFLAGS if CONFIG_MM_KASAN=y 
Signed-off-by: Xiang Xiao <xiaoxiang@xiaomi.com>
 2022-03-27 23:01:47 +03:00
ligd
e87d262c7f arch/Toolchain.defs: add wildcard for EXTRA_LIBS 
VELAPLATFO-1491

Signed-off-by: ligd <liguiding1@xiaomi.com>
 2022-03-27 22:53:58 +03:00
Abdelatif Guettouche
914e9588bb esp32/Make.defs: Organise common arch files and chip files 
appropriately.

Signed-off-by: Abdelatif Guettouche <abdelatif.guettouche@espressif.com>
 2022-03-25 11:31:24 +08:00
Gustavo Henrique Nihei
c92c4af304 xtensa/esp32s2: Initialize instruction cache on startup 
Signed-off-by: Gustavo Henrique Nihei <gustavo.nihei@espressif.com>
 2022-03-23 20:05:40 -03:00
Gustavo Henrique Nihei
bc071ec243 xtensa/esp32s2: Use functions defined in xtensa_counter for TimerISR 
Signed-off-by: Gustavo Henrique Nihei <gustavo.nihei@espressif.com>
 2022-03-23 19:38:28 -03:00
Gustavo Henrique Nihei
04b80cc8d2 xtensa/esp32s2: Remove unused and not unsupported configs from Kconfig 
Signed-off-by: Gustavo Henrique Nihei <gustavo.nihei@espressif.com>
 2022-03-23 19:38:28 -03:00
Huang Qi
9cffc105c8 arch: Show assigned cpu in dump task 
Signed-off-by: Huang Qi <huangqi3@xiaomi.com>
 2022-03-23 22:18:15 +08:00
Gustavo Henrique Nihei
024364ebbd xtensa/esp32s3: Add support for GPIO pin interrupts 
Signed-off-by: Gustavo Henrique Nihei <gustavo.nihei@espressif.com>
 2022-03-23 07:23:51 +09:00
Gustavo Henrique Nihei
0e67dc8637 xtensa/esp32s3: Add support for GPIO read/write operations 
Signed-off-by: Gustavo Henrique Nihei <gustavo.nihei@espressif.com>
 2022-03-23 07:23:51 +09:00
Petro Karashchenko
68902d8732 pid_t: unify usage of special task IDs 
Signed-off-by: Petro Karashchenko <petro.karashchenko@gmail.com>
 2022-03-22 21:22:32 +08:00
Abdelatif Guettouche
10f8f6c9e3 xtensa/esp32(s2)_user.c: For EXCCAUSE values, use macros defined in xtensa_corebits.h 
instead of those defined in core.h as they are deprecated.

Signed-off-by: Abdelatif Guettouche <abdelatif.guettouche@espressif.com>
 2022-03-22 10:20:27 +08:00
Petro Karashchenko
3fff4508c7 netinitialize: call xxx_netinitialize unconditionally 
The xxx_netinitialize is defined to a function only if
CONFIG_NET=y and CONFIG_NETDEV_LATEINIT=n.  Otherwise it
is defined to an empty macro.

Signed-off-by: Petro Karashchenko <petro.karashchenko@gmail.com>
 2022-03-19 17:41:33 +08:00
Abdelatif Guettouche
aa84559566 xtensa_coproc.S: Replace spaces by tabs. 
Signed-off-by: Abdelatif Guettouche <abdelatif.guettouche@espressif.com>
 2022-03-19 01:09:22 +02:00
Abdelatif Guettouche
ce8fae2842 xtensa_coproc.S: Adjust the save reserved for local variables when 
restoring/saving coprocessor state.

These function don't use call8 or call12 and thus need to create just 16
bytes for the base save area, however they do use one variable so we
need a space for that.  The `entry` instruction works in unit of 8 bytes
so we add whole 8 bytes for one variable.

Signed-off-by: Abdelatif Guettouche <abdelatif.guettouche@espressif.com>
 2022-03-19 01:09:22 +02:00
Gustavo Henrique Nihei
9ae826e925 xtensa/esp32s3: Fix output handling for pins numbered from 32 to 48 
Signed-off-by: Gustavo Henrique Nihei <gustavo.nihei@espressif.com>
 2022-03-19 01:08:27 +02:00
Gustavo Henrique Nihei
f21a9f9578 xtensa/esp32s3: Enable UART pins to use IOMUX and bypass GPIO matrix 
Signed-off-by: Gustavo Henrique Nihei <gustavo.nihei@espressif.com>
 2022-03-19 01:08:27 +02:00
Gustavo Henrique Nihei
77944ceb42 xtensa/esp32s3: Clean up and improve GPIO driver interface 
Also fix an inconsistenct regarding the ESP32S3_NGPIOS macro. Although
correctly defining the number of available GPIOs in ESP32-S3, it was
erroneously being used for verifying the pin range.

Signed-off-by: Gustavo Henrique Nihei <gustavo.nihei@espressif.com>
 2022-03-19 01:08:27 +02:00
Gustavo Henrique Nihei
43b7d9b0da xtensa/esp32s3: Sync GPIO sigmap with IDF version 
Signed-off-by: Gustavo Henrique Nihei <gustavo.nihei@espressif.com>
 2022-03-19 01:08:27 +02:00
Abdelatif Guettouche
2793e6f82d xtensa_releasepending.c: Remove commented out code. 
Signed-off-by: Abdelatif Guettouche <abdelatif.guettouche@espressif.com>
 2022-03-19 02:20:36 +08:00
Abdelatif Guettouche
5085f854d0 esp32(s3)_start.c: In SMP mode, don't disable APP CPU at startup. It starts in a 
disabled state and if OpenOCD is used this will clear OpenOCD configuration.

Signed-off-by: Abdelatif Guettouche <abdelatif.guettouche@espressif.com>
 2022-03-17 14:33:32 -03:00
Abdelatif Guettouche
b98676f8be esp32(s3)_cpustart.c: Don't reset app CPU if it was already configured by 
OpenOCD.

Signed-off-by: Abdelatif Guettouche <abdelatif.guettouche@espressif.com>
 2022-03-17 14:33:32 -03:00
Gustavo Henrique Nihei
39e9a17e60 xtensa/esp32s3: Apply style fixes throughout serial driver 
Signed-off-by: Gustavo Henrique Nihei <gustavo.nihei@espressif.com>
 2022-03-16 19:06:39 -03:00
Gustavo Henrique Nihei
0dc2930403 xtensa/esp32s3: Remove code for not yet supported USB-Serial Driver 
Signed-off-by: Gustavo Henrique Nihei <gustavo.nihei@espressif.com>
 2022-03-16 19:06:39 -03:00
Gustavo Henrique Nihei
57273ad994 xtensa/esp32s3: Fix IRQ setup hardcoded to CPU 0 
Signed-off-by: Gustavo Henrique Nihei <gustavo.nihei@espressif.com>
 2022-03-16 19:06:39 -03:00
Petro Karashchenko
b04447d066 timer_lowerhalf: minor improvements 
Signed-off-by: Petro Karashchenko <petro.karashchenko@gmail.com>
 2022-03-15 10:30:48 +08:00
Xiang Xiao
b6bc460b2c arch: Make the comment and definition of CONFIG_SYS_RESERVED correctly 
Signed-off-by: Xiang Xiao <xiaoxiang@xiaomi.com>
 2022-03-14 22:51:00 +02:00
Abdelatif Guettouche
d21d02c65d xtensa_panic.S: Save exception cause and vaddr into the user frame. 
This area is what's passed later to assert and be used to dump the
state.

Signed-off-by: Abdelatif Guettouche <abdelatif.guettouche@espressif.com>
 2022-03-14 19:54:30 +08:00
Abdelatif Guettouche
a9e3b5ae37 xtensa_panic.S: A2 is already saved by the caller, no need to save it 
here again.

Signed-off-by: Abdelatif Guettouche <abdelatif.guettouche@espressif.com>
 2022-03-14 19:54:30 +08:00
Abdelatif Guettouche
cff3d9df7b arch/xtensa: Fix some indentations. 2022-03-14 11:12:35 +08:00
Abdelatif Guettouche
6fa4a42e34 xtensa/: Save A3 as part of the regular context saving. 
It was separate because the syscal handler was using it before calling
_xtensa_context_save.  The order of operations has now changed and we
can save A3 with the rest of the context.

Signed-off-by: Abdelatif Guettouche <abdelatif.guettouche@espressif.com>
 2022-03-14 11:12:35 +08:00
Abdelatif Guettouche
4d1bb20f8c xtensa_user_handler.S: In syscall handler store context before 
continuing the rest of the syscall handling.

Signed-off-by: Abdelatif Guettouche <abdelatif.guettouche@espressif.com>
 2022-03-14 11:12:35 +08:00
Abdelatif Guettouche
5305f76b1d xtensa_context.S: Use Zephyr's version of spilling the window register 
file.

Signed-off-by: Abdelatif Guettouche <abdelatif.guettouche@espressif.com>
 2022-03-14 11:12:35 +08:00