Improvements for STM32 PWM
arch/arm/src/stm32/stm32_pwm: fix polarity and IDLE state configuration for advanced timer PWM
include/dsp.h: raise error if math.h not present
Approved-by: GregoryN <gnutt@nuttx.org>
arch/arm/src/tiva/hardware: Add CC13xx SMPH and AUX SMPH header files. Still need DDI0 OSC header file for CC13x0 compilation.
arch/arm/src/tiva/cc13xx: A few changes toward getting the launchxl-cc1310/nsh configuration to build
Squashed commit of the following:
confgs/launchxl-cc1310: Add board support for the LaunchXL-CC1310. This is a work in progress and does not yet build error free.
arch/arm/src/tiva/cc13xx: cc13x0_trim.c now compiles; Make xxx_rom.h header files conform a little more closely to the NuttX coding style.
arch/arm/src/tiva/cc13xx: CC13x2 (V1 and V2) rom.c files now build with no errors or warnings. Still have to work through the CC13x0 version.
arch/arm/src/tiva/hardware: Add CC13x0/CC13x2_CC26x2 AON BATMON register definition header file.
arch/arm/src/tiva/cc13xx: A little more progress converting TI DriverLib ROM code to NuttX coding style. Lots of possibilities for breakage here!
arch/arm/src/tiva/cc13xx: Remove functions from cc13x._rom.c that are defined from ROM access in cc13x._rom.h; Add prototypes in cc13x._rom.h for functions in cc13x._rom.c that are not defined in cc13x._rom.h.
arch/arm/src/tiva/cc13xx: Remove some dangling whitespace at the end of lines.
arch/arm/src/tiva/cc13xx: Second (and final) round of name changes to get ROM function-like defines consistent with NuttX coding standard
arch/arm/src/tiva/cc13xx: Fix a few errors in last big name conversion.
arch/arm/src/tiva/cc13xx: First round of name changes to get ROM function-like defines consistent with NuttX coding standard
arch/arm/src/tiva/cc13xx: Remove ROM_ prefix from function-like defines.
arch/arm/src/tiva/hardware: Completes the CC13x2 AUX SYSIF header file.
arch/arm/src/tiva/hardware: Progress on the CC13x2 AUX SYSIF header file. Almost complete.
arch/arm/src/tiva/hardware: Port needs aux_sysif.h header file.
arch/arm/src/tiva/cc13xx/cc13x0_rom.h: Fix a typo
arch/arm/src/tiva/cc13xx: More changes to TI DriverLib ROM header files for NuttX coding standard.
arch/arm/src/tiva/cc13xx: Convert some (but not all) TI DriverLib ROM function names to NuttX coding standard. More to be done.
arm/src/tiva/cc13xx: ROM header files: missed a couple of conversions of sructure field names to lower case (vs CamelCase).
arm/src/tiva/cc13xx: ROM header files: type'ed names must be lower case per coding standard (not upper case); structure field names must be lower case per coding standard (not CamelCase).
arch/arm/src/tiva/cc13xx: Trim logic needs to include matching ROM DriverLib interface header file.
arch/arm/src/tiva/cc13xx: Add ROM DriverLib header files. Do not yet fully conform to the NuttX coding style.
arch/arm/src/tiva/cc13xx: Trim code now kind of looks like NuttX code. But does not yet compile.
arch/arm/src/tiva/cc13xx: The first few, feeble steps toward getting the overall trim files compatible with the requirements of the NuttX coding standard.
arch/arm/src/tiva/cc13xx: Replace last of TI hardware access macros with NuttX hardware access macros.
arch/arm/src/tiva/cc13xx: Change TI HWREGB to NuttX getreg8 or putreg8 in trim logic.
arch/arm/src/tiva/cc13xx: Change TI HWREGBITW to NuttX getreg32/putreg32 sequence in trim logic.
arch/arm/src/tiva/hardware/cc13x2_cc26x2/cc13x2_cc26x2_ddi0_osc.h: Completes the DDIO OSC header file.
cc13x2_cc26x2/cc13x2_cc26x2_ddi0_osc.h: Updated, but still not finished.
arch/arm/src/tiva/hardware/cc13x2_cc26x2/cc13x2_cc26x2_ddi0_osc.h: Add DDI0 OSC header file. Still a work in progress. Does not yet conform to the NuttX coding standard.
Change _M and _S to _MASK and _SHIFT.
Some minor improvements.
Clean up typos in some comments.
Run all new files against tools/indent.sh
arch/arm/src/tiva/cc13xx: Bring in trim files from SDK. Convert to C-style comments, lowercase hex contants. Remove Windows-style line endings.
I still observe data abort crash if I compile the code with optimization enabled.
The next steps are to investigate the optimization issue and add Watchdog module. Currently, NSH does not run for a long time ;)
arch/arm/src/am335x/am335x_irq.c: Correct interrupt processing routine
configs/beaglebone-black/nsh/defconfig: Enable debug compilation options. Otherwise data abort crash is observed
arch/arm/src/am335x/am335x_lowputc.c and arch/arm/src/am335x/chip/am335x_uart.h: UART-related cosmetic changes
arch/arm/src/am335x/am335x_timerisr.c: Make sure that Timer 1 interrupts are disabled before any access to peripheral registers
stm32f0l0: SPI and GPIO EXTI support
arch/arm/src/stm32f0l0: add support for GPIO EXTI
configs/nucleo-l073rz: support for nrf24l01
configs/b-l072z-lrwan1/include/board.h: add note about onboard Murata CMWX1ZZABZ-09 module and definitions for available peripherals
Approved-by: GregoryN <gnutt@nuttx.org>
Masayuki Ishikawa reports that this commit breaks ALL PROTECTED mode builds.
It violates the basic requirements of the use of the MPU in protected mode. Those basic requirements are:
1. The MPU region must be aligned to the base address of the memory region being mapped (it may NEVER extend before the memory region). That is, the following MUST always be zero:
(base & ((1 << l2size) - 1))
2. The MPU region must never extend beyond the end of the memory region. That is, the following must be true:
size >= (1 << l2size)
This reverts commit 8b63d02309.
Squashed commit of the following:
Author: Gregory Nutt <gnutt@nuttx.org>
Many small changes related to coding style.
Author: Petro Karashchenko <petro.karashchenko@gmail.com>
configs/beaglebone-black: Adds initial support for the BeagleBone Black board.
arch/arm/src/am335x: Adds initial support for the TI AM355x family.
Fix lc823450 start
* arch/arm/src/lc823450: Use CONFIG_STACK_COLORATION instead of CONFIG_DEBUG_STACK
Signed-off-by: Masayuki Ishikawa <Masayuki.Ishikawa@jp.sony.com>
* arch/arm/src/lc823450: Fix go_os_start() in lc823450_start.c
I found a bug in go_os_start() that it returns immediately
because it does not compare r1 to zero. This commit fixes
this bug. Also, this commit fixes its description.
Signed-off-by: Masayuki Ishikawa <Masayuki.Ishikawa@jp.sony.com>
Approved-by: GregoryN <gnutt@nuttx.org>
Squashed commit of the following:
arch/arm/src/stm32f0l0: Various changes for a clean compilation. Still does not compile correctly due to missing FLASH latency definitions.
arch/arm/src/stm32f0l0/hardware: Add framework for the STM32 L0. Currently set to same as the STM32F0.
arch/arm/src/stm32f0l0/hardware: Very fragmentary FLASH header register definitions for the STM32 L0.
arch/arm/src/stm32f0l0: Bring in DMA v1. Cannot possibly be functionaly yet due to the limited number for M0 interrupts.
arch/arm/src/stm32f0l0: Add STM32 F0/L0 LSE and backup power domain controls.
arch/arm/src/stm32f0l0/hardware/stm32l0_pwr.h: Add STM32L0 PWR header file.
arch/arm/include/stm32f0l0/chip.h: Clean up WIP chip header file.
arch/arm/include/stm32f0l0/chip.h: WIP.
arm/src/stm32f0l0: Resolve some small differences between F0 and L0 GPIO pin options.
arch/arm/src/stm32f0l0: Better integrate STM32L0 header files.
nuttx/arch/arm/include/stm32f0l0: Add STM32L0 IRQ number definition file.
arch/arm/src/stm32f0l0: Add STM32L0 RCC driver.
arch/arm/src/stm32f0l0/hardware: Adds basic STM32L0 header files.
arch/arm/src/stm32f0l0: Add STM32L0 chip selections.
configs/: Hook new STM32L0 boards into the configuration system.
configs: nucleo boards use as default ST LINK MCO as clock input from MCU and for this HSEBYP must be enabled
configs: add basic support for nucleo-l073rz
configs: add basic support for b-l072z-lrwan1
- Avoids the use of up_aesinitialize() entirely, which resolves dependency problems, because this function does not make sure that an actual hardware aes implementation was made available: each SoC is now responsible to ensure the AES hardware is initialized before first use. This applies to lpc43xx, stm32 and sam34.
- Remove definitions of the NEVER used aes_init and aes_update operations. The new AES API will be more suitable.
- Change the unusual naming in stm32 (avoiding possible naming clashes)
- Change the unusual naming in sam34 (avoiding possible naming clashes)
- Add some FAR to pointers and enforce the 80 col limit in stm32 and sam
