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10134 Commits

Author SHA1 Message Date
Gregory Nutt
fc79762e11 Fix a warning due to a naming collision 2017-02-28 13:36:56 -06:00
Gregory Nutt
70182bf690 Fix more problems found in build testing. 2017-02-28 11:34:03 -06:00
Gregory Nutt
1c8d3e1f14 STM32 F7: Fix errors related to GPIO EXTI 2017-02-28 11:30:54 -06:00
Gregory Nutt
a19b39a9e3 EFM32 Serial: Convert to use new interrupt argument interface. 2017-02-28 11:24:06 -06:00
Gregory Nutt
ac7307cca0 Trivial, cosmetic changes from review. 2017-02-28 11:11:11 -06:00
David Sidrane
d75dfcfb4b Merged in david_s5/nuttx/upstream_irqfixes (pull request #227) 
STM32 irqfixes found in build testing

Approved-by: Gregory Nutt
 2017-02-28 17:08:21 +00:00
David Sidrane
c8ac29574b STM32:stm32_wwd Fixed irq interface 2017-02-28 07:04:47 -10:00
David Sidrane
6443aec36b STM32:stm32_sdio Fixed irq interface 2017-02-28 07:04:34 -10:00
Gregory Nutt
813dc90505 STM32 L4 Serial: Convert to use new interrupt argument interface. 2017-02-28 11:02:09 -06:00
Gregory Nutt
61639c1aa3 STM32 F7 Serial: Convert to use new interrupt argument interface. 2017-02-28 10:58:22 -06:00
Gregory Nutt
17af125390 STM32 Serial: Convert to use new interrupt argument interface. 2017-02-28 10:54:31 -06:00
Gregory Nutt
dc93340a01 Convert more drivers to use new interrupt argument structure. 2017-02-28 09:29:09 -06:00
Gregory Nutt
370e188fa3 Convert more drivers to use new interrupt argument structure. 2017-02-28 09:05:01 -06:00
Gregory Nutt
ea1e6abfd7 Fix error found in build testing. 2017-02-28 08:41:44 -06:00
Gregory Nutt
7d24f45c7e STM32 1wire: Convert to use new interrupt argument infrastructure. 2017-02-28 08:39:02 -06:00
Gregory Nutt
efd11ebe35 Fixes from build testing 2017-02-28 08:33:52 -06:00
Gregory Nutt
c62180732e Adapt more drivers to utilize the IRQ argument feature. 2017-02-28 07:19:55 -06:00
Gregory Nutt
7d2d541c70 Adapt some drivers to utilize the IRQ argument feature. 2017-02-27 20:54:18 -06:00
Gregory Nutt
704df7bd39 IRQ arguments: Fix errors discovered in build testing 2017-02-27 19:28:24 -06:00
Gregory Nutt
f700e7b241 Merge remote-tracking branch 'origin/master' into irqattach 2017-02-27 18:58:34 -06:00
David Sidrane
d4963c2580 Merged in david_s5/nuttx/upstream_upstream_kinetis_usb (pull request #226) 
kinetis usb clean up

Approved-by: Gregory Nutt
 2017-02-28 00:54:04 +00:00
David Sidrane
0b637ddfb3 Kinetis:Define uart and lpuart versions of [early]serialinit 
Add serial init to centralize UART/LPUART management
   Use kinetis_ not up_ where arch specific
   Defined kinetis_[lp]uart_[early]serialinit to facilitate
    bring up both UARTs and LPUARTs as devices and a console

   Support ordering and merging of serial devices names.
 2017-02-27 14:27:31 -10:00
David Sidrane
d0c58fffb3 Kinetis:Refactor clocking in kinetis_usbdev 
1) Removed SIM_CLKDIV2[USBFRAC, USBDIV] setting as it is now
     done in kinetis_clockconfig
  2) Use BOARD_USB_CLKSRC to select the clock source to the
     USB block
  3) Removed warning
  4) Removed CONFIG_TEENSY_3X_OVERCLOCK from the driver as
     the board.h will now provide BOARD_SIM_CLKDIV2_USBDIV
     and BOARD_SIM_CLKDIV2_USBFRAC to the kinetis_clockconfig
 2017-02-27 13:13:24 -10:00
David Sidrane
1c518b223d Kinetis:Add the configuring SIM_CLKDIV2[USBFRAC, USBDIV] in kinetis_clockconfig 
If a board.h provides BOARD_SIM_CLKDIV2_FREQ it will configure the
  SIM_CLKDIV2 based on the additional provided
  BOARD_SIM_CLKDIV2_USBFRAC and BOARD_SIM_CLKDIV2_USBDIV

  The reason for doing this globaly is that the output the
  SIM_CLKDIV2 divisor may be also used for other IP blocks in
  future configurations (as is done for SIM_CLKDIV3)
 2017-02-27 13:06:01 -10:00
David Sidrane
b9dcedf289 Kinetis:Fixed unused warning 2017-02-27 11:22:49 -10:00
David Sidrane
4bdf732fc7 Kinetis:Fixed kinetis_uartreset call in kinetis_lpserial.c 2017-02-27 11:22:49 -10:00
Gregory Nutt
95856946d2 Interrupt argument bugfixes 2017-02-27 15:22:35 -06:00
Gregory Nutt
80dba27434 Fix copy past type: xcptr_t -> xcpt_t 2017-02-27 15:00:42 -06:00
Gregory Nutt
2ef4433220 Missing interrupt argument parameter. 2017-02-27 14:53:37 -06:00
Gregory Nutt
44abbe60aa Fix typo in name of callback field. 2017-02-27 14:51:29 -06:00
Gregory Nutt
aa8d4422a5 Fix some mismatched function prototypes 2017-02-27 14:43:10 -06:00
Gregory Nutt
d9fec7fe4c More missing arguments to interrupt handling. 2017-02-27 14:26:04 -06:00
Gregory Nutt
67de2e5f66 Add argument to STM32 EXTI interrupt handlers. 2017-02-27 14:21:30 -06:00
David Sidrane
3ae4183971 Kinetis:Fixed C&P of stm32 on kinetis_fpuconfig 2017-02-27 09:12:39 -10:00
David Sidrane
ddb00217be Kinetis:Fixed up_rxint - did not disable the RX interuppts 
There was an OR where and AND NOT was needed.
 2017-02-27 07:19:19 -10:00
Gregory Nutt
7e8e869352 Add more missing arguments to interrupt handling functions. 2017-02-27 11:14:21 -06:00
Gregory Nutt
6a3add7230 STM32 TIM: Correct function prototype. 2017-02-27 11:03:10 -06:00
Gregory Nutt
a581e9206d Convert remaining serial drivers to use use irq_attach. 2017-02-27 10:27:14 -06:00
Gregory Nutt
e5be4f7fe2 Merge remote-tracking branch 'origin/master' into irqattach 2017-02-27 09:13:41 -06:00
Gregory Nutt
221c94e568 Fix typo from a previouis commit 2017-02-27 08:57:21 -06:00
Gregory Nutt
4cd31be19d Convert some serial drivers to use use irq_attach. 2017-02-27 08:55:21 -06:00
Gregory Nutt
b651e73057 STM32: Fix mismatched prototype 2017-02-27 08:18:37 -06:00
Gregory Nutt
2321560690 More missing argument paramters in interrupt handlers. 2017-02-27 08:06:07 -06:00
Gregory Nutt
2e30b9b252 More missing argument paramters in interrupt handlers. 2017-02-27 07:46:36 -06:00
Gregory Nutt
70532f6548 Kinetis: More needed in last pinirq change. 2017-02-27 07:24:57 -06:00
Gregory Nutt
6e2ee2b07f Kinetis: GPIO interrupt handling needs handler argument. 2017-02-27 07:20:21 -06:00
Mark Schulte
b3222bbc8a irq_dispatch: Add argument pointer to irq_dispatch 
Provide a user defined callback context for irq's, such that when
registering a callback users can provide a pointer that will get
passed back when the isr is called.
 2017-02-27 06:27:56 -06:00
Gregory Nutt
433ed93aa0 Add some comments. 2017-02-27 06:25:31 -06:00
Gregory Nutt
1ed7bec85f Merge branch 'master' of bitbucket.org:nuttx/nuttx 2017-02-26 14:53:48 -06:00
Gregory Nutt
bca0adec2b Update comments in file headers. 2017-02-26 14:40:57 -06:00
Wolfgang Reißnegger
774346ccdd SAM3/4: GPIO bit numbering typo fixes. 2017-02-26 09:54:04 -08:00
Gregory Nutt
2e0ffc0ea3 Update some comments. 2017-02-26 09:15:57 -06:00
raiden00pl
3175b74428 Add basic support for the STM32F334 2017-02-26 12:39:44 +01:00
Gregory Nutt
2238912507 Fix some backward conditional compilation 2017-02-25 18:32:58 -06:00
Gregory Nutt
abfb070ee1 Kinetis: Try to make UART/LPUART definitions sane. 2017-02-25 17:48:05 -06:00
Gregory Nutt
27cac7f083 Fix error in last commit: defined, not define in conditional logic. 2017-02-25 16:44:27 -06:00
Gregory Nutt
1e1714b061 Kinetis: Resolve issue with duplicate definitions of up_putc. Addition conditional logic to pick just one. 2017-02-25 16:36:47 -06:00
Gregory Nutt
b6f5b77f2c Add C files that reference ANIOC_TRIGGER now need to include nuttx/analog/ioctl.h 2017-02-25 15:54:10 -06:00
Gregory Nutt
ee2f71ad3e Kinetis USBDEV: Eliminate compilation error introduced by last SIM changes. 2017-02-25 13:26:53 -06:00
Gregory Nutt
48bc77ee6b Update some comments. 2017-02-25 12:40:30 -06:00
Gregory Nutt
04ea69c32f Kinetis: Fix some comple errors and warnings that came in with the last PR 2017-02-25 11:52:31 -06:00
Gregory Nutt
90e63ba18e Purely cosmetic changes from review of last PR. 2017-02-25 11:43:05 -06:00
David Sidrane
38df949adc Merged in david_s5/nuttx/upstream_kinetis (pull request #221) 
Kinetis:Add LPUART

Approved-by: Gregory Nutt
 2017-02-25 17:23:04 +00:00
Gregory Nutt
d77d322a61 QEncoder: Add mechanism to assure that architecture-specific IOCTL commands do not overlap. 2017-02-25 11:15:59 -06:00
David Sidrane
df01e343a7 Kinetis:Add LPUART serail device driver 2017-02-25 07:06:04 -10:00
David Sidrane
0cbc03255c Kinetis:Add LPUART and Clock configuartaion to freedom-k66f board 
Pin out LPUART0 for testing
   Define BOARD_SOPT2_PLLFLLSEL ti select MCGPLLCLK
   Define BOARD_SIM_CLKDIV3_FREQ etal to provide BOARD_LPUART0_FREQ
 2017-02-25 07:05:34 -10:00
David Sidrane
b553d34a68 Kinetis:Added configurable 1|2 stop bits 
HAVE_SERIAL_CONSOLE -> HAVE_UART_CONSOLE to bew consistent with
  HAVE_LPUART_CONSOLE naming
 2017-02-25 07:02:56 -10:00
David Sidrane
dd218ffa8c Kinetis:Extend clockconfig to support SOPT2_PLLFLLSEL and SIM_CLKDIV3 
A board.h file can now specify the:
   1) BOARD_SOPT2_PLLFLLSEL to select the output of the SIM_SOPT2 MUX
     from:
       MCGFLLCLK
       MCGPLLCLK
       USB1PFD
       IRC48MHZ

    2) If it defines BOARD_SIM_CLKDIV3_FREQ then it must define
    BOARD_SIM_CLKDIV3_PLLFLLFRAC and BOARD_SIM_CLKDIV3_PLLFLLDIV
    which wil be used to cpnfigure SIM_CLKDIV3 [PLLFLLFRAC, PLLFLLDIV]
 2017-02-25 07:02:56 -10:00
David Sidrane
86c9f97f78 Kinetis: Add LPUART as lowlevel console 2017-02-25 07:02:56 -10:00
David Sidrane
29ab603a66 Kinetis:Add LPUART for use with K66 
Add LPUART made UART5 an uption as the K66 does not have UART5
 2017-02-25 07:02:56 -10:00
David Sidrane
61b10c5e58 Kinetis:Add LPUART to K66 chip 
Add KINETIS_NLPUART setting it to 1 and adjust KINETIS_NUART
  to removed UART5 as the K66 dioes not have UART5
 2017-02-25 07:02:56 -10:00
David Sidrane
f6fe9beeb3 Kinetis:Add LPUART to config 2017-02-25 07:02:56 -10:00
David Sidrane
b280aef9c0 Kinetis:Add LPUART register definitions 2017-02-25 07:02:38 -10:00
David Sidrane
9061a3fb64 Kinetis: UART add UART_BDH_SBNS definition 2017-02-25 07:02:38 -10:00
Gregory Nutt
de0e2ec261 STM32: Remove one residual use of the obsoleted STM32_TIM27_FREQUENCY definition which does not work for all STM32 family members. 2017-02-25 10:04:28 -06:00
Gregory Nutt
4c6b635298 Fix error in previous commit. 2017-02-25 09:39:33 -06:00
Gregory Nutt
c694ca0ebc Enable clocking to the timer on QE setup; disable clock on QE teardown. 2017-02-25 09:26:11 -06:00
Alan Carvalho de Assis
37298504e6 Fix QEncoder driver, based on STM32L4 driver 2017-02-24 16:10:28 -06:00
Gregory Nutt
8ee2e8d8b0 Most Ethernet drviers: Check if the poll timer is running before restarting it at the end of each TX. 2017-02-24 15:58:17 -06:00
Marc Rechte
579360e77d Merge branch 'master' of https://bitbucket.org/mrechte/nuttx-twrk64 2017-02-24 08:02:08 +01:00
Marc Rechte
c734a6283c kinetis_enet.c add #define for number of loops for auto negotiation to complete 2017-02-24 08:00:11 +01:00
David Sidrane
a43554decd Kinetis:SIM add paramiterized SIM_CLKDIVx_xxFRAC|DIV macros 
The makes for cleaner board definitions like:

   Divider output clock = Divider input clock * ((PLLFLLFRAC+1)/(PLLFLLDIV+1))
       SIM_CLKDIV3_FREQ = BOARD_SOPT2_FREQ × [ (PLLFLLFRAC+1) / (PLLFLLDIV+1)]
                 90 Mhz = 180 Mhz X [(0 + 1) / (1 + 1)]
    #define BOARD_SIM_CLKDIV3_PLLFLLFRAC  1
    #define BOARD_SIM_CLKDIV3_PLLFLLDIV   2
    #define BOARD_SIM_CLKDIV3_FREQ        (BOARD_SOPT2_FREQ * (BOARD_SIM_CLKDIV3_PLLFLLFRAC / BOARD_SIM_CLKDIV3_PLLFLLDIV))
 2017-02-23 19:27:55 -10:00
David Sidrane
e1278c0cb9 Kinetis:Fix typo in comment 2017-02-23 19:25:53 -10:00
Gregory Nutt
207b4a3c68 Update README.txt 2017-02-23 11:02:06 -06:00
Gregory Nutt
d83422a00d Update README.txt 2017-02-23 10:57:21 -06:00
David Sidrane
41e3d9f174 Kinetis:Refactor you use SIM_SOPT2_PLLFLLSEL, added warning 
The warning has been added because: SIM_SOPT2_PLLFLLSEL
  is a clock selection that may feed many clock subsystem:
   USB, TPM, SDHCSRC, LPUARTSRC. Therefore, there needs to
  be a global board level setting to select  the source for
  SIM_SOPT2_PLLFLLSEL and then  derive all the  sub selections
  and proper fractions/divisors for each modules clock.
 2017-02-22 10:42:52 -10:00
David Sidrane
12c24f2644 Kinetis:kinetis_clockconfig uses the correct ACKISO 
ACKISO is located in the PMC_REGSC on the majority
   of the Kinetis SoCs. With the exception of the
   MK40DXxxxZVLQ10 where ACKISO is located in LLWU_CS
 2017-02-22 10:42:52 -10:00
David Sidrane
1324b8c00a Kinetis:Resolves issues where Freescale moved ACKISO 
ACKISO is located in the PMC_REGSC on the majority
  of the Kinetis SoCs. With the exception of the
  MK40DXxxxZVLQ10 where ACKISO is located in LLWU_CS
 2017-02-22 10:42:52 -10:00
David Sidrane
a4b985f865 Kinetis:PMC defines are based on PMC feature configuration 2017-02-22 10:42:52 -10:00
David Sidrane
1ba6eadcec Kinetis:Include the PMC features 2017-02-22 10:42:52 -10:00
David Sidrane
8525c266a1 Created a kinetis PMC versioning scheme pulled in by Kinetis chip.h 
The motvations is to version the IP blocks of the Kinetis
     K series family of parts.

     This added versioning and configuration features for the
     Kinetis PMC IP block.

     It is envisioned that in the long term as a chip is added.
     The author of the new chip definitions will either find
     the exact configuration in an existing chip define and
     add the new chip to it Or add the PMC fature configuration
     #defines to the chip ifdef list in
     arch/arm/include/kinetis/kinetis_pmc.h  In either case the
     author should mark it as "Verified to Document Number:"
     taken from the reference manual.

     The version KINETIS_PMC_VERSION_UKN has been applied to
     most all the SoCs in the kinetis arch prior to this commit.

     The exceptions are the CONFIG_ARCH_CHIP_MK60FN1M0VLQ12,
     CONFIG_ARCH_CHIP_MK20DXxxxVLH7 All K64 and K66 have ben
     Verified PMC configurations.
 2017-02-22 10:42:52 -10:00
David Sidrane
381ffa3083 Kinetis:SIM defines are based on SIM feature configuration 2017-02-22 10:42:52 -10:00
David Sidrane
5b550a37eb Kinetis:Include the SIM features 2017-02-22 10:42:52 -10:00
David Sidrane
d74f16ecb9 Kinetis:Created a kinetis SIM versioning scheme pulled in by Kinetis chip.h 
The motvations is to version the IP blocks of the Kinetis
   K series family of parts.

   This added versioning and configuration features for the
   Kinetis SIM IP block.

   It is envisioned that in the long term as a chip is added.
   The author of the new chip definitions will either find
   the exact configuration in an existing chip define and
   add the new chip to it Or add the SIM feature configuration
   #defines to the chip ifdef list in
   arch/arm/include/kinetis/kinetis_sim.h  In either case the
   author should mark it as "Verified to Document Number:"
   taken from the reference manual.

   The version KINETIS_SIM_VERSION_UKN has been applied to
   most all the SoCs in the kinetis arch prior to this commit.

   The exceptions are the CONFIG_ARCH_CHIP_MK60FN1M0VLQ12,
   All K64 and K66 which not have Verified SIM configurations.
 2017-02-22 10:42:52 -10:00
David Sidrane
14bdf3af22 Kinetis:Fixed Typo in kinetis_mcg header 2017-02-22 10:42:52 -10:00
Gregory Nutt
bb059432ea Move local variables to top of function for compliance with coding standard. 2017-02-20 17:54:04 -06:00
Jussi Kivilinna
4dfb8268f3 stm32f7: stm32_allocateheap: allow use DTCM memory for heap 
STM32F7 has up to 128KiB of DTCM memory that is currently left unused.

This patch adds DTCM to main heap if CONFIG_STM32F7_DTCMEXCLUDE is not enabled.
 2017-02-20 08:42:51 -06:00
Gregory Nutt
4b4f0dc4df STM32L4 COMP: Remove some unused definitions 2017-02-20 08:41:43 -06:00
Gregory Nutt
0fc226dd53 Changes from review of last PR 2017-02-19 14:58:37 -06:00
Marc Rechté
1838171d43 Add twr-k64f120m config and fix some ENET related problems 2017-02-19 21:20:56 +01:00
Gregory Nutt
4033953878 STM32L4 COMP: Port from Motorola MDK. 2017-02-19 11:33:35 -06:00
Gregory Nutt
e61ded4a14 STM32L4: Add Comparator register definition file. 2017-02-19 10:09:17 -06:00
Gregory Nutt
d900e1fac0 STM32L4: Bring LPTIM driver in from the Motorola MDK. 2017-02-18 11:06:20 -06:00
Gregory Nutt
6bafdb1cdc Remove some dangling whitespace at the end of some lines. 2017-02-18 10:20:08 -06:00
Gregory Nutt
085616d651 STM32L4: Bring power management logic from Motrola MDK into NuttX 2017-02-18 10:18:42 -06:00
Gregory Nutt
6fe94b5724 Trivial cosmetic, alignement changes. 2017-02-17 17:50:56 -06:00
Gregory Nutt
e4e7528b1a Port STM32L4 SAI driver from MDK. 2017-02-17 15:13:36 -06:00
Gregory Nutt
377fadc816 STM32L4: Add SAI register definition header file. 2017-02-17 13:52:22 -06:00
Jussi Kivilinna
dd1aa2357b Allow board to configure HSE clock in bypass-mode. This is needed to enable HSE with Nucleo-F746ZG board. 2017-02-17 07:15:22 -06:00
Masayuki Ishikawa
add2fbfa85 LM3S Ethernet: Fix interrupt work in the last big commit. 2017-02-17 17:40:58 +09:00
Gregory Nutt
a49b349614 C library: Add swab() 2017-02-16 14:42:27 -06:00
Gregory Nutt
3b351615be Kinetis K66: Change necessary for correct build. 2017-02-16 11:33:36 -06:00
Spahlinger, Michael
42e8b12ec3 Fix for SAMv7 SPI: DLYBS value wass calculated, but never written to any registers. This led to incorrect timings on the bus. 2017-02-16 07:42:37 -06:00
Gregory Nutt
c3bfccf293 Kinetis PWM: Purely cosmetic changes from review. 2017-02-15 17:54:55 -06:00
David Sidrane
c83af148b1 Kinetis:Add FTM3 to PWM 2017-02-15 13:42:36 -10:00
David Sidrane
a95a6c43d3 Kinetis Support RMII clock source select 
This defined the RMII clock source select bits and allows
  the selection to be made via Kconfig
 2017-02-15 13:42:36 -10:00
Gregory Nutt
1474300276 LPC43: Rename HAVE_CONSOLE to HAVE_SERIAL_CONSOLE. We can, of course, always have a some console other than a serial console. 2017-02-15 07:23:18 -06:00
Alan Carvalho de Assis
058f06cc94 Fix typos introduced in previous commit 2017-02-15 07:16:15 -06:00
Gregory Nutt
077adf863e Merge branch 'master' of bitbucket.org:nuttx/nuttx 2017-02-14 19:31:58 -06:00
Alan Carvalho de Assis
1b996f1c7c Add usbnsh config to Bambino 200E board 2017-02-14 19:31:39 -06:00
Gregory Nutt
4043dd4aa0 LPC43 serial: Correct conditional logi that selects /dev/ttySN. Problem noted by Alan Carvalho de Assis. 2017-02-14 19:12:11 -06:00
David Sidrane
3423a4ecc2 Kinetis: Add comment the Freedom-K66F uses KSZ8081 PHY 2017-02-14 09:15:23 -10:00
David Sidrane
35fc713931 Kinetis K64 and K66 share mpu files 2017-02-14 09:15:23 -10:00
David Sidrane
84b206bf7e Kinetis K66 FMC 
Added K66 FMC register definition
 2017-02-13 14:35:52 -10:00
David Sidrane
7d80db5919 Kinetis K66 Pin Mux 2017-02-13 14:35:51 -10:00
David Sidrane
e28781ebeb Include K66 memory map 2017-02-13 14:35:51 -10:00
David Sidrane
6597e46ce7 Define Alternate addresses for IP blocks in both AIPS0 & AIPS1 
Added ALT version of RNGA, FTM2, DAC0 as a facility to later
   define secondary access via AIPS1 to these peripherals
 2017-02-13 14:35:51 -10:00
David Sidrane
bd7d7edcf8 Kinetis: Updated comment in clockconfig 2017-02-13 13:24:47 -10:00
David Sidrane
3840c802d1 Kinetis SPI and I2C are 0 based 
The K whole family line has max 4 or each. But the supported
  parts have the maximums listed below:

    K46 and K66    3 SPI SPI0-SPI2
    K46 and K66    4 I2C I2C0-I2C3
 2017-02-13 13:24:47 -10:00
David Sidrane
ddd1f8c507 Kinetis SDHC - Enable clock after selected 2017-02-13 13:24:47 -10:00
Manohara HK
b154531838 I found an issue inside the cp15_coherent_dcache function in file, arch/arm/src/armv7-r/cp15_coherent_dcache.S. 
The "mcr CP15_BPIALLIS(r0)" instruction is used for invalidating entire branch predictor.  But the problem is, since this is the generic code and can be called on any armv7-r architecture based CPU's.  It is a problem, if this instruction is called in uni processor configuration. Because, BPIALLIS (c7, 0, c1, 6) instruction is only added as part of the "Multiprocessing Extensions" (As per ARM® Architecture Reference Manual /ARMv7-A and ARMv7-R edition)

So in my opinion, this instruction should be under SMP configuration. In non-SMP configuration this instruction could become undefined.
 2017-02-13 06:33:15 -06:00
David Sidrane
a907bbc5d3 Typo up_exit.c edited online with Bitbucket 2017-02-09 20:38:15 +00:00
Gregory Nutt
3329a534f7 Remove spurious blank line. 2017-02-09 13:06:42 -06:00
Gregory Nutt
c55d8f15a1 Merged in david_s5/nuttx/upstream_bkp_fix (pull request #206) 
STM32 & STM32F7 Fixes the bkp reference counter issue

Approved-by: Gregory Nutt
 2017-02-09 19:03:04 +00:00
David Sidrane
550d259a28 STM32F7: Fixes the bkp reference counter issue 2017-02-09 08:39:51 -10:00
David Sidrane
169b3982a2 STM32: Fixes the bkp reference counter issue 2017-02-09 08:39:51 -10:00
Gregory Nutt
a292da29d0 Costmetic changes from review of last PR. 2017-02-09 08:39:31 -10:00
David Sidrane
7262a788c4 Better granualarity and erro checking of the board's MCG settings 
Allow for complete MCG_C2 definition from the boart.h file
  Moved #ifdef out of code by setting default values for
  Allow for individule bit setting in MCG_C2 for
    BOARD_EXTCLOCK_MCG_C2
    BOARD_MCG_C2_FCFTRIM
    BOARD_MCG_C2_LOCRE0
  Added range and sanity checking
 2017-02-09 08:39:31 -10:00
David Sidrane
0e687121e5 arch/arm/include/kinetis/kinetis_mcg.h 2017-02-09 08:39:31 -10:00
David Sidrane
b2deadd569 Support the Indexed name LOCK->LOCK0 2017-02-09 08:39:30 -10:00
David Sidrane
eee029eec1 MCG defines are based on the MCG feature configuration 
We define the bits as a common set of names. This means that
  an index may be added to a name i.e. LOCK is LOCK0 as that is
  the superset name.
 2017-02-09 08:39:30 -10:00
David Sidrane
ab7b72f2e8 Kinetis chip Adding K66 and inlcuding MCG versioning 
This includes arch/arm/include/kinetis/kinetis_mcg.h
  to bring in the MCG versioning and defines the KINETIS_K66
  family for the added SoCs:

   --------------- ------- --- ------- ------- ------ ------ ------ -----
   PART NUMBER     CPU     PIN PACKAGE  TOTAL  PROGRAM EEPROM SRAM  GPIO
                   FREQ    CNT          FLASH  FLASH
   --------------- ------- --- ------- ------- ------ ------ ------ -----
   MK66FN2M0VMD18  180 MHz 144 MAPBGA   2   MB    —    — KB  260 KB 100
   MK66FX1M0VMD18  180 MHz 144 MAPBGA  1.25 MB  1 MB   4 KB  256 KB 100
   MK66FN2M0VLQ18  180 MHz 144 LQFP     2   MB    —    — KB  260 KB 100
   MK66FX1M0VLQ18  180 MHz 144 LQFP    1.25 MB  1 MB   4 KB  256 KB 100
 2017-02-09 08:39:30 -10:00
David Sidrane
9bbd98580b Created a kinetis MCG versioning scheme pulled in by Kinetis chip.h 
The motvations is to version the IP blocks of the Kinetis
   K series family of parts.

   This added versioning and configuration features for the
   Kinetis MCG IP block.

   It is envisioned that in the long term as a chip is added.
   The author of the new chip definitions will either find
   the exact configuration in an existing  chip define and
   add the new chip to it Or add the MCG feature configuration
   #defines to the chip ifdef list in
   arch/arm/include/kinetis/kinetis_mcg.h  In either case the
   author should mark it as "Verified to Document Number:"
   taken from the reference manual.

   The version KINETIS_MCG_VERSION_UKN has been applied to
   most all the SoCs in the kinetis arch prior to this commit.

   The exceptions are the CONFIG_ARCH_CHIP_MK60FN1M0VLQ12,
   All K64 and K66 which not have Verified MCG configurations.
 2017-02-09 08:39:30 -10:00
David Sidrane
6199d1801e Add K66 memory map 2017-02-09 08:39:30 -10:00
David Sidrane
db65734820 Add Kinetis K66 to Kinetis Kconfig 2017-02-09 08:39:30 -10:00
David Sidrane
bdd99f5aa1 Removed ws at EOL 2017-02-09 08:39:30 -10:00
Marc Rechté
d501ffc563 Kinetis SDHC driver fixes. 2017-02-09 11:28:30 -06:00
Gregory Nutt
1d290c2b37 setvbuf: Add support for disabling I/O buffering. Initially cut; untested. 2017-02-09 09:24:44 -06:00
Alan Carvalho de Assis
afa1066b4d LPC43: Fix missing #endif 2017-02-08 11:52:15 -06:00
Gregory Nutt
e803e2c3f4 Costmetic changes from review of last PR. 2017-02-07 17:16:56 -06:00