Commit Graph

17827 Commits

Author SHA1 Message Date
Raman Gopalan
9044594545 at32uc3_gpioirq.c: Fix typo: contex -> context 2021-05-06 11:25:38 -03:00
Gustavo Henrique Nihei
534c058d93 spi: Adopt CPHA as the abbreviation for clock phase 2021-05-05 16:56:07 -03:00
David Sidrane
92dba32c8c stm32h7:Allow for reuse of the OTG_ID GPIO
Currently Nuttx doesn't seem to be any real support for OTG.
    In the future when OTG is supported. This Knob can be removed
    and drivers can enable their pin sets based on CONFIG_OTG.
    (Adding CONFIG_OTG at this time would be misleading.)
2021-05-05 12:22:11 -04:00
David Sidrane
cd603af958 stm32f7:Allow for reuse of the OTG_ID GPIO 2021-05-05 12:22:11 -04:00
David Sidrane
8624f9a444 s32k1xx:flexcan Use inttypes in printing macro 2021-05-05 06:07:50 -07:00
David Sidrane
7fb59e4f36 kinetis:flexcan Use inttypes in printing macro 2021-05-05 06:07:50 -07:00
David Sidrane
e5ceb062f9 stm32f7:Use inttypes in printing macro
stm32f7:SDMMC Use inttypes in printing macro

stm32f7:CAN Use inttypes in printing macro

stm32f7:DMA Use inttypes in printing macro

stm32f7:serial fix compile error from UNUSED() change
2021-05-05 06:07:50 -07:00
David Sidrane
cbe3e120d5 stm32h7:Use inttypes in printing macros 2021-05-05 06:07:50 -07:00
raiden00pl
b721ba05aa stm32_pwm.c: fix compilation warnings 2021-05-05 09:32:58 -03:00
raiden00pl
7cb7fe3f38 stm32_pwm: fixes for PULSECOUNT support
1. generate an indefinite number of pulses when info->count = 0
2. timers that don't support pulse-count shouldn't use pulse-count logic
2021-05-05 09:32:58 -03:00
Sara Souza
873293cc3f xtensa/esp32: Applies REG_MASK to extract a field value 2021-05-05 01:30:03 -07:00
Sara Souza
50daf24242 esp32/esp32-c3: Adds two helpers to extract and include a field value 2021-05-05 01:30:03 -07:00
Sara Souza
cce42d5f74 xtensa/esp32: Reorganize the pins initialization and adds showprogress in __start 2021-05-05 01:30:03 -07:00
Sara Souza
afd6b26232 xtensa/esp32: Replace serialout/in and fixes the fifo counter issue 2021-05-05 01:30:03 -07:00
Abdelatif Guettouche
f3a6d80c95 esp32c3/hardware: Include files of the same level by their names only and
remove unnecessary includes.

Signed-off-by: Abdelatif Guettouche <abdelatif.guettouche@espressif.com>
2021-05-05 01:28:22 -07:00
Abdelatif Guettouche
e24af207f8 esp32/hardware: Include files of the same level by their names only and
remove unnecessary includes.

Signed-off-by: Abdelatif Guettouche <abdelatif.guettouche@espressif.com>
2021-05-05 01:28:22 -07:00
raiden00pl
7b53a5fe1c stm32_adc.c: rename a struct member in struct adccmn_data_s from 'initialized' to 'refcount' 2021-05-05 01:27:56 -07:00
Sara Souza
b01ddef61b risc-v/esp32-c3: Adds freerun wrapper 2021-05-04 15:22:26 -03:00
Gustavo Henrique Nihei
7ded22fb1a risc-v/k210: Fix SMP interrupt stack size calculation 2021-04-29 19:39:17 -07:00
Gustavo Henrique Nihei
e0da0bf6bd arch/risc-v: Fix interrupt stack alignment 2021-04-29 19:39:17 -07:00
Gustavo Henrique Nihei
f8a36f10c3 arch: Uniformize optimization flag setting across architectures 2021-04-29 19:17:16 -07:00
Gustavo Henrique Nihei
abf039b744 risc-v/rv32im: Set MAXOPTIMIZATION regardless of any debug options 2021-04-29 19:17:16 -07:00
Alan C. Assis
0a0a034a3f esp32: replace EPS32 typo with ESP32 2021-04-29 18:03:05 -03:00
Juha Niskanen
07cde736bd arch: fix some printf format errors 2021-04-29 19:16:56 +01:00
Alexander Vasiljev
940c5b69c3 stm32h7: serial: use dma tx semaphore as resource holder 2021-04-29 03:19:44 -07:00
Dong Heng
fcd5648bca riscv/esp32c3: Fix SPI Flash driver internal chip data address error
"g_rom_flashchip" is not in fixed address between all ESP32-C3's different versions.
2021-04-28 09:58:16 -05:00
Gustavo Henrique Nihei
edeb16123b risc-v/esp32c3: Uniformize alignment for assembly instructions 2021-04-28 09:55:57 -05:00
Gustavo Henrique Nihei
9e7d3cff92 risc-v/esp32c3: Improve interrupt handler documentation 2021-04-28 09:55:57 -05:00
Gustavo Henrique Nihei
27d32f4309 risc-v/esp32c3: Reorder register restoration on interrupt handler epiloque 2021-04-28 09:55:57 -05:00
Gustavo Henrique Nihei
66a15a6f83 risc-v/esp32c3: Fix wrong references to ESP32 2021-04-28 15:41:30 +01:00
Gustavo Henrique Nihei
7caebdd50f arch/risc-v: Fix stack alignment according to calling convention
The RISC-V Integer Calling Convention states that the stack pointer
shall always be aligned to a 128-bit boundary upon procedure entry, both
for RV32* and RV64* ISAs (exception to the RV32E ISA, which must follow a
specific convention)
2021-04-27 23:12:20 -05:00
Gustavo Henrique Nihei
91955be0e1 xtensa/esp32: Change ESP32_RT_TIMER_TASK_PRIORITY comment into help text 2021-04-27 20:45:28 -06:00
Gustavo Henrique Nihei
2b179c5ab3 xtensa/esp32: Add missing default value for CONFIG_ESP32_GPIO_IRQ 2021-04-27 20:45:28 -06:00
Gustavo Henrique Nihei
95a76adc90 xtensa/esp32: Uniformize Kconfig alignment and styling 2021-04-27 20:45:28 -06:00
Gustavo Henrique Nihei
03c8e2d5c7 xtensa/esp32: Remove inconsistent usage of comment command 2021-04-27 20:45:28 -06:00
Gustavo Henrique Nihei
4d3fa83d7a xtensa/esp32: Remove redundant dependency 2021-04-27 20:45:28 -06:00
Gustavo Henrique Nihei
016652f7d7 risc-v/esp32c3: Change ESP32C3_RT_TIMER_TASK_PRIORITY comment into help text 2021-04-27 20:43:07 -06:00
Gustavo Henrique Nihei
9df2179562 risc-v/esp32c3: Uniformize Kconfig alignment and styling 2021-04-27 20:43:07 -06:00
Gustavo Henrique Nihei
1e45a9329b risc-v/esp32c3: Remove inconsistent usage of comment command 2021-04-27 20:43:07 -06:00
Gustavo Henrique Nihei
cd6c29a126 risc-v/esp32c3: Remove redundant dependency 2021-04-27 20:43:07 -06:00
Byron Ellacott
9d4742af00 Add experimental support for an eZ80 toolchain using llvm and GNU binutils.
An additional fix for the RTC driver to lock the RTC after setting values instead of unlocking it is included.
2021-04-27 21:18:48 -03:00
chenwen
666d718302 xtensa/esp32: Fix crash issue caused by null pointer operation 2021-04-27 11:00:16 +01:00
Gustavo Henrique Nihei
beefd51296 risc-v/esp32c3: Add driver for General Purpose SPI Master 2021-04-26 20:50:32 -03:00
Masayuki Ishikawa
8e161bc992 arch: rp2040: Add stack coloration for the idle task
Summary:
- This commit adds stack coloration for the idle task

Impact:
- rp2040 with CONFIG_STACK_COLORATION=y

Testing:
- Tested with nsh, nshsram and smp configurations
- NOTE: CONFIG_STACK_COLORATION=y needs to be added
2021-04-25 03:19:24 -05:00
Masayuki Ishikawa
dc9223f4cf arch: rp2040: Fix the initial stack pointer
Summary:
- The NuttX for raspberrypi-pico boots via the boot_stage2 provided
  by the pico-sdk which sets the MSP at the end of the SRAM.
- However, the NuttX expects the MSP is set to the top of the idle stack.
- This commit fixes this issue.

Impact:
- None

Testing:
- Tested with nsh, nshsram and smp configrations
2021-04-25 03:19:24 -05:00
Sara Souza
5c562c1068 risc-v/esp32-c3: Reorganize the timer logic for wireless use 2021-04-22 21:38:16 -05:00
Sara Souza
0c440cfdfe xtensa/esp32: Reorganize the timer logic for wireless use 2021-04-22 21:38:16 -05:00
Dong Heng
fecdd27df3 esp32 & esp32c3: Update Wi-Fi BT and Wi-Fi libraries to fix some issues 2021-04-22 07:34:06 -03:00
Sara Souza
7a80cbf93f risc-v/esp32-c3: Adds oneshot timer driver. 2021-04-22 09:13:58 +01:00
Sara Souza
f696364b6a xtensa/esp32: Adds freerun wrapper 2021-04-21 16:37:39 -03:00
Masayuki Ishikawa
1b00e5d518 spinlock: Remove SP_SECTION
Summary:
- SP_SECTION was introduced to allocate spinlock in non-cachable
  region mainly for Cortex-A to stabilize the NuttX SMP kernel
- However, all spinlocks are now allocated in cachable area and
  works without any problems
- So SP_SECTION should be removed to simplify the kernel code

Impact:
- None

Testing:
- Build test only

Signed-off-by: Masayuki Ishikawa <Masayuki.Ishikawa@jp.sony.com>
2021-04-20 22:41:44 -05:00
Masayuki Ishikawa
1a9e7efde5 smp: Remove CONFIG_SMP_IDLETHREAD_STACKSIZE
Summary:
- The CONFIG_SMP_IDLETHREAD_STACKSIZE was introduced to optimize
  the idle stack size for other than CPU0
- However, there are no big differences between the idle stacks.
- This commit removes the config to simplify the kernel code

Impact:
- All SMP configurations

Testing:
- Tested with ostest with the following configs
- spresense:smp, spresense:rndis_smp
- esp32-devkitc:smp (QEMU), maix-bit:smp (QEMU)
- sabre-6quad:smp (QEMU), sabre-6quad:netnsh_smp (QEMU)
- raspberrypi-pico:smp, sim:smp (x86_64)

Signed-off-by: Masayuki Ishikawa <asayuki.Ishikawa@jp.sony.com>
2021-04-19 21:46:39 -05:00
Anthony Merlino
14db894caf stm32h7: Allow selection of SDMMC clock source. 2021-04-19 08:57:49 -07:00
Abdelatif Guettouche
c1b0ee436c arch/xtensa/src/esp32/Kconfig: Make bank switching default to disabled.
This config is only useful when there is a > 4MB PSRAM and thus needs to
be selected by the user explicitly.

Signed-off-by: Abdelatif Guettouche <abdelatif.guettouche@espressif.com>
2021-04-19 07:48:35 -05:00
YAMAMOTO Takashi
7f307f9765 sim: Restore stack alignemnt
Reapply the following commit [1], which has been reverted by
the recent change [2] with no obvious reasons.

Also, add a comment block to explain the calculation.

[1]
```
commit 298c2e5e4f
Author: YAMAMOTO Takashi <yamamoto@midokura.com>
Date:   Wed Jan 29 03:26:43 2020 +0900

    sim: Fix stack alignment

    The recent x86-64 convention requires 16-byte alignment before
    (not after) calling a function.

    This fixes snprintf crash I observed on macOS while saving XMM registers.
```

[2]
```
commit 2335b69120
Author: Xiang Xiao <xiaoxiang@xiaomi.com>
Date:   Mon Apr 12 23:44:08 2021 +0800

    arch: Allocate the space from the beginning in up_stack_frame

    arch: Allocate the space from the beginning in up_stack_frame

    and modify the affected portion:
    1.Correct the stack dump and check
    2.Allocate tls_info_s by up_stack_frame too
    3.Move the stack fork allocation from arch to sched

    Signed-off-by: Xiang Xiao <xiaoxiang@xiaomi.com>
```
2021-04-19 01:29:38 -05:00
Masayuki Ishikawa
64f46b7f7e arch: k210: Add coloration for the idle stacks
Summary:
- This commit adds coloration for the idle stacks

Impact:
- k210 only

Testing:
- Tested with smp and nsh configs with QEMU and dev board

Signed-off-by: Masayuki Ishikawa <Masayuki.Ishikawa@jp.sony.com>
2021-04-19 01:09:22 -05:00
Masayuki Ishikawa
44bc681daa arch: fe310: Add coloration for the idle stack
Summary:
- This commit adds coloration for the idle stack
- Also, apply la pseudo-instruction instead of lui and addi

Impact:
- fe310 only

Testing:
- Tested with nsh with QEMU and dev board

Signed-off-by: Masayuki Ishikawa <Masayuki.Ishikawa@jp.sony.com>
2021-04-19 01:05:40 -05:00
Yuichi Nakamura
048802bcd2 arm/rp2040: Add RP2040 I2S driver 2021-04-19 09:39:51 +09:00
Yuichi Nakamura
41b193e07f arm/rp2040: Add RP2040 PIO APIs 2021-04-19 09:39:51 +09:00
David Sidrane
c801de4201 stm32h7:Serial Add RX and TX DMA
stm32h7:Serial Use Idel to poll RX DMA

stm32h7:Serial Do not loop in an ISR!

stm32h7:Serial signal txdma completion with semaphore

stm32h7:Serial Apply formatting suggestions from code review

Co-authored-by: Mateusz Szafoni <raiden00pl@gmail.com>

stm32h7: Serail Add Power Managment (Untested)
2021-04-17 09:56:41 +02:00
Xiang Xiao
2335b69120 arch: Allocate the space from the beginning in up_stack_frame
arch: Allocate the space from the beginning in up_stack_frame

and modify the affected portion:
1.Correct the stack dump and check
2.Allocate tls_info_s by up_stack_frame too
3.Move the stack fork allocation from arch to sched

Signed-off-by: Xiang Xiao <xiaoxiang@xiaomi.com>
2021-04-16 12:41:41 +09:00
Xiang Xiao
8640d82ce0 arch: Rename g_intstackbase to g_intstacktop
Signed-off-by: Xiang Xiao <xiaoxiang@xiaomi.com>
2021-04-16 12:41:41 +09:00
David Sidrane
3feb3a247d stm32:Serial DMA config USART{4578} -> UART{4578} 2021-04-15 21:26:32 -05:00
raiden00pl
82ce1de7cd stm32/stm32_foc: remove the debug message before the calibration start
For unknown reasons this message may interferre with the calibration
procedure and result in invalid calibariton data.
We leave only a message informing about the end of the the calibration.
The problem was observed for STM32G4 + IHM16M1.
2021-04-15 06:37:15 -05:00
raiden00pl
13f62d15cc stm32/stm32_foc: do not enable PWM outputs that are not in use 2021-04-15 06:37:15 -05:00
YAMAMOTO Takashi
3806803a7a arch/xtensa/src/esp32/esp32_user.c: Implement L16SI emulation
I don't know why this was not necessary before.
Probably I was just lucky about the combination of configs.
Or maybe some of recent changes happened to make the compiler
to use the instruction.

```
400d38f0 <mm_givesemaphore>:
400d38f0:       004136          entry   a1, 32
400d38f3:       228c            beqz.n  a2, 400d38f9 <mm_givesemaphore+0x9>
400d38f5:       0228            l32i.n  a2, a2, 0
400d38f7:       52cc            bnez.n  a2, 400d3900 <mm_givesemaphore+0x10>
400d38f9:       fea0b2          movi    a11, 254
400d38fc:       000306          j       400d390c <mm_givesemaphore+0x1c>
400d38ff:       00              .byte 00
400d3900:       019232          l16si   a3, a2, 2
400d3903:       feebe5          call8   400d27c0 <getpid>
400d3906:       0813a7          beq     a3, a10, 400d3912 <mm_givesemaphore+0x22>
400d3909:       05a1b2          movi    a11, 0x105
400d390c:       f241a1          l32r    a10, 400d0210 <_stext+0x1f0>
400d390f:       ff23e5          call8   400d2b4c <_assert>
400d3912:       1288            l32i.n  a8, a2, 4
400d3914:       0828a6          blti    a8, 2, 400d3920 <mm_givesemaphore+0x30>
400d3917:       880b            addi.n  a8, a8, -1
400d3919:       1289            s32i.n  a8, a2, 4
400d391b:       000606          j       400d3937 <mm_givesemaphore+0x47>
400d391e:       00              .byte 00
400d391f:       00              .byte 00
400d3920:       ffaf82          movi    a8, -1
400d3923:       015282          s16i    a8, a2, 2
400d3926:       00a082          movi    a8, 0
400d3929:       016282          s32i    a8, a2, 4
400d392c:       02ad            mov.n   a10, a2
400d392e:       feb125          call8   400d2440 <sem_post>
400d3931:       19a1b2          movi    a11, 0x119
400d3934:       fd4a96          bltz    a10, 400d390c <mm_givesemaphore+0x1c>
400d3937:       f01d            retw.n
400d3939:       000000          ill
```
2021-04-15 12:18:52 +01:00
YAMAMOTO Takashi
a28de1d681 arch/xtensa/src/esp32/esp32_user.c: Fix S16I/L16LU emulation
I misunderstood how imm8 is used to calculate the address.
2021-04-15 12:18:52 +01:00
Anthony Merlino
b1f637a6ea stm32h7: Don't automatically select HSI48 as it may depend on USBSEL.
Add preprocessor logic that can catch the condition where the board is selecting the HSI48 as the USBSEL source, but the HSI48 isn't enabled.
2021-04-15 02:00:37 -07:00
Anthony Merlino
4c8d70dd2e stm32h7: Initialize CSI and HSI48 clocks as needed based on enabled peripherals. 2021-04-15 02:00:37 -07:00
YAMAMOTO Takashi
51490bad55 modlib: Implement sh_addralign handling
I've seen a module with 16 bytes .rodata alignment for xmm operations.
It was getting SEGV on sim/Linux because of the alignment issue.
The same module binary seems working fine after applying this patch.

Also, tested on sim/macOS and esp32 on qemu,
using a module with an artificially large alignment. (64 bytes)
2021-04-14 21:17:07 -05:00
jturnsek
33b071ecb9 MIMXRT1064-EVK support 2021-04-14 14:57:26 -07:00
raiden00pl
ad8c09d0a1 stm32: include support for TIMERS_V3 2021-04-14 10:53:50 -04:00
raiden00pl
7c11397469 stm32: add definitions for TIMERS_V3. All credit goes to Nathan Hartman (hartmannathan) 2021-04-14 10:53:50 -04:00
raiden00pl
6d69600905 stm32/Kconfig: move configuration common for G4 under STM32_STM32G4XXX option 2021-04-14 10:53:50 -04:00
Marco Krahl
8456f3615e drivers/1wire: Moves header and adjusts include paths
Moves header to 1wire include sub directory.
Moves over common crc definitions to new interface.

Signed-off-by: Marco Krahl <ocram.lhark@gmail.com>
2021-04-14 02:49:28 -05:00
raiden00pl
beebb57445 stm32g4xx: add support for FOC 2021-04-13 14:38:28 -05:00
raiden00pl
835b129c94 stm32g4xx: add DBGMCU definitions 2021-04-13 14:38:28 -05:00
Anthony Merlino
9c8c2b0db2 Separate CLOCK_TIMEKEEPING and SCHED_TICKLESS. 2021-04-13 11:42:31 -05:00
raiden00pl
c90a6bdf2b stm32/Kconfig: enable ADCx DMA support if DMAMUX enabled 2021-04-13 12:08:17 -03:00
raiden00pl
bf04ef9a3c stm32g4: add support for DMA (DMAMUX) 2021-04-13 12:08:17 -03:00
raiden00pl
fbb7e95ebf stm32g4xxxx_dmamux.h: rename defs to match other chips and add DMAMAP defs 2021-04-13 09:20:18 -05:00
raiden00pl
a735252d78 stm32h7,stm32g0: fix typos in DMAMUX 2021-04-13 09:20:18 -05:00
raiden00pl
62001bff3b stm32g4xx: add support for PWM 2021-04-13 09:19:52 -05:00
raiden00pl
4c741bc9a5 stm32/Kconfig: G4 chips use TIMERS_V2 2021-04-13 09:19:52 -05:00
raiden00pl
ff2ae3e894 stm32g4xx: add support for ADC 2021-04-13 09:29:09 -03:00
Alin Jerpelea
20d315abfe NuttX: Falker Atomacao Agrícola Ltda: update licenses to Apache
Falker Atomacao Agrícola Ltda has submitted the SGA and we can migrate the licenses
 to Apache.

Signed-off-by: Alin Jerpelea <alin.jerpelea@sony.com>
2021-04-13 05:28:28 -05:00
Anthony Merlino
1a5a7a1b63 stm32h7: Allow OTGHS to use internal FS PHY 2021-04-12 23:21:34 -05:00
Jukka Laitinen
3f6bb76e01 arch/arm/src/stm32f7/stm32_allocateheap.c: Fix MPU alignments
Change the logic for allocating user heap for PROTECTED_BUILD:
- Don't rely on SRAM1_END alignment
- Make better use of MPU subregions when allocating the heap
- Don't duplicate the calculation of user heap start in kernel heap
  allocation; use the previous calculation directly

Signed-off-by: Jukka Laitinen <jukkax@ssrc.tii.ae>
2021-04-12 23:20:18 -05:00
Jukka Laitinen
ea36c2c7ea Remove MPU_RASR_S bit from stm32f7 MPU user mode intsram configration
For some reason, setting the "shareable" bit makes the SRAM not writable

Signed-off-by: Jukka Laitinen <jukkax@ssrc.tii.ae>
2021-04-12 23:20:18 -05:00
Xiang Xiao
3f9908f7d1 Remove the unnecessary math.h inclusion
or move from header file to source file since math.h doesn't always exist

Signed-off-by: Xiang Xiao <xiaoxiang@xiaomi.com>
2021-04-12 22:58:23 -04:00
Anthony Merlino
2b46a0fdde stm32h7: Adds guards around stm32_iocompensation. 2021-04-12 15:08:52 -07:00
Anthony Merlino
a45b8cc17c stm32h7: Add support for IO compensation. 2021-04-12 15:08:52 -07:00
jturnsek
bbe875876d Modified FlexSPI driver 2021-04-12 17:22:14 -03:00
jturnsek
7453e76d98 FlexSPI NOR driver 2021-04-12 11:35:44 -03:00
Dong Heng
31854ca135 riscv/esp32c3: Fix heap end address 2021-04-12 01:36:11 -05:00
Masayuki Ishikawa
7ce1033aa2 arch: k210: Fix interrupt stack corruption in SMP mode
Summary:
- I noticed that stack corruption happens due to recent refactoring
- This commit fixes this issue

Impact:
- SMP only

Testing:
- Tested with maix-bit:smp (QMU and dev board)

Signed-off-by: Masayuki Ishikawa <Masayuki.Ishikawa@jp.sony.com>
2021-04-11 13:00:40 -05:00
Alan Carvalho
ac5fb7d701 esp32: Fix GPIO Pull-Up/Pull-Down using RTC GPIO
Some ESP32 GPIO pins (2, 4, 12, 13, 25, 27, 32) weren't accepting
pull-up/pull-down resistors. These pins are RTC GPIO pins and need
to have pull-up/pull-down configured in the RTC registers.

Co-authored-by: Gustavo Henrique Nihei <gustavo.nihei@espressif.com>
2021-04-11 14:36:02 +01:00
raiden00pl
cf645fc9ba arch/arm/src/stm32/stm32_foc.c: add modifications to support STM32F1
- generalize DBGMCU for PWM timer
- use ADC common data only if coupled ADC present
- rename some ADC definitions that collide with stm32_adc.h
2021-04-11 03:52:21 -05:00
raiden00pl
021a89569d arch/arm/src/stm32: introduce DBGMCU IP core versions 2021-04-11 03:52:21 -05:00
raiden00pl
3caf26fe3e arch/arm/src/stm32/stm32_adc.c: support adc_inj_startconv also for STM32F1 2021-04-11 03:52:21 -05:00
Anthony Merlino
2aa2b7669f stm32f7 tickless: Fix handling of overflow for different width timers. 2021-04-10 23:38:16 -05:00
Anthony Merlino
f979dd72c1 stm32/stm32f7 tickless: Fix clearing and checking of interrupts. 2021-04-10 23:38:16 -05:00
Anthony Merlino
dd00c6427e stm32 tickless: Fixes printf warnings 2021-04-10 23:38:16 -05:00
Xiang Xiao
3f67c67aaf arch: Fix the stack boundary calculation and check
All supported arch uses a push-down stack:
The stack grows toward lower addresses in memory. The stack pointer
register points to the lowest, valid working address (the "top" of
the stack). Items on the stack are referenced as positive(include zero)
word offsets from sp.
Which means that for stack in the [begin, begin + size):
1.The initial SP point to begin + size
2.push equals sub and then store
3.pop equals load and then add

Signed-off-by: Xiang Xiao <xiaoxiang@xiaomi.com>
2021-04-10 08:39:54 -07:00
Alin Jerpelea
7424683d29 arch: lpc17xx_40xx: Mixed Case Identifier fix
Fix for Mixed Case Identifier reported by nxstyle.

Signed-off-by: Alin Jerpelea <alin.jerpelea@sony.com>
2021-04-10 06:46:32 -05:00
Alin Jerpelea
6f5537eae2 arch: lpc2378: Fix for Mixed Case Identifier errors
Fix for Mixed Case Identifier errors reported by nxstyle tool

Signed-off-by: Alin Jerpelea <alin.jerpelea@sony.com>
2021-04-10 06:46:32 -05:00
Alin Jerpelea
08612337f6 NuttX: nxstyle fixes
nxstyle fixes to pass CI.

Signed-off-by: Alin Jerpelea <alin.jerpelea@sony.com>
2021-04-10 06:42:19 -05:00
Alin Jerpelea
eac1d28aae NuttX: Janne Rosberg: update licenses to Apache
Janne Rosberg has submitted the ICLA and we can migrate the licenses
 to Apache.

David Sidrane has submitted the ICLA and we can migrate the licenses
 to Apache.

Ivan Ucherdzhiev has submitted the ICLA and we can migrate the licenses
 to Apache.

Gregory Nutt has submitted the SGA and we can migrate the licenses
 to Apache.

Signed-off-by: Alin Jerpelea <alin.jerpelea@sony.com>
2021-04-10 06:42:19 -05:00
Alin Jerpelea
a2813b142f NuttX: Jose Pablo Carballo: update licenses to Apache
Jose Pablo Carballo has submitted the ICLA and we can migrate the licenses
 to Apache.

Gregory Nutt has submitted the SGA and we can migrate the licenses
 to Apache.

Signed-off-by: Alin Jerpelea <alin.jerpelea@sony.com>
2021-04-10 06:42:19 -05:00
Alin Jerpelea
231b8518b7 NuttX: Ken Pettit: update licenses to Apache
Ken Pettit has submitted the ICLA and we can migrate the licenses
 to Apache.

Sebastien Lorquet has submitted the ICLA and we can migrate the licenses
 to Apache.

Gregory Nutt has submitted the SGA and we can migrate the licenses
 to Apache.

Signed-off-by: Alin Jerpelea <alin.jerpelea@sony.com>
2021-04-10 06:42:19 -05:00
Xiang Xiao
0fdde5be26 arch/esp32: Fix error: Mixed case identifier found
Signed-off-by: Xiang Xiao <xiaoxiang@xiaomi.com>
2021-04-10 12:00:06 +01:00
Alin Jerpelea
3c939c42fb arch: x86: Mixed Case Identifier fix
Fix for Mixed Case Identifier reported by nxstyle tool

Signed-off-by: Alin Jerpelea <alin.jerpelea@sony.com>
2021-04-09 08:04:41 -05:00
Alin Jerpelea
3b576758f1 arch: z80: nxstyle fixes
Fix for TABs and Mixed Case identifiers reported by nxstyle

Signed-off-by: Alin Jerpelea <alin.jerpelea@sony.com>
2021-04-09 08:04:41 -05:00
chenwen
4ca34ac5b5 risc-v/esp32c3: Fix the issue of getting wrong Wi-Fi password 2021-04-09 03:44:29 -05:00
Anthony Merlino
d37275f348 stm32f7: Freeze tickless timer during debug halt. 2021-04-08 23:38:00 -05:00
Gustavo Henrique Nihei
4d4250fcca xtensa/esp32: Improve SPI polling to use the entire HW buffer 2021-04-08 23:36:28 -05:00
chenwen
a41d37cffd arch/risc-v/src/common/riscv_initialize.c: Add telnet_initialize to riscv's up_initialize 2021-04-08 23:18:32 -05:00
Alin Jerpelea
e1d8b62209 arch: lpc43xx: spifilib_fam_standard_cmd.c: fix nxstyle errors
fix errors reported by nxstyle tool

Signed-off-by: Alin Jerpelea <alin.jerpelea@sony.com>
2021-04-08 22:49:09 -05:00
Alin Jerpelea
42d17dcaf4 arch: lpc43xx: Mixed Case Identifier fix
Fix for Mixed Case Identifier reported by nxstyle tool.

Signed-off-by: Alin Jerpelea <alin.jerpelea@sony.com>
2021-04-08 22:48:46 -05:00
Alin Jerpelea
602d384325 arch: tms570: fix Mixed Case Identifier
Fix Mixed Case Identifier reported by nxstyle tool

Signed-off-by: Alin Jerpelea <alin.jerpelea@sony.com>
2021-04-08 22:48:46 -05:00
Alin Jerpelea
37b314f29f LICENSE: add 3rd party license for Texas Instruments Incorporated
Add 3rd party licenses for Texas Instruments Incorporated to the LICENSE file.

Signed-off-by: Alin Jerpelea <alin.jerpelea@sony.com>
2021-04-08 22:48:46 -05:00
Alin Jerpelea
12aebdf1a6 LICENSE: add 3rd party license for Infineon Technologies AG
Add 3rd party licenses for Infineon Technologies AG to the LICENSE file.

Signed-off-by: Alin Jerpelea <alin.jerpelea@sony.com>
2021-04-08 22:48:46 -05:00
Alin Jerpelea
8dcd16d5a6 arch: arm: nxstyle fixes
Fixes for nxstyle warnigs

Signed-off-by: Alin Jerpelea <alin.jerpelea@sony.com>
2021-04-08 22:48:46 -05:00
Alin Jerpelea
d2e7ea05c6 NuttX: typo fix
Yype fix for Public Functions reported by nxstyle

Signed-off-by: Alin Jerpelea <alin.jerpelea@sony.com>
2021-04-08 22:48:46 -05:00
Alin Jerpelea
628d8ca9e1 arch: mips: nxstyle fixes
fixes for errors reported by nxstyle

Signed-off-by: Alin Jerpelea <alin.jerpelea@sony.com>
2021-04-08 11:41:02 -03:00
Xiang Xiao
27425f3035 arch/z80: Remove the temporary file ez80_serial.c.SAVE
Signed-off-by: Xiang Xiao <xiaoxiang@xiaomi.com>
2021-04-08 11:07:12 +02:00
Masayuki Ishikawa
445770a600 arch: sim: Refactor signal handling
Summary:
- This commit refactors signal handling logic

Impact:
- None

Testing:
- Tested with sim:smp and sim:ostest

Signed-off-by: Masayuki Ishikawa <Masayuki.Ishikawa@jp.sony.com>
2021-04-08 01:59:31 -05:00
Matias N
ab206687bb Replace wrong inclusion of sys/errno.h (toolchain provided) with errno.h 2021-04-07 21:27:06 -05:00
Alin Jerpelea
cb2ecefbf1 arch: xtensa: fix nxstyle errors
Fix for errors reported by nxstyle tool

Signed-off-by: Alin Jerpelea <alin.jerpelea@sony.com>
2021-04-07 21:21:51 -05:00
Alin Jerpelea
bc5f0092f1 arch: x86: fix Mixed Case errors
Fix for Mixed Case errors reported by the nxstyle tool

Signed-off-by: Alin Jerpelea <alin.jerpelea@sony.com>
2021-04-07 21:21:51 -05:00
Gregory Nutt
a9e2195e65 Remove unused 'running' field from freerun lower half drivers.
That field is never used and, in most cases, is never initialized correctly.

This should have no impact to anything with the possible exception of free-running drivers.

Verified using CI builds only.
2021-04-07 20:35:50 -03:00
Matias N
d88b5aac97 esp32: move common XTAL and RUN_IRAM configs to ESP32 KConfig 2021-04-07 21:45:48 +01:00
Alin Jerpelea
2c4e9e7664 arch: x86_64: fix Mixed Case errors
Fix for Mixed Case errors reported by nxstyle tool

Signed-off-by: Alin Jerpelea <alin.jerpelea@sony.com>
2021-04-07 10:48:26 -05:00
Alin Jerpelea
72fb895d41 arch: x86_64: fix nxstyle errors
Fix for errors reported by nxstyle tool

Signed-off-by: Alin Jerpelea <alin.jerpelea@sony.com>
2021-04-07 10:48:26 -05:00
Alin Jerpelea
abdc60e72f arch: samXX: Gregory Nutt: update licenses to Apache
Gregory Nutt has submitted the SGA and we can migrate the licenses
 to Apache.

Signed-off-by: Alin Jerpelea <alin.jerpelea@sony.com>
2021-04-07 06:43:20 -05:00
Alin Jerpelea
9be2db897d arch: sam: move references from License header
for compliance references should be moved after the license header

Signed-off-by: Alin Jerpelea <alin.jerpelea@sony.com>
2021-04-07 06:43:20 -05:00
Alin Jerpelea
74cde4f9bf arch: armv7-r: Gregory Nutt: update licenses to Apache
Gregory Nutt has submitted the SGA and we can migrate the licenses
 to Apache.

Signed-off-by: Alin Jerpelea <alin.jerpelea@sony.com>
2021-04-07 06:43:20 -05:00
Alin Jerpelea
68cd957c62 arch: armv7-r: move references from License header
for compliance references should be moved after the license header

Signed-off-by: Alin Jerpelea <alin.jerpelea@sony.com>
2021-04-07 06:43:20 -05:00
Alin Jerpelea
ce08e0ca6c arch: armv7-a: move references from License header
for compliance references should be moved after the license header

Signed-off-by: Alin Jerpelea <alin.jerpelea@sony.com>
2021-04-07 06:43:20 -05:00
Xiang Xiao
bfbe705e3f arch/arm: Fix nxstyle warning
Signed-off-by: Xiang Xiao <xiaoxiang@xiaomi.com>
2021-04-07 16:18:27 +09:00
Xiang Xiao
eeb8931c04 arch/arm: align arm vector related code with armv7-a
commit 3c30c8b90b
Author: Xiang Xiao <xiaoxiang@xiaomi.com>
Date:   Tue Apr 6 15:47:27 2021 +0800

    arch/arm: Remove g_irqtmp, g_undeftmp and g_aborttmp

    to avoid multiple CPU access them concurrently in SMP case

Signed-off-by: Xiang Xiao <xiaoxiang@xiaomi.com>
2021-04-07 16:18:27 +09:00
Xiang Xiao
0779f34390 arch/arm: Add PSR_ prefix to the mode state like armv7-a
no real function change

Signed-off-by: Xiang Xiao <xiaoxiang@xiaomi.com>
2021-04-07 16:18:27 +09:00
Anthony Merlino
01fabe6c67 stm32h7: Actually use the AXI SRAM as the main heap as the documentation describes.
The comments at the top of the file say this:
```
This will be automatically registered
 * - AXI SRAM is a 512kb memory area. This will be automatically registered
 *      with the system heap in up_allocate_heap, all the other memory
 *      regions will be registered in arm_addregion().
```

but the implementation was using SRAM123 instead. Furthermore, arm_addregion then re-adds SRAM123 again.
2021-04-06 22:47:20 -05:00
Anthony Merlino
d69cd4ba03 stm32h7: Adds stm32_dbgmcu.h to match stm32f7 port. 2021-04-06 22:44:07 -05:00
Anthony Merlino
3a10f88bdf stm32h7: Fixes bug in stm32_sdmmc.c where DCACHE guards were blocking a needed variable. 2021-04-06 22:43:27 -05:00
Anthony Merlino
068e71d0c6 stm32h7: Expose flash lock, unlock, and write protect functions to boards. 2021-04-06 22:42:52 -05:00
Anthony Merlino
8c73ea68d6 stm32f7: Remove the one and only reference to STM32_BOARD_HCLK. 2021-04-06 22:42:06 -05:00
Xiang Xiao
a7f7796db1 arch/arm: Change all spsr_cxsf to spsr
unify the SPSR register usage

Signed-off-by: Xiang Xiao <xiaoxiang@xiaomi.com>
2021-04-07 06:44:37 +09:00
Alin Jerpelea
72041911ce NuttX: Marco Krahl: update licenses to Apache
Marco Krahl has submitted the ICLA and we can migrate the licenses
 to Apache.

Gregory Nutt, S.A has submitted the SGA and we can migrate the licenses
 to Apache.

Signed-off-by: Alin Jerpelea <alin.jerpelea@sony.com>
2021-04-06 12:50:41 -05:00
Sara Souza
0926e7c578 risc-v/esp32-c3: Fixes gargabe UART issue, refactors serial driver, changes default pins of UART 1 and fixes low baud rate issue. 2021-04-06 11:44:06 -03:00
Xiang Xiao
3c30c8b90b arch/arm: Remove g_irqtmp, g_undeftmp and g_aborttmp
to avoid multiple CPU access them concurrently in SMP case

Signed-off-by: Xiang Xiao <xiaoxiang@xiaomi.com>
2021-04-06 22:45:51 +09:00
Xiang Xiao
822bb3ff78 arch/armv7-r: Add FIQ stack CONFIG_ARCH_INTERRUPTSTACK > 7
just like what has done on armv7-a

Signed-off-by: Xiang Xiao <xiaoxiang@xiaomi.com>
2021-04-06 22:45:51 +09:00
Fotis Panagiotopoulos
1dee243e29 syslog: Added multi device support in syslog_device. 2021-04-06 07:32:23 -05:00
Xiang Xiao
7d3266461b arch/armv7-a: Remove the special process of the nest level
it shouldn't need anymore

Signed-off-by: Xiang Xiao <xiaoxiang@xiaomi.com>
2021-04-06 17:07:46 +09:00
Anthony Merlino
b21cb3308a Fixes race condition in event wait logic of SDMMC driver.
This change makes it so that the timeout is set as part of the SDIO_WAITENABLE call instead of the SDIO_EVENTWAIT call. By doing so, you eliminate all opportunity for a race condition.

stm32h7:sdmmc Check if busy ended early
2021-04-05 23:08:45 -05:00
Xiang Xiao
807d4490da arch/arm: Minor style fix
Signed-off-by: Xiang Xiao <xiaoxiang@xiaomi.com>
2021-04-05 13:19:20 -07:00
Xiang Xiao
39fc9325cf arch/arm: Replace "b lr" or "mov pc, lr" with "bx lr"
Signed-off-by: Xiang Xiao <xiaoxiang@xiaomi.com>
2021-04-05 05:50:14 -07:00
Xiang Xiao
be50a24e3d arch/arm: Clear .bss section after copying .data section
to avoid batch copy(32 bytes) overwrite the zeroed .bss section

Signed-off-by: Xiang Xiao <xiaoxiang@xiaomi.com>
2021-04-05 05:48:20 -07:00
Xiang Xiao
d1e06b4c09 arch/arm: Call arm_lowputc after SP setup
Signed-off-by: Xiang Xiao <xiaoxiang@xiaomi.com>
2021-04-05 05:48:20 -07:00
Xiang Xiao
dd1d980c3a arch/sim: Move setjmp/longjmp to libc/machine/sim
Signed-off-by: Xiang Xiao <xiaoxiang@xiaomi.com>
2021-04-05 09:00:42 -03:00
Xiang Xiao
9097244cb8 build: Makefile should reference CONFIG_HOST_xxx
instead to detect the host through uname

Signed-off-by: Xiang Xiao <xiaoxiang@xiaomi.com>
2021-04-04 23:20:35 -07:00
Xiang Xiao
e91a737310 arch/arm: Remove .cpu directive from assemble file
1.To support the different MCU in series(e.g. cortex-m0+)
2.It's redundant since we already specify in compliler option

Signed-off-by: Xiang Xiao <xiaoxiang@xiaomi.com>
2021-04-04 17:29:42 -07:00
Xiang Xiao
b7ad0b3d0d arch/armv6-m: Remove cpsid and cpsie from exception_common
since the hardware do the action automatically

Signed-off-by: Xiang Xiao <xiaoxiang@xiaomi.com>
2021-04-04 17:26:49 -07:00
Xiang Xiao
3cf070e173 arch/armv8-m: Merge ite instruction to the previous one
Signed-off-by: Xiang Xiao <xiaoxiang@xiaomi.com>
2021-04-04 17:26:07 -07:00
Xiang Xiao
d62ae03bf8 arch: Move setjmp/longjmp to libc/machine
Signed-off-by: Xiang Xiao <xiaoxiang@xiaomi.com>
2021-04-04 16:30:37 -07:00
Nathan Hartman
92c61058c1 arch/stm32h7: Fix syntax error
arch/arm/src/stm32h7/stm32_dma.c:

     * stm32_bdma_residual(): Fix missing semicolon.
2021-04-04 22:32:09 +01:00
Xiang Xiao
e7dffdf06f arch/arm: Replace the hardcode syscall number with macro
and change SYS_context_[save|restore] to SYS_[save|restore]_context

Signed-off-by: Xiang Xiao <xiaoxiang@xiaomi.com>
2021-04-04 16:18:10 -03:00
Xiang Xiao
2268c19171 arch/arm: Fix the style issue in assemble files
remove the unused header file and mimic the difference between sub arch

Signed-off-by: Xiang Xiao <xiaoxiang@xiaomi.com>
2021-04-04 14:39:16 +01:00
Alan C. Assis
4064e33bd4 stm32l4: Fix small typo on stm32l4_adc.h
Co-authored-by: Xiang Xiao <xiaoxiang781216@gmail.com>
2021-04-03 23:33:51 -05:00
Xiang Xiao
5f3a98b5a8 libc/assert: Reference the expression in all case
to avoid the warning "defined but not used"

Signed-off-by: Xiang Xiao <xiaoxiang@xiaomi.com>
Change-Id: I55b7c092d0f2e5882fc1784987657c10cdf2d90b
2021-04-03 21:00:41 +01:00
Alin Jerpelea
015a205ec6 arch: arm: David Sidrane: update licenses to Apache
David Sidrane has submitted the ICLA and we can migrate the licenses
 to Apache.

Mateusz Szafoni has submitted the ICLA and we can migrate the licenses
 to Apache.

Gregory Nutt has submitted the SGA and we can migrate the licenses
 to Apache.

Signed-off-by: Alin Jerpelea <alin.jerpelea@sony.com>
2021-04-03 09:36:43 -05:00
Alin Jerpelea
675bd7d97e arch: arm: stm32: Uros Platise : update licenses to Apache
Uros Platise has submitted the ICLA and we can migrate the licenses
 to Apache.

David Sdidrane has submitted the ICLA and we can migrate the licenses
 to Apache.

Gregory Nutt has submitted the SGA and we can migrate the licenses
 to Apache.

Signed-off-by: Alin Jerpelea <alin.jerpelea@sony.com>
2021-04-03 09:36:43 -05:00
Alin Jerpelea
f75c6cc7e4 arch: arm: Nicholas Chin: update licenses to Apache
Nicholas Chin has submitted the ICLA and we can migrate the licenses
 to Apache.

Gregory Nutt has submitted the SGA and we can migrate the licenses
 to Apache.

Signed-off-by: Alin Jerpelea <alin.jerpelea@sony.com>
2021-04-03 09:36:43 -05:00
Alin Jerpelea
51be18433d arch: arm: stm32: Paul A. Patience: update licenses to Apache
Paul A. Patience has submitted the ICLA and we can migrate the licenses
 to Apache.

David Sidrane has submitted the ICLA and we can migrate the licenses
 to Apache.

Gregory Nutt has submitted the SGA and we can migrate the licenses
 to Apache.

Signed-off-by: Alin Jerpelea <alin.jerpelea@sony.com>
2021-04-03 09:36:43 -05:00
Alin Jerpelea
b89f67459d arch: arm: stm32: Max Holtzberg: update licenses to Apache
Max Holtzberg has submitted the ICLA and we can migrate the licenses
 to Apache.

Gregory Nutt has submitted the SGA and we can migrate the licenses
 to Apache.

Signed-off-by: Alin Jerpelea <alin.jerpelea@sony.com>
2021-04-03 09:36:43 -05:00
Alin Jerpelea
6ceb0d8d9b arch: arm: imxrt: Actia Nordic AB: update licenses to Apache
Actia Nordic AB has submitted the SGA and we can migrate the licenses
 to Apache.

Gregory Nutt has submitted the SGA and we can migrate the licenses
 to Apache.

Signed-off-by: Alin Jerpelea <alin.jerpelea@sony.com>
2021-04-03 09:36:43 -05:00
Alan Carvalho de Assis
bac84de45f esp32c3: Add support to RNG driver
Co-authored-by: Gustavo Henrique Nihei <gustavo.nihei@espressif.com>
Co-authored-by: Abdelatif Guettouche <abdelatif.guettouche@espressif.com>
2021-04-03 07:20:03 -05:00
Alin Jerpelea
26fef3f6a1 NuttX: Fix nxtyle errors
Fix errors reported by nxstyle

Signed-off-by: Alin Jerpelea <alin.jerpelea@sony.com>
2021-04-03 04:20:31 -07:00
Alin Jerpelea
08e5378b11 NuttX: Gregory Nutt: update licenses to Apache
Several licenses were missed in the initial work

David Sidrane has submitted the ICLA and we can migrate the licenses
 to Apache.

Gregory Nutt has submitted the SGA and we can migrate the licenses
 to Apache.

Signed-off-by: Alin Jerpelea <alin.jerpelea@sony.com>
2021-04-03 04:20:31 -07:00
hotislandn
b4b175cb7f arch:rv64:add memory clobber to inline asm for syscall.
Signed-off-by: hotislandn <hotislandn@hotmail.com>
2021-04-03 00:54:23 -05:00
Alan C. Assis
18f88c35fc esp32: Fix small typo that will trigger an error when IPv6 is enabled 2021-04-03 00:53:02 -05:00
Alin Jerpelea
778f050102 arch: xtensa: Author Gregory Nutt: update licenses to Apache
Gregory Nutt has submitted the SGA and we can migrate the licenses
 to Apache.

Signed-off-by: Alin Jerpelea <alin.jerpelea@sony.com>
2021-04-02 03:14:31 -05:00
Gustavo Henrique Nihei
2d0e690803 xtensa/esp32: Refactor register access functions on SPI driver 2021-04-01 17:13:55 -03:00
raiden00pl
5bff5dc971 motor/foc: use motor debug messages in FOC files 2021-04-01 15:43:49 -03:00
Alin Jerpelea
7a29e1f5fb drivers: Nxstyle fixes
Nxstyle fixes to pass CI

Signed-off-by: Alin Jerpelea <alin.jerpelea@sony.com>
2021-04-01 12:13:12 -05:00
Alin Jerpelea
3d96d5f2ce arch: esp32: Mixed Case identifier fix
Fix Mixed Case Identifier reported by nxstyle

Signed-off-by: Alin Jerpelea <alin.jerpelea@sony.com>
2021-04-01 12:13:12 -05:00
Alin Jerpelea
b07780d13d arch: Nxstyle fixes
Nxstyle fixes to pass CI

Signed-off-by: Alin Jerpelea <alin.jerpelea@sony.com>
2021-04-01 12:13:12 -05:00
Alin Jerpelea
9b53451e42 arch: arm: cxd56: update licenses to Apache
Sony has submitted the SGA and we can migrate the licensed to Apacahe

Signed-off-by: Alin Jerpelea <alin.jerpelea@sony.com>
2021-04-01 12:13:12 -05:00
Alin Jerpelea
190582c764 boards: stm32: Laurent Latil: update licenses to Apache
Laurent Latil has submitted the ICLA and we can migrate the licenses
 to Apache.

Gregory Nutt has submitted the SGA and we can migrate the licenses
 to Apache.

Signed-off-by: Alin Jerpelea <alin.jerpelea@sony.com>
2021-04-01 12:13:12 -05:00
Alin Jerpelea
447d22da84 NuttX: Bob Feretich: update licenses to Apache
Bob Feretich has submitted the ICLA and we can migrate the licenses
 to Apache.

David Sidrane has submitted the ICLA and we can migrate the licenses
 to Apache.

Gregory Nutt has submitted the SGA and we can migrate the licenses
 to Apache.

Signed-off-by: Alin Jerpelea <alin.jerpelea@sony.com>
2021-04-01 12:13:12 -05:00
Alin Jerpelea
0f41c3c555 NuttX: Pierre-Noel Bouteville: update licenses to Apache
Pierre-Noel Bouteville has submitted the ICLA and we can migrate the licenses
 to Apache.

David Sidrane has submitted the ICLA and we can migrate the licenses
 to Apache.

Gregory Nutt has submitted the SGA and we can migrate the licenses
 to Apache.

Signed-off-by: Alin Jerpelea <alin.jerpelea@sony.com>
2021-04-01 12:13:12 -05:00
Alin Jerpelea
b4a33b5ec0 NuttX: Uros Platise: update licenses to Apache
Uros Platise has submitted the ICLA and we can migrate the licenses
 to Apache.

David Sidrane has submitted the ICLA and we can migrate the licenses
 to Apache.

Bob Feretich has submitted the ICLA and we can migrate the licenses
 to Apache.

Gregory Nutt has submitted the SGA and we can migrate the licenses
 to Apache.

Signed-off-by: Alin Jerpelea <alin.jerpelea@sony.com>
2021-04-01 12:13:12 -05:00
Alin Jerpelea
a9bc5732bc NuttX: Ivan Petrov Ucherdzhiev: update licenses to Apache
Ivan Petrov Ucherdzhiev has submitted the ICLA and we can migrate the licenses
 to Apache.

David Sidrane has submitted the ICLA and we can migrate the licenses
 to Apache.

Gregory Nutt has submitted the SGA and we can migrate the licenses
 to Apache.

Signed-off-by: Alin Jerpelea <alin.jerpelea@sony.com>
2021-04-01 12:13:12 -05:00
Alin Jerpelea
8f3ed4e25d arch: arm: am335x: Petro Karashchenko: update licenses to Apache
Petro Karashchenko has submitted the ICLA and we can migrate the licenses
 to Apache.

Ivan Petrov Ucherdzhiev has submitted the ICLA and we can migrate the licenses
 to Apache.

Gregory Nutt has submitted the SGA and we can migrate the licenses
 to Apache.

Signed-off-by: Alin Jerpelea <alin.jerpelea@sony.com>
2021-04-01 12:13:12 -05:00
Alin Jerpelea
8cb5c535b9 NuttX: Sebastien Lorquet: update licenses to Apache
Sebastien Lorquet has submitted the ICLA and we can migrate the licenses
 to Apache.

Alan Carvalho de Assis has submitted the ICLA and we can migrate the licenses
 to Apache.

Uros Platise has submitted the ICLA and we can migrate the licenses
 to Apache.

Gregory Nutt has submitted the SGA and we can migrate the licenses
 to Apache.

Signed-off-by: Alin Jerpelea <alin.jerpelea@sony.com>
2021-04-01 12:13:12 -05:00
Alin Jerpelea
78ccf7cb91 NuttX: Neil Hancock: update licenses to Apache
Neil Hancock has submitted the ICLA and we can migrate the licenses
 to Apache.

Mateusz Szafoni has submitted the ICLA and we can migrate the licenses
 to Apache.

David Sidrane has submitted the ICLA and we can migrate the licenses
 to Apache.

Gregory Nutt has submitted the SGA and we can migrate the licenses
 to Apache.

Signed-off-by: Alin Jerpelea <alin.jerpelea@sony.com>
2021-04-01 12:13:12 -05:00
Alin Jerpelea
5f9e7d6b33 NuttX: Actia Nordic AB: update licenses to Apache
Actia Nordic AB has submitted the SGA and we can migrate the licenses
 to Apache.

Gregory Nutt has submitted the SGA and we can migrate the licenses
 to Apache.

Signed-off-by: Alin Jerpelea <alin.jerpelea@sony.com>
2021-04-01 12:13:12 -05:00
Alin Jerpelea
4037e1d47a NuttX: 2G Engineering: update licenses to Apache
2G Engineering has submitted the SGA and we can migrate the licenses
 to Apache.

Gregory Nutt has submitted the SGA and we can migrate the licenses
 to Apache.

Signed-off-by: Alin Jerpelea <alin.jerpelea@sony.com>
2021-04-01 12:13:12 -05:00
Alin Jerpelea
f8aed9864d NuttX: Max Holtzberg: update licenses to Apache
Max Holtzberg has submitted the ICLA and we can migrate the licenses
 to Apache.

Gregory Nutt has submitted the SGA and we can migrate the licenses
 to Apache.

Signed-off-by: Alin Jerpelea <alin.jerpelea@sony.com>
2021-04-01 12:13:12 -05:00
Alin Jerpelea
4e26e39ffe arch: xtensa: Espressif Systems: update licenses to Apache
Espressif Systems has submitted the SGA and we can migrate the licenses
 to Apache.

Gregory Nutt has submitted the SGA and we can migrate the licenses
 to Apache.

Signed-off-by: Alin Jerpelea <alin.jerpelea@sony.com>
2021-04-01 12:13:12 -05:00
Alin Jerpelea
1631ad25c1 arm: stm32xx: Michael Jung: update licenses to Apache
Michael Jung has submitted the ICLA and we can migrate the licenses
 to Apache.

Gregory Nutt has submitted the SGA and we can migrate the licenses
 to Apache.

Signed-off-by: Alin Jerpelea <alin.jerpelea@sony.com>
2021-04-01 12:13:12 -05:00
Alin Jerpelea
08a1ba3a2b arch: arm: stm32h7: Jukka Laitinen: update licenses to Apache
Jukka Laitinen has submitted the ICLA and we can migrate the licenses
 to Apache.

David Sidrane has submitted the ICLA and we can migrate the licenses
 to Apache.

Gregory Nutt has submitted the SGA and we can migrate the licenses
 to Apache.

Signed-off-by: Alin Jerpelea <alin.jerpelea@sony.com>
2021-04-01 12:13:12 -05:00
Alin Jerpelea
ce66f7b081 NuttX: Johannes Schock: update licenses to Apache
Johannes Schock has submitted the ICLA and we can migrate the licenses
 to Apache.

Gregory Nutt has submitted the SGA and we can migrate the licenses
 to Apache.

Signed-off-by: Alin Jerpelea <alin.jerpelea@sony.com>
2021-04-01 12:13:12 -05:00
Alin Jerpelea
dade0c36ca NuttX: Mateusz Tomasz Szafoni: update licenses to Apache
Mateusz Tomasz Szafoni has submitted the ICLA and we can migrate the licenses
 to Apache.

Gregory Nutt has submitted the SGA and we can migrate the licenses
 to Apache.

Signed-off-by: Alin Jerpelea <alin.jerpelea@sony.com>
2021-04-01 12:13:12 -05:00
Alin Jerpelea
b84f45812e NuttX: Abdelatif Guettouche: update licenses to Apache
Abdelatif Guettouche has submitted the ICLA and we can migrate the licenses
 to Apache.

Gregory Nutt has submitted the SGA and we can migrate the licenses
 to Apache.

Signed-off-by: Alin Jerpelea <alin.jerpelea@sony.com>
2021-04-01 12:13:12 -05:00
Alin Jerpelea
642701639d arch: arm: samd2l2: update license to Apache
Vasilijev Alexand Anatoljevich has submitted the ICLA and we can migrate the licenses
 to Apache.

Alan Carvalho de Assis has submitted the ICLA and we can migrate the licenses
 to Apache.

Gregory Nutt has submitted the SGA and we can migrate the licenses
 to Apache.

Signed-off-by: Alin Jerpelea <alin.jerpelea@sony.com>
2021-04-01 12:13:12 -05:00
Alin Jerpelea
22eebf3edf arch: misoc: nxstyle fixes
Nxstyle fixes to pass CI

Signed-off-by: Alin Jerpelea <alin.jerpelea@sony.com>
2021-03-31 21:12:25 -05:00
Alin Jerpelea
6035e838da arch: misoc: Author Gregory Nutt: update licenses to Apache
Gregory Nutt has submitted the SGA and we can migrate the licenses
 to Apache.

Signed-off-by: Alin Jerpelea <alin.jerpelea@sony.com>
2021-03-31 21:12:25 -05:00
Alin Jerpelea
8c1456da6b arch: x86: nxstyle fixes
Nxstyle fixes to pass CI

Signed-off-by: Alin Jerpelea <alin.jerpelea@sony.com>
2021-03-31 21:12:25 -05:00
Alin Jerpelea
32339d55c6 arch: x86: Author Gregory Nutt: update licenses to Apache
Gregory Nutt has submitted the SGA and we can migrate the licenses
 to Apache.

Signed-off-by: Alin Jerpelea <alin.jerpelea@sony.com>
2021-03-31 21:12:25 -05:00
Alin Jerpelea
80ee1864df arch: sim: nxstyle fixes
Nxstyle fixes to pass CI

Signed-off-by: Alin Jerpelea <alin.jerpelea@sony.com>
2021-03-31 21:12:25 -05:00
Alin Jerpelea
41342c0a12 arch: sim: Author Gregory Nutt: update licenses to Apache
Gregory Nutt has submitted the SGA and we can migrate the licenses
 to Apache.

Signed-off-by: Alin Jerpelea <alin.jerpelea@sony.com>
2021-03-31 21:12:25 -05:00
Alin Jerpelea
b8db0014db arhc: avr: nxstyle fixes
nxstyle fixes to pass CI

Signed-off-by: Alin Jerpelea <alin.jerpelea@sony.com>
2021-03-31 21:12:05 -05:00
Alin Jerpelea
3e76370919 arch: avr: Author Gregory Nutt: update licenses to Apache
Gregory Nutt has submitted the SGA and we can migrate the licenses
 to Apache.

Signed-off-by: Alin Jerpelea <alin.jerpelea@sony.com>
2021-03-31 21:12:05 -05:00
Alin Jerpelea
28f593d7cf arch: hc: nxstyle fixes
nxstyle fixes to pass CI

Signed-off-by: Alin Jerpelea <alin.jerpelea@sony.com>
2021-03-31 21:12:05 -05:00
Alin Jerpelea
3bd4fe62e7 arch: hc: Author Gregory Nutt: update licenses to Apache
Gregory Nutt has submitted the SGA and we can migrate the licenses
 to Apache.

Signed-off-by: Alin Jerpelea <alin.jerpelea@sony.com>
2021-03-31 21:12:05 -05:00
raiden00pl
c1c4ca4ffd stm32/stm32_foc.c: add the lower-half FOC device support 2021-03-31 18:23:53 -03:00
Alin Jerpelea
106a471ef1 arch: z80: nxstyle fixes
nxstyle fixes to pass CI

Signed-off-by: Alin Jerpelea <alin.jerpelea@sony.com>
2021-03-31 09:17:54 -07:00
Alin Jerpelea
4802b096c5 arch: z80: Author Gregory Nutt: update licenses to Apache
Gregory Nutt has submitted the SGA and we can migrate the licenses
 to Apache.

Signed-off-by: Alin Jerpelea <alin.jerpelea@sony.com>
2021-03-31 09:17:54 -07:00
Alin Jerpelea
67bd7824e4 arch: z16: nxstyle fixes
nxstyle fixes to pass CI

Signed-off-by: Alin Jerpelea <alin.jerpelea@sony.com>
2021-03-31 09:17:54 -07:00
Alin Jerpelea
7f19d910ef arch: z16: Author Gregory Nutt: update licenses to Apache
Gregory Nutt has submitted the SGA and we can migrate the licenses
 to Apache.

Signed-off-by: Alin Jerpelea <alin.jerpelea@sony.com>
2021-03-31 09:17:54 -07:00
Alin Jerpelea
7e2ee8b9bb arch: or1k: nxstyle fixes
Nxstyle fixes to pass CI

Signed-off-by: Alin Jerpelea <alin.jerpelea@sony.com>
2021-03-31 08:48:51 -07:00
Alin Jerpelea
fd512dcc4b arch: or1k: Author Gregory Nutt: update licenses to Apache
Gregory Nutt has submitted the SGA and we can migrate the licenses
 to Apache.

Signed-off-by: Alin Jerpelea <alin.jerpelea@sony.com>
2021-03-31 08:48:51 -07:00
Alin Jerpelea
5d633d7e0b arch: risc-V: Author Gregory Nutt: update licenses to Apache
Gregory Nutt has submitted the SGA and we can migrate the licenses
 to Apache.

Signed-off-by: Alin Jerpelea <alin.jerpelea@sony.com>
2021-03-31 08:48:51 -07:00
Alin Jerpelea
fe0ee48c69 arch: renesas: nxstyle fixes
Nxstyle fixes to pass CI

Signed-off-by: Alin Jerpelea <alin.jerpelea@sony.com>
2021-03-31 08:48:51 -07:00
Alin Jerpelea
0ae3469782 arch: renesas: Author Gregory Nutt: update licenses to Apache
Gregory Nutt has submitted the SGA and we can migrate the licenses
 to Apache.

Signed-off-by: Alin Jerpelea <alin.jerpelea@sony.com>
2021-03-31 08:48:51 -07:00
Alin Jerpelea
c6f60ad3f0 arch: mips:Mixed case identifier fix
Fix for Mixed case identifier found in pic32mz_timer.h

Signed-off-by: Alin Jerpelea <alin.jerpelea@sony.com>
2021-03-31 08:48:33 -07:00
Alin Jerpelea
29529e8758 arch: mips: nxstyle fixes
Nxstyle fixed to pass CI

Signed-off-by: Alin Jerpelea <alin.jerpelea@sony.com>
2021-03-31 08:48:33 -07:00
Alin Jerpelea
f3f10a3b96 arch: mips: Author Gregory Nutt: update licenses to Apache
Gregory Nutt has submitted the SGA and we can migrate the licenses
 to Apache.

Signed-off-by: Alin Jerpelea <alin.jerpelea@sony.com>
2021-03-31 08:48:33 -07:00
Matias N
8ed2bb8eb5 esp32: remove unneeded "INFO" and "ERROR" prefixes to syslog calls 2021-03-31 07:37:18 -03:00
raiden00pl
168355a40b sim: add the simulated lower-half FOC device 2021-03-31 04:32:26 -05:00
Matias N
a5a435e98f esp32: remove extra initial newline on syslog call 2021-03-31 10:04:42 +01:00
Alin Jerpelea
c6c36e1e65 arch: arm: stm: fix nxstyle errors
Fix nxstyle errors to pass CI

Signed-off-by: Alin Jerpelea <alin.jerpelea@sony.com>
2021-03-31 00:59:15 -05:00
Alin Jerpelea
6ff1648b4f arch: arm: stm: Author Gregory Nutt: update licenses to Apache
Gregory Nutt has submitted the SGA and we can migrate the licenses
 to Apache.

Signed-off-by: Alin Jerpelea <alin.jerpelea@sony.com>
2021-03-31 00:59:15 -05:00
Jiuzhu Dong
1c74d8042a rtc/rpmsg: support server and client to set time each other
Change-Id: I5d13f424cb636a79a9fd98c275786771c213ddb8
Signed-off-by: Jiuzhu Dong <dongjiuzhu1@xiaomi.com>
2021-03-30 22:41:12 -05:00
Nathan Hartman
4716fc929d arch/stm32h7 - Fix HEAP clobbering static data in SRAM4
Normally, statically allocated data goes in .bss, followed by the
initial stack, followed by HEAP. However, any data that is statically
allocated in SRAM4 with __attribute__ ((section (".sram4"))) will
clobber, and be clobbered by, the HEAP.

On STM32H7, BDMA can only access SRAM4. Therefore any BDMA buffers (or
any other data) placed in SRAM4 will expose this problem. In one case,
this manifested as a failure of NSH to start, because the SPI6 BDMA
buffers clobbered the /dev/console inode structs, which the OS
allocated earlier.

This PR ensures that only the rest of SRAM4, after any static data, is
added to the heap. This PR also allows SRAM4 to be completely excluded
from the heap by a new Kconfig, CONFIG_STM32H7_SRAM4EXCLUDE, similar
to what CONFIG_STM32H7_DTCMEXCLUDE does for the DTCM region.

Change required in linker scripts:

Every STM32H7 linker script must replace this:

    .sram4 :
    {
    } > sram4

with this:

    .sram4_reserve (NOLOAD) :
    {
        *(.sram4)
        . = ALIGN(4);
        _sram4_heap_start = ABSOLUTE(.);
    } > sram4

or link will fail with: undefined reference to '_sram4_heap_start'.

The Release Notes should document this for users with out-of-tree
boards.

arch/arm/src/stm32h7/Kconfig:

    * Add config STM32H7_SRAM4EXCLUDE to allow excluding all of SRAM4
      from the HEAP.

arch/arm/src/stm32h7/stm32_allocateheap.c:

    * Only when including SRAM4 in the heap, define HAVE_SRAM4,
      SRAM4_START, SRAM4_END, and SRAM4_HEAP_START.

    * Add "Private Data" section.

    * Add extern for_sram4_heap_start, which must be defined in the
      board's linker script.

    * arm_addregion(): Only add SRAM4 to the heap when configured to
      do so, i.e., unless CONFIG_STM32H7_SRAM4EXCLUDE is defined, and
      only add the portion of SRAM4 that is past any static data.

boards/arm/stm32h7/nucleo-h743zi/scripts/flash.ld:
boards/arm/stm32h7/nucleo-h743zi/scripts/kernel.space.ld:
boards/arm/stm32h7/nucleo-h743zi2/scripts/flash.ld:
boards/arm/stm32h7/stm32h747i-disco/scripts/flash.ld:
boards/arm/stm32h7/stm32h747i-disco/scripts/kernel.space.ld:

    * Update all in-tree STM32H7 board linker scripts as described in
      "Change required in linker scripts" above.

Testing:

    * Successfully built all of the following configurations:

      nucleo-h743zi2:jumbo
      nucleo-h743zi2:nsh
      nucleo-h743zi:nxlines_oled
      nucleo-h743zi:elf
      nucleo-h743zi:otg_fs_host
      nucleo-h743zi:nsh
      nucleo-h743zi:netnsh
      nucleo-h743zi:pwm
      stm32h747i-disco:nsh

    * Tested with custom board.

    * nxstyle.

References:

[1] See the dev@nuttx.a.o mailing list discussion started 2021/03/25:
    "How to ensure HEAP will not overlap static DMA buffer?"
    https://lists.apache.org/thread.html/recf2bb9043f8c9f53c10917e2adb2ec64fe35dc5e6f9a695a7ac6ecc%40%3Cdev.nuttx.apache.org%3E

[2] See arm_addregion() in arch/arm/src/stm32h7/stm32_allocateheap.c

Thanks to Gregory Nutt and David Sidrane for suggestions and reviews.
2021-03-30 17:22:46 -03:00
chenwen
91eb70b5ef risc-v/esp32c3: Support ESP32-C3 wireless ioctl cmd 2021-03-30 12:29:11 -05:00
Gustavo Henrique Nihei
77c5995f93 xtensa/esp32: Use essential boolean expressions on condition statements 2021-03-30 01:23:02 -05:00
Gustavo Henrique Nihei
5e8eb420b7 xtensa/esp32: Fix MISO/MOSI data length field configuration
Both fields were being configured with the total number of remaining
bytes instead of the number of bytes actually bound to DMA descriptors.
2021-03-30 01:23:02 -05:00
Gustavo Henrique Nihei
b4dbae1b10 xtensa/esp32: Commit setbits configuration before SPI transaction
The motivation is to avoid consistency issues when using Mixed Mode
(i.e. Polling and Interrupt/DMA transfers being used interchangeably)
2021-03-30 01:23:02 -05:00
Gustavo Henrique Nihei
4d877abf3f xtensa/esp32: Avoid incrementing a NULL pointer for RX buffer 2021-03-30 01:23:02 -05:00
Gustavo Henrique Nihei
a27d5b1063 xtensa/esp32: Remove useless pointer check in SPI DMA exchange 2021-03-30 01:23:02 -05:00
raiden00pl
4306910000 stm32/hardware/stm32_tim.h: fix comments 2021-03-30 01:13:39 -05:00
raiden00pl
5276077530 stm32/Kconfig: add STM32_HAVE_ADC1 option for consistency 2021-03-30 01:13:39 -05:00
raiden00pl
466ceb92cb stm32/Kconfig: cosmetics for quenco options 2021-03-30 01:13:39 -05:00
raiden00pl
b16d5341d8 stm32/stm32_serial.c: simplify DMA #ifdefs 2021-03-29 21:39:35 -03:00
raiden00pl
3c34337064 stm32: add support for serial TX DMA 2021-03-29 21:39:35 -03:00
raiden00pl
0cca102d41 stm32: fix USART1 clock for STM32F302 2021-03-29 21:39:35 -03:00
Roberto Bucher
590ee65fa7 Integration of pysimCoder with NUTTX 2021-03-29 21:38:58 -03:00
raiden00pl
63a4807f28 stm32/stm32_pwm: add interfaces to access RCR register and add interface to modify TRGO 2021-03-29 21:37:41 -03:00