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9694 Commits

Author SHA1 Message Date
Gregory Nutt
8315b051ca Merged in v01d/nuttx/kinetis_i2c (pull request #113) 
I2C and RTC support for Kinetis
 2016-08-13 16:54:14 -06:00
Gregory Nutt
8052dc4955 STM32 SPI: nbits should be unsigned. Valid range is 4-16 for F3 and L4. 8 or 16 for others. 2016-08-13 16:01:50 -06:00
v01d
5a97def131 kinetis k20 i2c fixed 2016-08-13 18:48:45 -03:00
Gregory Nutt
1a10518dae Update ChangeLog 2016-08-13 12:03:12 -06:00
Gregory Nutt
eed5e41626 Add some comments 2016-08-13 10:24:40 -06:00
Gregory Nutt
172761163b STM32F3 SPI: Cannot write 16-bit value to DR register because of how the F3 implements data packing. 2016-08-13 10:11:23 -06:00
Gregory Nutt
51fcd89b98 Add and fix some SPI debug output 2016-08-13 08:31:37 -06:00
Gregory Nutt
42202c6365 STM32 and STM32L4: Enabling DMA loses other bits in CR2 2016-08-13 08:01:41 -06:00
Gregory Nutt
efc9f674d2 Trivial changes to comments and spacing 2016-08-13 07:50:54 -06:00
Alan Carvalho de Assis
805cb5c752 STM32F3 SPI: Fix a typo 2016-08-13 07:23:48 -06:00
Gregory Nutt
da5563c0e7 STM32: Add conditional logic for STM32F37xx 2016-08-13 06:43:13 -06:00
Gregory Nutt
10f90a1738 STM32 F3: Fix more SPI issues 2016-08-12 19:00:34 -06:00
Gregory Nutt
3383a25c38 Some logic missing from last commit 2016-08-12 18:40:25 -06:00
Gregory Nutt
afb02b56d4 STM32F3 SPI: Fix the number of bit setting for the F3. It works differently than for other parts. 2016-08-12 18:32:37 -06:00
Gregory Nutt
046acf6b54 Add a simulated oneshot lowerhalf driver 2016-08-12 13:14:03 -06:00
Gregory Nutt
b4e8876b09 Correct some spacing 2016-08-12 12:41:49 -06:00
Gregory Nutt
82b86cdcf3 oneshot interface: max_delay method should return time in a standard struct timespec form. 2016-08-12 11:33:10 -06:00
Gregory Nutt
89135c55e4 drivers/timer: Add an upper-half, oneshot timer character driver. 2016-08-12 10:40:07 -06:00
Gregory Nutt
61b0ac06bf Missed a dependency in last set of commits 2016-08-11 17:20:12 -06:00
Gregory Nutt
1965e25da4 STM32L4: Add oneshot lower half driver. 2016-08-11 17:14:41 -06:00
Gregory Nutt
a5a776e223 SAM4CM: Add option to support oneshot timer without free-running timer. Add oneshot lower half driver. 2016-08-11 17:04:19 -06:00
Gregory Nutt
fa6866b046 SAMA5: Add option to support oneshot timer without free-running timer. Add oneshot lower half driver. 2016-08-11 16:47:17 -06:00
Gregory Nutt
b4d4a74059 SAMV7: Add option to support oneshot timer without free-running timer. Add oneshot lower half driver. 2016-08-11 16:27:01 -06:00
Gregory Nutt
d0ce5b1d1e Cosmetic changes to comments and function prototypes 2016-08-11 15:15:37 -06:00
Gregory Nutt
fb349508fd STM32 oneshot lower-half: Missed some data initialization. 2016-08-11 14:57:17 -06:00
Gregory Nutt
eb3a565153 STM32: Add oneshot lower half to build system. Fix some build problems. 2016-08-11 14:53:39 -06:00
Gregory Nutt
1bb93021df STM32: Add a experimental oneshot, lower-half driver for STM32 2016-08-11 14:07:43 -06:00
Gregory Nutt
0e35bad987 Update some comments 2016-08-11 10:12:04 -06:00
Gregory Nutt
accbccd78a Merged in mlyszczek/nuttx/stm32f1connline_pllfix (pull request #111) 
Fix bad pllmul values for stm32f1xx connectivity line.
 2016-08-11 06:44:19 -06:00
Michał Łyszczek
81df56086a Fix bad pllmul values for stm32f1xx connectivity line. 
stm32f1xx connectivity line supports only x4, x5, x6, x7, x8, x9 and x6.5 values
 2016-08-11 10:49:57 +02:00
Young
e30a3b780c Fix two bugs of tiva pwm lower-half driver impl. 2016-08-10 13:25:43 +08:00
Gregory Nutt
7823a1680e Update a comment 2016-08-09 17:08:03 -06:00
Gregory Nutt
698d6d1294 SAM3/4: Extend clocking logic to enable clocking on ports D-F 2016-08-09 17:05:11 -06:00
Gregory Nutt
0918dd98ab Merged in gnagflow/nuttx (pull request #109) 
SAM3/4 GPIO: Enable peripheral clock for GPIO port when GPIO is configured as input.
 2016-08-09 16:40:48 -06:00
Gregory Nutt
fdcf0f7e5f Correct some comments 2016-08-09 15:15:21 -06:00
Wolfgang Reissnegger
cf35bb0b18 SAM3/4 GPIO: Enable peripheral clock for GPIO port when GPIO is configured as input. 
The value of a GPIO input is only sampled when the peripheral clock for
the port controller the GPIO resides in is enabled. Therefore we need
to enable the clock even when polling a GPIO.
 2016-08-09 13:23:05 -07:00
Gregory Nutt
b5b7a21bb6 Make reference count a uin16_t and save a couple of bytes. 2016-08-09 13:54:57 -06:00
Gregory Nutt
8b5833f7fe A consequence of Max's change to the logic to enable access to the backup domain is that every call to enabledbkp(true) must be followed by a matching call to enablebkp(false). There was one cse in both RTCC drivers where that may not always be true. 2016-08-09 11:33:47 -06:00
v01d
f715e9b787 RTC working, I2C in progress 2016-08-09 14:01:27 -03:00
Gregory Nutt
5d91b8cabb With last change, stm32_pwr_enablebkp() no longer returns a value 2016-08-09 07:50:31 -06:00
Max Neklyudov
1e3ccbac12 Make stm32_pwr_enablebkp thread safe 2016-08-09 07:36:13 -06:00
Alan Carvalho de Assis
8499f42bf9 Add STM32F37XX DMA channel configuration 2016-08-08 13:29:53 -06:00
Alan Carvalho de Assis
fcf1ae7e05 stm32f37xx: Fix SYSCFG_EXTICR_PORTE defined twice 2016-08-08 12:59:29 -06:00
Alan Carvalho de Assis
834f058573 I'm using NuttX on STM32F373 and saw the config was missing SPI2 and 
SPI3, see datasheet:
www.st.com/resource/en/datasheet/stm32f373cc.pdf

I searched for other members of STM32F37XX family and they also have 3 SPIs:
http://www.st.com/content/st_com/en/search.html#q=STM32F37-t=keywords-page=1
 2016-08-08 12:25:15 -06:00
Gregory Nutt
caea59b340 SPI bit order: Add configuration setting to indicate if an architecture-specif SPI implementation does or does not support LSB bit order. 2016-08-08 12:21:20 -06:00
Gregory Nutt
6df28bc74e Make bit-order SPI H/W feature configurable for better error detection 2016-08-08 11:54:13 -06:00
Gregory Nutt
c3cfd37791 Fix cloned variable error in all SPI drivers 2016-08-08 11:04:01 -06:00
Gregory Nutt
2ae3953f9e STM32/EFM32: If any hardware feature other and LSBFIRST is selected, return -ENOSYS. 2016-08-08 10:37:28 -06:00
Gregory Nutt
7d4cb73bd6 STM32 and EFM32 SPI drivers adopted an incompatible conventions somewhere along the line. The set the number of bits to negative when calling SPI_SETBITS which had the magical side-effect of setting LSB first order of bit transmission. This is not only a hokey way to pass control information but is supported by no other SPI drivers. 
This change three things:  (1) It adds HWFEAT_LSBFIRST as a new H/W feature.  (2) It changes the implementations of SPI_SETBITS in the STM32 and EFM32 derivers so that negated bit numbers are simply errors and it adds the SPI_HWFEATURES method that can set the LSB bit order, and (3) It changes all calls with negative number of bits from all drivers: The number of bits is now always positive and SPI_HWFEATUREs is called with HWFEAT_LSBFIRST to set the bit order.
 2016-08-08 08:28:13 -06:00
v01d
d483f7939f I2C0 support for kinetis/teensy-3.x (to be tested) 2016-08-06 22:23:59 -03:00
Gregory Nutt
56f2454c86 Fix names of pre-processor variables used in header file idempotence 2016-08-06 18:48:45 -06:00
Gregory Nutt
f5ae207516 Changes from Review of last PR adding Tiva PWM driver 2016-08-05 07:17:42 -06:00
Young
2994decd3c Add tiva PWM lower-half driver implementation 2016-08-05 18:53:25 +08:00
Gregory Nutt
d9314c1034 LPC43xx ADC: board.h should be included last; Also, unreleated, update tools/README.txt 2016-07-30 07:05:10 -06:00
Gregory Nutt
309480d0f9 Merge branch 'timekeeping' of bitbucket.org:nuttx/nuttx 2016-07-28 09:34:00 -06:00
Gregory Nutt
59f626313d Changes from review of last PR 2016-07-25 15:16:51 -06:00
Gregory Nutt
250b9d5597 Merged in JordanMacIntyre/nuttx/PWM_driver (pull request #106) 
Pwm_driver
 2016-07-25 14:59:45 -06:00
jmacintyre
f5ea811c97 create PWM driver, still having issues with building 2016-07-25 14:17:07 -05:00
Stefan Kolb
899a8aa2f0 SAMV7 TRNG: Missing endif. 2016-07-25 12:30:39 -06:00
Gregory Nutt
e895e19b9f Minor changes from review of last PR 2016-07-24 07:45:46 -06:00
Wolfgang Reissnegger
c0fa319f2b SAM3/4 UDP: Fix handling of endpoint RX FIFO banks. 
This fixes a race condition where the HW fills a FIFO bank while the SW is
busy, resulting in out of sequence USB packets.
 2016-07-23 20:11:04 -07:00
Wolfgang Reissnegger
cc191a977d SAM3/4 UDP: Remove redundant EP state assignment. 2016-07-23 20:11:03 -07:00
Wolfgang Reissnegger
f3a6a40f62 SAM3/4 Serial: Fix warning when CONFIG_SUPPRESS_UART_CONFIG is set. 2016-07-23 16:23:49 -07:00
Gregory Nutt
9b9b721406 Rename alarm_enable to rtc_alarm_enabled; mark inline 2016-07-23 12:01:57 -06:00
Gregory Nutt
5a0f9fcb7d Fix STM32 RTC Alarm interrupts. They were being enabled BEFORE the interrupt system was being initialized. 2016-07-23 10:36:06 -06:00
Gregory Nutt
14de4b99f8 Simplify some computations 2016-07-23 08:13:25 -06:00
Gregory Nutt
0984fcda44 Back out last RTC alarm changes. I am mistaken, the interrupts are enabled by stm32[l4]_exti_alarm(). 2016-07-23 07:53:08 -06:00
Gregory Nutt
65ac11692d STM32L4 RTC is cloned from F4; needs same fix. 2016-07-23 07:33:44 -06:00
Gregory Nutt
829c5610da STM32 F4 RTC ALARM: Was not enabling interrupts. 2016-07-23 07:19:14 -06:00
Gregory Nutt
e6137ff129 Rename SAMD/L version of CONFIG_GPIO_IRQ to CONFIG_SAMDL_GPIOIRQ 2016-07-22 14:38:33 -06:00
Gregory Nutt
3aea9b8bf3 Rename KL version of CONFIG_GPIO_IRQ to CONFIG_KL_GPIOIRQ 2016-07-22 14:34:21 -06:00
Gregory Nutt
5386403476 Rename Kinetis version of CONFIG_GPIO_IRQ to CONFIG_KINETIS_GPIOIRQ 2016-07-22 14:30:37 -06:00
Gregory Nutt
264578135d Rename LP11xx version of CONFIG_GPIO_IRQ to CONFIG_LPC11_GPIOIRQ 2016-07-22 14:23:31 -06:00
Gregory Nutt
360efe03c1 Rename LP17xx version of CONFIG_GPIO_IRQ to CONFIG_LPC17_GPIOIRQ 2016-07-22 14:18:30 -06:00
Gregory Nutt
369c942605 uint8_t is big enough for global. Range of values only 2-10 2016-07-21 15:18:27 -06:00
Gregory Nutt
67900beaaa LP43 Heap: REALLY eliminate the warning this time 2016-07-21 15:15:56 -06:00
Gregory Nutt
d5acc120a4 Kinetis K60: Fix some bad conditional compilation 2016-07-21 14:22:00 -06:00
Gregory Nutt
a2035f7efd Move include/nuttx/1wire.h to include/nuttx/drivers/1wire.h 2016-07-21 13:51:28 -06:00
Gregory Nutt
96d5b734a8 Add missing TWI definitions 2016-07-21 08:01:59 -06:00
Gregory Nutt
0d98507af1 Eliminate a warning 2016-07-20 16:47:23 -06:00
Gregory Nutt
1b9b3a7b47 pwm.h moved from include/nuttx/ to include/nuttx/drivers. 2016-07-20 13:48:24 -06:00
Gregory Nutt
ddcaa3d425 can.h moved from include/nuttx/ to include/nuttx/drivers. 2016-07-20 13:38:36 -06:00
Gregory Nutt
4b4dbc79a2 Move driver related prototypes out of include/nuttx/fs/fs.h and into new include/drivers/drivers.h 2016-07-20 13:15:37 -06:00
Sagitta Li
e07bd757ba STM32 F107: TIM8 not supported in F105/F107 2016-07-20 08:51:03 -06:00
Vytautas Lukenskas
ac2a5e079c Add change missing in Make.defs for last LPC43xx change 2016-07-19 09:28:15 -06:00
Vytautas Lukenskas
f222d37aa7 Extend LPC43xx EMC code to support SDRAM on a dynamic memory interface. 2016-07-19 07:11:04 -06:00
Gregory Nutt
2119c5ce19 Fix another function naming error 2016-07-18 12:40:27 -06:00
Gregory Nutt
d36da2b560 Fix bad dev[u]random_register() function return value. 2016-07-18 12:25:05 -06:00
Gregory Nutt
d5388eca05 devrandom_register() must be called before devurandom_register() 2016-07-18 11:24:04 -06:00
Gregory Nutt
078bbe5e5c All H/W RNG Drivers: Can now be configured to register as /dev/random and/or /dev/urandom 2016-07-18 11:10:37 -06:00
Gregory Nutt
1660329d06 Rename up_rnginitialize to devrandom_register 2016-07-18 10:55:37 -06:00
David Alessio
6cefbc0c3f This change provides an option to add /dev/urandom to all architectures. The pseudo-random algorithm I choose strikes an arguably-good balance between being "random" and small/fast enough for 8/16 bit MCUs. It’s the well-documented xorshift128 algorithm. It has an internal state of 128 bits that can be [re-]seeded with a write. 2016-07-17 06:42:26 -06:00
Gregory Nutt
7b298a828d up_pminitialize() needs to be called from instances of up_initialize() 2016-07-15 13:11:28 -06:00
Gregory Nutt
d3b3c71d97 All architectures: Add logic to automatically register /dev/ptmx a boot time 2016-07-15 11:54:41 -06:00
Young
7005fafb95 Fix a bug of tiva i2c ports configuration 2016-07-15 11:03:48 +08:00
Gregory Nutt
18059d6821 Restore Wolfgang Reissnegger's PR as submitted. My mistake is it late here. 2016-07-14 18:39:51 -06:00
Wolfgang Reissnegger
f982180ec7 SAM3/4 Timer: Remove broken definitions for BMR register. 
Per documentation SAM4S and SAM4E have the BMR register values
as they are already defined. No need for chip specific values.

In addition:
 - CONFIG_ARCH_CHIP_SAM4s has wrong lower case 's' so the definitions would
   not be used anyways for SAM4S builds.
 - TC_BMR_TC2XC2S_TIOA2 does not make sense. There is no way to loop back
   TC2's TIOA2 into itself.
 2016-07-14 18:17:05 -06:00
Gregory Nutt
54bc6c88dd Fix cast of return value 2016-07-14 10:21:31 -06:00
Gregory Nutt
3f6835fda9 If CONFIG_SPIFI_SECTOR512 undefined, lpc43_bwrite doesn't do actual write (probably copy/paste errors). Still not sure about current state of lpc43_spifi implementation, but for me NXFFS works with this patch. From Vytautas Lukenskas. 2016-07-14 10:11:19 -06:00
Pierre-noel Bouteville
76f12b1f69 I'm using syslog through ITM. In this case syslog_channel function is call before ram initialisation in stm32_clockconfig. But syslog channel uses a global variable that is reset to default by the RAM initialization. 2016-07-14 07:29:39 -06:00
Gregory Nutt
72582b61d9 Merged in ziggurat29/nuttx/stm32l4_smartfs_test (pull request #98) 
port foward bugfix from stm32 of oneshot timer
 2016-07-13 16:09:18 -06:00
ziggurat29
9a6c5b271a port foward bugfix from stm32 of oneshot timer 2016-07-13 17:00:06 -05:00
Gregory Nutt
37e10a54ae Kinetis: Eliminate a warning. Freedom-K64F: Update a README file 2016-07-13 15:38:47 -06:00
Gregory Nutt
beaca7a17f Merge remote-tracking branch 'origin/master' into timekeeping 2016-07-13 10:22:38 -06:00
Max Neklyudov
067f63fc18 STM32: Fix bug in oneshot timer 2016-07-13 10:20:38 -06:00
Stefan Kolb
f673b2d02a This commit solves a problem which causes data loss while sending data via USB. This problem is caused by an incorrect handling of the endpoint state in the USB driver sam_usbdevhs. This leads under some circumstances to situations in which an DMA transfer is setup while a previous DMA transfer is currently active. Amongst other things I introduced the new endpoint state USBHS_EPSTATE_SENDING_DMA for the fix. 
To reproduce the problem, I used a program which send as many data as possible via a CDC/ACM device and verified the received data on the PC.
 2016-07-13 10:09:14 -06:00
Gregory Nutt
a7d8279714 Kinetis and Freedom-K64F: Remove unused configuration variable; fix some compile issues; SDHC is now enabled in the nsh configuration (but does not work) 2016-07-13 09:56:02 -06:00
Gregory Nutt
2f12de6f28 Freedom-K64F: Add hooks for automounter; Change NSH configuration to use Windows 2016-07-13 09:23:57 -06:00
Sebastien Lorquet
590af73bd2 STM32L4 Serial: Remove some STM32Fxxx conditional logic; fix a link error resulting from an over-aggressive rename. 2016-07-13 07:10:09 -06:00
Gregory Nutt
76a0cccbb1 K6x Ethernet: Fix some conditional logic 2016-07-13 07:04:19 -06:00
Sebastien Lorquet
6be72272eb STM32L4: Apply the stm32l4 namespace and FAR qualifiers to the serial driver, also, indentation. 2016-07-12 17:18:46 -06:00
Gregory Nutt
dee77a5dd9 Kinetis Ethernet: Add support for CONFIG_NET_NOINTS 2016-07-12 16:17:35 -06:00
Gregory Nutt
10667bd38a Kinetis Ethernet and Freedcom-K64F: PHY address was wrong. Modified driver to try all PHY addresses and then only fail if the driver cannot find a usable PHY address. MDIO pin must have an internal pull-up on the Freedom-K64F. 2016-07-12 14:09:27 -06:00
Gregory Nutt
c8f053de92 Kinetis Ethernet: Add support for the KSZ8081 PHY 2016-07-12 09:59:08 -06:00
Gregory Nutt
38999dfe9d Fix two incorrectly named header files 2016-07-12 09:46:31 -06:00
Gregory Nutt
f816e7a69b Merged in slorquet/nuttx/pr_fixes (pull request #95) 
Pr_fixes
 2016-07-11 17:07:40 -06:00
Sebastien Lorquet
4172016667 revert changes made by greg 2016-07-12 01:04:15 +02:00
Sebastien Lorquet
5e12d6203e Cosmetic changes after PR 94 2016-07-12 00:57:18 +02:00
Gregory Nutt
9dd70ffbae Freedom K64F: Green and Blue LEDs reversed 2016-07-11 16:54:20 -06:00
Gregory Nutt
c80b627e8d Partial review of last PR 2016-07-11 16:28:54 -06:00
Sebastien Lorquet
749b54fbda PR fixes for oneshoot and freerun 2016-07-12 00:16:08 +02:00
Gregory Nutt
a48fb1e41c Merged in slorquet/nuttx/stm32l4_renames (pull request #94) 
stm32l4_renames
 2016-07-11 16:05:27 -06:00
Sebastien Lorquet
4f5d22c940 fix a typo 2016-07-12 00:03:38 +02:00
Sebastien Lorquet
3a873a44ef renames in USB OTG 2016-07-11 23:59:24 +02:00
Sebastien Lorquet
4dd020784a renames in tickless 2016-07-11 23:57:57 +02:00
Gregory Nutt
fb1855244e STM32 timer: Eliminate a warning 2016-07-11 13:13:17 -06:00
Sebastien Lorquet
ce09af0da7 Rename STM32L4 PWM routines. this WILL BREAK configs 2016-07-11 19:13:06 +02:00
Sebastien Lorquet
d347d7ce7e renames in oneshoot 2016-07-11 19:06:14 +02:00
Sebastien Lorquet
34a7b0ea8e Renames stm32_ -> stm32l4_ on old files and rtcc/basic timers 2016-07-11 19:05:09 +02:00
Gregory Nutt
246773faa7 Rename CONFIG_SCHED_TIMEKEEPING to CONFIG_CLOCK_TIMEKEEPING. That is a better compartmentalized name. 2016-07-11 06:54:02 -06:00
Max Neklyudov
8db29071da timekeeping: initial implementation 2016-07-10 16:14:25 -06:00
Wolfgang Reissnegger
d89e062c06 SAM3/4 I2C: Fix reversed logic in twi_startmessage(). 2016-07-09 06:51:07 -06:00
ziggurat29
ee55a0b9a3 update README.txt to reflect new implementation status 2016-07-08 17:33:38 -05:00
ziggurat29
af236d4784 STM32L4: add support for tickless OS, and incidentally timers, pwm, oneshot, free-running.... 2016-07-08 17:30:55 -05:00
ziggurat29
0207f6699a port and bit definitions for the various timers on the STM32L4. whew. 2016-07-08 17:26:40 -05:00
ziggurat29
106f87d9ed fix incorrect clock setup for LPTIM1 2016-07-08 16:37:44 -05:00
Gregory Nutt
7473d3f859 Trivial changes from review of PR 2016-07-08 08:03:44 -06:00
Gregory Nutt
75e2f37dd2 Merged in david_s5/nuttx (pull request #89) 
stm32_serial.c edited online with Bitbucket
 2016-07-08 06:40:24 -06:00
Gregory Nutt
591c099470 Merged in david_s5/nuttx/upstream_nucleo-144 (pull request #88) 
Upstream_nucleo 144
 2016-07-08 06:35:46 -06:00
David Sidrane
06036a5841 stm32_serial.c edited online with Bitbucket 2016-07-08 01:56:37 +00:00
David Sidrane
deb3e8143c STM32F7 - DMA working on SDMMC 2016-07-07 15:49:47 -10:00
David Sidrane
f8d3a872ee FIxed STM32F& DMA stm32_dmacapable 2016-07-07 15:49:21 -10:00
ziggurat29
42820c0938 update usb dev/host controller drivers to reflect new(ish) logging standards; augment device enpoint and fifo allocation #defines to do more sanity checking, and be automatically adaptive to size changes. Update README.txt to reflect current status of the implementation. 2016-07-07 13:54:35 -05:00
ziggurat29
7c428efa97 Merge branch 'master' into stm32l4_usb 
Conflicts:
	configs/stm32l476vg-disco/nsh/defconfig
 2016-07-07 12:27:20 -05:00
Gregory Nutt
c16500dfdb STM32 timer. More clean up: Add all function prototypes. Reorder functions to match ordering in operations structure. 2016-07-06 14:24:59 -06:00
Gregory Nutt
7c568f249a STM32: Various fixed to get a clean compile after integrating tickless mode. Mostly because patch came from an old version of NuttX. 2016-07-06 13:37:08 -06:00
Gregory Nutt
711f3318c5 STM32 timer: Reorganize to conform better with the NuttX coding style 2016-07-06 13:36:17 -06:00
Max Neklyudov
d8286a7f47 STM32: Add support for Tickless mode (two timer implementation) 2016-07-06 12:48:30 -06:00
Gregory Nutt
4d8213870c Freedom-K64F: Update Flash Clock divider. Flash clock must not exceed 24 Mhz 2016-07-06 12:11:26 -06:00
Gregory Nutt
c8d6707aaf Freedom-K64F: Increase MCU clock to 120MHz 2016-07-06 11:03:27 -06:00
Gregory Nutt
ba8e6083bf K64 pin mux fixes: No PIN_ALT1, use PIN_ANALOG. Remove GPIO pin mux definitions. 2016-07-02 13:22:11 -06:00
Gregory Nutt
f1d0214c61 K64 pinmap: Use uppercase to math k60 pin naming 2016-07-02 12:09:34 -06:00
Gregory Nutt
59de06f7f9 Update K64 pin multixplexing 2016-07-02 11:48:56 -06:00
Gregory Nutt
7a7998e4f9 Add support for the NXP Freedom-K64F board. This is primarily the work of Jordan Macintyre. I leveraged this code from https://github.com/jmacintyre/nuttx-k64f 2016-07-01 15:42:21 -06:00
Gregory Nutt
f73b97c3b2 arch/arm/kinetis: Completes moving register header files to kinetis/chip directory with all K64 changes. 2016-07-01 15:00:04 -06:00
Gregory Nutt
bccd2ec219 arch/arm/kinetis: Still moving register header files to kinetis/chip directory; still incorporating K64 differences. 2016-07-01 14:07:14 -06:00
Gregory Nutt
c8793637ee Add some conditional compilation to handle improper inclusion of header file 2016-07-01 13:24:31 -06:00
Gregory Nutt
4acd296926 arch/arm/kinetis: Still moving register header files to kinetis/chip directory; still incorporating K64 differences. 2016-07-01 13:15:29 -06:00
Gregory Nutt
4f64634694 arch/arm/kinetis: Still moving register header files to kinetis/chip directory; still incorporating K64 differences. 2016-07-01 12:36:09 -06:00
Gregory Nutt
62a9b10b3d arch/arm/kinetis: Still moving register header files to kinetis/chip directory; still incorporating K64 differences. 2016-07-01 11:55:15 -06:00
Gregory Nutt
91dd3306c8 arch/arm/src/kinetis: Add basic support for the K64 family. Still moving register definition files to the kinetis/chip subdirectory. 2016-07-01 11:24:41 -06:00
Gregory Nutt
71ff84b96a arch/arm/src/kinetis: Create a chip sub-directory as with other architectures. Start moving some headers... a lot more still be be moved. 2016-07-01 08:48:57 -06:00
Sebastien Lorquet
d329f117e7 Here is a missing register def for STM32L4 after support for dual RX. Thanks to Paul for porting the CAN improvements to both STM32 targets. 2016-06-30 07:11:26 -06:00
Paul A. Patience
20c611c12b STM32 CAN: Bitfield definitions should be unsigned 
Shifting 1 by 31 is undefined behaviour because 1 is signed.
We should probably use 1ul instead of 1 everywhere else,
but for now this silences a compiler warning.
 2016-06-29 13:59:33 -04:00
Paul A. Patience
52a4a20efb STM32L4 CAN: Port support for both RX FIFOs from STM32 CAN 2016-06-29 13:59:29 -04:00
Michael Spahlinger
329c760f17 SAMV7: CAN Message Filtering fixed 
- Bugfix: stdfilters didn't work because the filter was never enabled (wrong number of bits to shift)
 - Bugfix: Filters were never used because the configuration register cannot be written without using the initialization mode

Both bugs are fixed by this patch. Filtering has been tested with both standard and extended identifiers and is now working properly.
 2016-06-29 08:48:11 -06:00
Gregory Nutt
6aa067e929 Mostly costmetic changes from review of last PR 2016-06-29 07:33:30 -06:00
David Sidrane
e58b67b946 Added STM32F7 DBGMCU 2016-06-28 17:23:44 -10:00
David Sidrane
efb2850b5f STM32F7 BBSRAM fixed (and formated) flags 2016-06-28 16:28:52 -10:00
David Sidrane
eacd672ab0 STM32 BBSRAM fixed (and formated) flags 2016-06-28 16:25:04 -10:00
Gregory Nutt
8323e97201 Merged in david_s5/nuttx/upstream_nucleo-144 (pull request #82) 
Upstream_nucleo 144
 2016-06-28 16:56:14 -06:00
Gregory Nutt
c40c107e7a STM32 F4 RTC: Fix some long lines 2016-06-28 16:55:06 -06:00
David Sidrane
edca32f40c missing s 2016-06-28 12:44:17 -10:00
David Sidrane
35ca7eaf3a Removed STM32 porting vestiges 2016-06-28 12:43:39 -10:00
Gregory Nutt
2ed1295528 Cosmetic changes from review of last PR 2016-06-28 16:42:21 -06:00
Gregory Nutt
a0a082fc03 Merged in david_s5/nuttx/upstream_nucleo-144 (pull request #81) 
STMF7xxx RTC
 2016-06-28 16:26:31 -06:00
David Sidrane
0af47a93ae STMF7xxx RTC 
Remove proxy #defines
 Ensure the LSE(ON) etal are set and remembered in
  a) A cold start (RTC_MAGIC invalid) of the RTC
  b) A warm start (RTC_MAGIC valid) of the RTC but a clock change.

The change was needed because in bench testing a merge of the latest's STM32  53ec3ca (and friends) it became apparent that the
Sequence of operation is wrong in the reset of the Backup Domain in the RCC code.  PWR is required before the Backup Domain
can be futzed with. !!!This Code should be tested on STM32 and if needed rippled to the STM32 families
 2016-06-28 12:13:36 -10:00
Gregory Nutt
435f21225a Fix a warning about an unused label, errout: Use bool with true/false, not uint8_t with 1/0 2016-06-28 14:55:04 -06:00
Gregory Nutt
a43da4d107 STM32 CAN: Clone missing stm32_enterinitmode() and _exitinitmode() from STM32L4. Don't know if this is write but is needed to compile. 2016-06-28 14:35:49 -06:00
Gregory Nutt
93f49290a3 Eliminate a warning 2016-06-28 13:47:44 -06:00
Paul A. Patience
a4d5845887 efm32, lcp43, stm32, stm32l4: disable interrupts with NVIC_IRQ_CLEAR 2016-06-28 15:12:39 -04:00
David Sidrane
1c93e48a09 Removed STM32 porting vestiges 2016-06-28 07:13:22 -10:00
David Sidrane
e0b7708afb Fix warning 2016-06-28 07:10:11 -10:00
Gregory Nutt
c74269ced6 Significantly stylistic changes required after review of last PR 2016-06-28 09:37:21 -06:00
Gregory Nutt
725a16d033 Trivial fix to alignment 2016-06-28 09:10:32 -06:00
Gregory Nutt
0de3514af7 Merged in david_s5/nuttx/upstream_nucleo-144 (pull request #77) 
Upstream_nucleo 144
 2016-06-28 09:07:03 -06:00
Michael Spahlinger
ed1f3aec61 Fixed build of SAMV71-XULT/nsh. With the changes from 26f7b8c the build process of the default configuration did not succeed anymore. This is fixed by this commit. 2016-06-28 08:23:41 -06:00
David Sidrane
a4040759b0 Adding PWR, RTC, BBSRAM for stm32f7 2016-06-27 16:42:01 -10:00
David Sidrane
89a79e8ac0 Double faulting on Idle task with 0 stack 2016-06-27 15:56:21 -10:00
Gregory Nutt
d4408264ec STM32 CAN fixes need to be backported to STM32L4 as well 2016-06-27 15:18:45 -06:00
Gregory Nutt
8e26d4c8e0 STM32 CAN: More fixes for compilation errors due to blind leverage of STM32L4 CAN filter IOCTLs to STM32 2016-06-27 15:16:13 -06:00
David Sidrane
6c7ea4695a Syslog changes incoperated 2016-06-27 09:59:13 -10:00
David Sidrane
02b23358e5 Update Authors 2016-06-27 09:54:28 -10:00
Gregory Nutt
738510a52c Merged in david_s5/nuttx/upstream_nucleo-144 (pull request #75) 
Upstream_nucleo 144
 2016-06-27 12:30:53 -06:00
David Sidrane
047ea89c30 Fixed config for D1 only 2016-06-27 08:27:44 -10:00
Gregory Nutt
1b5bef5325 STM32 CAN: Fix an error when filter methods were ported from STM32L4 2016-06-27 11:15:37 -06:00
Gregory Nutt
82bb42aa93 Trivial changes from review of last PR 2016-06-27 07:43:32 -06:00
Lok Tep
1e67714c3f usb copy 2016-06-27 11:23:42 +02:00
Lok Tep
3e3e023cf3 Merge remote-tracking branch 'origin/master' 2016-06-25 18:32:41 +02:00
Lok Tep
2723de9a09 usb ep 0-8 2016-06-25 18:31:37 +02:00