I skipped the following files because they were not simple.
I'll create separate PRs.
arch/xtensa/src/esp32/esp32_cpustart.c
arch/xtensa/src/common/xtensa_abi.h
boards/xtensa/esp32/esp32-core/include/board.h
Also, I skipped the following files and directories because
they looked too huge and/or foreign.
arch/xtensa/include/esp32/tie.h
arch/xtensa/include/xtensa/xtensa_corebits.h
arch/xtensa/src/esp32/hardware/
arch/xtensa/include/esp32/tie-asm.h
arch/xtensa/include/esp32/core-isa.h
arch/xtensa/include/xtensa/core.h
I also fixed a few "is is" style typos when unwrapping long lines.
arch/z80/src/ez80/ez80_timerisr.c: Correct a mismatch between the programmed reload value and the timer input clock frequency.
arch/z80/src/ez80/ez80f92.h: Correct error in timer input clock divider: Bits 2-3, not bits 3-4.
boards/z80/ez80/z20x/src/w25_main.c: Correct an uninitialized return value; private function was not declard static.
* stm32h7: New timer output mode STM32_TIM_CH_OUTTOGGLE.
In this mode timer generates a square waveform on given timer channel.
The maximal waveform freq is timer clock divided by 4 (prescaler 1, period 1 results in 2 clocks '0' and 2 clocks '1').
* stm32_tim.h styling fixes.
arch/z80/src/ez80/ez80f92_init.asm: Timer control register was not being cleared and, as a result, timer interrupts may have been already enabled when the CPU was started by the debugger. This would result in spurious interrupts and Unexpected Interrupt crashes.
arch/z80/src/comming/up_initialize.c: Fix a trivial typo.
While we are at it, change the license headers in all relevant files in the affected directories to the Apache 2.0 license. Run all affected files through nxstyle.
boards/z80/ez80/z20x: Increase RX buffer size to 4Kb, reduce BAUD to 2400 in w25boot configuration
arch/z80/src/ez80/ez80_serial.c: Reduce Rx FIFO trigger level for eZ80F92 to 1 so that will respond more quickly to incoming data.
Also fix the following build warning:
chip/sam_serialinit.c: In function 'sam_earlyserialinit':
chip/sam_serialinit.c:71:4: warning: implicit declaration of function 'uart_earlyserialinit'; did you mean 'sam_earlyserialinit'? [-Wimplicit-function-declaration]
71 | uart_earlyserialinit();
| ^~~~~~~~~~~~~~~~~~~~
| sam_earlyserialinit
Change-Id: I93adc5be739c222482b552b6e143e44c8c047794
Signed-off-by: liuhaitao <liuhaitao@xiaomi.com>
boards/z80/ez80/z20x/src/w25_main.c: Improve user interface.
There is still an error occurring while downloading Intex HEX files to FLASH. That is unrelated to this and appears to be a problem libs/libc/hex2gbin/lib_hex2bin.c
arch/z80/src/ez80/ez80_timerisr.c: Fix an error that looks the file got damaged by a bad keystroke in the editor while a string was highlighted.
boards/z80/ez80/z20x/src/ez80_spi.c: Fix some bad conditional compilationi. Prevented W25 chip select from being initialized.
This reverts commit f735584514.
These header changes introduce unacceptable errors:
1. The changes alter the width of the initial block comment. That will cause nxstyle failures on most of the files.
2. The third line of the header is an (optional) short description of content of the the file. This change erroneously removes that line.
Automated header file changes can screw up a lot of files, very quickly.
Commit 797e45d6bf attempted to reduce the frequency of SPI reconfiguration by keeping track of the current frequency and mode settings and changing these settings only when the new settings differ from the old settings.
However, the original commit neglected to save the new frequency setting and, hence, was not effective in what it was trying to do: Every time the SPI setfrequency() method was called, it still looked like a new frequency and the frequency was still reconfigured, even though it hadn't really changed.
arch/z80/src/ez80/ez80_spi.c: Add logic checks to eliminate unnecessary SPI reconfiguration.
arch/z80/src/ez80/ez80_timerisr.c and arch/z80/src/ez80/ez80f92.h: Fix numerous places where configurations began with CONFIGS_ instead of CONFIG_
arch/z80/src/ez80/ez80_spi.c: Do not configure SPI chip select pin. It is not used by the driver and configuring it just clobbers other usage of that pin. Add some additional debug outputs; correct some exiting debug outputs.
drivers/mtd/w25.c: Add some debug output.
boards/z80/ez80/z20x/src/ez80_w25.c: Correct SPI bus number used in initialization. Only SPI1 is supported.
arch/z80/src/ez80/ez80_timerisr.c: Some initial timer configuration fixes.
The DBGMCU_APB1_FZ bit persists over regular software resets until next POR-reset. It can impact device power consumption and things that persist over resets are a bane for FOTA updates so make it disabled by default.
OpenOCD sets this via DAP when connecting to target so enabling this from Kconfig is only useful for users of some other debug tooling.
* SAMA5D27 peripheral support - USB Host working
- updated nsh defconfig with vfat for testing USB Host
- sama5d2_xult: USB Host worked.
- ported sam_bringup.c code from sama5d3-xplained
- USB 2.0 HS now working
- other perpherals may work, but haven't been tested
* update license headers to approve NuttX Apache-2.0
arch/z80/: include/ez80/irq.h, src/ez80/ez80f92_*.asm: Correct some comments related to vector address offsets.
boards/z80/ez80/z20x/scripts/z20x_loader.linkcmd: Fix RAM offset in linker script
* arch: x86_64: Pour-in the x86_64 code from cRTOS repository, excluding modifications of NuttX kernel, jailhouse support and linux compatibility layer
* arch: x86_64: Refactor x86_64 loading procedure for better comprehension and included support for multiboot2
* arch: x86_64: Locate the kernel at 4GB~ and modify the page table initializing procedure accordingly
* arch: x86_64: Implemented kconfig option for various x86_64 capabilities, dynamic probe and check capability on lowsetup before enabling
* arch: x86_64: inte64_check_capability: Use Marco to prettify the capability checking procedure
* arch: x86_64: intel64_timerisr.c: Refactor with new frequency calibrating method
* arch: x86_64: Fix C alias of page table and GDT/IST
* arch: x86_64: Reload GTDR with GDT in high address in up_lowsetup
* arch: x86_64: Consolidate MSR definition in arch/arch.h
* arch: x86_64: Edit the way of handling GDT/IST in C into structures
* arch: x86_64: Correct the starting point of isr/irq stack
* arch: x86_64: Update up_initialize.c with the new initializing procedure
* arch: x86_64: up_map_region now take flags instead of assuming WR/PRESENT
* arch: x86_64: Overhual of interrupt initialization procedure
* arch: x86_64: Properly configure the heap to be memory as [_ebss, end of memory]
* arch: x86_64: Try to probe the TSC frequency, fall-back to user specified frequency on failure
* arch: x86_64: Remove debug printing during restore_aux, causing infinite CTX bug
* arch: x86_64: for X86 16500 serial interrupt to work, OUT2 of MCR must be 1. Make it stuck at 1 after boot
* arch: x86_64: Correctly apply license header, comment and format code
* arch: x86_64: properly send a SIGFPE on floating point error
* arch: x86_64: Remove unused variable in up_restore_auxstate
* arch: x86_64: properly trash the processor with an infinite loop
* arch: x86_64: Fix typo in ISR handler causing ISR not handled
* arch: x86_64: Fix possibile race conditions with scheduler debug option on in signal handling path
* arch: x86_64: Fix typo in MSR_X2APIC_LVTT_TSC_DEADLINE
* arch: x86_64: Migrate tickless implementation to the new MSR naming and frequency calibration method
* board: x86_64: qemu: Add guard to exclude up_netinitialize when compiling without net support
* arch: x86_64: update defconfigs
* arch: x86_64: rename qemu as qemu-intel64
* arch: x86_64: update Board readme
Kconfig files. Repartition some functionality. Bootloader support will need to be provided in logic under arch/z80/src/ez80 so the critical configuration selections were moved the Kconfig file there.
arch/z80/src/ez80/ez80_i2c.h: Rename arch/z80/src/ez80/ez80f91_i2c.h. It is sharable by both ez80f91 and ez80f92.
arch/z80/src/ez80/: Add logic to perform an additional level of interrupt redirection. This is necessary because the the interrupt handling is part of the loader FLASH-based logic. In order to share interrupts with the program loaded into RAM by the loader, another layer or redirection is required to get control to the interrupt handlers in the loaded program. See ez809f2_loader.asm and ez80f92_program.asm
boards/z80/ez80/z20x/scripts: Reduce size of the interrupt re-direction buffer from 1Kb to 512b.
Run all .c files modified by PR424 through nxstyle and correct most of the complaints (many long line complaints ignored for now). Update file headers to use Apache 2.0 license.
Not canceling the I2C timeout watch dog immediately after finishing
all I2C transactions in interrupt context can lead to a race condition
due to nxsem_wait(&priv->wait) in lpc17_40_i2c_start() not resuming
execution fast enough (this can be easily triggered if another task /
thread is using a lot of cpu time).
Falling to cancel the watchdog up to time will cause the priv->wait
semaphore to be incremented twice (first by lpc17_40_i2c_stop() then
by lpc17_40_i2c_timeout()), so all I2C transactions after that will
return immediately and priv->msgs will hold pointers to memory it
doesn't own anymore.
Canceling the priv->timeout watch dog in lpc17_40_i2c_stop() prevents
this as it is executed from the I2C interrupt handler.
arch/arm/src/lpc17xx_40xx/lpc17_40_i2c.c: Fix timeout calculation
For each byte received / transmitted, an acknowledge bit is also
transmitted / received, requiring effectively 9 bits for each byte.
The SD boot loader was not satisfactory because 1) the SD slot is on an optional board and, hence, cannot be part of a fundamental solution. And 2) it is too big.
The only storage on borard is the Winbond W25 SPI-bsed FLASH. This commit adds support for a bootload to 1) read code in HEX format from a serial port and write it to the W25 FLASH, or 2) read code in binary form from the W25 FLASH into SRAM and execute the loaded program.
boards/z80/ez80/z20x/configs: Added w25boot configuration
boards/z80/ez80/z20x/src: Add bootloader logic, w25_main.c. Add logic to manage shared SRAM memory map so that the loaded program does not clobber the bootloader memory. Add logic to recover the bootloader memory into the heap after the loaded program as started.
boards/z80/ez80/z20x/scripts: Rework scripts and configuration to support a bootloader and program build. The boolloader cannot use all of SRAM; the program must not clobber the SRAM region used by the bootloader.
* imxrt: GPIO make tables const
* imxrt: Call out to board to set up FlexRAM
* imxrt: Add Knob for adding the ROM bootloaders 40Kib of RAM to heap
* imxrt: imxrt1060-evk:Add the ability to run from OCRAM
* arch/arm/src/imxrt/imxrt_usbdev.c: Add USB Device support for i.MX RT (USB OTG1)
Based on the LPC43xx USB Device driver.
* imxrt:usbotg Nxstyle fixes
Co-authored-by: thomasactia <61285689+thomasactia@users.noreply.github.com>
board/z80/ez80/*/scripts/Make.defs: Fix optimization definition use in assembly flags. It was using the compiler optimization settings instead of the assembler optimization settings. Hence, enabling optimization would could cause assembler command line errors.
arch/z80/src/ez80/Toolchain.defs: Back out some work arounds. Now compiler optimization flags can again set set without assembler command line errors.
boards/z80/ez80/z20x/README.txt: Trivial update to size/optimization discussion.
The eZ80F92 interrupt controller is very different from the eZ80F91. The eZ80F91 has:
1. Four byte interrupt vectors
2. The vector base address register is 16-bit so the vector table can lie in RAM
Whereas the eZ80F92 has:
1. Two byte interrupt vectors
2. An 8-bit vector base address
This means that the vectors must lie in the first 16-bits of FLASH and there must be a "trampoline" to get to interrupt handlers outside of the first 64-Kb of FLASH.
arch/z80/src/ez80/Toolchain.defs: Correct some CFLAGS when optimization suppressed.
arch/z80/src/ez80/Kconfig arch/z80/src/ez80/ez80_emac.c: Remove configuration option for selecting EMAC RAM address. This is duplicated and possibly conflicting. The correct address for the RAM is provided in the linker command file. The RAM should be configured once and using this single definitions.
arch/z80/src/ez80/ez80_startup.asm and arch/z80/src/ez80/ez80f9*_init.asm. Move RAM and FLAH intialization out of MCU-specific logic to common start-up logic. We cannot call any functions until SRAM is initialized and the stack is properly initialized because the return address is stored on the stack. Use internal SRAM for the IDLE stack to avoid the chicken'n'egg problem.
boards/z80/ez80/z20x/configs/sdboot/sdboot.zdsproj: Discuss build environments.
These makefiles set the the ZiLOG runtime libraries for the eZ80 parts. The setup was, however, conditioned on CONFIG_ARCH_EZ80_EZ80F91 and, so, was not working for the eZ80F92 part (CONFIG_ARCH_EZ80_EZ80F92).
With this change, the z20x board FINALLY builds and links correctly with no errors.
Don't use MCU selection from compiler. It appears that we must compile ez80f92 code as ez80f91 so the comiler MCU selection is incorrect. Instead, use the selected CPU part from the configuration.
arch/z80/src/ez80/Toolchain.defs: Update some CFLAGS to match CFLAGS from ZDS-II IDE. Apparently, we must say that the CPU is an eZ80F91 event when compiler for eZ80F92.
boards/z80/ez80/z20x: Update linker scripts.
* tools/zds/zds_Config.mk: Move boards/z80/ez80/scripts/eZ80_Config.mk to tools/zds/zds_Config.mk where it can be shared by other ZDS-II platforms.
* boards/z16/z16f: Duplicate changes for new ZDS-II support from ez80
* boards/z80/z8: Duplicate changes for new ZDS-II support from ez80
* arch/z16/src/z16f/Toolchain.defs: Create required Toolchain.defs file for Z16f
There are cases that USE_SERIALDRIVER is defined but USE_EARLYSERIALINIT not defined in some configs. So use ifdef USE_EARLYSERIALINIT to include up_earlyserialinit anyway.
An error was introduced from:
commit f982ee43db
Author: Xiang Xiao <xiaoxiang@xiaomi.com>
Date: Tue Feb 18 09:55:04 2020 +0800
drivers/serial: Remove the lowconsole driver
Replace with the syslog console driver which has more capability than lowconsole
arch/z80/arc/ez80/Toolchain.sh: Move more common toolchain definitions from Make.defs.
boards/z80/ez80/scripts/eZ80_Config.mk: Move common defines that override tools/Config.mk to this new file.
This does not solve the ez80 build problem yet but does assure that when the solution is in place, it will automatically apply to all present and future ez80 configurations.
I was over-zealous in arch/z80/src/ez80/ez80f91_handlers.asm. I added space separatros around the '+' operators. Turns out that the ZDS-II assembler can't handle the spaces in that context.
The ez80f92 is similar to the currently supported ez80f91 except that is:
1. Has no PLL and has a maximum CPU frequency of only 20MHz
2. Has no Ethernet controller
3. Timers are different
4. Has no GPIO Port A
5. Timers are different
6. It comes in a smaller package
and other small differences.
This provided the architecture (only) support for the forthcoming z20x port.
* arch/arm/src/tiva/Make.defs: Compile only when enabled by configuration CONFIG_ARM_SEMIHOSTING_HOSTFS
* arch/arm/src/common/up_hostfs.c: Remove the ifdef conditional because it's redundant with the make logic.
Largely copy-and-paste from stm32f4discovery.
Also arch/arm/src/armv7-m/mpu.h: Ensure RBAR alignment
Fix crashes on init task startup I observed on qemu-system-arm -M lm3s6965evb.
And remove syslog_init_e because all initialization is later now and we don't
distinguish the initialition phase anymore after ramlog don't need special
initialize.
Because we can get the same function by CONSOLE_SYSLOG/syslog_console_init.
BTW, it isn't a good choice to use g_ramlogfops as /dev/console since nsh
will read back what it send out which will surprise most people.
it doesn't make sense that iob initialization is in up_initialize
but other memory components initialization is called in nx_start
Change-Id: Id43aeaa995f340c5943f59a0067a483ff3ac34a2
Signed-off-by: Xiang Xiao <xiaoxiang@xiaomi.com>
To ensure size_t same as toolchain definition in the first place and rename CXX_NEWLONG to ARCH_SIZET_LONG. The change also check whether __SIZE_TYPE__ exist before CONFIG_ARCH_SIZET_LONG so our definition can align with toolchain(gcc/clang) definition automatically.
Currently up_allocate_heap() assumes that g_idle_topstack points
top of the heap memory. However, g_idle_topstack pointed incorrect
address in SMP mode which resulted in heap corruption. This PR
moves g_idle_topstack at the end of .noinit to avoid this issue.
Signed-off-by: Masayuki Ishikawa <Masayuki.Ishikawa@jp.sony.com>
The benefit include:
1. Simplify the implementation
2. Support both tick and tickless automatically
3. No time drift in tickless mode
4. Support critmon arch API automatically
To avoid ps generate "Segmentation fault" because do_stackcheck
check the stack color if the stack size doesn't equal zero
BTW, it is better to set idle task stack size to zero since idle
task use the host thread and the stack size from config isn't the
actual value.
The benefits include:
1. Simplify the implementation
2. Support Ctrl+C automatically
3. Support poll automatically
4. Call pm_activity automatically
5. Save one polling thread
Call xxx_timer_initialize from clock subsystem to make timer ready for use as soon as possiblei and revert the workaround:
commit 0863e771a9
Author: Gregory Nutt <gnutt@nuttx.org>
Date: Fri Apr 26 07:24:57 2019 -0600
Revert "sched/clock/clock_initialize.c: clock_inittime() needs to be done with CONFIG_SCHED_TICKLESS and clock_initialize should skip clock_inittime() for external RTC case since the RTC isn't ready yet."
This reverts commit 2bc709d4b9.
Commit 2bc709d4b9 was intended to handle the case where up_timer_gettime may not start from zero case. However, this change has the side-effect of breaking every implementation of tickless mode: After this change the tickless timer structures are used before they are initialized in clock_inittime(). Initialization happens later when up_initialize is called() when arm_timer_initialize().
Since the tickless mode timer is very special, one solution might be to
1. Rename xxx_timer_initialize to up_timer_initialize
2 Move up_timer_initialize to include/nuttx/arch.h
3. Call it from clock subsystem instead up_initialize
Basically, this change make timer initialization almost same as rtc initialization(up_rtc_initialize).
For now, however, we just need to revert the change.
* include: Introduce elf64.h and elf.h
Added elf64.h for 64bit ELF support and moved common definitions
from elf32.h to elf.h. Also introduced Elf_xxx to be used in
common libraries such as binfmt.
* binfmt, include, modlib, module: Add support for ELF64
Elf_xxx must be used instead of Elf32_xxx to support ELF64.
To use ELF64, CONFIG_ELF_64BIT must be enabled.
* binfmt, modlib: Add support for relocate address
* arch: risc-v: Add include/elf.h
* libs: machine: Add risc-v related files.
NOTE: Currently only supports ELF64
* boards: maix-bit: Add elf and posix_spawn configurations
* boards: maix-bit: Add support for module configuration
* S32K add support for Nxp drone boards
* Update arch/arm/src/s32k1xx/hardware/s32k1xx_rtc.h codestyle
Co-Authored-By: David Sidrane <David.Sidrane@Nscdg.com>
Co-authored-by: Jari van Ewijk <jari.vanewijk@nxp.com>
Co-authored-by: David Sidrane <David.Sidrane@Nscdg.com>
commit 39bd9ff670
Author: YAMAMOTO Takashi <yamamoto@midokura.com>
Date: Wed Jan 29 00:17:05 2020 +0900
sim: Prefix symbols with _ for non-ELF
Namely for Mach-O. Leave __CYGWIN__ case as it is.
* Serial Fixed interrupt storm
The target would randomly hang in the serial isr.
The priv->ie and the hardware were inconsistent.
The isr used the priv->ie to gate offloading
the RX data. Bang! Hung.
imxrt_disableuartint(priv, &ie);
ret = imxrt_setup(dev);
/* Restore the interrupt state */
imxrt_restoreuartint(priv, ie);
interrupt-> Of no return
priv->ie = ie;
On a fast cpu with FIFO, this will not work
with out proper protections.
* Serial: Conditionally enable 9 bit mode
* armv7-mi/mpu.hi: Restructure API
Preserve the existing API and enabled better granualriy on
setting.
* Enable MPU for non protected builds to set cache
* mpuinit use symbolic values for addresses
* Allow DTCM on HEAP
* allocateheap Fix Coding style
* ld doesn't have --start-groupi/--end-group things. As far as I know,
it works that way by default.
* objcopy with Mach-O support is not widely available.
(GNU binutils seem to claim the support but it didn't actually work
for me. llvm-objcopy --redefine-syms explicitly rejects Mach-O.)
Instead, use -unexported_symbols_list linker flag to hide symbols
to avoid conflicts with host symbols.
The recent x86-64 convention requires 16-byte alignment before
(not after) calling a function.
This fixes snprintf crash I observed on macOS while saving XMM registers.
All STM32L4 MPUs have FLASH_CR_PNB bits (8 bits), and some MPUs have FLASH_CR_BKER bit to change bank if page >= 256.
The code wasn't setting or clearing FLASH_CR_BKER correctly.
Author: Gregory Nutt <gnutt@nuttx.org>
Run .c modified by the PR through tools/nxstyle and correct all reporting coding style problems noted in the file.
Author: Satoshi Togawa <togawa@develcb210.centurysys.co.jp>
STM32L4: Add workaround of data cache corruption on RWW.
Some STM32L4 chips has eratta "Data cache might be corrupted during Flash Read While Write operation". This is also in STM32, and arch/arm/src/stm32/stm32f20xxf40xx_flash.c has workaround.
To enable this workaround, define CONFIG_STM32L4_FLASH_WORKAROUND_DATA_CACHE_CORRUPTION_ON_RWW.
Recent changes removed CONFIG_TIME_ENHANCED and unmasked some warnings. These warnings were caused by nuttx/time.h not being included by files that now referenced clock_daysbeforemonth() and clock_isleapyear().
This commit adds those missing inclusions and eliminates the warnings.
Co-authored-by: Gregory Nutt <gnutt@nuttx.org>
Fix these build errors which occurred if there was no PHY:
chip/lpc17_40_ethernet.c:1643:31: error: expected expression before ';' token
ret lpc17_40_phyinit();
chip/lpc17_40_ethernet.c:3941:1: error: expected identifier or '(' before '{' token
{
chip/lpc17_40_ethernet.c:448:13: warning: 'lpc17_40_macmode' used but never defined
static void lpc17_40_macmode(uint8_t mode);
Author: Xiang Xiao <xiaoxiang@xiaomi.com>
Fix warning: selects SDIO_DMA or SDIO_BLOCKSETUP which has unmet direct dependencies (MMCSD)
Fix warning: selects NETDEV_TELNET which has unmet direct dependencies (NETDEVICES && NET && NET_TCP)
Fix warning: selects ARCH_PHY_INTERRUPT which has unmet direct dependencies (NETDEVICES && ARCH_HAVE_PHY)
Fix warning: selects USBHOST_HAVE_ASYNCH which has unmet direct dependencies (USBHOST)
Signed-off-by: Xiang Xiao <xiaoxiang@xiaomi.com>
Gregory Nutt <gnutt@nuttx.org>
Run all .c and .h files modified in this PR through nxstyle and correct all coding standard problems.
Xiang Xiao <xiaoxiang@xiaomi.com>
Remove TIME_EXTENDED option to more conform C standard
Note: the code/data size increment is small
Fix warning found in build testing: "warning: 'dac_interrupt' defined but not used [-Wunused-function]. The compiler is right, dac_interrupt is not used. It is, apparently, a placeholder for future interrupt support. Now conditioned out with #if 0 to suppress build test warnings.
Co-authored-by: Gregory Nutt <gnutt@nuttx.org>
sama5d3-xplained:ethernet-over-phy configuration found in build testing:
arch/arm/src/sama5/sam_irq.c: Fix "Control reaches end of non-void function " warning
arch/arm/src/sama5/sam_udphs.c: Fix "unused variable 'epno'" warning
boards/arm/sama5/sama5d*-*/src/sam_usb.c: Fix "warning 'HAVE_USBHOST' not defined" warnings
Author: Alan Carvalho de Assis <acassis@gmail.com>
Run nxstyle against .c and .h files and fix it
Author: Juha Niskanen <juha.niskanen@haltian.com>
Fix typos and some incorrect comments
* arch/arm/src/nrf52/hardware/nrf52_twi.h: fix typo
* arch/arm/src/nrf52/nrf52_i2c.c: add interrupts support and some debug messages
* boards/arm/nrf52/nrf52840-dk: add support for hts221 and lsm303agr; boards/arm/nrf52/nrf52840-dk: fix issues noted by nxstyle
Author: Alan Carvalho de Assis <acassis@gmail.com>
Run nxstyle on .c and .h files and fix it
Author: raiden00pl <raiden00pl@gmail.com>
arch/arm/src/nrf52: use the same naming convention for register defs
arch/arm/src/nrf52/hardware/nrf52_ficr.h: remove invalid defs
arch/arm/src/nrf52/hardware: add TIMER register defs
Author: Alan Carvalho de Assis <acassis@gmail.com>
Run nxstyle again .c file and fix error message
Author: Daniel P. Carvalho <danieloak@gmail.com>
Add SPWM example to test STM32L4 PWM driver low level operations.
Fix BUGs.
1. No .c file should include a "Public Types" section. Only a header file can define a public type. A .c file can only define a private type. Several files contained private type definitions. The section that they were defined in, however, was incorrectly named "Public Types." Those were easilty changed to "Private Types" which is what they are.
2. No .c file should include a "Public Function Prototypes" section. All global function prototypes should be provided via a header file and never declared with a .c file.
For No. 2, I corrected as many cases as was reasonable for the time that I had available. But there are still a dozen or so .c files that declare "Public Function Prototypes" within a .c file. This is bad programming style. These declarations should all be moved to the proper header files.
Author: Alan Carvalho de Assis <acassis@gmail.com>
Run nxstyle on .c files and fix the issues
Author: Xiang Xiao <xiaoxiang@xiaomi.com>
arch/stm32 ensure all spi dma handler check the result
Signed-off-by: Xiang Xiao <xiaoxiang@xiaomi.com>
* arch: risc-v: Remove unused typedef for irqstate_t
NOTE: irqstate_t is defined in arch/risc-v/include/types.h
* arch: risc-v: Add typedef irqstate_t for __LP64__
* arch: risc-v: Add SMP support to K210 (RV64GC) processor
* boards: maxi-bit: Update READMEs and add smp/defconfig
Author: Alan Carvalho de Assis <acassis@gmail.com>
Run nxstyle against .c .h files and fix it
Author: Adam Feuer <adam@starcat.io>
Summary
Adds CDC ECM Ethernet over USB High Speed for SAMA5D36-Xplained
(and maybe other boards) (most of the code was there already,
but didn't work out of the box for the SAMA5D36-Xplained)
Only SAMA5D36-Xplained has been tested so far
Impact
None if you don't use the CDC ECM Ethernet driver
On SAMA5D36-Xplained, this adds high-speed Internet connectivity
over USB 2.0 High Speed. via the USB CDC ECM Gadget driver.
It may work on other boards too.
This also fixed full-speed (low-speed) mode for the board too.
Limitations
Hasn't been tested on anything other than SAMA5D36-Xplained board.
TODO
Ideally this would include a composite RNDIS device so it would
also work seamlessly on Windows. That is for a future PR
Ideally this would include software to help configuration via
mDNS/DNS-SD for plug and play compatibility with Linux and macOS.
That is for a future PR.
Detail
Only a few lines of C driver code needed to be changed, since the
capability was there already. The rest is config and documentation.
Changes the SAMA5D3-Xplained board bringup to match the SAMA5D3-EK
board bringup
A helper script to configure Linux routing and iptables NAT is also
provided, along with documentation on how to use it.
Testing
Manual, on a Ubuntu Linux 19.10 system and MacOS 10.14.6 Mojave
MacBook Pro.
How To Verify
Follow the new CDC ECM Ethernet over USB instructions in the board
README.txt file
Commits:
remove non-UTF-8 chars in comment and reformat
removed unneeded comment markers
instructions for using the defconfigs
removed EMAC from config
- to prove this example only needs the CDC ECM Ethernet over USB to work
added CDC-ECM Ethernet over USB info to README
added U-Boot image
added netusb helper script
- this can configure the Linux network interface and routes
so you can ping or access the NuttX system via TCP/IP.
renamed defconfig dirs to be ethernet-over-usb
- was usb-over-ethernet which is not right
added USB DMA to defconfigs
updated readme with autoboot and debugging info
bringing ethernet-over-usb examples into parity
added cdc ecm ethernet over usb with telnetd config
added defconfig
only use phy interrupt if netdevices is ethernet
- because now netdevice could be CDC ECM ethernet over usb
which has no PHY interrupt
add bringup to Makefile
add bringup
app init cleanup
init cdc ecm driver and rndis driver; some cleanup
fixed some typos and odd characters
usb over ethernet working over usb 2.0 hs
Author: Alan Carvalho de Assis <acassis@gmail.com>
Run nxstyle to check .c and .h files and fix reported issues
Author: liuzhao <happypapa@yeah.net>
Add Quectel EC20 4G LTE Module USB CDC/ACM support
nrf52: add support for GPIO interrupts
nrf52: add macros to decode GPIO PIN and GPIO PORT
nrf52: various cosmetic changes
nrf52: fix GPIO P1 memory address
boards/nrf52840-dk: add support for SPI
boards/nrf52840-dk: add support for LSM6DSL sensor
boards/nrf52840-dk: add support for SX127X radio
In previous commit, mstatus.mie was set when creating a new task
but this change was incorrect and had a side effect such that
a machine interrupt would be enabled just before returning from
interrupt handling routine to switch context.
Also, mstatus.mpp is set to machine mode in up_get_newintctx()
instead of fe310_dispatch_irq().
Author: Alan Carvalho de Assis <acassis@gmail.com>
Check all .c and .h against nxstyle and fix it.
Author: Alin Jerpelea <alin.jerpelea@sony.com>
fs: smartfs: Fix over capacity write
When the remaining capacity of flash is one sector, if a new root
directory is created by file open, then the root directory's chain is
broken and it causes to SmartFS filesystem crash. Once this fatal
problem occurs, it's impossible to recover even if the system reboot.
Fix it by finally update link of root directory.
fs: smartfs: Fix buffer overrun
fs: smartfs: Fix uninitialized variable warnings
fs: smartfs: Memory leak fix
boards: cxd56xx: Update spresense board.h
- Fix PMIC assignment
- Add specific pin configurations for spresense
- Remove unnecessary definitions
arch: cxd56xx: Add ITM syslog init at startup
arch: cxd56xx: Enable DMA settings dynamically
Author: Alan Carvalho de Assis <acassis@gmail.com>
Verify all .c and .h against nxstyle, fixed the Mixed cases
Author: Alin Jerpelea <alin.jerpelea@sony.com>
cxd56xx improvements (#48)
* arch: cxd56xx: Add size limitation for I2C SCU xfer
This is a fw restriction, unroll loop because it can be transfer
up to 16 bytes.
* arch: cxd56xx: Fix lack of leave_critical_section
add the missing leave_critical_section
* arch: cxd56xx: Remove unnecessary file
this header is duplicate and we can remove it
* arch: cxd56xx: Cosmetic change
remove space after function
* arch: cxd56xx: update topreg registers
the topreg registers are updated to match the cxd5602 HW
* arch: cxd56xx: Add voltage setting for low battery notification
Add voltage setting for low battery notification
* arch: cxd56xx: Improve perfomance of SD card
Improve a problem that the clock of SD Host Controller is lower than the
expected value in SDR25 transfer mode.
* arch: cxd56xx: Cosmetic changes
cleanup to comply with coding standard
* boards: cxd56xx: Cosmetic changes
updates to comply with coding standard
* boards: cxd56xx: Fix SD card cannot mount issue
SD card cannot mount when connecting and disconnecting three times
or more due to wrong state of parameter 'initialized'.
This change enables to skip swtching initialized state when mount
failed.
* arch: cxd56xx: Add size limitation for I2C SCU xfer
This is a fw restriction, unroll loop because it can be transfer
up to 16 bytes.
* arch: cxd56xx: Fix lack of leave_critical_section
add the missing leave_critical_section
* arch: cxd56xx: Remove unnecessary file
this header is duplicate and we can remove it
* arch: cxd56xx: Cosmetic change
remove space after function
* arch: cxd56xx: update topreg registers
the topreg registers are updated to match the cxd5602 HW
* arch: cxd56xx: Add voltage setting for low battery notification
Add voltage setting for low battery notification
* arch: cxd56xx: Improve perfomance of SD card
Improve a problem that the clock of SD Host Controller is lower than the
expected value in SDR25 transfer mode.
* arch: cxd56xx: Cosmetic changes
cleanup to comply with coding standard
* boards: cxd56xx: Cosmetic changes
updates to comply with coding standard
* boards: cxd56xx: Fix SD card cannot mount issue
SD card cannot mount when connecting and disconnecting three times
or more due to wrong state of parameter 'initialized'.
This change enables to skip swtching initialized state when mount
failed.
Run all .c and .h files in last PR through nxstyle.
Author: 脚蹬破拖鞋 <happypapa@yeah.net>
Add Imxrt usdhc insert or remove detection (#43)
* Add usdhc card insertion and removal detection using interrupt for imxrt.
* Add interrupt handle when usdhc insert or remove.
This commit fixes a compilation error that occurs when enabling the
following configuration items for stm32f7 and stm32h7 architectures:
CONFIG_DEBUG_FEATURES=y
CONFIG_DEBUG_ERROR=y
CONFIG_DEBUG_WARN=y
CONFIG_DEBUG_INFO=y
CONFIG_DEBUG_IRQ=y
CONFIG_DEBUG_IRQ_ERROR=y
CONFIG_DEBUG_IRQ_WARN=y
CONFIG_DEBUG_IRQ_INFO=y
The compiler error for stm32f7:
make[1]: Entering directory '/home/pdupreez/dev/wingunder/nuttx/arch/arm/src'
CC: chip/stm32_irq.c
chip/stm32_irq.c: In function 'up_irqinitialize':
chip/stm32_irq.c:497:29: error: 'STM32_IRQ_NIRQS' undeclared (first use in this function); did you mean 'STM32_IRQ_FIRST'?
stm32_dumpnvic("initial", STM32_IRQ_NIRQS);
^~~~~~~~~~~~~~~
STM32_IRQ_FIRST
chip/stm32_irq.c:497:29: note: each undeclared identifier is reported only once for each function it appears in
make[1]: *** [Makefile:172: stm32_irq.o] Error 1
make[1]: Leaving directory '/home/pdupreez/dev/wingunder/nuttx/arch/arm/src'
And the compiler error for stm32h7:
make[1]: Entering directory '/home/pdupreez/dev/wingunder/nuttx/arch/arm/src'
CC: chip/stm32_irq.c
chip/stm32_irq.c: In function 'stm32_dumpnvic':
chip/stm32_irq.c:164:4: warning: #warning Missing logic [-Wcpp]
# warning Missing logic
^~~~~~~
chip/stm32_irq.c: In function 'up_irqinitialize':
chip/stm32_irq.c:522:29: error: 'STM32_IRQ_NIRQS' undeclared (first use in this function); did you mean 'STM32_IRQ_CRS'?
stm32_dumpnvic("initial", STM32_IRQ_NIRQS);
^~~~~~~~~~~~~~~
STM32_IRQ_CRS
chip/stm32_irq.c:522:29: note: each undeclared identifier is reported only once for each function it appears in
make[1]: *** [Makefile:172: stm32_irq.o] Error 1
make[1]: Leaving directory '/home/pdupreez/dev/wingunder/nuttx/arch/arm/src'
This commit replaces all STM32_IRQ_NIRQS defines with the NR_IRQS
define, which seems to be consistent with the rest of the code in
Nuttx.
Author: Alan Carvalho de Assis <acassis@gmail.com>
Fix long line comments in the header files
Author: Mateusz Szafoni <raiden00pl@users.noreply.github.com>
* arch/arm/src/nrf52: add GPIOTE and SAADC registers definitions
* arch/arm/src/nrf52: update some registers definitions
* arch/arm/src/nrf52: add basic I2C support
* arch/arm/src/nrf52: add function to unconfigure GPIO
* arch/arm/src/nrf52/nrf52_lowputc: add missing FAR
Author: Alan Carvalho de Assis <acassis@gmail.com>
Run all .h and .c files modified in last PR through nxstyle.
Author: Xiang Xiao <xiaoxiang@xiaomi.com>
Fix stm32l4_otgfshost.c: error: 'ret' undeclared (#32)
result by commit 6a3c2aded6
Change-Id: I68ba79417d8da102da8d91c74496961aef242dd9
Signed-off-by: Xiang Xiao <xiaoxiang@xiaomi.com>
Run all .c and .h files in last PR through tools/nxstyle and fix all complaints.
Author: macman88 <jjlange91@gmail.com>
LPC17xx serial updates (#29)
* Save CONFIG_ARCH_BOARD_CUSTOM when running 'make savedefconfig'
* Don't compile up_earlyserialinit if USE_EARLYSERIALINIT is not defined
* Added support for RS485 direction control on LPC17xx UART1
* First pass at fractional baud rate divider on LPC17xx/40xx
* Added support for fractional divider to console UART
Author: patacongo <spudarnia@yahoo.com>
arch/arm/src/imxrt/imxrt_enet.c: Fix some warnings found in build testing.
Also fix coding standard problems reported by nxstyle. (#26)
Co-authored-by: Gregory Nutt <gnutt@nuttx.org>
Run all .c and .h files in last PR through nxstyle.
Author: macman88 <jjlange91@gmail.com>
SAME5x Ethernet Support (#25)
boards/arm/samd5e5/same54-xplained-pro/: Adds basic support for Microchip SAM E54 Xplained Pro board.
arch/arm/src/samd5e5/: Adds an Ethernet driver for the SAME5x family (based on the SAMA5 GMAC driver).
* Simplify EINTR/ECANCEL error handling
1. Add semaphore uninterruptible wait function
2 .Replace semaphore wait loop with a single uninterruptible wait
3. Replace all sem_xxx to nxsem_xxx
* Unify the void cast usage
1. Remove void cast for function because many place ignore the returned value witout cast
2. Replace void cast for variable with UNUSED macro
Author: Alan Carvalho de Assis <acassis@gmail.com>
Run all .h and .c files modified in last PR through nxstyle.
Author: Minamiya_Natsuki <yukihiratype2@gmail.com>
Add FMC SDRAM for STM32H7x3 chip (#22)
* Add FMC SDRAM for STM32H7x3 chip
* Add FMC SDRAM for STM32H7x7
* Nuttx Coding Standard requires one declaration per line
* should be __ARCH_ARM_SRC_STM32H7_STM32_FMC_H
* fix bad alignment
* fix typo
* fix typo
* people can't live in furture
* fix comment line length
* fix more comment line length
* fix aligenment
* fix typo
Author: Gregory Nutt <gnutt@nuttx.org>
Run all .c and .h modified in PR through nxstyle.
Author: Masayuki Ishikawa <masayuki.ishikawa@gmail.com>
feature k210 (#16)
* arch: risc-v: Add support for __LP64__ to types.h
* arch: risc-v: Add support for RV64GC to common files
* arch: risc-v: Add support for Kendryte K210 processor (RV64GC)
* boards: risk-v: Add support for Sipeed Maix Bit with K210
* tools: Add support for Kendryte K210 processor
arch/arm/src/sama5/sam_serial.c: uart2port in sam_serial, fix the rest of the uarts in sam_serial
boards/arm/sama5/sama5d2-xult/README.txt: Fix some minor typos
boards/arm/sama5/sama5d2-xult/include/board.h: Update UART pin disambiguation with default UARTn_RXD, _TXD
STM32L4_NUSART was set to 4. The spec at
https://www.st.com/resource/en/datasheet/stm32l433cc.pdf states the
following on page 1:
- 4x USARTs (ISO 7816, LIN, IrDA, modem)
- 1x LPUART (Stop 2 wake-up)
However it on page 49, it states:
The STM32L433xx devices have three embedded universal synchronous
receiver transmitters (USART1, USART2 and USART3).
The latter is correct.
This patch sets STM32L4_NUSART to 3.
Code was flawed in that the Pins are defined with the
pullups in the definition. Since there are no alterntes pins
there is no way to remove them. So not enabling the CONFIG
pull up did nothing as did enabling them.
Code also ignored the use of D0 for ready detection causing
3X+ the chatter.
This is now a compile time feature as there was no reason for
it to be a run time. It wasted both flash and ram.
Squashed commit of the following:
Author: Gregory Nutt <gnutt@nuttx.org>
Ran nxstyle against many of the affected files. But this job was too big for today. Many of the network drivers under arch are highly non-compiant and generate many, many faults from nxstyle. Those will have to be visited again another day.
Author: Xiang Xiao <xiaoxiang@xiaomi.com>
This effects all network drivers as well as timing related portions of net/: devif_poll_tcp_timer shouldn't be skipped in the multiple card case. devif_timer will be called multiple time in one period if the multiple card exist, the elapsed time calculated for the first callback is right, but the flowing callback in the same period is wrong(very short) because the global variable g_polltimer is used in the calculation. So let's pass the delay time to devif_timer and remove g_polltimer.
Fix fe310 signal handling
* arch: fe310: Disable all interrupts in mie at __start
* arch: fe310: Fix up_irq_enable() to set external interrupt only
* arch: fe310: Fix up_schedule_sigaction() to save REG_INT_CTX
* boards: hifive1-revb: Adjust stack size to reduce runtime memory
Approved-by: Gregory Nutt <gnutt@nuttx.org>
nrf52 updates
board/arm/nrf52/nrf52832-dk: use the on-board virtual COM pins as default UART0 configuration
board/arm/nrf52: initial support for the nrf52840-dk board
board/arm/nrf52: initial support for the nrf52840-dk dongle board
arch/arm/src/nrf52: add support for port 1 GPIO
arch/arm/src/nrf52: initial support for UART1
arch/arm/src/nrf52: add UICR definitions
Approved-by: Gregory Nutt <gnutt@nuttx.org>
Sparkfun RED-V Things Plus
* board: hifive1-revb: Update README-qemu.txt
* arch: fe310: Works with SparkFun RED-V Things Plus
Should work with HiFive1 Rev.B but not tested yet.
* boards: hifive1-revb: Works with SparkFun RED-V Things Plus
Should work with HiFive1 Rev.B but not tested yet.
Approved-by: Alan Carvalho de Assis <acassis@gmail.com>
Approved-by: Gregory Nutt <gnutt@nuttx.org>
