Commit Graph

701 Commits

Author SHA1 Message Date
Gregory Nutt
e5c3874a3b Tiva directories: Fix TM4C129XNCZAD part number in Kconfig and identifiers. Rationale: Fully specify that this is the 212-pin BGA package (ZAD ending) and for consistency with earlier changes to other Tiva TM4C12x part numbers in Kconfig names and identifiers. 2019-08-30 08:46:57 -06:00
Alin Jerpelea
6ecee7e403 Merged in alinjerpelea/nuttx (pull request #1021)
boards: cxd56xx: add SCU sensors (2/2)

* boards: cxd56xx: add cxd56_bh1721fvc initialization

    We are adding the sensor initialization for cxd56xx boards in the
    common board folder.

    Signed-off-by: Alin Jerpelea <alin.jerpelea@sony.com>

* boards: cxd56xx: add cxd56_bh1745nuc initialization

    We are adding the sensor initialization for cxd56xx boards in the
    common board folder.

    Signed-off-by: Alin Jerpelea <alin.jerpelea@sony.com>

* boards: cxd56xx: add cxd56_bm1383glv initialization

    We are adding the sensor initialization for cxd56xx boards in the
    common board folder.

    Signed-off-by: Alin Jerpelea <alin.jerpelea@sony.com>

* boards: cxd56xx: add cxd56_bm1422gmv initialization

    We are adding the sensor initialization for cxd56xx boards in the
    common board folder.

    Signed-off-by: Alin Jerpelea <alin.jerpelea@sony.com>

* boards: cxd56xx: add cxd56_bmi160 initialization

    We are adding the sensor initialization for cxd56xx boards in the
    common board folder.

    Signed-off-by: Alin Jerpelea <alin.jerpelea@sony.com>

* boards: cxd56xx: add cxd56_bmp280 initialization

    We are adding the sensor initialization for cxd56xx boards in the
    common board folder.

    Signed-off-by: Alin Jerpelea <alin.jerpelea@sony.com>

* boards: cxd56xx: add cxd56_kx022 initialization

    We are adding the sensor initialization for cxd56xx boards in the
    common board folder.

    Signed-off-by: Alin Jerpelea <alin.jerpelea@sony.com>

* boards: cxd56xx: add cxd56_lt1pa01 initialization

    We are adding the sensor initialization for cxd56xx boards in the
    common board folder.

    Signed-off-by: Alin Jerpelea <alin.jerpelea@sony.com>

* boards: cxd56xx: add cxd56_rpr0521rs initialization

    We are adding the sensor initialization for cxd56xx boards in the
    common board folder.

    Signed-off-by: Alin Jerpelea <alin.jerpelea@sony.com>

* boards: cxd56xx: add cxd56_sensors initialization

    We are adding the sensor initialization for cxd56xx boards in the
    common board folder.

    Signed-off-by: Alin Jerpelea <alin.jerpelea@sony.com>

* arch: arm: cxd56: add Backup Log driver

    The driver will be used to backup logs on crash.

    Signed-off-by: Alin Jerpelea <alin.jerpelea@sony.com>

* boards: arm: cxd56xx: common: add crashlog driver

    Add Crashlog driver with support for reset on crash

    Signed-off-by: Alin Jerpelea <alin.jerpelea@sony.com>

* boards: arm: cxd56xx: move gs2200m initialization

    Move the board gs2200m initalization to the common board folder

    Signed-off-by: Alin Jerpelea <alin.jerpelea@sony.com>

* boards: arm: cxd56xx: move ili9340 initialization

    Move the board ili9340 initalization to the common board folder

    Signed-off-by: Alin Jerpelea <alin.jerpelea@sony.com>

* boards: arm: cxd56xx: move lpm013m091a initialization

    Move the board lpm013m091a initalization to the common board folder

    Signed-off-by: Alin Jerpelea <alin.jerpelea@sony.com>

* boards: arm: cxd56xx: common: typo fixes

    HEADER: Updates on file location
    Signed-off-by: Alin Jerpelea <alin.jerpelea@sony.com>

Approved-by: Gregory Nutt <gnutt@nuttx.org>
2019-08-23 13:28:35 +00:00
Gregory Nutt
b4ee19f5bd arch/arm/src/s32k1xx: This commit brings in the LPSPI and LPI2C peripheral drivers from the i.MXRT which used the identical IP.
Squashed commit of the following:

    arch/arm/src/s32k1xx:  Update peripheral input clocking for the way that things are done for the S32K1XX.  Fix other misc. compilation/configuration issues.

    arch/arm/src/s32k1xx:  Clean up LPSPI and LPI2C naming for S32K1XX.  Using S32K1XX clock functions to get peripheral input clock.

    arch/arm/src/s32k1xx:  Clone i.MXRT LPSPI and LPI2C support.  i.MXRT uses the same IP as S32K1XX.
2019-08-21 11:18:40 -06:00
Gregory Nutt
33ab25ae14 arch/arm/src/s32k1xx/s32k14x and boards/arm/s32k1xx/s32k146evb/src: Numerous fixes to get a clean build of the S32K146EVB. 2019-08-19 10:49:50 -06:00
Gregory Nutt
5b102ff848 Squashed commit of the following:
arch/arm/src/s32k1xx/s32k1xx_clockconfig.c:  Finishes the implementation of the core clock configuration logic.
    arch/arm/src/s32k1xx/hardware/s32k1xx_smc.h:  Add SMC register definition header file.
    arch/arm/src/s32k1xx:  Bring in GPIO logic from Kinetis.  Looks like the same IP.
2019-08-16 16:18:15 -06:00
Nathan Hartman
5a2d5fb7f9 arch/arm/src/tiva, arch/arm/include: Add support for Tiva TM4C123AH6PM. 2019-08-15 14:17:24 -06:00
Gregory Nutt
963031f42c arch/arm/src/s32k1xx: A few fixes. The build progresses further but still fails. 2019-08-14 12:40:51 -06:00
Pavel Pisa
810bf5e87a symtab/Makefile: When system wide locale is set (i.e. en_US.UTF-8) then 'read' is ordered after 'readdir' even if separator is set to quotation mark and key set to 2. When C locale is used result is correct. 2019-08-14 11:02:30 -06:00
Gregory Nutt
2a228e8650 Fleshs out a few more things needed to compile and build the S32K118EVB board configuration.
Squashed commit of the following:

    arch/arm/include:  Add interrupt IRQ numbers.
    tools/: Add support for the S32K1XX family.
2019-08-14 10:57:54 -06:00
Gregory Nutt
bcfabcbe53 This commit brings the initial files for a port to the NXP S32K1xx family. This is very much a work in progress and is little more that a partial configuration/build environment and some S32K1xx register definition header files
Squashed commit of the following:

    arch/arm/src/s32k1xx/hardware/s32k1xx_mcm.h:  Add MCM register definition file.
    arch/arm/src/s32k1xx/hardware/s32k1xx_memorymap.h:  Add memory map definition file.
    arch/arm/src/s32k1xx/hardware/s32k1xx_cmu.h:  Add CMU register definition file.
    arch/arm/src/s32k1xx/hardware/s32k1xx_pcc.h:  Add PCC register definition file.
    arch/arm/src/s32k1xx/hardware/s32k1xx_scg.h:  Add SCG register definition file.
    arch/arm/src/s32k1xx:  Add initial Make.defs files.
    Basic configuration logic for the S32K1 family.
2019-08-12 12:12:58 -06:00
Gregory Nutt
0ed1a06016 arch/arm/include/cxd56xx/chip.h: The correction of commit c300f27130 must be applied to the CXD56xx too. 2019-08-10 08:33:47 -06:00
Gregory Nutt
545cfada38 This commit removes CONFIG_ARCH_INT_DISABLEALL. In the normal course of things, interrupts must occasionally be disabled using the up_irq_save() inline function to prevent contention in use of resources that may be shared between interrupt level and non-interrupt level logic. Now the question arises, if we are using BASEPRI to disable interrupts and have high priority interrupts enabled (CONFIG_ARCH_HIPRI_INTERRUPT=y), do we disable all interrupts except SVCall (we cannot disable SVCall interrupts). Or do we only disable the "normal" interrupts?
If we are using the BASEPRI register to disable interrupts, then the answer is that we must disable ONLY the "normal interrupts".  That is because we cannot disable SVCALL interrupts and we cannot permit SVCAll interrupts running at a higher priority than the high priority interrupts (otherwise, they will introduce jitter in the high priority interrupt response time.)

Hence, if you need to disable the high priority interrupt, you will have to disable the interrupt either at the peripheral that generates the interrupt or at the NVIC.  Disabling global interrupts via the BASEPRI register cannot effect high priority interrupts.
2019-08-09 10:52:35 -06:00
Gregory Nutt
c300f27130 arch/arm/include/armv7-m/nvicpri.h: In the 'normal' case, the priority of the SVCALL interrupt was the same as the priority of the high priority interrupt. This means that SVCALL interrupt processing can defer the high priority interrupt and result in the jitter in that interrupt response. Fix is to raise the priority of the high priority interrupt above the priority of the SVCALL interrupt. Suggested by Nathan Hartman. 2019-08-09 07:07:16 -06:00
David S. Alessio
ced0dc1e16 arch/arm/src/armv7-m: Add ARMv7-M setjmp/longjump functions. 2019-08-06 15:59:19 -06:00
Nathan Hartman
5f76eb1207 arch/arm/src/tiva: LM3S, LM4F, TM4C: Fix GPIO IRQ error, ports R, S, T. Preprocessor logic for CONFIG_TIVA_GPIOx_IRQS was setting/clearing port Q defines when it should act on ports R, S, T. gpioport2irq() was missing handling for port T. 2019-08-04 16:55:26 -06:00
Nathan Hartman
c71f2fa56f arch/arm/src/tiva: Rename TM4C1294NC identifiers to TM4C1294NCPDT.
Rationale: TM4C1294NC is ambiguous:

  TM4C1294NCPDT is a 128-TQFP
  TM4C1294NCZAD is a 212-NFBGA

The TM4C1294NC part currently supported by NuttX is the TM4C1294NCPDT used on the TI EK-TM4C1294XL "Connected LaunchPad" (see configs/tm4c1294-launchpad). To ensure the correct part is fully specified, this commit updates all TM4C1294NC identifiers to TM4C1294NCPDT.

Rename:

  CONFIG_ARCH_CHIP_TM4C1294NC to CONFIG_ARCH_CHIP_TM4C1294NCPDT
  ARCH_CHIP_TM4C1294NC to ARCH_CHIP_TM4C1294NCPDT
  TM4C1294NC to TM4C1294NCPDT
2019-07-29 13:31:52 -06:00
Nathan Hartman
6e8b76c3ab arch/arm/src/tiva: Rename TM4C123GH6PMI identifiers to TM4C123GH6PM
Rationale: In terms of firmware programming, there is no functional difference between these parts:

  TM4C123GH6PMI7
  TM4C123GH6PMI7R
  TM4C123GH6PMT7
  TM4C123GH6PMT7R

From a programming standpoint, all of the above parts are TM4C123GH6PM, which means it doesn't make sense to differentiate between PM and PMI. (The PM means 64-LQFP. The I means temperature range -40C to +85C. It could be T meaning -40C to +105C. The R means it ships in Tape and Reel packaging as opposed to Tray.)

arch/arm/include/tiva/chip.h:
arch/arm/include/tiva/tm4c_irq.h:
arch/arm/src/tiva/hardware/lm/lm3s_flash.h:
arch/arm/src/tiva/hardware/tm4c/tm4c_pinmap.h:
configs/tm4c123g-launchpad/README.txt:
configs/tm4c123g-launchpad/nsh/defconfig:
  Rename: CONFIG_ARCH_CHIP_TM4C123GH6PMI to CONFIG_ARCH_CHIP_TM4C123GH6PM

arch/arm/src/tiva/Kconfig:
configs/Kconfig:
  Rename: ARCH_CHIP_TM4C123GH6PMI to ARCH_CHIP_TM4C123GH6PM

arch/arm/src/tiva/hardware/tm4c/tm4c_memorymap.h:
  Rename: CONFIG_ARCH_CHIP_TM4C123GH6PMI to CONFIG_ARCH_CHIP_TM4C123GH6PM
  Remove redundant Peripheral Base Addresses section. There were two identical copies, one for CONFIG_ARCH_CHIP_TM4C123GH6PMI and another for CONFIG_ARCH_CHIP_TM4C123GH6PM.
2019-07-29 11:15:46 -06:00
Alin Jerpelea
5867fdc0e1 Merged in alinjerpelea/nuttx (pull request #948)
arch: arm: cxd56xx: add GNSS device and UART0

* arch: arm: cxd56xx: add GNSS device

    Signed-off-by: Alin Jerpelea <alin.jerpelea@sony.com>

* arch: arm: cxd56xx: add Geofence Support

    Signed-off-by: Alin Jerpelea <alin.jerpelea@sony.com>

* arch: arm: cxd56xx: add UART0 iterface

    UART0 is an interface with hardware flow control in the application subsystem.

    Signed-off-by: Alin Jerpelea <alin.jerpelea@sony.com>

* configs: spresense: path correction

    In the initial commit the path reference was not updated

    Signed-off-by: Alin Jerpelea <alin.jerpelea@sony.com>

Approved-by: Gregory Nutt <gnutt@nuttx.org>
2019-07-12 11:29:22 +00:00
Gregory Nutt
ad1adffba6 arch/arm/src/lpc11xx, arch/arm/include/lpc11xx, configs/lpcxpresso-lpc1115: Support for the LPCXpresso-LPC1115 and for the LPC1115 architecture in general was removed after NuttX-7.30. The LPC11 port was never really used (to my knowledge) and was no longer supported. A snapshot of the port is still available in the Obsoleted repository. It can be brought back into the main repository at any time if anyone is willing to provide support for the architecture. 2019-07-11 16:16:11 -06:00
jjlange
e5dfd805e6 Merged in jjlange/nuttx/lpc40xx (pull request #946)
Add support for LPC40xx family chips

* Corrected a few peripheral definitions and pin functions for the LPC17xx family.
    Added configuration options, chip definitions, and additional pin functions for the LPC40xx family.
    Added board configurations for Embedded Artists LPC4088 Quickstart board and LPC4088 Developer's kit.  These configurations are still something of a work in progress.  In particular, the LCD functionality is untested.

* First pass rename in *.c and *.h files.

* Renamed LPC17XX to LPC17XX_40XX in config files

* Rplaced LPC17xx with LPC17xx/LPC40xx in .c files

* Replaced LPC17xx with LPC17xx/LPC40xx in .h files

* Updated some documentation

* Working on moving directories

* moved arch/arm/src/lpc17xx and arch/arm/include/lpc17xx to lpc17xx_40xx

* Renamed LPC17_* constants / configuration options to LPC17_40_*

* Updated chip family name defines

* Renamed some chip-specific files

* Updated references to renamed files

* Updated references to lpc17_ to lpc17_40_

* Renamed source files from lpc17_* to lpc17_40_*

* Clean up white space

Approved-by: Gregory Nutt <gnutt@nuttx.org>
2019-07-11 16:50:00 +00:00
Alin Jerpelea
9b8c4a355d Merged in alinjerpelea/nuttx (pull request #935)
drivers: video: add ISX012 Image sensor

* arch: arm: src: cxd56xx: add cisif support

    add cisif support on cxd56xx chip to be able to use cameras

    Signed-off-by: Alin Jerpelea <alin.jerpelea@sony.com>

* drivers: video: add ISX012 Image sensor

    add driver for ISX012 Image sensor

    Signed-off-by: Alin Jerpelea <alin.jerpelea@sony.com>

Approved-by: Gregory Nutt <gnutt@nuttx.org>
2019-07-04 14:02:05 +00:00
Alin Jerpelea
37a24c05fd arch/arm/src/cxd56xx: Cleaning up header files to match project layout. 2019-07-04 06:45:48 -06:00
Alin Jerpelea
bfda93d66b Merged in alinjerpelea/nuttx (pull request #915)
arch: arm: cxd56xx: I2C, SPISD, Charger and Gauge

* arch: arm: cxd56xx: add I2C character driver

    for testing purposes, we use the CXD56_I2C_DRIVER to register the
    /dev/i2c[] character devices.

    Signed-off-by: Alin Jerpelea <alin.jerpelea@sony.com>

* configs: spresense: use I2C character driver

    We should use the CXD56_I2C_DRIVER to register the /dev/i2c[]
    character devices.

    Signed-off-by: Alin Jerpelea <alin.jerpelea@sony.com>

* arch: arm: cxd56xx: add battery gauge driver

    add battery gauge driver for cxd56xx chip

    Signed-off-by: Alin Jerpelea <alin.jerpelea@sony.com>

* arch: arm: cxd56xx: add charger driver

    add charger driver for cxd56xx chip

    Signed-off-by: Alin Jerpelea <alin.jerpelea@sony.com>

* arch:arm: cxd56xx: add SPI SDCard configuration

    Add SPI SDCARD functionality configuration

    Signed-off-by: Alin Jerpelea <alin.jerpelea@sony.com>

* configs: spresense: enable gauge driver

    Signed-off-by: Alin Jerpelea <alin.jerpelea@sony.com>

* configs: spresense: enable charger driver

    enable charger driver on spresense board

    Signed-off-by: Alin Jerpelea <alin.jerpelea@sony.com>

Approved-by: Gregory Nutt <gnutt@nuttx.org>
2019-06-25 12:06:47 +00:00
Alin Jerpelea
2a32f36540 Merged in alinjerpelea/nuttx (pull request #909)
arch: arm: cxd56xx: SCU, ADC, I2C

* nuttx: configs: spresense: LEDS: fix warnings

    In the initial code several errors were missed because I pushed
    the dirty code.

    Signed-off-by: Alin Jerpelea <alin.jerpelea@sony.com>

* arch: arm: cxd56xx: add Sensor Control Unit (SCU)

    Add Sensor Control Unit (SCU) on cxd56xx chip

    Signed-off-by: Alin Jerpelea <alin.jerpelea@sony.com>

* arch: arm: cxd56xx: add I2C support

    add I2C support on cxd56xx chip

    Signed-off-by: Alin Jerpelea <alin.jerpelea@sony.com>

* arch: arm: cxd56xx: add ADC interface support

    Add ADC interface support on cxd56xx chip

    Signed-off-by: Alin Jerpelea <alin.jerpelea@sony.com>

* arch: arm: cxd56xx: Use DMAC for reading sensing data

    Use DMAC for reading sensing data from SCU on cxd56xx chip

    Signed-off-by: Alin Jerpelea <alin.jerpelea@sony.com>

* arch: arm: cxd56xx: code style sanitization

    NuttX does not use Deoxygen for documentation and no file should contain Doxygen tags or Doxygen style comments.

    Signed-off-by: Alin Jerpelea <alin.jerpelea@sony.com>

* configs: spresense: enable I2CDEV

    add enable I2CDEV for spresense board

    Signed-off-by: Alin Jerpelea <alin.jerpelea@sony.com>

* configs: spresense: add notification LEDs

    Add usefull diagnostic LEDs on the speresense board

    Signed-off-by: Alin Jerpelea <alin.jerpelea@sony.com>

Approved-by: Gregory Nutt <gnutt@nuttx.org>
2019-06-18 12:46:43 +00:00
Alin Jerpelea
92892a8dd7 Merged in alinjerpelea/nuttx (pull request #902)
arch: arm: cxd56xx: PM and PWM

* configs: spresense: add SPI configuration

    add SPI configuration for spresense board

    Signed-off-by: Alin Jerpelea <alin.jerpelea@sony.com>

* arch: arm: cxd56xx: add support for PWM

    add support for PWM for cxd56xx

    Signed-off-by: Alin Jerpelea <alin.jerpelea@sony.com>

* configs: spresense: enable PWM support

    enable PWM support on spresense board

    Signed-off-by: Alin Jerpelea <alin.jerpelea@sony.com>

* arch: arm: cxd56xx: add Power Management PROCFS support

    the powermanager procfs support will export
    /proc/pm:
     clock
     power

    Signed-off-by: Alin Jerpelea <alin.jerpelea@sony.com>

* configs: spresense: enable powermanager procfs support

    The powermanager procfs is disabled by default and need to be enabled
    by the CONFIG_CXD56_PM_PROCFS option

    Signed-off-by: Alin Jerpelea <alin.jerpelea@sony.com>

* arch: arm: cxd56xx: add timer driver

    Add timer driver for cxd56xx.

    NOTE
    The timer allows a divider of 1, 16 and 256 options

    Signed-off-by: Alin Jerpelea <alin.jerpelea@sony.com>

* arch: arm: cxd56xx: add Watch Dog Timer

    Add Watch Dog Timer on cxd56xx

    Signed-off-by: Alin Jerpelea <alin.jerpelea@sony.com>

* configs: spresense: enable timer

    the platform support has been added and now we can use the timers
    on spresense board.

    Signed-off-by: Alin Jerpelea <alin.jerpelea@sony.com>

* configs: spresense: enable WatchDog timer

    The platform support has been added and now we can use the WatchDog
    Timer on spresense board.

    Signed-off-by: Alin Jerpelea <alin.jerpelea@sony.com>

Approved-by: Gregory Nutt <gnutt@nuttx.org>
2019-06-14 18:40:06 +00:00
Alin Jerpelea
215a146f2e Merged in alinjerpelea/nuttx (pull request #884)
arch: arm: cxd56xx: add support for USB and SDIO

* arch: arm: cxd56xx: add support for USB connectivity

    Add basic support for USB connectivity

    Signed-off-by: Alin Jerpelea <alin.jerpelea@sony.com>

* arch: arm: cxd56xx: add SDHCI support

    We add SDHCI driver for the cxd56xx

    Signed-off-by: Alin Jerpelea <alin.jerpelea@sony.com>

Approved-by: Gregory Nutt <gnutt@nuttx.org>
2019-06-05 14:05:56 +00:00
Alin Jerpelea
eeedce32c4 Merged in alinjerpelea/nuttx (pull request #881)
updates for arch: arm: cxd56xx:

* arch: arm: cxd56xx: add pinconfig

    Add the HW pin configuration for cxd56xx

    Signed-off-by: Alin Jerpelea <alin.jerpelea@sony.com>

* arch: arm: cxd56xx: add GPIO support

    Add GPIO support for cxd56xx

    Signed-off-by: Alin Jerpelea <alin.jerpelea@sony.com>

* arch: arm: cxd56xx: add support for GPIO interrupts

    add support for GPIO interrupts

    Signed-off-by: Alin Jerpelea <alin.jerpelea@sony.com>

* arch: arm: cxd56xx: add clock support

    Add clock support for cxd56xx

    Signed-off-by: Alin Jerpelea <alin.jerpelea@sony.com>

* arch: arm: cxd56xx: add PMIC support

    Add support for PMIC (Power management integrated circuit)
    for cxd56xx chip

    Signed-off-by: Alin Jerpelea <alin.jerpelea@sony.com>

* arch: arm: cxd56xx: add FIFO CPU schedulier

    add a simple FIFO schedulier that minimizes overhead

    Signed-off-by: Alin Jerpelea <alin.jerpelea@sony.com>

* arch: arm: cxd56xx: add ICC support

    add Inter Core Communication for cxd56xx

    Signed-off-by: Alin Jerpelea <alin.jerpelea@sony.com>

Approved-by: Gregory Nutt <gnutt@nuttx.org>
2019-06-05 11:29:51 +00:00
Gregory Nutt
5cdd038df2 Rename STM32F0L0 to STM32F0L0G0 since it now alsow supports the STM32G0 thanks to Mateusz Szafoni's contribution
Squashed commit of the following:

    arch/arm:  Rename include/stm32f0l0 and src/stm32f0l0 to stm32f0l0g0.

    Change all occurrences of lower-case stm32f0l0 to stm32f0l0g0.

    Change all occurrences of upper-case STM32F0L0 to STM32F0L0G0.
2019-05-27 08:16:24 -06:00
raiden00pl
9c676a9e67 Merged in raiden00/nuttx_lora (pull request #876)
Initial support for STM32G0

configs: initial support for nucleo-g071rb

Approved-by: Gregory Nutt <gnutt@nuttx.org>
2019-05-27 11:48:57 +00:00
Mateusz Szafoni
8603a13f38 arch/arm/include/stm32f0l0/chip.h: Add one more definition of STM32_NADC. 2019-05-17 13:12:21 -06:00
raiden00pl
a5250662fa Merged in raiden00/nuttx_lora/lora (pull request #872)
Port AES and RND to STM32 M0 + some improvements

arch/arm/src/stm32f0l0/stm32_rng.c: change the function names to use the stm32_rng prefix

arch/arm/src/stm32f0l0/stm32_usbdev.c: move HSI48 enable to stm32xx_rcc.c

arch/arm/src/stm32f0l0: add support for AES

arch/arm/src/stm32f0l0: add support for RND

arch/arm/src/stm32f0l0: add HSI48 support for L0

Approved-by: Gregory Nutt <gnutt@nuttx.org>
2019-05-17 18:46:30 +00:00
Gregory Nutt
3e848fb893 Merged imxrt1020 into master 2019-04-30 16:08:46 -06:00
Jukka Laitinen
54856cfa5e arch/arm/src/stm32h7/: Add stm32h7 ethernet driver. This is the initial push for the ethernet driver. The driver has been tested to be working on a nucleo board. This is still WIP, it doesn't for example do MAC filtering on HW level, but just receives all ethernet packets. 2019-04-30 08:43:39 -06:00
Gregory Nutt
abf6965c24 Squashed commit of the following:
libs/:  Remove references to CONFIG_DISABLE_SIGNALS.  Signals can no longer be disabled.
    syscall/:  Remove references to CONFIG_DISABLE_SIGNALS.  Signals can no longer be disabled.
    wireless/:  Remove references to CONFIG_DISABLE_SIGNALS.  Signals can no longer be disabled.
    Documentation/:  Remove references to CONFIG_DISABLE_SIGNALS.  Signals can no longer be disabled.
    include/:  Remove references to CONFIG_DISABLE_SIGNALS.  Signals can no longer be disabled.
    drivers/:  Remove references to CONFIG_DISABLE_SIGNALS.  Signals can no longer be disabled.
    sched/:  Remove references to CONFIG_DISABLE_SIGNALS.  Signals can no longer be disabled.
    configs:  Remove references to CONFIG_DISABLE_SIGNALS.  Signals can no longer be disabled.
    arch/xtensa:  Remove references to CONFIG_DISABLE_SIGNALS.  Signals can no longer be disabled.
    arch/z80:  Remove references to CONFIG_DISABLE_SIGNALS.  Signals can no longer be disabled.
    arch/x86:  Remove references to CONFIG_DISABLE_SIGNALS.  Signals can no longer be disabled.
    arch/renesas and arch/risc-v:  Remove references to CONFIG_DISABLE_SIGNALS.  Signals can no longer be disabled.
    arch/or1k:  Remove all references to CONFIG_DISABLE_SIGNALS.  Signals are always enabled.
    arch/misoc:  Remove all references to CONFIG_DISABLE_SIGNALS.  Signals are always enabled.
    arch/mips:  Remove all references to CONFIG_DISABLE_SIGNALS.  Signals are always enabled.
    arch/avr:  Remove all references to CONFIG_DISABLE_SIGNALS.  Signals are always enabled.
    arch/arm:  Remove all references to CONFIG_DISABLE_SIGNALS.  Signals are always enabled.
2019-04-29 14:52:05 -06:00
Nobuto Kobayashi
eba004d498 arch/arm/src/cxd56xx and arch/arm/include/cxd56xx: Add initial CXD56xx chip sources. 2019-04-22 07:51:22 -06:00
raiden00pl
95340ebfda Merged in raiden00/nuttx_l0f0 (pull request #852)
Support for STM32L071X and a few improvements for STM32F0L0

arch/arm/src/stm32f0l0: add peripherals configuration for STM32L0

arch/arm/src/stm32f0l0: a few fixes for USART

arch/arm/include/stm32f0l0/stm32f0_irq.h: use names as in other STM32

arch/arm/include/stm32f0l0/chip.h: use names as in other STM32

Approved-by: Gregory Nutt <gnutt@nuttx.org>
2019-04-09 13:28:38 +00:00
zhangyuan7
471a18ee4d arch/arm: Add the initial cortex-a7 archtiecture support 2019-03-19 11:51:29 -06:00
Xiang Xiao
2f208fdde8 arch/Kconfig: Move FPU options to a common place and unify the usage by removing ARCH_CORTEXRxF. 2019-03-19 10:26:15 -06:00
Levin Li
043df95d8d arch/arm/include/nrf52/ and arch/arm/src/nrf52: 1. Added 52840 family support 2. Use common irq and memory layout header file for 52832 & 52840. 2019-03-12 09:43:49 -06:00
Kejun ZHOU
f33ed3c8c0 *Merged in zhoukejun/nuttx_nucleo-f767zi (pull request #838)
Add three patches  about STM32 intherupts and network loopback files

* Add the missing macro STM32_IRQ_NIRQS used by ./arch/arm/src/stm32f7/stm32_irq.c

    Signed-off-by: Kejun ZHOU <zhoukejun@outlook.com>

* The struct in_addr doesn't have the member sin_addr.

    Signed-off-by: Kejun ZHOU <zhoukejun@outlook.com>

* The function lib_lo_ipv6match() is for IPv6.
    Correct the function it calls from lib_lo_ipv4matchto() to lib_lo_ipv6match().
    Also add CONFIG_NET_IPv6 for configuration.

    Signed-off-by: Kejun ZHOU <zhoukejun@outlook.com>
2019-03-11 03:44:57 +00:00
raiden00pl
4ae7373427 Merged in raiden00/nuttx_h7 (pull request #835)
Improvements for H7 towards the DMA support

arch/arm/include/stm32h7/stm32h7x3xx_irq.h: fix typos and rename DMA1/2 irq names to match those from other STM32

arch/arm/src/stm32h7/chip/stm32_bdma.h: add auxiliary definitions

arch/arm/src/stm32h7/chip/stm32_dma.h: cosmetic changes

arch/arm/src/stm32h7/chip/stm32_dmamux.h: add auxliary definitions and fix some typos

arch/arm/src/stm32h7/chip/stm32_mdma.h: add auxliary definitions and fix some typos

arch/arm/src/stm32h7/chip/stm32h7x3xx_dmamux.h: add DMAMAP definitions for MDMA, DMA1, DMA2 and BDMA

arch/arm/src/stm32h7/chip/stm32h7x3xx_memorymap.h: fix AHB1 base adresses and add some address blocks

arch/arm/src/stm32h7/chip/stm32h7x3xx_rcc.h: fix some definitions to match other STM32 ports

arch/arm/src/stm32h7/stm32_allocateheap.c: use SRAM from D2 domain (SRAM123) for now

arch/arm/src/stm32h7/stm32h7x3xx_rcc.c: enable clock for MDMA and BDMA

Approved-by: Gregory Nutt <gnutt@nuttx.org>
2019-03-01 17:37:22 +00:00
Gregory Nutt
b1001b4e50 Update TODO list regarding non-queuing of signal actions; Add comments in code at areas where the issue applies. 2019-02-04 08:35:03 -06:00
Xiang Xiao
818d8dda1e Remove empty seria.h and all references 2019-01-26 15:08:14 -06:00
Xiang Xiao
bda6d7f065 arch/arm/include/syscall.h: Add missing inclusion of arch/armv7-r/syscall.h for CortexR. 2019-01-26 07:43:31 -06:00
Xiang Xiao
9f408e9937 arch/arm/src/include/xxx/syscall.h: Align semi-hosting call style with other syscalls 2019-01-26 07:40:47 -06:00
Xiang Xiao
2e70eef767 arch/arm/include/armv-7m/irq.h and armv6-m/irq.h: Remove redundant conditioning on CONFIG_BUILD_PROTECTED 2019-01-26 07:04:15 -06:00
Xiang Xiao
9343451bea arch/xxx/include/: watchdog.h and arm-elf.h because they are empty. The arm-elf header file was never used; the empty watchdog.h header file was used in only one place. 2019-01-26 07:01:45 -06:00
Daniel Agar
cc8449e903 Merged in dagar/nuttx/pr-kinetic_minor_fix (pull request #820)
arch/arm/include/kinetis/kinetis_sim.h remove undef extra character

Approved-by: GregoryN <gnutt@nuttx.org>
2019-01-19 15:39:46 +00:00
raiden00pl
f8c18e09e9 Merged in raiden00/nuttx_lora (pull request #811)
stm32f0l0: fix GPIO EXTI lines assignment for STM32 M0

Approved-by: GregoryN <gnutt@nuttx.org>
2019-01-12 07:59:31 +00:00
Gregory Nutt
c59ccd4083 arch/arm/include/amm335x: Trivial, cosmetic changes after review 2019-01-08 08:15:04 -06:00
Petro Karashchenko
0f38c331e7 arch/arm/include/amm335x: Add header files needed for build. 2019-01-08 08:06:26 -06:00
Gregory Nutt
a0a537a9f0 arch/arm/src/bcm2708 and arch/arm/include/bcm2708: Remove all support for the BCM2708/2835. This was added only for support of the Pi Zero board which was previously removed. The support was minimal and unverified. The removed files can still be found in the Obsoleted directory. 2019-01-02 12:15:07 -06:00
raiden00pl
a20e874883 Merged in raiden00/nuttx_pe (pull request #796)
arch/arm/src/stm32: unified naming for DAC interfaces

Approved-by: GregoryN <gnutt@nuttx.org>
2019-01-02 12:12:28 +00:00
Lwazi Dube
53ce088a54 arch/arm/include/tiva and src/tiva: Improve GPIO interrupt support by removing unnecessary, hard-coded per-MCU defines and using the existing Kconfig configuration options instead. 2018-12-31 07:19:30 -06:00
Lwazi Dube
1cf992ed04 arch/arm/src/tiva/: Add support for LM3S9B92 2018-12-28 16:03:25 -06:00
Mateusz Szafoni
4c601faf6f Brings in initial WIP support for the STML0. This initial commit is in pretty bad shape and, hence it it marked EXPERIMENTAL."
Squashed commit of the following:

    arch/arm/src/stm32f0l0:  Various changes for a clean compilation.  Still does not compile correctly due to missing FLASH latency definitions.

    arch/arm/src/stm32f0l0/hardware:  Add framework for the STM32 L0.  Currently set to same as the STM32F0.

    arch/arm/src/stm32f0l0/hardware:  Very fragmentary FLASH header register definitions for the STM32 L0.

    arch/arm/src/stm32f0l0:  Bring in DMA v1.  Cannot possibly be functionaly yet due to the limited number for M0 interrupts.

    arch/arm/src/stm32f0l0:  Add STM32 F0/L0 LSE and backup power domain controls.

    arch/arm/src/stm32f0l0/hardware/stm32l0_pwr.h:  Add STM32L0 PWR header file.

    arch/arm/include/stm32f0l0/chip.h: Clean up WIP chip header file.

    arch/arm/include/stm32f0l0/chip.h: WIP.

    arm/src/stm32f0l0: Resolve some small differences between F0 and L0 GPIO pin options.

    arch/arm/src/stm32f0l0: Better integrate STM32L0 header files.

    nuttx/arch/arm/include/stm32f0l0:  Add STM32L0 IRQ number definition file.

    arch/arm/src/stm32f0l0:  Add STM32L0 RCC driver.

    arch/arm/src/stm32f0l0/hardware:  Adds basic STM32L0 header files.

    arch/arm/src/stm32f0l0:  Add STM32L0 chip selections.

    configs/:  Hook new STM32L0 boards into the configuration system.

    configs: nucleo boards use as default ST LINK MCO as clock input from MCU and for this HSEBYP must be enabled

    configs: add basic support for nucleo-l073rz

    configs: add basic support for b-l072z-lrwan1
2018-12-19 12:36:35 -06:00
Mateusz Szafoni
a9626f3ad3 /arch/arm/src/stm32: Bring in some mostly cosmetic updates from PR783 (most of the PR is going to the stm32f0l0 directory). 2018-12-18 10:53:49 -06:00
Gregory Nutt
b4ab6bc7f2 Squashed commit of the following:
arch/arm/src/stm32f0l0:  Some fixes for a clean build.  Still have a problem with lots of error messages coming from kconfig-mconf, but the configuation looks fine.  Sometimes kconfig errors are difficult to spot.  I would appreciate it anyone can spot the issue.

    arch/arm/src/stm32f0l0/hardware:  Rename the chip directory to hardware.  This will hopefully eliminate some problems that I have seen with the chip include paths not being unique in more complex configuartions.

    configs/nucleo-f072rb, configs/nucleo-f091rc, configs/stm32f051-discovery, and configs/stm32f072-discovery:  Update for all of the naming changes made in arch/arm/src/stm32f0l0

    arch/arm/include/stm32f0l0:  Rename stm32f0 to stm32f0l0 to make a speace for STM32 L0.  Rename files, functions and defines, removeing the f0_ from the names in order to make them MCU agnostic.

    arch/arm/src/stm32f0l0:  Rename stm32f0 to stm32f0l0 to make a speace for STM32 L0.  Rename files, functions and defines, removeing the f0_ from the names in order to make them MCU agnostic.
2018-12-16 10:50:16 -06:00
Gregory Nutt
7113cef6b7 Squashed commit of the following:
arch/arm/src/tiva:  Add CC13xx logic to enable power domains needed by peripherals and to enable clocking to peripherals.

    arch/arm/src/tiva:  Rename some header files so that they are unique in order to avoid including the wrong file.  Fix various compile issues found during some initial trial builds.

    arch/arm/src/tiva:  Add CC13xx clock enable and power enable macros that are backward compatible with lm/tm4c macros.
2018-12-09 07:03:10 -06:00
Mateusz Szafoni
ca4ef377fb Merged in raiden00/nuttx_pe (pull request #776)
arch/arm/include/stm32/chip.h: fix typo

Approved-by: GregoryN <gnutt@nuttx.org>
2018-12-06 17:52:11 +00:00
Gregory Nutt
619998e32d arch/arm/include/tiva/tm4c_irq.h: Fix a typo introduced in recent changes. Found in build testing. 2018-12-06 08:42:24 -06:00
Gregory Nutt
d830b323dd arch/arm/src/tiva: Starting to work through alternate function pin configuration and GPIO interrupts for C13xx. Works a lot differently than the LM and Tiva parts. 2018-12-05 15:17:22 -06:00
Mateusz Szafoni
428b625428 Merged in raiden00/nuttx_pe (pull request #773)
arch/arm/include/stm32/chip.h: remove redundant STM32 family definitions. It is already done in arch/arm/src/stm32/Kconfig

Approved-by: GregoryN <gnutt@nuttx.org>
2018-12-05 11:46:36 +00:00
Gregory Nutt
3d23c68c05 arch/arm/src/tiva: Add GPIO header files. Reoganized tiva_gpio.c so that we can also handle the cc13xx GPIO which is very different. 2018-12-04 13:16:52 -06:00
Dave Marples
d0cda60442 In the current implementation we only use very high priority interrupts (levels 0, 0x10 and 0x20 in CORTEX-M speak) but that means there are loads of lower priority ones that are effectively unused. I have *not* changed the semantics of these levels but have 'shifted' them to be based around the midpoint of the available interrupts (0x80) rather than at the top end....that allows for interrupts to be defined above (or, indeed, below) them as needed by the application. This should have no functional effect on existing code but adds in a clean capability to define higher priority interrupts. 2018-12-03 17:41:59 -06:00
Gregory Nutt
ffc7dbf36b arch/arm/include/tiva: Add support for cc13xx interrupts. arch/arm/src/armv7-m: Add FPB header file. 2018-12-03 07:26:02 -06:00
Gregory Nutt
f0e6e06a37 Squashed commit of the following:
arch/arm/src/tiva/hardwar:  Move LM3S and LM4F include files to hardware/lm/ sub-directory.  Move all TM4C header files files to hardware/tm4c/ sub-directory.

    arch/arm:  Add basic configuration/build support for CC13xx parts.  Conditioned on EXPERIMENTAL.
2018-12-01 12:22:05 -06:00
Mateusz Szafoni
0a288ac3db Merged in raiden00/nuttx_pe (pull request #769)
configs: add support for nucleo-f103rb, nucleo-f207zg and nucleo-l152re

Approved-by: GregoryN <gnutt@nuttx.org>
2018-12-01 12:22:05 +00:00
Gregory Nutt
a6682a9bef Squashed commit of the following:
arch/arm/src/max326xx and configs/max32660-evsys/src:  Fix some issues with GPIO setup of output pins.  Correct polarity of on-board LED output.  The on-board LED is now functional.

    arch/arm/src/max326xx: WFI instruction in IDLE loop seems to interfere with stability.  Commented out for now.  Needs to be investigated further.
2018-11-28 11:20:31 -06:00
Gregory Nutt
b9903dc8c8 arch/arm/src/max326xx: Finish DMA implementation. Clean up compile issues when DMA, GPIO interrupts are enabled. 2018-11-20 11:14:11 -06:00
Gregory Nutt
03cd52a5a2 arch/arm/include/max326xx: Add missing MAX32660 interrupt vectors. arch/arm/src/max326xx: Add missing MAX32660 GPIO interrupt handler. 2018-11-19 18:02:57 -06:00
Gregory Nutt
1d2a69539b Squashed commit of the following:
arch/arm/src/max326xx/max32660/max32660_serial.c:  Add a mostly commented out serial driver.  With this, we can accomplish a complete build with many warnings for 'Missing logic'
    configs/max32660-evsys/src/max326_button.c:  Add support for the on-board button.
    arch/arm/src/max326xx:  Add a mostly empty max326_lowputc.c file mostly so that we can get further in the compilation.  Fixed several more compile errors revealed by this.
    arch/arm/src/max326xx:  Add peripheral clock control header file.
2018-11-19 10:47:28 -06:00
Gregory Nutt
169198ff38 arch/arm/src/max326xx/max32660: Add GPIO driver and GPIO interrupt support. 2018-11-18 11:22:51 -06:00
Gregory Nutt
8e18e8ae54 arch/arm/src/max326xx: Get's past a few initial compile problems. Still a long road ahead. 2018-11-17 15:36:40 -06:00
Gregory Nutt
06f132c5d0 Brings in WIP port for the Maxim Integrated MAX326xx MCU family. Not really very much in place yet so marked EXPERIMENTAL in Kconfig file.
Squashed commit of the following:

    Update a README.  Mark MAX326XX as EXPERIMENTAL before bringing into master.
    arch/arm/src/max326xx/chip:  Add MAX32660 TMR register definition header files.
    arch/arm/src/max326xx/chip:  Add MAX32660 WDT register definition header files.
    arch/arm/src/max326xx/chip:  Add MAX32660 RTC register definition header files.
    arch/arm/src/max326xx/chip:  Add MAX32660 UART register definition header files.
    arch/arm/src/max326xx/chip:  Add DMA register definition header files.
    Update some comments explaining what is meant by a 'chip family'
    arch/arm/src/max326xx/chip:  Add GPIO register definition header files.
    arch/arm/src/max326xx/chip:  Add FLC register definition header files.
    arch/arm/src/max326xx/chip:  Add FCR, PWRSEQ, and SIR register definition header files.
    arch/arm/src/max326xx/chip:  Add ICC register definition header file.
    arch/arm/src/max326xx/chip:  Add memory map header files.
    arch/arm/include/max326xx:  Minor fleshing out.
    arch/arm/arm/include/max326xx: Add basic support for Maxim MAX326xx family.  arch/arm/Kconfig and arch/arm/src/max326xx/Kconfig:  Add basic condiguration support for the MAX326xx.
2018-11-16 13:17:47 -06:00
Juha Niskanen
e37f260d67 arch/arm/src/stm32l4: add initial support for STM32L412 and STM32L422 chips 2018-11-09 09:54:20 -06:00
Petteri Aimonen
ec6c7839d3 Merged in paimonen/nuttx/pullreq_STM32_NDAC_fix (pull request #752)
NuttX: STM32F407VG has only one DAC

NDAC=2 causes compilation error when trying to use e.g. STM32_DAC1_CR macro.

Approved-by: GregoryN <gnutt@nuttx.org>
2018-11-09 12:15:57 +00:00
David Sidrane
a0745bbef6 Merged in david_s5/nuttx/master_imxrt (pull request #748)
Adding imxrt 106x

* imxrt:Fix comment in imxrt105x_memorymap

* imxrt:Add imxrt1060 memory map

* imxrt:Add imcrt106x to imxrt_memorymap

* imxrt:Add i.MX RT 106x to Kconfig

* imxrt:Moved IMXRT_GPIO_NPORTS to chip.h & fixed comments

* imxrt:105x IRQ fix comment

* imxrt:gpioirq GPIO4,5 using wrong boundry

* imxrt:Add RT106x irq headers & Kconfig

* imxrt:Add rt106x GPIO chip headers

* imxrt:Extend Number of GPIO ports

* imxrt:Add 106x DMAMUX header

* imxrt:iomuxc add 106x

* imxrt:106x iomuxc extend Indexes

* imxrt:pinmux Add 106x

* imxrt:clockconfig use imxrt_memorymap.h

* imxrt:allocateheap use OCRAM2 as BASE when avaialbe

Approved-by: GregoryN <gnutt@nuttx.org>
2018-11-06 22:47:20 +00:00
Mateusz Szafoni
2a4ed884b5 Merged in raiden00/nuttx_pe (pull request #743)
arch/arm/stm32: add support for STM32F303xD/E; configs: add basic support for nucleo-f303ze

Approved-by: GregoryN <gnutt@nuttx.org>
2018-10-28 16:39:56 +00:00
raiden00pl
342cbe58dd Merged in raiden00/nuttx_pe (pull request #732)
configs: add support for nucleo-f302r8 board

Approved-by: GregoryN <gnutt@nuttx.org>
2018-10-05 13:02:49 +00:00
raiden00pl
af8a002a10 Merged in raiden00/nuttx_h7 (pull request #720)
I2C support for STM32H7

* stm32h7/chip.h: update peripherals

* stm32h7x3xx_rcc.h: update definitions

* stm32h7x3xx_rcc.c: remove some unused code and configure I2C clocks

* stm32h7: add lower half I2C driver (based on F7 I2C driver)

* configs/nucleo-h743zi: add LSM303AGR and LSM6DSL configuration

* Remove whitespace

* sensors/lsm303agr.c, sensors/lsm6dsl.c: add mising include, remove whitespace

Approved-by: GregoryN <gnutt@nuttx.org>
2018-09-16 15:58:25 +00:00
Gregory Nutt
aee1c39eab configs/metro-m4: Fix RxD interrupt pin selection. The number SERCOM interrupts do not refer to PAD numbers, but to bit positions in the INFLAG register (very tiny footnote in the data sheet). With with final fix, the basic NSH configuration appears fully functional. 2018-09-01 15:29:22 -06:00
Gregory Nutt
6ada0e10ba configs/metro-m4: Fix RxD PAD selection. Add a configuration option to use OSCULP32K instead of XOSC32K. 2018-09-01 14:38:19 -06:00
Gregory Nutt
0001607f71 arch/arm: (1) Add semihost support for syslog, (2) Add semihost support for HostFS 2018-08-23 08:00:07 -06:00
Gregory Nutt
8c61c2f31b Remove trailing spaces at the end of lines. 2018-08-13 07:39:38 -06:00
Juha Niskanen
2589fc943e arch/arm/src/stm32l4: Add initial support to STM32L4+ chips 2018-08-13 07:06:51 -06:00
David Sidrane
9ef481ce4b Squashed commit of the following:
Author: Gregory Nutt <gnutt@nuttx.org>
    arch/arm/src/kinetis:  Cosmetic changes from review of coding standard.

Author: David Sidrane <david_s5@nscdg.com>
    Merged in david_s5/nuttx/master_kinetis (pull request #710)

    kinetis:Add DMA and use it as RX FIFOs on Serial

    * Add initial implementation of the DMA

    * Add across Kxx family support [WIP]

    * Incorporate the DMA into the serial

        Add polling to serial

        do DMA initialisation at UART startup and fix DMA mux setting.

        Fix circular DMA handling in the serial driver.

    * Adapt defconfig to enable UART1,4 RXDMA

    * [WIP] - refactor this with new CONFIG DMA settings

    * kinetis/Kconfig:Bring inline with upstream stucture

          1. Use the Serial console configuration from drivers/serial/Kconfig
            and friends.
          2. Prefix arch specific featurs as such
             UARTx_RXDMA->KINETIS_UARTx_RXDMA

    * Kinetis:Serial formatting and clean up

    * kinetis:DMA Formating and Cleanup

    * kinetis:serial Use cleaner DMA API

    * kinetis:Make.defs fix duplicate/errant kinetis_dma.o

    * kinetis:serial Fix warning/error on only one uart using DMA

          The driver can support no DMA on any UART, DMA on some
          UARTs or DMA on all UARTs.

          In the case of no DMA we disable the DMA based variables
          and logic. In the case of all DMA we disable the non
          DMA variables and logic, and in the mixed case both
          DMA and non DMA variable and logic are enabled.

    * kinetis:dma config fix formatting

    * kinetis:chip/dma fix formatting

    * kinetis:DMA config assume Unknown

           Assume KINETIS_DMA_VERSION_UKN for all SoC not versioned
           This is as the code was in nuttx prior to this commit

    * kinetis:DMAMUX contain versioning- use HAS pattern define Unknown

          The pattern for chip versioning is to define 'HAS' constants.
          Define KINETIS_DMAMUX_HAS_MONOTONIC_CHCFG to contain the
          version numbers to the include soc header and use that define
          in the chip headers.

          Define the KINETIS_DMAMUX_VERSION_UKN for the default as prior
          this commit addressing was by default monotonic for CHCFG

    * freedom-k66f:Disable Serial RXDMA

          The application has to add calling of the kinetis
          serial dma poll as it is application specific.

    Approved-by: GregoryN <gnutt@nuttx.org>
2018-08-10 08:03:50 -06:00
Juha Niskanen
e402dadf5d arch/arm/src/stm32l4: Avoid using redundant CONFIG_STM32L4_STM32L4X2. This is almost always same as CONFIG_STM32L4_STM32L4X3. Avoid duplication to reduce macro clutter. This patch limits CONFIG_STM32L4_STM32L4X2 usage to dependency tracking and pinmap. Also enable ADC for CONFIG_STM32L4_STM32L4X5 (untested, but same RM). 2018-08-09 06:42:54 -06:00
Gregory Nutt
5996d70883 Revise commit 09ccd43d61: That change had the subtle side-effect of unconditionally enabling interrupts in the primask. That may be what we want in most cases, but certainly not all. This does increse the size of the inline function by about 48-bits per instantiation. 2018-08-04 07:37:31 -06:00
Gregory Nutt
09ccd43d61 arch/arm/include/armv7-m, arch/arm/include/armv7-m, arch/arm/include/stm32f7: Add a configuration to enable workaround for r0p1 Errata 837070: Increasing priority usingwrite to BASEPRI does not take effect immediately.
This update is required to be serialized to the instruction stream meaning that after this update completes, it takes effect immediately and no exceptions of lower priority than the new boosted priority can pre-empt execution.  Because of this erratum, the priority boosting does not take place immediately, allowing the instruction after the MSR to be interrupted by an exception of lower priority than the new boosted priority. This effect is only limited to the next instruction. Subsequent instructions are guaranteed to see the new boosted priority.

This was raised in Bitbucket issue 113 from Vadzim Dambrouski.
2018-08-02 16:51:58 -06:00
Gregory Nutt
754c8493ff arch/arm/src/samd5e5: Leverage the SAMD2L2 DMA controller. 2018-07-29 11:31:26 -06:00
Gregory Nutt
a9d713bbcc This is the initial commit the port to the SAMD5x/E5x MCU family and also support for the Adafruit Metro M4 board. It port is untested and unfinished. It currently will not even link due to some missing clock related logic.
Squashed commit of the following:

    arch/arm/src/samd5e5: Clean-up EIC logic.
    arch/arm/src/samd5e5:  Fix some compilation issues; Still issues with the EIC logic from samd2x.
    arch/arm/src/samd5e5:  Fix some compilation issues; bring in some EIC logic from samd2x.
    arch/arm/src/samd5e5:  Add NVMCTRL header file, fix some compiler problems, misc. clean-up.
    configs/metro-m4:  Add LED support.
    arch/arm/src/samd5e5:  Bring in SAML21 clock configuration.  This is a WIP; it cannot possible even compile yet.
    arch/arm/src/samd5e5:  Leverage Cortex-M4 interrupt and SysTick logic from the SAM3/4.
    arch/arm/src/samd5e5: Add SERCOM utility function.
    arch/arm/src/samd5e5:  Bring all SERCOM USART logic from SAMD2L2 to SAMD5E5.  This is a brute coy with nothing more than more that name changes and extension from 5 to 7 SERCOMs.
    arch/arm/src/samd5e5: Add sam_config.h header file
    arch/arm/src/samd5e5/:  Add Generic Clock (GCLK) utility functions.
    arch/arm/src/samd5e5:  Add EVSYS register definition file
    arch/arm/src/samd5e5 and configs/metro-m4:  Use SERCOM3 for the Arduino serial shield as console.
    arch/arm/src/samd5e5/chip:  Add SERCOM USART, SPI, I2C master, and slave register defintions header files
    arch/arm/src/samd5e5/chip:  Add AES, PM, TRNG, and WDT header files.
    arch/arm/src/samd5e5/chip:  Add pin multiplexing header files.
    Various fixes to configuration system; fix metro-m4/nsh defconfig file.
    configs/metro-m4:  Add initial support for the Adafruit Metro M4 board.
    arch/arm/src/samd5e5:  Add peripheral clock helpers.
    arch/arm/src/samd5e5/chip:  Add PAC register definition header file.  Fix some errors in the memory map header file.
    arch/arm/src/samd5e5:  Add chip.h headerf file.
    arch/arm/src/samd5e5:  Add PORT register definitions and support from SAML21.
    arch/arm/include/samd5e5:  Add interrupt vector definitions.
    arch/arm/src/samd5e5:  Add some boilerplate files.  Correct some typos.
    arch/arm/src/samd5e5/chip/sam_eic.h:  Add EIC register definitions.
    arch/arm/src/samd5e5/chip:  Add OSC32KCTRL and OSCCTRL register definitions.
    arch/arm/src/samd5e5/chip:  Add GCLK, MCLK, and RSTC header files.
    arch/arm/src/samd5e5/chip/sam_cmcc.h:  Add CMCC register definitions
    arch/arm/src/samd5e5/chip/sam_supc.h:  Add SUPC header file.
    arch/arm/src/samd5e5:  Add start-up logic.
    arch/arm/src/samd5e5:  Add Make.defs file
    arch/arm/src/samd5e5/chip:  Add memory map header file.
    arch/arm/include/samd5e5:  Add chip.h header file.
    arch/arm/Kconfig and arch/arm/src/samd5e5/Kconfig:  Add configuration logic for the SAMD5x/Ex family.
2018-07-26 12:12:08 -06:00
Gregory Nutt
c3b406826e Rename all usage of samdl/SAMDL to samd2l2/SAMD2L2 to make room in the name space for the forthcoming samd5e5/SAMD5E5
Squashed commit of the following:

    Change all remaining occurrences of SAMDL to SAMD2L2.

    configs/:  Change all remaining occurrences of SAMDL to SAMD2L2

    configs/:  Change all occurrences of CONFIG_SAMDL_* to CONFIG_SAMD2L2_*
    arch/arm/src and include:  Rename all directories from samdl to samd2l2.  Change all configuration variable names and other usage from SAMDL to SAMD2L2.
2018-07-22 15:54:12 -06:00
Daniel P. Carvalho
9223123cd2 arch/arm/src/stm32l4: Added custom pin mapping for STM32L4X2XX processors. 2018-07-16 15:42:13 -06:00
Alan Carvalho de Assis
283b73edc5 Fix lots of typos in C comments and Kconfig help text 2018-07-08 18:24:45 -06:00
Gregory Nutt
bdb73a60ca Fix some errors found in build testing. 2018-06-25 17:06:29 -06:00
Gregory Nutt
cb374e6e62 arch/: Clean up some naming and spacing. 2018-06-20 15:38:06 -06:00
Gregory Nutt
49ec86ddb1 arch/arm: Fix an error found in build testing. 2018-06-20 13:12:54 -06:00
Gregory Nutt
8bd9cfe038 Squashed commit of the following:
arch/arm:  Remove support for CONFIG_ARMV7M_CMNVECTOR.  It is now the only vector support available.  Also remove CONFIG_HAVE_CMNVECTOR.  That no longer signifies anything."
    arch/arm/src/stm32:  This commit removes support for the dedicated vector handling from the STM32 architecture support. Only common vectors are now supported.
2018-06-20 12:30:37 -06:00
Gregory Nutt
9a51854223 arch/arm/src/lc823450: This commit removes support for the dedicated vector handling from the LC823450 architecture support. Only common vectors are now supported. 2018-06-20 10:04:38 -06:00