Gregory Nutt has submitted the SGA
Omni Hoverboards has submitted the SGA
David Sidrane has submitted the ICLA
Mateusz Szafoni has submitted the ICLA
Sebastien Lorquet has submitted the ICLA
Paul Alexander Patience has submitted the ICLA
as a result we can migrate the licenses to Apache.
Signed-off-by: Alin Jerpelea <alin.jerpelea@sony.com>
The stm32_gpiosetevent calls stm32_configgpio. So
the pin is infact restored to the SDMMC/SDIO D0.
The seconday init, dropped interrupts in a debug
build with HW stack checking on after the GPIO glich
fixes and that was how it was detected.
This prevents gliches on changing to an output mode.
If not the ALT mux can be selecting a IP block that
is drving the line to say 0. Then the output is connected
to that source, then swithced to the correct source.
This prevents gliches on changing to an output mode.
If not the ALT mux can be selecting a IP block that
is drving the line to say 0. Then the output is connected
to that source, then swithced to the correct source.
This prevents gliches on changing to an output mode.
If not the ALT mux can be selecting a IP block that
is drving the line to say 0. Then the output is connected
to that source, then swithced to the correct source. This
produced a 430 nS glich on a F4 @168 Mhz. It was a enough
to corrupt an I2C device with a bus monitor.
Summary:
- This commit replaces the critical section with spinlock in cxd56_serial.c
Impact:
- None
Testing:
- Tested with spresense:rndis_smp, spresense:rndis
and spresense:rndis_wifi
Signed-off-by: Masayuki Ishikawa <Masayuki.Ishikawa@jp.sony.com>
Gregory Nutt has submitted the SGA
Bill Gatliff has submitted the ICLA
as a result we can migrate the licenses to Apache.
Signed-off-by: Alin Jerpelea <alin.jerpelea@sony.com>
Rearchitect video driver:
- Define two video I/F(struct imgsensor_ops_s and struct imgdata_ops_s),
and support them.
- CISIF driver supports new video I/F struct imgdata_ops_s.
- ISX012 driver supports new video I/F struct imgsensor_ops_s.
- Move ISX012 driver to general driver directory.
Repeated automated sercon, serdis on VBUS proved to fail
for CDCACM DATA IN (device Serial TX). The root cause was
that the EP was left active after disconnect. This resulted
in the first serial write falling to kick-off the EP IN request.
That should restart the EP ISR.
Repeated automated sercon, serdis on VBUS proved to fail
for CDCACM DATA IN (device Serial TX). The root cause was
that the EP was left active after disconnect. This resulted
in the first serial write falling to kick-off the EP IN request.
That should restart the EP ISR.
Repeated automated sercon, serdis on VBUS proved to fail
for CDCACM DATA IN (device Serial TX). The root cause was
that the EP was left active after disconnect. This resulted
in the first serial write falling to kick-off the EP IN request.
That should restart the EP ISR.
This reverts commit 45672c269d.
Because:
* It's very confusing to have cc as LD.
* I don't see what "-nostartfiles -nodefaultlibs" in LDFLAGS are
supposed to do when we use LD directly. It would be simpler to
remove them from our LDFLAGS.
Correct typos in include/nuttx/arch.h and suppress
"'noreturn' function does return" warning coming from arm_pthread_exit.c
Signed-off-by: Jukka Laitinen <jukkax@ssrc.tii.ae>
This is currently only used on STM32L4+ devices. Page erase in
flash_erase() function supports only dual-bank mode so it makes little
sense to configure this for unsupported single-bank mode.
Signed-off-by: Juha Niskanen <juha.niskanen@haltian.com>
CAN_ESR2 register was having problems of havng the correct values when
the bus was busy (with 3 and more nods). The register bit fields were
incorrectly indicating that there is no free MB and would not updated
itself from this state which was causing the applications to freeze on
write. This change relies only on a software control which should avoid
the problems described above.
Signed-off-by: Michal Lenc <michallenc@seznam.cz>
This feature depends on frame pointer, "-fno-omit-frame-pointer" is mandatory
This feature can not be used in THUMB2 mode if you are using GCC toolchain,
More details please refer:
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=92172
Signed-off-by: chao.an <anchao@xiaomi.com>
Ken Pettit is the copyright holder for those files and he has submitted the
SGA as a result we can migrate the licenses to Apache.
Signed-off-by: Alin Jerpelea <alin.jerpelea@sony.com>
In AArch32, the frame pointer is stored in register R11 for ARM code or register R7 for Thumb code.
In AArch64, the frame pointer is stored in register X29.
Signed-off-by: chao.an <anchao@xiaomi.com>
Previous implementation has always expanded the width of the timer to 32-bit.
This feature is not always needed and should be configurable from Kconfig.
This commit changes the FLexPWM driver for iMXRT MCU so that LDOK bits in
Master Control Register are set at once after all channels are configured.
Setting LDOK bit enables the driver to load prescaler, modulus and PWM
values of corresponging submodule and start PWM output. Setting all bits
at once instead of doing it separately can help avoiding the channels to
be out of sync with each other.
Signed-off-by: Michal Lenc <michallenc@seznam.cz>
Number of configured ADC channels is currently only defined in board
level section, typically in xxx_adc.c file. This commit introduces
ioctl command ANIOC_GET_NCHANNELS that returns the number of configured
channels which is determined by the driver code. The change can allow the
applications to be more flexible when it comes to multiple ADC devices
with different number of configured channels.
Signed-off-by: Michal Lenc <michallenc@seznam.cz>
PWM drivers currently use channel number 0 for the channels that are not
used by the application. This commit adds number -1 which indicates that
all following channels are not configured and that the loop can be broken.
Signed-off-by: Michal Lenc <michallenc@seznam.cz>
arch/arm/src/stm32/Kconfig:
* In configs STM32_ADC_MAX_SAMPLES, STM32_FOC_HAS_PWM_COMPLEMENTARY:
Fix typos in help text.
arch/arm/src/stm32h7/Kconfig:
* In configs STM32H7_RTC_AUTO_LSECLOCK_START_DRV_CAPABILITY,
STM32H7_FLASH_CR_PSIZE, STM32H7_RTC_LSECLOCK_START_DRV_CAPABILITY,
and STM32H7_RTC_LSECLOCK_RUN_DRV_CAPABILITY: Fix typos in help text.
arch/arm/src/stm32l5/Kconfig:
* In configs STM32L5_FLOWCONTROL_BROKEN, STM32L5_SDMMC1_DMAPRIO: Fix
typos in help text.
arch/arm/src/stm32/hardware/stm32_exti.h:
* Change STM32_EXTI2_OFFSET (offset to EXTI2 registers) from 0x18
to 0x20. This symbol is defined when CONFIG_STM32_STM32F30XX or
CONFIG_STM32_STM32F33XX. According to the current reference
manuals for STM32F334xx (RM0364 rev 4) and STM32F302xx (RM0365
rev 8), EXTI_IMR1 is at offset 0x00 and EXTI_IMR2 is at offset
0x20, i.e., 0x20 apart. The same offset applies to the rest of
the registers: EMR1/EMR2, RTSR1/RTSR2, etc.
Cleaning during `clean_context` had the issue of remaking everything
when `menuconfig` was issued. That's because `menuconfig` has a
`clean_context` on its way.
Signed-off-by: Abdelatif Guettouche <abdelatif.guettouche@espressif.com>
It seems to be caused by the corrupted or wrong CPSR restored on return
from exception. NuttX restores the context using code like this:
msr spsr, r1
GCC translates this to:
msr spsr_fc, r1
As a result, not all SPSR fields are updated on exception return. This
should be:
msr spsr_fsxc, r1
This bug has been fixed by Heesub Shin in:
343243c7c0
Change-Id: Ibc64db7bceecd0fb6ef39284fb5bc467f5603e2e
use the same condition check in declaration and reference
Signed-off-by: Xiang Xiao <xiaoxiang@xiaomi.com>
Change-Id: I7b05316e914708fceeddac394d784ee3720a3c1b
it's more simple to make mm_heap_s opaque outside of mm
Signed-off-by: Xiang Xiao <xiaoxiang@xiaomi.com>
Change-Id: I5c8e435f6baba6d22b10c5f7e8d9191104fb5af2
It is no longer necessary to define CONFIG_ARCH_MATH_H when we would
like to link libm.a other than nuttx math library. So, this commit
removes the error condition.
Summary:
- This commit introduces setintstack macro to rp2040
which is used for SMP with interrupt stack
Impact:
- SMP with interrupt stack
Testing:
- Tested with raspberrypi-pico:smp
- NOTE: seed to set CONFIG_ARCH_INTERRUPTSTACK=2048
Signed-off-by: Masayuki Ishikawa <Masayuki.Ishikawa@jp.sony.com>
Summary:
- This commit introduces setintstack macro which can be
overridden for SMP with interrupt stack
Impact:
- SMP only
Testing:
- Tested with raspberrypi-pico:smp
- NOTE: more commits will be added later
Signed-off-by: Masayuki Ishikawa <Masayuki.Ishikawa@jp.sony.com>
For the case when the watchdog is triggering a timeout we did not
correctly reset the GPIO_SDIO_D0.
Without this fix, the SD card can become inaccessible.
It turns out there is no difference in these two files as well as the
reference manual for the registers between the two parts, so it probably
makes sense to unify them
since kernel component should use UTC instead local time
Signed-off-by: Xiang Xiao <xiaoxiang@xiaomi.com>
Change-Id: Icf939e1ab0af8e577105f539d2553bc67b3b3d10
corrected setting SDMMC_DCTRL.DTMODE field for block data transfers ending on block count
and for block data transfers ending with STOP_TRANSMISSION command;
stm32_sdio: added more debug messages
instead calling kmm_heapmember or umm_heapmember because:
1.The stack supplied by caller may allocate from heap too
2.It's hard to implement these two function in ASan case
Signed-off-by: Xiang Xiao <xiaoxiang@xiaomi.com>
Change-Id: I196377822b7c4643ab4f29b7c1dc41dcd7c4dab1
* port didn't know about data-register fifo
* port didn't handle overrun condition
* driver could get stuck if interrupts were skipped due to saturation
Summary:
- Add Raspberry Pi Pico (RP2040) USB device controller support.
- Confirmed that CDC/ACM, MSC and these composite device are working.
- The current implementation have an unresolved issue and some workaround
for USB MSC SCSI driver is required.
See the comment in the patch "usbmsc: Add USBMSC_NOT_STALL_BULKEP for RP2040 workaround".
Impact:
- RP2040 only
Testing:
- Tested with Windows 10 and Ubuntu-18.04/20.04 as the USB host.
- Tested configurations:
- raspberrypi-pico:usbnsh
- raspberrypi-pico:usbmsc
- raspberrypi-pico:composite
All modern desgin support stack pointer and it's also an
important information, so let's standardize this interface.
Signed-off-by: Xiang Xiao <xiaoxiang@xiaomi.com>
Summary:
- I noticed that DEBUGASSERTION() happens when executing
an ELF application
- This commit fixes this issue by re-mapping the address
to SYSBUS in up_module_text_free()
Impact:
- None
Testing:
- Tested with spresense (both DEBUG_ASSERTIONS=n and y)
Signed-off-by: Masayuki Ishikawa <Masayuki.Ishikawa@jp.sony.com>
Summary:
- I noticed that make savedefconfig shows warnings regarding
'unmet direct dependencies (ARCH_HAVE_MODULE_TEXT)'
- This commit fixes this issue
Impact:
- None
Testing:
- Tested with spresense:wifi
Signed-off-by: Masayuki Ishikawa <Masayuki.Ishikawa@jp.sony.com>
Summary:
- In cxd56xx, ldrex/strex behavior is slightly different from
other Arm architectures. Dummy strex must be issued to release
the exclusive load & store unit.
Impact:
- SMP only
Testing:
- Tested with spresense:smp
- Tested with spresese:wifi_smp, spresense:rndis_smp
- NOTE: CONFIG_CXD56_TESTSET=y must be removed from defconfigs
Signed-off-by: Kazuya Hioki <Kazuya.Hioki@sony.com>
Signed-off-by: Masayuki Ishikawa <Masayuki.Ishikawa@jp.sony.com>
