Gregory Nutt
|
27bf67c2d0
|
ARM: Move address environment switch from the task switchers to the interrupt handler. That may save doing the actin multiple times per interrupt
|
2014-08-28 06:34:09 -06:00 |
|
Gregory Nutt
|
9bc9d2d86d
|
Add ADDRENV support to ALL implmentations of _exit()
|
2014-08-27 16:31:02 -06:00 |
|
Gregory Nutt
|
4d24c48901
|
Add ADDRENV support to ALL implementations of up_unblock_task()
|
2014-08-27 16:15:46 -06:00 |
|
Gregory Nutt
|
57c066b7a3
|
Add ADDRENV support to all implementations of up_block_task()
|
2014-08-27 15:36:52 -06:00 |
|
Gregory Nutt
|
d35723749b
|
Minor address environment clean-up. Cannot generate debug contexts in certain contexts
|
2014-08-27 14:22:00 -06:00 |
|
Gregory Nutt
|
c3a498264e
|
CC3200 Launchpad updates
|
2014-08-26 16:31:47 -06:00 |
|
Gregory Nutt
|
2c40815569
|
Support the the TC3200 from Jim Ewing
|
2014-08-26 15:13:57 -06:00 |
|
Gregory Nutt
|
0db7da1858
|
Add up_addrenv_coherent which will be called before address environment switches
|
2014-08-26 14:53:19 -06:00 |
|
Gregory Nutt
|
519e9c85e9
|
up_coherent_dcache should do nothing the the length is zero
|
2014-08-26 14:51:53 -06:00 |
|
Gregory Nutt
|
b13d9b4161
|
Rename up_addrenv_assign() to up_addrenv_clone() and generalize its arguments so that can be used for other purposes
|
2014-08-26 12:16:05 -06:00 |
|
Gregory Nutt
|
a14cb94b45
|
Mostly cosmetic use of uintptr_t to hold addresses instead of uint32_t
|
2014-08-26 10:44:10 -06:00 |
|
Gregory Nutt
|
3a44227caa
|
Fix confusion about what is a page of data and what is a page of L2 page table; restructure functions to reduce duplicated logic
|
2014-08-26 10:41:43 -06:00 |
|
Gregory Nutt
|
dbeba82e85
|
Add lots of debug output
|
2014-08-26 07:54:43 -06:00 |
|
Gregory Nutt
|
66a5328a68
|
Cortex-A address environment: Fix some section mapping and address increments
|
2014-08-26 06:33:26 -06:00 |
|
Gregory Nutt
|
e87804cc8c
|
ARMv7-A: Use of write back might be unpredictable
|
2014-08-25 16:34:22 -06:00 |
|
Gregory Nutt
|
00f5e8f70e
|
Bugfixes.. still integrating SAMA5 ELF with address environment
|
2014-08-25 15:27:58 -06:00 |
|
Gregory Nutt
|
17cc5caa98
|
SAMA5 ELF configuration with address environments finally builds without errors
|
2014-08-25 13:59:02 -06:00 |
|
Gregory Nutt
|
1725946447
|
Misc changed to get the SAMA5 ELF configuration with address environments working
|
2014-08-25 13:28:13 -06:00 |
|
Gregory Nutt
|
e1799b0423
|
Cortex-A/SAMA5 address environment support is code complete (untested)
|
2014-08-25 11:18:32 -06:00 |
|
Gregory Nutt
|
e0a48b60b6
|
Change naming of ELF interfaces from arch_ to up_ for consistency
|
2014-08-25 06:47:14 -06:00 |
|
Gregory Nutt
|
7aea220ebf
|
After cached related fix, the ELF example is now functional
|
2014-08-24 14:12:45 -06:00 |
|
Gregory Nutt
|
10b621ac10
|
Modify ADDRENV Kconfigs. Z180 does not need all of the virtual address settings that the ARM does
|
2014-08-24 12:54:37 -06:00 |
|
Gregory Nutt
|
241a7e17bd
|
addrenv interface changes: up_addrenv_create() may need to create .text and .bss/.data separately because of differing access privileges (read/execute vs read/write). And, as a consequence, up_addrenv_vaddr() needs to be split into up_addrenv_vtext(0 and up_addrenv_vdata().
|
2014-08-24 11:54:14 -06:00 |
|
Gregory Nutt
|
2cb9d5c7b0
|
Add addrenv.h; First cut at Cortex-A address environment structures; Add configuration options to setup address enviornment
|
2014-08-24 09:57:53 -06:00 |
|
Gregory Nutt
|
1624e2fbcf
|
Change CONFIG_ADDRENV to CONFIG_ARCH_ADDRENV; change how it is selected -- the architecure must first declare support
|
2014-08-24 06:42:11 -06:00 |
|
Gregory Nutt
|
03830250e7
|
ARMv7-A: Add skeleton environment and build support for process address environments
|
2014-08-23 18:59:24 -06:00 |
|
Gregory Nutt
|
081f88b4b9
|
STM32 serial: MAke uart_devs[] const. From Freddie Chopin
|
2014-08-22 16:20:52 -06:00 |
|
Gregory Nutt
|
4af3e1cfa1
|
Recent STM32 UART change: Wasn't that logic backward? Shouldn't that have been disable the USART if (1) we don't have than many USARTs OR (2) we don't have that particular USART -- not AND.
|
2014-08-22 16:16:23 -06:00 |
|
Gregory Nutt
|
150fcfb5b8
|
STM32 F401: Only 3 USARTS, but need to set STM32_NUSARTS to six because they are not numbered sequentially
|
2014-08-22 09:02:58 -06:00 |
|
Gregory Nutt
|
de3dd8e96b
|
STM32 F401: Correct support for USART6 on this chip. From Freddie Chopin
|
2014-08-22 06:49:16 -06:00 |
|
Gregory Nutt
|
ad9b3f8ab8
|
wdog.h does not contain any application interface, only internal OS interface. Further, it is non-standard. Move wdog.h from include/ to include/nuttx. For the same reason, move the description of the watchdog timer interfaces from the Users Guide to the Porting Guide.
|
2014-08-21 11:16:55 -06:00 |
|
Gregory Nutt
|
3b07378b38
|
NSH link management now works! The last fix was to the Ethernet drivers: They cannot disable clocking to the Ethernet blok on ifdown. Otherwise, we cannot communicate with the PHY
|
2014-08-17 17:54:46 -06:00 |
|
Gregory Nutt
|
004788d7c0
|
Change the way PHY interrupts work: disable automatically. Then we have to re-subscribe each time after the interrupt fires
|
2014-08-17 16:51:56 -06:00 |
|
Gregory Nutt
|
e04ab2bcfc
|
In order to get PHY interrupts, they must be enabled at the PHY (still don't get PHY interrupts)
|
2014-08-17 13:03:18 -06:00 |
|
Gregory Nutt
|
5ba42680ac
|
For all SAM Ethernet, need to enable management interface before reading PHY regisers in IOCTL
|
2014-08-17 11:09:54 -06:00 |
|
Gregory Nutt
|
ab78e8a0c5
|
SAM3/4 Ethernet: Clone ioctl support from the SAMA5
|
2014-08-17 06:54:37 -06:00 |
|
Gregory Nutt
|
d87013a665
|
Use the device name assigned by the registration process, not our best guess
|
2014-08-16 15:14:39 -06:00 |
|
Gregory Nutt
|
057af36c1d
|
More of the PHY event notification logic change: Fix some compile errors when full feature is enabled; Add some missing ioctol logic
|
2014-08-16 15:04:09 -06:00 |
|
Gregory Nutt
|
68e55c454c
|
Implement all network ioctls, including the new ioctl to setup PHY event notifications.
|
2014-08-16 14:09:14 -06:00 |
|
Gregory Nutt
|
f33510a394
|
Modified to support the change to the network ioctl signature changes. Also add support for new ioctl to setup PHY event notifications.
|
2014-08-16 14:08:58 -06:00 |
|
Gregory Nutt
|
c9ba1d4091
|
Fix conditional compilation error
|
2014-08-12 10:00:58 -06:00 |
|
Gregory Nutt
|
7025465109
|
Adds support for localtime. From Max Neklyudov
|
2014-08-12 06:18:22 -06:00 |
|
Gregory Nutt
|
56196ecea1
|
Fix a computation error in the fix for the last computational error
|
2014-08-11 12:07:49 -06:00 |
|
Gregory Nutt
|
51da249d0e
|
Correct time conversion, 1000000 not 1000 to convert seconds to microseconds.
|
2014-08-11 11:14:10 -06:00 |
|
Gregory Nutt
|
f2058fa271
|
Comment out reassessment of timer in the middle of context switches. Need to revisit
|
2014-08-11 07:05:47 -06:00 |
|
Gregory Nutt
|
cd53f96f11
|
SAMA5 Tickless: Corrects some logic errors with timer/counter frequency
|
2014-08-10 19:04:18 -06:00 |
|
Gregory Nutt
|
8855c1369b
|
Cosmetic
|
2014-08-10 16:09:45 -06:00 |
|
Gregory Nutt
|
c7a51f4ef1
|
Cosmetic changed, updated README files, improved comments
|
2014-08-10 13:11:31 -06:00 |
|
Gregory Nutt
|
71e18367f6
|
Don't try to return time remaining if the timespec pointer is NULL
|
2014-08-10 11:39:16 -06:00 |
|
Gregory Nutt
|
a5514be85c
|
Move TC debug options to one file
|
2014-08-10 11:38:44 -06:00 |
|
Gregory Nutt
|
219c1a68d3
|
Update comments
|
2014-08-10 11:38:08 -06:00 |
|
Gregory Nutt
|
320707fdfa
|
SAMA5: Fix bugs in timer/counter interrupts and one-shot timer
|
2014-08-10 10:47:38 -06:00 |
|
Gregory Nutt
|
6324df44e8
|
SAMA5 Timer/counter repair: Missing sem_post() caused a hang
|
2014-08-09 18:34:52 -06:00 |
|
Gregory Nutt
|
d1d1d76189
|
SAMA5: Use the one-shot and free-running timers to implement tickless OS support for SAMA5
|
2014-08-09 17:14:51 -06:00 |
|
Gregory Nutt
|
569d5d7218
|
SAMA5 free-running timer: Add support for a free-running timer wrapper around the low-level timer/counter logic.
|
2014-08-09 16:43:48 -06:00 |
|
Gregory Nutt
|
acb05460d0
|
SAMA5 oneshot: Some clean-up and correction to the initial implementation
|
2014-08-09 16:42:04 -06:00 |
|
Gregory Nutt
|
d8aa6c01bd
|
SAMA5 timer/counter: Add support for a one-shot timer wrapper around the low-level timer/counter logic. This also involved several changes that rippled into the ADC driver (untested).
|
2014-08-09 15:27:55 -06:00 |
|
Gregory Nutt
|
5803fb78b8
|
SAMA5 T/C: Can now handle non-constant BOARD_MCK_FREQUENCY. Also now supports methods to attach user interrupt handlers
|
2014-08-09 10:30:45 -06:00 |
|
Gregory Nutt
|
e1769b22f1
|
Remove os_internal.h it has been replace by several new header files under sched/. There have been some sneak inclusion paths via os_internal.h, so expect a few compilation errors for some architectures
|
2014-08-08 18:39:28 -06:00 |
|
Gregory Nutt
|
d798dd37a7
|
Replace os_internal.h with sched/sched.h in files that actually reference something in sched.h
|
2014-08-08 17:53:55 -06:00 |
|
Gregory Nutt
|
23a334c066
|
Move task control files from sched/ to sched/task
|
2014-08-08 16:44:08 -06:00 |
|
Gregory Nutt
|
d4b56eb3cc
|
Move clock functions from sched/ to sched/clock
|
2014-08-08 14:43:02 -06:00 |
|
Gregory Nutt
|
85e8117062
|
Move interrupt dispatch logic from sched/ to sched/irq
|
2014-08-08 14:31:15 -06:00 |
|
Gregory Nutt
|
c9661ad5a7
|
Change all time conversions. Yech. New timer units in microseconds breaks all existing logic that used milliseconds in the conversions. Something likely got broken doing this, probably because I confused a MSEC2TICK conversion with a TICK2MSEC conversion. Also, the tickless OS no appears fully functional and passes the OS test on the simulator with no errors
|
2014-08-07 18:00:38 -06:00 |
|
Gregory Nutt
|
736d3c169a
|
Rename up_timerinit() to up_timer_initailize(); Add prototypes for candidate interfaces for the tickless OS; Don't build existing timer initialization logic if CONFIG_SCHED_TICKLESS is defined.
|
2014-08-06 16:26:01 -06:00 |
|
Gregory Nutt
|
7b9c44101d
|
SAMA5D3 HSMCI: TX DMA is again disabled
|
2014-08-05 07:07:39 -06:00 |
|
Gregory Nutt
|
159bcc255d
|
SAMA5 PCK: Add Main clock as an option for the PCK clock source
|
2014-08-03 10:17:50 -06:00 |
|
Gregory Nutt
|
c75bf6d741
|
SAMA5 SSC: Verify that the requested bit width is supported. Correct some alignment tests that depend upon the data bit width.
|
2014-08-02 14:26:49 -06:00 |
|
Gregory Nutt
|
83dab03576
|
SAMA5 WM8904: Fix errors in programmable clock output configuration
|
2014-08-01 15:18:58 -06:00 |
|
Gregory Nutt
|
805a02965c
|
SAMA5 SSC: Start Delay is now configurable
|
2014-08-01 14:10:37 -06:00 |
|
Gregory Nutt
|
50bd2ba46c
|
SAMA5 SSC: Frame Synch Delay is now configurable
|
2014-08-01 12:25:31 -06:00 |
|
Gregory Nutt
|
0b4090df0d
|
SAMA5D SSC: Needs to account for data offset in audio buffer.
|
2014-07-31 19:14:24 -06:00 |
|
Gregory Nutt
|
c657139b30
|
SAMA5D3X-EK: Add support for the WM8904 audio CODEC
|
2014-07-31 11:14:57 -06:00 |
|
Gregory Nutt
|
24af676c05
|
SAMA5: Changes needed for a clean SAMA5D3 build after all of the recent SAMA5D4 changes.
|
2014-07-31 11:09:56 -06:00 |
|
Gregory Nutt
|
276cc44878
|
SAMA5 HSMCI: e-enable TX DMA and verify that DMA writes to the SD card are functional. They are so now TX DMA is re-enabled in the driver. This might affect the SAMA5D3 platforms where the TX DMA problem was found. The SAMA4D3 and 4 use the same HSMCI driver. Much has change since then and it is not surprising that DMA is now functional. However, the has not be re-verified on the SAMA5D3 which has a different DMA controller.
|
2014-07-30 11:20:06 -06:00 |
|
Gregory Nutt
|
4df0fbec04
|
SAMA5D HSMCI: Fix a problem on card insertion/removal callback handling. Interrupts were being disable so that the callbacks occurred with interrupts disabled. This resulted in loss of some interrupts and some not-so-good behaviors. The solution is to perform all callbacks on the work thread unconditionally (2014-7-29).
|
2014-07-30 10:19:41 -06:00 |
|
Gregory Nutt
|
70be3bae16
|
SAMA5D HSMCI: Add method to do RX transfer without DMA. The 8-byte SCR transfer was failing silently with the DMA transfer, leaving the SD card in single bit mode
|
2014-07-29 21:13:28 -06:00 |
|
Gregory Nutt
|
53930d5531
|
SAMA5D-EK: Correct system timer frequency. Input clock is MCK/2, not MCK
|
2014-07-29 07:12:36 -06:00 |
|
Gregory Nutt
|
1b6eec572d
|
Cosmetic changes to comments
|
2014-07-29 07:11:16 -06:00 |
|
Gregory Nutt
|
8c2b458d75
|
Fixes to last SAMA5 PMIC checkin
|
2014-07-28 17:09:37 -06:00 |
|
Gregory Nutt
|
d450993f2e
|
LPC17xx: DC updates from Max. Also fixes some syntax errors that I introduced in the last commit.
|
2014-07-28 07:23:49 -06:00 |
|
Gregory Nutt
|
100bba42be
|
ARM: Move L2 cache initialization to much later in the sequence
|
2014-07-27 10:03:33 -06:00 |
|
Gregory Nutt
|
c523abdc62
|
ARMv7-A L2 Cache currently depends on EXPERIMENTAL because it does not yet work properly
|
2014-07-26 18:48:54 -06:00 |
|
Gregory Nutt
|
4446d6e98d
|
ARMv7 L2 Cache: Minor bugfixes/improvements
|
2014-07-26 18:48:26 -06:00 |
|
Gregory Nutt
|
0519118de2
|
Enables cache early in boot-up sequence
|
2014-07-26 18:48:00 -06:00 |
|
Gregory Nutt
|
d09ee81320
|
Change naming from cp_XYZ_cache() to arch_XYP_cache() so that all cache operations will pick up L2 support if it is enabled
|
2014-07-26 18:47:33 -06:00 |
|
Gregory Nutt
|
0d83d198de
|
New cache.h file. Renames cp15_XYZ_cache() to arch_XYZ_cache() and addes L2 cache support if L2 cache is enabled
|
2014-07-26 18:46:52 -06:00 |
|
Gregory Nutt
|
ca3776a7ec
|
Rename ARMv7-A cache.h to cp15_cache.h. Things will be broken on this commit until I get the new cache.h in place.
|
2014-07-26 16:54:19 -06:00 |
|
Gregory Nutt
|
ec70cfe44c
|
arch/arm/src/armv7-a/arm_l2cc_pl310.c, l2cc.h, l2cc_pl310.h, Kconfig: Add initiali support for the ARM L2CC-PL310 L2 cache.
|
2014-07-26 16:50:08 -06:00 |
|
Gregory Nutt
|
be198337f7
|
ARMv7-A: L2CC PL310 address filtering is an optional feature
|
2014-07-25 19:46:09 -06:00 |
|
Gregory Nutt
|
ef5bfd72a6
|
ARMv7-A: Add missing L2CC PL310 bit definitions
|
2014-07-25 19:41:35 -06:00 |
|
Gregory Nutt
|
597c9839cc
|
rch/arm/armv7-a/l2cc_pl310.h: Move arch/arm/sama5/chip/sam_l2cc.h to arch/arm/armv7-a/l2cc_pl310.h. Adjust the two corresponding Kconfig files as well.
|
2014-07-25 17:25:17 -06:00 |
|
Gregory Nutt
|
47752a35c1
|
3rd time is a charm. Max is right, the initial priority setting should be NVIC_SYSH_PRIORITY_MIN
|
2014-07-24 16:51:07 -06:00 |
|
Gregory Nutt
|
8718dad9c8
|
Oops, should have been NVIC_SYSH_PRIORITY_DEFAULT
|
2014-07-24 16:42:15 -06:00 |
|
Gregory Nutt
|
7f5b88dbcd
|
LPC17 Ethernet: Added option to use the kernel worker thread to do most of the workload with CONFIG_NET_WORKER_THREAD option in Kconfig. Eliminated a problem with PHY DP83848C : it doesn't need a specific initialization on mbed. Critical bufix: From time to time (after some hours) the Ethernet receiver would lose one receive interrupt and the IP stack never recover because there is no receive watchdog as the transmit watchdog. From Max
|
2014-07-24 16:39:18 -06:00 |
|
Gregory Nutt
|
fdff663e57
|
Added burstmode ADC conversion mode, with CONFIG_ADC_BURSTMODE option in Kconfig. From Max
|
2014-07-24 16:23:31 -06:00 |
|
Gregory Nutt
|
ab572091c5
|
Mostly cosmetic changes from Max
|
2014-07-24 16:00:21 -06:00 |
|
Gregory Nutt
|
ad3626e61a
|
Eliminate warnings. From Max
|
2014-07-24 15:50:37 -06:00 |
|
Gregory Nutt
|
6dcb524d16
|
Correct the initial value of the BASEPRI register. This was apparently never being initialized. From Max
|
2014-07-24 15:37:13 -06:00 |
|
Gregory Nutt
|
0fcc0adaa2
|
Fix a recently introduced typo that was being masked by some bad conditional compilation
|
2014-07-22 11:45:14 -06:00 |
|
Gregory Nutt
|
17abe05357
|
Update ChangeLog
|
2014-07-22 07:25:01 -06:00 |
|
Gregory Nutt
|
3bb6a877fd
|
STM32 OTGFS device: Various changes to try to reduce that amount of time in interrupts handles and with interrupts disbled. Needs verification on other platforms. From Petteri Aimonen
|
2014-07-22 07:23:17 -06:00 |
|
Gregory Nutt
|
f76cac2773
|
Fix typos in the STM32 DAC header file. From Petteri Aimonen
|
2014-07-22 07:13:33 -06:00 |
|
Gregory Nutt
|
121c00036d
|
SAMA5D4 XDMAC: Never sets a channel as secure. Will probably have to revisit this
|
2014-07-21 17:46:35 -06:00 |
|
Gregory Nutt
|
df65c5e4df
|
SAMA5D4: Fix some HSMCI issues when XDMAC0 is enabled
|
2014-07-21 17:45:48 -06:00 |
|
Gregory Nutt
|
b9f1fbeb6c
|
SAMA5 HSMCI: Correct multi-block DMA setup; Fixes related to DMA timeout. Still problems with HSMCI DMA via XDMAC
|
2014-07-21 16:49:56 -06:00 |
|
Gregory Nutt
|
f508c07b97
|
SAMA5 XDMAC: Missing some CUBC bits
|
2014-07-21 16:47:16 -06:00 |
|
Gregory Nutt
|
43b214addd
|
SAMA4D5 HSMCI: Set burst size to 1, sample DMA registers on timeout, and don't return from transfer until BOTH the HSMCI transfer and DMA complete
|
2014-07-21 13:24:55 -06:00 |
|
Gregory Nutt
|
3b24da2d7c
|
XDMAC register sampling missed CIM register; Should not set SWREQ bit in DMA setup
|
2014-07-21 13:23:36 -06:00 |
|
Gregory Nutt
|
e202c8e9b2
|
Fix a commented out assertion
|
2014-07-20 17:06:55 -06:00 |
|
Gregory Nutt
|
e8c030a833
|
Fix typos in comments
|
2014-07-20 13:09:47 -06:00 |
|
Gregory Nutt
|
7fa1eec246
|
SAMA5D4-EK: PIO Schmitt trigger logic backward
|
2014-07-20 13:04:30 -06:00 |
|
Gregory Nutt
|
f4bcb730d2
|
WM8904 w/NxPlayer: Fix some compile errors and warnings with debug enabled
|
2014-07-20 09:17:36 -06:00 |
|
Gregory Nutt
|
54d441b5c9
|
SAMA5D ADC: Fix some typos in conditional compilation
|
2014-07-19 13:56:48 -06:00 |
|
Gregory Nutt
|
6ece3d8378
|
SAMA5 SCK: The SAMA5D3 does things a little differently
|
2014-07-19 13:55:53 -06:00 |
|
Gregory Nutt
|
d8f85d1caa
|
SAMA5 PCK: Add support for the slow clock as the PCK clock source
|
2014-07-19 13:55:08 -06:00 |
|
Gregory Nutt
|
c74531e014
|
SAMA5: Update slow clock logic. Things work a little differently on the SAMA5D3
|
2014-07-19 13:25:59 -06:00 |
|
Gregory Nutt
|
bad3ad58cb
|
SAMA5: Add slow clock support
|
2014-07-19 13:07:55 -06:00 |
|
Gregory Nutt
|
6d9f9e37bf
|
SAMA5D4-EK: Add WM8904 initialization logic
|
2014-07-19 11:58:53 -06:00 |
|
Gregory Nutt
|
3a6ea3642f
|
SAMA5 LCDC: Back out the delay kludge. Increase the LCDC input clock from MCK to 2*MCK was sufficient for all timing instbility problems
|
2014-07-12 11:24:14 -06:00 |
|
Gregory Nutt
|
8d1feb7a54
|
SAMA5D4-EK LCDC: Change source clock to 2*Mck seems to solve stability issues
|
2014-07-12 09:45:05 -06:00 |
|
Gregory Nutt
|
253110bbf1
|
SAMA5D4-EK LCDC: Adding a delay after enabling the LCD solves lots of start-up timing issues
|
2014-07-12 08:05:22 -06:00 |
|
Gregory Nutt
|
3384906cdd
|
Lpc17xx Ethernet: Comment out an assertion that is reported to first inappropriately. From Max
|
2014-07-11 12:25:11 -06:00 |
|
Gregory Nutt
|
95df6bd3de
|
SAMA5D4-EK LCD: Actual hardware with appears to be RGB888
|
2014-07-10 12:23:41 -06:00 |
|
Gregory Nutt
|
89024f3698
|
SAMA5D4-EK: LCDC works (with a few color problems)
|
2014-07-10 12:03:10 -06:00 |
|
Gregory Nutt
|
60e64ae93d
|
Don't have to set SDA high initially in I2C reset because that is done by the pin configuration
|
2014-07-09 17:17:32 -06:00 |
|
Gregory Nutt
|
981c1ebf55
|
SAMA5 PIO: Fix a typo in Schmitt trigger configuration; Configure pin as a a vanilla input first so that final pin configuration is more read-able (i.e., easier to debug)
|
2014-07-09 17:16:43 -06:00 |
|
Gregory Nutt
|
27be48a1ba
|
SAMA5 I2C Reset: More changes... still does not work right
|
2014-07-09 15:09:06 -06:00 |
|
Gregory Nutt
|
c2ca4be4f5
|
SAMA5 TWI: Some restructured needed by up_i2creset. Also timeout needs to vary with the size of the transfer and if debug is on or not
|
2014-07-09 13:39:10 -06:00 |
|
Gregory Nutt
|
84056291e8
|
Use sam_pio_forceclk() so that we can read the current state of an open-drain output in the TWI reset logic.
|
2014-07-09 11:31:21 -06:00 |
|
Gregory Nutt
|
a966e4f30b
|
Add a new interface sam_pio_forceclk() that can be used to force PIO clocking on. I am afraid I was too conservative with PIO clocking in the initial design; this is the price
|
2014-07-09 11:26:07 -06:00 |
|
Gregory Nutt
|
e9362128bd
|
SAMA5 TWI: Add support for up_i2creset
|
2014-07-09 09:51:28 -06:00 |
|
Gregory Nutt
|
a7ec464d48
|
SAMA5D4 LCDC: Adapt the SAMA5D3 LCDC driver to work with the SAMA5D4 which has no hardware cursor
|
2014-07-08 12:45:16 -06:00 |
|
Gregory Nutt
|
e76f10ceac
|
SAMA5D3/4 HEAP: Add a configuration option to reserve DRAM for a framebuffer when executing out of DRAM.
|
2014-07-08 12:43:38 -06:00 |
|
Gregory Nutt
|
befcb1c961
|
Fix some cloned errors in SAM GPIO interrupt setup
|
2014-07-07 15:54:37 -06:00 |
|
Gregory Nutt
|
ca43955541
|
SAMA5D3/4: Fix two issues associated with PIO interrupts
|
2014-07-07 14:16:29 -06:00 |
|
Gregory Nutt
|
95bbdb675b
|
SAMA5D3/4 I2C: Test for read or write operation was reversed. How could this have worked before?
|
2014-07-07 09:54:43 -06:00 |
|
Gregory Nutt
|
0d14befb88
|
SAM3/4: Fix compile of sam_aes.c if CONFIG_CRYPTO_AES is defined. rom Max Nekludov
|
2014-07-07 08:03:18 -06:00 |
|
Gregory Nutt
|
4afc23d16d
|
maXTouch: Fix test of I2C_TRANSFER return value
|
2014-07-06 08:51:38 -06:00 |
|
Gregory Nutt
|
c5fc24e110
|
NET: Standardize naming of all protocal header lengths
|
2014-07-05 13:04:48 -06:00 |
|
Gregory Nutt
|
60246e613b
|
NET: emoved all includes of uip.h; added includes of ip.h wherever needed. Tried to fix problems of the now missing sneak inclusions because uip.h was removed. There are probably a few of these that were missed.
|
2014-07-04 19:13:08 -06:00 |
|
Gregory Nutt
|
0bb153b8cb
|
Remove all inclusion of uip.h
|
2014-07-04 16:58:22 -06:00 |
|
Gregory Nutt
|
cce35ce975
|
NET: More renaming
|
2014-07-04 15:40:49 -06:00 |
|
Gregory Nutt
|
858587d633
|
AMA5 OHCI: Pointers to allocated port values were not being nullified after being deallocated. This caused some assertions when debug was enabled
|
2014-07-04 08:17:14 -06:00 |
|
Gregory Nutt
|
1657e6296b
|
Move crypto header files from include/crypto to include/nuttx/crypto
|
2014-07-03 18:35:08 -06:00 |
|
Gregory Nutt
|
71f6838129
|
Correct authorship on a few files
|
2014-07-03 18:28:26 -06:00 |
|
Gregory Nutt
|
009eee331f
|
SAMA5 OHCI: Fix an error in a DEBUGASSERT statement. Caused assertion to fire inappropriately when a low- or full-speed device is removed and CONFIG_DEBUG=y
|
2014-07-03 13:06:28 -06:00 |
|
Gregory Nutt
|
a5538e3431
|
SAMA5D3/4: UPLL divisor to generate 48MHz for OHCI is different from the two families. No idea why.
|
2014-07-03 12:28:11 -06:00 |
|
Gregory Nutt
|
dd4caf172f
|
CCM PROCFS: Changed the configuration a bit. I am still not happy about the coupling between procfs, mtd, and now STM32
|
2014-07-03 08:50:24 -06:00 |
|
Gregory Nutt
|
64cd7a81ed
|
Add STM32 CCM heep procfs
|
2014-07-03 08:18:24 -06:00 |
|
Gregory Nutt
|
edb5f312ca
|
Move cypto debug definitions to debug.h with other susbsystem-level debug
|
2014-07-03 07:58:43 -06:00 |
|
Gregory Nutt
|
bb3dcccd98
|
Beginning of a crypto/ subsystem from Max Neklyudov
|
2014-07-03 07:42:44 -06:00 |
|
Gregory Nutt
|
6bfa7c1afa
|
SAM4 AES driver from Max Neklyudov
|
2014-07-03 07:26:44 -06:00 |
|
Gregory Nutt
|
00ced07128
|
SAM Ethernet: Eliminate a warning
|
2014-07-02 17:35:41 -06:00 |
|
Gregory Nutt
|
a7933cc22b
|
SAMA5D4-EK: NSH should run at 528MHz
|
2014-07-02 15:31:52 -06:00 |
|
Gregory Nutt
|
ee2725c146
|
SAMA5D4-EK: NSH configuration now has TWI0 enabled and supports the I2C tool
|
2014-07-02 13:51:57 -06:00 |
|
Gregory Nutt
|
1c198f6a86
|
SAMA5D4 EMAC: Add a kludge to work around a suspected hardware issue
|
2014-07-02 12:17:01 -06:00 |
|
Gregory Nutt
|
ca353a2644
|
SAM3/4 and SAMA5 Ethernet: Fix an error in the function that determines the number of free TX descriptors
|
2014-07-02 10:40:11 -06:00 |
|
Gregory Nutt
|
a2741940f9
|
SAMA54D-EK: Don't disable any features in the NSH configuration. Comments updated in several files
|
2014-07-02 08:54:53 -06:00 |
|
Gregory Nutt
|
400edda109
|
NET: Rename XYZ_uiptxpoll to just XYZ_txpoll
|
2014-07-01 18:41:08 -06:00 |
|
Gregory Nutt
|
52dbbe76b2
|
SAMA5D4: Add a configuration option to force EMAC driver debug
|
2014-07-01 18:00:39 -06:00 |
|
Gregory Nutt
|
23e4d7db0a
|
SAMA5D4: Fix error in EMAC driver (plus related EMAC/GMAC drivers)
|
2014-07-01 11:22:19 -06:00 |
|
Gregory Nutt
|
b0c1b7ef47
|
Rename uip_poll->devif_poll and uip_timer->devif_timer
|
2014-06-30 18:40:41 -06:00 |
|
Gregory Nutt
|
da7379ed18
|
Rename uip_input to devif_input
|
2014-06-30 18:11:17 -06:00 |
|
Gregory Nutt
|
6b5f20cdc6
|
Fix typo/compile error introduced with last HSMCI changes
|
2014-06-30 16:08:29 -06:00 |
|
Gregory Nutt
|
c005ac91d7
|
SAM3/4: Important bugfix. Values read from PIO input pins do not change unless clocking to the PIO block is enabled
|
2014-06-30 14:26:09 -06:00 |
|
Gregory Nutt
|
588d0178a6
|
SAMA5D3/4: Fix some logic in conversion of physical and virtal DRAM addresses when running out of DRAM
|
2014-06-30 11:04:34 -06:00 |
|
Gregory Nutt
|
9a06ff38ec
|
SAMA5D4: Don't touch ISLR unless PIO is configured as an interrupt
|
2014-06-30 09:17:42 -06:00 |
|
Gregory Nutt
|
ff03914a87
|
STM32: Add configuration support fort he STM32F103RC. From Kosma Moczek
|
2014-06-30 08:16:17 -06:00 |
|
Gregory Nutt
|
a85a42ae0f
|
STM32: Reorder MCUs in choice menu; remove duplicates. From Kosma Moczek
|
2014-06-30 08:13:12 -06:00 |
|
Gregory Nutt
|
d00bb6ab95
|
STM32: Move temperature ranges from chip selection configuration prompts. From Kosma Moczek
|
2014-06-30 08:09:19 -06:00 |
|
Gregory Nutt
|
292d2a1c1f
|
Unconfigure GPIO pins when closing a serial port to prevent back effects from back-powering on the TX pin. From Kosma Moczek
|
2014-06-30 08:02:26 -06:00 |
|
Gregory Nutt
|
fa29170aa7
|
Make variable definitions 'static const' when possible to save RAM usage. From Kosma Moczek
|
2014-06-30 07:39:51 -06:00 |
|
Gregory Nutt
|
7780d1cd03
|
Fix typos in debug statements
|
2014-06-30 07:38:02 -06:00 |
|
Gregory Nutt
|
ac5ac198d2
|
SAMA5 PIO: Add support for secure interrupts; Fix PIO debug output
|
2014-06-29 17:46:55 -06:00 |
|
Gregory Nutt
|
a085646213
|
SAMA5: Remove kruft in PIO header file
|
2014-06-29 17:45:42 -06:00 |
|
Gregory Nutt
|
e8d90bf56d
|
SAMA5D4 HSMCI: Fix a compiler in a debug statement
|
2014-06-29 12:01:08 -06:00 |
|
Gregory Nutt
|
2b626fa85a
|
SAMA5D4 XDMA: Fix some typos
|
2014-06-29 11:24:57 -06:00 |
|
Gregory Nutt
|
43d13baf35
|
Fix system bus IDs for SAMA5D4; Don't use explicit PERIPHID_SHIFT for symmetry with memory
|
2014-06-29 11:24:10 -06:00 |
|
Gregory Nutt
|
63276f5864
|
SAMA5D: Don't use explicit DMACH_FLAG_MEMPID_SHIFT; it does not exist in the SAMA5D4
|
2014-06-29 09:52:07 -06:00 |
|
Gregory Nutt
|
a892171b04
|
SAMA5: Add configuration to assign an XDMAC channel to an HSMCI
|
2014-06-29 08:43:46 -06:00 |
|
Gregory Nutt
|
668f50e116
|
SAMA5D4-EK: Updates to get the at25boot configuration building correctly
|
2014-06-28 09:39:50 -06:00 |
|
Gregory Nutt
|
fce2a79abd
|
Rename uip_driver_s net_driver_s
|
2014-06-27 16:48:12 -06:00 |
|
Gregory Nutt
|
9d9a7e3934
|
SAM4CM: Fixes from Macs N
|
2014-06-27 12:27:02 -06:00 |
|
Gregory Nutt
|
f189350bdc
|
SAM4CM: Add IPC register header file. From Macs N
|
2014-06-27 12:02:30 -06:00 |
|
Gregory Nutt
|
f183632aab
|
Add support for a network device IOCTL to access PHY registers. Ioctls only implemented for STM32. From Lazlo
|
2014-06-27 09:30:41 -06:00 |
|
Gregory Nutt
|
665f487ed3
|
SAMA5D4: Add configuration to redirect all interrupts to the AIC
|
2014-06-26 11:51:39 -06:00 |
|
Gregory Nutt
|
f00ea6ecf9
|
STM32 I2C reset. Add missing GPIO configuration. From Alex D
|
2014-06-25 16:08:31 -06:00 |
|
Gregory Nutt
|
579ee6f573
|
Clean-up packet socket naming
|
2014-06-25 10:34:52 -06:00 |
|
Gregory Nutt
|
621097b6c8
|
Rename ip_eth_hdr to eth_hdr_s
|
2014-06-25 09:57:52 -06:00 |
|
Gregory Nutt
|
4b3bec6bf3
|
Add support for the SAM4CM. From Max Neklyudov
|
2014-06-25 08:25:52 -06:00 |
|
Gregory Nutt
|
5d1f8180d4
|
Move the remaining files from include/nuttx/net/uip to include/nuttx/net; Rename *_internal.h header files in net/ to just *.h
|
2014-06-24 10:14:15 -06:00 |
|
Gregory Nutt
|
37646044ac
|
Move include/nuttx/net/uip/uip-arch.h to include/nuttx/net/netdev.h
|
2014-06-24 09:28:44 -06:00 |
|
Gregory Nutt
|
626469e30c
|
Move include/nuttx/net/uipopt.h to include/nuttx/net/netconfig.h
|
2014-06-24 08:53:28 -06:00 |
|
Gregory Nutt
|
0c0cb50873
|
Add support for the LPCXpresso's RTC, ADC, DAC, Timer, PWM, and MCPWM. All form Max
|
2014-06-23 12:13:52 -06:00 |
|
Gregory Nutt
|
04e6fdf043
|
SAMA5D4: Add missing mappings for the VDEC and L2CC memory regions
|
2014-06-21 14:25:47 -06:00 |
|
Gregory Nutt
|
942d24a005
|
Correct type of SAMA5 arm_decodefiq() return value
|
2014-06-21 10:34:35 -06:00 |
|
Gregory Nutt
|
190cbc766e
|
Need to enable FIQ in initial task state; Improve H32/64 test in IRQ handling
|
2014-06-21 09:55:09 -06:00 |
|
Gregory Nutt
|
1186290a8d
|
SAMA5: FIQs should be disabled along with IRQs on most exeptions in most configuratinons. arm_decodefiq and arm_decodeirq are mutually exclusive and, hence, can use the same interrupt stack
|
2014-06-20 18:49:01 -06:00 |
|
Gregory Nutt
|
3f6b1642ca
|
SAMA5D4: Add support for secure/FIQ interrupts; SAIC supports need to be be enabled unconditionally
|
2014-06-20 18:16:41 -06:00 |
|
Gregory Nutt
|
9542994616
|
SAMA5D4: Fix MATRIX32 base address
|
2014-06-20 18:15:13 -06:00 |
|
Gregory Nutt
|
ec0fc7756b
|
SAMA5D4: Minor fixes to get working with SAMA5D3 again
|
2014-06-20 16:01:45 -06:00 |
|
Gregory Nutt
|
fb25ba907c
|
SAMA5D4: Add partial support for secure interrupt controller (SAIC)
|
2014-06-20 15:22:00 -06:00 |
|
Gregory Nutt
|
083986e814
|
SAMA5D4: USART peripheral clock appears to be MCK/2
|
2014-06-20 11:40:36 -06:00 |
|
Gregory Nutt
|
a55457b175
|
SAMA5D4-EK: Make sure that the H32MX divider is set; correct sense of bit driver red LED
|
2014-06-20 10:33:33 -06:00 |
|
Gregory Nutt
|
ac6b64dac3
|
SAMA5D4: Fix peripheral clocking macros: AIC and L2CC are continuously clocked
|
2014-06-19 15:52:42 -06:00 |
|
Gregory Nutt
|
231fd1b5c8
|
SAMA5D4: Initial bring-up fixes
|
2014-06-19 14:16:36 -06:00 |
|
Gregory Nutt
|
2b5f8dbba5
|
Cosmetic cleanup
|
2014-06-18 08:24:53 -06:00 |
|
Gregory Nutt
|
9c0de33715
|
SAMA5D4: XDMAC driver now compiles error/warning free (still untested)
|
2014-06-17 16:31:09 -06:00 |
|
Gregory Nutt
|
9d44747f60
|
SAMA5D4: More progress on XDMAC driver (still no complete); Also fixes some critical errors in the SAMA5D3 DMA definitions
|
2014-06-17 13:18:52 -06:00 |
|
Gregory Nutt
|
260c2676d4
|
SAMA5D4: Correct MATRIX register addresses
|
2014-06-14 10:42:53 -06:00 |
|
Gregory Nutt
|
37d06c7444
|
SAMA5D4: Implement SDRAM initialization
|
2014-06-14 10:42:26 -06:00 |
|
Gregory Nutt
|
d80c55e8b6
|
SAMA5D4: Fix some memory remapping issues; updates to comments and README files
|
2014-06-14 08:02:58 -06:00 |
|
Gregory Nutt
|
2c6c1685de
|
SAMA5: XDMAC update (still not complete)
|
2014-06-13 11:59:44 -06:00 |
|
Gregory Nutt
|
2423ef3fdc
|
SAMA5D4: Initial XDMAC driver logic; initial check-in is little more the the DMAC driver with some name changes
|
2014-06-12 16:33:04 -06:00 |
|
Gregory Nutt
|
faaf641490
|
First check-in of Lazlo's PF_PACKET 'raw' socket implementation
|
2014-06-12 11:52:06 -06:00 |
|
Gregory Nutt
|
3bfc1effaf
|
STM32: Handle setting of USART CR1_M when 8 bits of data plus parity
|
2014-06-11 15:49:54 -06:00 |
|
Gregory Nutt
|
fd710fc8db
|
Typo in last SAMA5D4 commit
|
2014-06-11 13:43:54 -06:00 |
|
Gregory Nutt
|
69c18728f2
|
SAMA5: Add support for Micrel KSZ8081 PHY
|
2014-06-11 13:25:59 -06:00 |
|
Gregory Nutt
|
8b450d6d1b
|
SAMA5D4: Add EMAC driver
|
2014-06-11 12:23:31 -06:00 |
|
Gregory Nutt
|
9d0cfcc21d
|
SAMA5D4: Still trying to reconcile Ethernet interfaces
|
2014-06-11 08:01:48 -06:00 |
|
Gregory Nutt
|
e0a07125c8
|
SAMA5D3/4: More renaming. Change SAMA5D3 EMAC to EMACA and SAMA5D4 to EMACB so that the configuration and build system can configure them. I might come up with something better later
|
2014-06-10 17:40:25 -06:00 |
|
Gregory Nutt
|
03ba83fedb
|
STM32: Expicitly include header file files. From Freddie Chopin
|
2014-06-10 15:49:48 -06:00 |
|
Gregory Nutt
|
760b60436f
|
SAMA5D4: update MATRIX register definitions for the SAMA5D4
|
2014-06-10 13:15:29 -06:00 |
|
Gregory Nutt
|
80c07aa2d6
|
SAMA5D4: Complete MPDDR header file
|
2014-06-10 11:16:05 -06:00 |
|
Gregory Nutt
|
a64411715b
|
SAMA5D4: Add MPDDRC file (incomplete)
|
2014-06-10 08:46:14 -06:00 |
|
Gregory Nutt
|
90b82696ac
|
Move SAMA5D3 MPDDRC definitions to a separate header file
|
2014-06-10 08:11:31 -06:00 |
|
Gregory Nutt
|
55f9e5b465
|
SAMA5D4: Update LCDC header file
|
2014-06-09 13:27:08 -06:00 |
|
Gregory Nutt
|
e9e22d7096
|
Add logic to select between incompatible SAMA5D3 and SAMA5D4 EMAC header files
|
2014-06-09 12:24:39 -06:00 |
|
Gregory Nutt
|
1f64e9c5b9
|
SAMA5: Back out most of commit c37b5b7b97d0644743c04f2c3d9e2b7ef9f5d698. Things are going to have to be done differently
|
2014-06-09 12:16:16 -06:00 |
|
Gregory Nutt
|
46e5d8b153
|
SAMA5D4: Updated EMAC header file
|
2014-06-09 11:40:11 -06:00 |
|
Gregory Nutt
|
082ab99e9e
|
SAMA5D4: Add EMAC header file
|
2014-06-09 11:29:02 -06:00 |
|
Gregory Nutt
|
e057a05c92
|
SAMA5D4: More header file changes
|
2014-06-09 10:07:00 -06:00 |
|
Gregory Nutt
|
1c84924373
|
SAMA5D4: update ISI register definition header file
|
2014-06-09 09:29:23 -06:00 |
|
Gregory Nutt
|
92d6883a71
|
SAMA5D4: Completes PMC modifications for the SAMA5D4
|
2014-06-09 07:55:51 -06:00 |
|
Gregory Nutt
|
4d65dd04e2
|
SAMA5D4: Completes L2CC register definition header file
|
2014-06-08 19:08:11 -06:00 |
|
Gregory Nutt
|
d3903be2a6
|
SAMA5D4: Update HSMC register definitions
|
2014-06-08 16:27:58 -06:00 |
|
Gregory Nutt
|
0b5609d6fe
|
SAMA5D4: Update PIO register definitions
|
2014-06-08 15:35:51 -06:00 |
|
Gregory Nutt
|
80f7079bd9
|
SAMA5D4: Update DBGU header file
|
2014-06-08 14:37:09 -06:00 |
|
Gregory Nutt
|
31ac5b344d
|
SAMA5D4: Update PWM header file
|
2014-06-08 14:16:50 -06:00 |
|
Gregory Nutt
|
54333cd013
|
SAMA5D4: Updated HSMCI header file
|
2014-06-08 12:49:45 -06:00 |
|
Gregory Nutt
|
acd6991273
|
SAMA5D4: Update ADC register definition header file
|
2014-06-08 12:19:05 -06:00 |
|
Gregory Nutt
|
87a438b240
|
SAMA5D4: Updated RTC header file
|
2014-06-08 10:14:36 -06:00 |
|
Gregory Nutt
|
1240c066b2
|
SAMA5D4: Update register definitions; add support for TC2
|
2014-06-08 09:19:50 -06:00 |
|
Gregory Nutt
|
339f5f8e51
|
SAMA5: Add TWI3 support
|
2014-06-08 08:25:39 -06:00 |
|
Gregory Nutt
|
da8dfdcb6f
|
Updated SAMA5 SFR header file for the SAMA5D4
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2014-06-08 07:48:36 -06:00 |
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Gregory Nutt
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582cad2e8a
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SAMA5D4: Add support for UART4
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2014-06-08 07:47:56 -06:00 |
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Gregory Nutt
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b8b2cc6f0e
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SAMA5D4: Update one more register definition header files
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2014-06-07 14:40:49 -06:00 |
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Gregory Nutt
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c86216676f
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SAMA5D4: Update some register definition header files. Many more still to be done
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2014-06-07 13:36:46 -06:00 |
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Gregory Nutt
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87eacd6bf2
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SAMA5D4: Various changes to get the SAMA4D-EK to build
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2014-06-06 15:39:40 -06:00 |
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Gregory Nutt
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dc32678da1
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LPC17: Fix a critical error in GPDMA reported by Lizhuoyi
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2014-06-06 11:20:28 -06:00 |
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Gregory Nutt
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39cf9e248b
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LPC23xx: Several fixes for typos from Lizhuoyi
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2014-06-06 11:06:19 -06:00 |
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Gregory Nutt
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68eb00be93
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SAMA5D4: Add L2CC register definition header file (incomplete)
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2014-06-05 14:38:08 -06:00 |
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Gregory Nutt
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3960271d06
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Finishes the SAMA5D4 XDMAC register definition header file
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2014-06-04 16:59:41 -06:00 |
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Gregory Nutt
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a0561ddd2e
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SAMA5D4: Add beginning of XDMAC register definition header file (incomplete)
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2014-06-04 14:40:34 -06:00 |
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Gregory Nutt
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10232cd784
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SAMA5D4: Has two XDMA modules
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2014-06-04 14:39:52 -06:00 |
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Gregory Nutt
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da889589fd
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SAMA5D4: Let's consistently use the name XDMAC for the SAMA5D4 DMA module
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2014-06-04 14:39:29 -06:00 |
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Gregory Nutt
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c95902f8ea
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Minor naming fix
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2014-06-04 13:35:48 -06:00 |
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Gregory Nutt
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171f312987
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SAMA5: Add pin mux definitions for the SAMA5D4
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2014-06-04 12:58:49 -06:00 |
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Gregory Nutt
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495b190e50
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SAMA5: Rename most EMAC definitions to EMAC0 to handle the SAMA5D4 which has to EMAC modules and no GMAC
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2014-06-04 12:04:24 -06:00 |
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Gregory Nutt
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21e2d0b2d2
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SAMA4D4: Basic framework to support the SAMA4D4. Not yet complete
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2014-06-03 17:49:51 -06:00 |
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Gregory Nutt
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49fa2ff70f
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A few build fixes from last, big ARP relocation change
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2014-05-30 12:32:20 -06:00 |
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Gregory Nutt
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90e4b55e0c
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Move include/nuttx/net/uip/uip-arch.h to include/nuttx/net/arp.h; rename all uip_arp_ functions to arp_
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2014-05-30 12:13:06 -06:00 |
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Gregory Nutt
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6f3cb90c05
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Cosmetic changes
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2014-05-28 14:09:58 -06:00 |
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Gregory Nutt
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2b42e2d587
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STM32 RTC: Add retry to initialization logic. Sometime RTC initialization takes longer. From dlsitzer.
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2014-05-27 07:10:53 -06:00 |
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Gregory Nutt
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ecd768a9e2
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Back out PX4 fixes that were reverted in PX4 repository
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2014-05-25 07:53:00 -06:00 |
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Gregory Nutt
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795ecc3408
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STM32 I2C: Final fixes from Max Kriegleder et al.
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2014-05-23 08:42:14 -06:00 |
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Gregory Nutt
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2abe0dd6dd
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Change all variadic macros to C99 style
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2014-05-22 09:01:51 -06:00 |
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Gregory Nutt
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9aba7598b0
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Change bne to bne.n in irqrestore()
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2014-05-22 09:01:25 -06:00 |
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Gregory Nutt
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11c29aebbc
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Make sure that all references to up_prioritize_irq() are conditioned on CONFIG_ARCH_IRQPRIO. Noted by Make Smith
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2014-05-20 17:48:39 -06:00 |
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Gregory Nutt
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9d2d8d30ea
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STM32 lowputc: Fix an error in conditional compilation. From Sami Pelkonen
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2014-05-20 08:12:07 -06:00 |
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Gregory Nutt
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1b39aff8b4
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SAM4E GPIO: Fix some compile errors when CONFIG_DEBUG_GPIO is enabled
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2014-05-15 11:41:58 -06:00 |
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Gregory Nutt
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de71f53351
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SAM4E-EK: Ooops.. two touchscreen drivers(?)
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2014-05-14 10:56:03 -06:00 |
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Gregory Nutt
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d78aa34ecb
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Fix one error that I made in the last check-in (there are probably more)
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2014-05-14 08:09:08 -06:00 |
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Gregory Nutt
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6018da5181
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Add an alternate STM32 I2C driver that works around errata in the F103 chip (and maybe others). From Patrizio Simona
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2014-05-14 07:48:47 -06:00 |
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Gregory Nutt
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59e254d1f6
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correct some columnar alignment and spacing
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2014-05-13 14:14:57 -06:00 |
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Gregory Nutt
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47dad8d7cf
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STM32 I2C: Cosmetic changes in preparation to merge a change
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2014-05-13 13:11:10 -06:00 |
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Gregory Nutt
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4e55571c21
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SAM4E: PIO definition clean-up
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2014-05-12 18:42:25 -06:00 |
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Gregory Nutt
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8ef77ac3d9
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Updated README and comments
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2014-05-10 11:36:20 -06:00 |
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Gregory Nutt
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75d3d33169
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STM32 I2C: Bring in PX4 fix for I2C in very high noise environments or with rogue perpipherals. Taken from the PX4 commit by Tridge
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2014-05-10 10:34:05 -06:00 |
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Gregory Nutt
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898e59f112
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Couple of fixes for the latest STM32 additions / modifications. These are simple fixes dealing with conditional compile based on CONFIG items not being set. From Ken Pettit
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2014-05-09 06:41:01 -06:00 |
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Gregory Nutt
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e2b8eb6aad
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Add support for the STM32152 and STM32162 Medium+ density parts (plus miscellaneous other improvements to the original STM32151 logic). From Jussi Kivilinna and Sami Pelkonen
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2014-05-08 09:20:11 -06:00 |
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Gregory Nutt
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7594d8b8cf
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Add serial method so that lower half driver can provide RX flow control information. From Jussi Kivilinna
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2014-05-08 09:00:33 -06:00 |
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Gregory Nutt
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d36724abbc
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STM32: Rename pinmap.h files to better reflect the chip naming conventions
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2014-05-07 13:05:12 -06:00 |
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Gregory Nutt
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6a8a62c0c1
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STM32: Fix STM32F100CB pin configuration (from Kosma Moczek); and make chip naming a little more consistent
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2014-05-07 12:54:27 -06:00 |
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Gregory Nutt
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403b9f82d3
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Ooops... last (cosmetic) changes were still in the editor
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2014-05-06 15:00:39 -06:00 |
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Gregory Nutt
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b054463c9e
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Optimized memcpy() functin for the ARMv7-A from David Sidrane
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2014-05-06 14:58:48 -06:00 |
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Gregory Nutt
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33c991dc41
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STM32: Add more complication to STM32 Kconfig so the correct RNG and ETHMAC options presented for the F401RE. There are still invalid peripheral options being presented
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2014-05-06 11:35:13 -06:00 |
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Gregory Nutt
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ade57e4cd8
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Nucleo-F401RE: With these changes and the changes from previous commits, the basic Nucleo-F401RE NSH configuration is working.
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2014-05-06 11:07:10 -06:00 |
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Gregory Nutt
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22733f9a79
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The Nucleo-F401RE has no on-board cystal and, hence, must use the on-chip HSI oscillator for the PLL include clock
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2014-05-06 10:01:02 -06:00 |
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Gregory Nutt
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f2ac4d6403
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STM32: Add more complication to STM32 Kconfig so the correct ADC and CAN options presented for the F401RE. There are still invalid peripheral options being presented
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2014-05-06 08:32:21 -06:00 |
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Gregory Nutt
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88abca5e5e
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STM32: Add some complication to STM32 Kconfig so the correct USART and TIM options are presented for the F401RE. There are still invalid peripheral options being presented
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2014-05-05 17:59:07 -06:00 |
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Gregory Nutt
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2cbb9b907c
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Add SAM3/4 RTT driver. From Bob Doiron
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2014-05-05 14:35:37 -06:00 |
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Gregory Nutt
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3ad8debd73
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Correct some typos in STM32 RCC header files noted by Ramtin Amin
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2014-05-05 07:23:26 -06:00 |
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Gregory Nutt
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d61a13c131
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STM32 F401 has no CCM memory
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2014-04-30 16:49:39 -06:00 |
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Gregory Nutt
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ccb98abaaa
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Fix configuration for F401: It has has FSMC and so the option should not be offered. But there are many more options available for the F401 that should be availalbe: CAN, nonexistent timers, etc. These will all need to be addressed
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2014-04-30 16:12:36 -06:00 |
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Gregory Nutt
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8d758a13de
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The CONFIG_SYSTEMTICK_EXTCLK selection should only be available on systems that support it
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2014-04-30 15:32:06 -06:00 |
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Gregory Nutt
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f7485ea962
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Updated system timer logic from Bob Doiron
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2014-04-30 14:46:26 -06:00 |
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Gregory Nutt
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aa44b8b588
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SAM3/4: Enhanced timer/counter driver from Bob Doiron
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2014-04-30 14:10:02 -06:00 |
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Gregory Nutt
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7857d716b5
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Nucleo-F401RE: Fix memory usage
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2014-04-30 08:20:30 -06:00 |
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Gregory Nutt
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2b2b799a23
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ARMv7-M: Add FPU-related CFLAG settings for the CodeSourcery of Linux toolchain
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2014-04-29 15:02:34 -06:00 |
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Gregory Nutt
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f25d69ff9a
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Sourceforge patch #40. Fix some conditional logic in clock configuration. From Luciano Neri
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2014-04-29 11:32:33 -06:00 |
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Gregory Nutt
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33ddbeab16
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STM32: More places where up_prioritize_irq is called when CONFIG_ARCH_IRQPRIO is not defined. Sourceforge ticket #26
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2014-04-28 07:07:47 -06:00 |
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Gregory Nutt
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40972de8d7
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Fix spelling, only one t in exiting
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2014-04-27 15:49:38 -06:00 |
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Gregory Nutt
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87c78d61bc
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Sourceforge ticket #26: STM32 up_prioritize_irq should not be called if CONFIG_ARCH_IRQPRIO is not defined
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2014-04-25 16:23:00 -06:00 |
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Gregory Nutt
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bdf4a991aa
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STM32 dmapreflight method must be conditioned on CONFIG_SDIO_PREFLIGHT. From Pelle Windestam
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2014-04-25 07:22:14 -06:00 |
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Gregory Nutt
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b3f2e651f0
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Cosmetic update to comments and README files
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2014-04-24 12:44:30 -06:00 |
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Gregory Nutt
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2a8d44eea9
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Updated comments; minor correction in some naming
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2014-04-23 14:46:39 -06:00 |
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Gregory Nutt
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465bfcb4cf
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Fix Bob's name in as many places as possible; Make sure that Bob is an author in as many files as I can think of (might be missing a few)
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2014-04-22 13:42:38 -06:00 |
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Gregory Nutt
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972c4cbab5
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Nucleo F401RE: Remove PX4 cruft that can in with the port
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2014-04-22 12:18:08 -06:00 |
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Gregory Nutt
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18504d0d75
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Back out a bad change in the last commit + add missing SAM4S Xplained Pro file
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2014-04-22 11:04:31 -06:00 |
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Gregory Nutt
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5df14c7d40
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Misc changes to get a clean compilation after incorporating all of Bob Doison's changes
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2014-04-22 10:38:08 -06:00 |
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Gregory Nutt
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1fb0384fe7
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SAM3/4 T/C driver updated to get closer to coding standard
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2014-04-22 09:10:32 -06:00 |
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Gregory Nutt
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61555fe5e1
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Various SAM4S related fixes, mostely related to the timer driver driver and the SAM4S timer/counter. All from Bob Doisin
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2014-04-22 09:01:20 -06:00 |
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Gregory Nutt
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df33d9bcc8
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examples/serialrx added by Bob Doison
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2014-04-22 08:40:48 -06:00 |
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Gregory Nutt
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3d8e313995
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Misc SAM4S-related changes from Bob Doison
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2014-04-21 19:32:15 -06:00 |
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Gregory Nutt
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da66bc6434
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SAM3/4: Add watchdog timer support. From Bob Doisin
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2014-04-21 19:10:06 -06:00 |
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Gregory Nutt
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9aef2435d4
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SAM3/4: Support for PDC based HSMCI ADMA from Bob Doiron
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2014-04-21 17:18:30 -06:00 |
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Gregory Nutt
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c0f27d8aa6
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SAM4S: Fix error in macro that disabled peripheral clocking. From Bob Doiron
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2014-04-21 17:06:01 -06:00 |
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Gregory Nutt
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35bd5c9e65
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SAM3/4 RTC driver from Bob Doiron
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2014-04-21 17:04:22 -06:00 |
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Gregory Nutt
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f7dbe4b970
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SAM3/4 RTC driver from Bob Doiron
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2014-04-21 17:03:57 -06:00 |
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Gregory Nutt
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d53c3a2090
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Add support for the STM32F041RE and for the Nucleo-F401RE board. From Frank Bennett
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2014-04-20 13:42:23 -06:00 |
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Gregory Nutt
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0a52f24e7b
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ST32: Make selection of SDIO interrupt priority essentially impossible
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2014-04-19 08:05:49 -06:00 |
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Gregory Nutt
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6a3a766b00
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LPC17xx: Prioritized interrupts are not supported (although hooks are present to prioritize interrupts). Make LPC17 Ethernet default priority to be the system default, not the highest. If the unsupported feature is enabled, then at least it should do no harm
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2014-04-19 07:56:59 -06:00 |
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Gregory Nutt
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4abb84524d
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Fix an error introduced in the last commit
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2014-04-19 07:54:52 -06:00 |
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Gregory Nutt
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4e72f42468
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LPC17xx, TIVA, and Kinetis interrupt initialization: use the NVIC ICTR register to determine how many interrupt lines/registers are supported by the MCU
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2014-04-17 14:51:53 -06:00 |
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Gregory Nutt
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9485fbf66e
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SAM3/4 Interrupt initialization. Default interrupt priority not being set correctly
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2014-04-17 14:02:22 -06:00 |
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Gregory Nutt
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d374d22738
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STM32 OTGFS Host: If OTGFS_HCCHAR_ODDFRM is not goint to be set, then it should be cleared
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2014-04-17 11:16:58 -06:00 |
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Gregory Nutt
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75e61f4b69
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STM32 OTGFS Host: Changes from Leo for low-speed devices and interrupt endpoints
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2014-04-17 10:52:27 -06:00 |
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Gregory Nutt
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c6d70e29bc
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SAMA5 EMAC: Missing right parens from last change. Noted by Luciano Neri
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2014-04-17 09:02:55 -06:00 |
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Gregory Nutt
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3133ebfcee
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Move the un-definitions of __ramfuncs__ from the sam_clockconfig.c to the common up_internal.h header file so that the attribute will be applied the same to function definitions and prototypes.
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2014-04-17 08:56:20 -06:00 |
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Gregory Nutt
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0184a957b7
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Costmetic: Replace spaces with tabs
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2014-04-16 16:26:46 -06:00 |
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Gregory Nutt
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d62455b0b8
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STM32 OTGFS Host: Additional trace points from Leo
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2014-04-16 12:56:21 -06:00 |
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Gregory Nutt
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80cded4e3e
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STM32 F2: Fix SPI2 MOSI pin mapping. From dlsitzer
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2014-04-16 12:35:33 -06:00 |
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Gregory Nutt
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dc3ef08a66
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SAMA5 TWI: If running from SDRAM, BOARD_MCK_FREQUENCY is not a constant and cannot be used in pre-processor conditionals
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2014-04-16 12:09:55 -06:00 |
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Gregory Nutt
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bf2bb55aac
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SAMA5 SSC: If running from SDRAM, BOARD_MCK_FREQUENCY is not a constant and cannot be used in pre-processor conditionals
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2014-04-16 10:58:23 -06:00 |
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Gregory Nutt
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1e35f1730d
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SAMA5 EMAC/GMAC: If running from SDRAM, BOARD_MCK_FREQUENCY is not a constant and cannot be used in pre-processor conditionals
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2014-04-16 10:13:08 -06:00 |
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Gregory Nutt
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1927c147be
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SAMA5 CAN: If running from SDRAM, BOARD_MCK_FREQUENCY is not a constant and cannot be used in pre-processor conditionals
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2014-04-16 10:00:32 -06:00 |
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Gregory Nutt
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c47816cbf6
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Sourceforge Patch #37: Missing semicolon
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2014-04-16 09:43:34 -06:00 |
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Gregory Nutt
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1b46ebc7f4
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SAMA5 ADC: If running from SDRAM, BOARD_MCK_FREQUENCY is not a constant and cannot be used in pre-processor conditionals
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2014-04-16 09:42:07 -06:00 |
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Gregory Nutt
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08218f977e
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Updates to the STM32 OTGFS host logic from Leo
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2014-04-15 08:49:33 -06:00 |
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Gregory Nutt
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7ad2ace833
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Costmetic changes to some comments
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2014-04-14 16:36:07 -06:00 |
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Gregory Nutt
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48cdbfe5ba
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examples/touchscreen: Add a configuration option to indicate that there is or is not an architecture-specific initialization function
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2014-04-14 12:26:49 -06:00 |
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Gregory Nutt
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f8024cf409
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More trailing whilespace removal
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2014-04-13 16:22:22 -06:00 |
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Gregory Nutt
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f7e5953804
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Cosmetic changes for coding style; removal of dangling spaces at the end of lines
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2014-04-13 13:18:06 -06:00 |
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Gregory Nutt
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494387b33b
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Make sure that there is one space after for
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2014-04-12 13:28:22 -06:00 |
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Gregory Nutt
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056aed1274
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Make sure that there is one space between while and condition
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2014-04-12 13:09:48 -06:00 |
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Gregory Nutt
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303cc1902b
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Make sure that there is one space between if and condition
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2014-04-12 12:53:19 -06:00 |
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Gregory Nutt
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a7789ce91f
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STM32 OTF FS host: Use of OTGFX_VTRACEn_ macros must match use of usbhost_tracen() interface
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2014-04-12 10:09:37 -06:00 |
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Gregory Nutt
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38728a35f5
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STM32 OTG FS Hose and others: Remove some warnings
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2014-04-12 09:58:23 -06:00 |
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