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1718 Commits

Author SHA1 Message Date
Gregory Nutt
54ce3817a5 SDIO interface: Handle all possible DMA combinations in all SDIO drivers. 2017-02-07 07:15:29 -06:00
David Sidrane
9066b4c093 stm32_sdio.c edited online with Bitbucket 2017-01-31 18:01:40 +00:00
Gregory Nutt
3dbdb3bb31 CONFIG_SDIO_DMA: Was been defined in several low-level architecute Kconfig files, but used at the highest levels in the code. Both are bad and both are fixed with this commit 2017-01-31 11:52:00 -06:00
Gregory Nutt
2a4791f4ee Removed dmasupported() method from the SDIO interface. That is now a bit in the cpapability set. 2017-01-31 09:51:15 -06:00
Gregory Nutt
9ac00a355f Add capabilities() method to SDIO interface. Remove CONFIG_SDIO_WIDTH_D1_ONLY. That should not be a global propertie, but rather a capability/limitation of single slot when there may be multiple slots. 2017-01-31 09:16:01 -06:00
Gregory Nutt
f40a0311f5 Merged in david_s5/nuttx/upstream_2_greg_f3_bkp (pull request #200) 
Add missing STM32_BKP_BASE
 2017-01-23 23:42:33 +00:00
David Sidrane
02825f3db0 Add missing STM32_BKP_BASE 2017-01-23 13:38:57 -10:00
Gregory Nutt
4a8c6a6d2d ELF: Move ARMv6-M, ARMv7-M, and legacy ARM versions of ELF relocation logic to libc/machine 2017-01-21 15:24:25 -06:00
Gregory Nutt
be5ba90d4f Move optimized ARM memcpy functions from arch/arm/src/ to libc/machine/. This is necessary for the PROTECTED and KERNEL build modes. Otherwise, memcpy() will be built in to kernel space and not accessible to applications. 2017-01-20 10:53:46 -06:00
Gregory Nutt
3c4684ef5f Eliminate CONFIG_ARCH_OPTIMIZED_FUNCTIONS. Move options to select architectur-specific C library options from libc/Kconfig to libc/machine/Kconfig and rename. 2017-01-20 09:30:07 -06:00
Gregory Nutt
0c0c98691e STM32 and STM32L4 Oneshot: EBUSY is more appropriate error then ENOMEM 2017-01-18 16:20:15 -06:00
Gregory Nutt
b05f928143 STM32L4: Port fix for multiple oneshot timers from STM32. Also fixes a few issues with original STM32 implementation. 2017-01-18 10:45:22 -06:00
Gregory Nutt
0069761d6f STM32 Oneshot: Fix logic so that it can support multiple oneshot timers. 2017-01-18 08:48:26 -06:00
Gregory Nutt
4ede950039 Fix some typos in comments. 2017-01-12 18:02:23 -06:00
Gregory Nutt
895f01dd80 Merged in david_s5/nuttx/upstream_revert_265af481209d60033f7cd4c4216048b1ce3eb435 (pull request #194) 
Revert "STM32 serial: Make input hardware flow-control work with RX DMA.  From Jussi Kivilinna"
 2017-01-12 17:58:20 -06:00
Gregory Nutt
bd696b8c40 Merged in david_s5/nuttx/upstream_to_greg_HSI_ON_re (pull request #193) 
HSI should not be turned off
 2017-01-12 17:47:16 -06:00
David Sidrane
20e723715c HSI should not be turned off 2017-01-12 13:44:03 -10:00
Gregory Nutt
d5cdab0e51 Revert "HSI should not be turned off" 
This reverts commit 4e051c05fb.

This change broke the STM32 seril driver.
 2017-01-12 16:27:04 -06:00
Gregory Nutt
3191549116 Merged in david_s5/nuttx/upstream_to_greg_HSI_ON (pull request #191) 
HSI should not be turned off
 2017-01-11 17:14:14 -06:00
Gregory Nutt
62fe2bf11a Merged in david_s5/nuttx/upstream_to_greg_HSI_not_req_on_F4 (pull request #192) 
STM32F4 does not have the requierment that the HSI be on for FLASH erase/write operations
 2017-01-11 17:13:36 -06:00
David Sidrane
0dbf44e3ad STM32F4 does not have the requierment that the HSI be on for FLASH erace/write operations 2017-01-11 12:47:24 -10:00
David Sidrane
4e051c05fb HSI should not be turned off 2017-01-11 12:18:12 -10:00
Gregory Nutt
b9e2bd4f37 Merge branch 'master' of bitbucket.org:nuttx/nuttx 2016-12-31 12:25:20 -06:00
Gregory Nutt
17cbec16dc STM32 SDIO: Remove warning about unused variable in STM32 F4 builds. 2016-12-31 12:24:02 -06:00
Aleksandr Vyhovanec
a0814ece13 Fix typos 2016-12-30 09:49:31 +03:00
Gregory Nutt
ea7b673174 Merged in david_s5/nuttx/upstream_sdio_1bit_dma (pull request #188) 
Allow dma in 1 bit mode in STM32F4xxx
 2016-12-24 20:21:03 -06:00
David Sidrane
df9ae3c13f Revert "STM32 serial: Make input hardware flow-control work with RX DMA. From Jussi Kivilinna" 
This reverts commit 265af48120.

Conflicts:
	arch/arm/src/stm32/stm32_serial.c
 2016-12-23 14:12:57 -10:00
David Sidrane
76ceb37553 Allow dma in 1 bit mode in STM32F4xxx 2016-12-22 09:19:37 -10:00
David Sidrane
ec85425041 STM32: Fix some STM32F7 copy paste errors 2016-12-17 08:31:12 -06:00
Gregory Nutt
4795d58e03 Back out most of 46dbbe837e. The order is correct -- or, rather, the order is the same as the order that response data is provided. Change the order will break all other drivers. 2016-12-15 07:16:24 -06:00
Gregory Nutt
c83da3c48f Remove minnsh configurations and support logic: up_getc() and lowinstream. 
This was an interesting exercise to see just how small you could get NuttX, but otherwise it was not useful:  (1) the NSH code violated the OS interface layer by callup up_getc and up_putc directly, and (2) while waiting for character input, NSH would call up_getc() which would hog all of the CPU.  NOt a reasonably solution other than as a proof of concept.
 2016-12-13 18:01:23 -06:00
David Sidrane
64ae731c99 stm32_allocateheap.c edited online with Bitbucket 2016-12-09 16:35:35 +00:00
David Sidrane
df9c5b33a0 Added STM32F469 RAM size and deliberated STM32F446 size 2016-12-09 05:02:31 -10:00
David Sidrane
dd309ad9e8 I was wrong - the original commit was correct. Assume a write op on the last word: address of 0xxxxxfe and count of 2. It is a valid operation and address+count is == STM32_FLASH_SIZE - so that is OK 2016-12-08 21:14:31 +00:00
David Sidrane
c77bda47d7 BUGFIX:STM32F427 was rebooting. Over reached family. 2016-12-08 20:31:56 +00:00
Gregory Nutt
b9be0279b1 Coding standard requires a blank line after every comment. 2016-12-07 06:52:15 -06:00
Gregory Nutt
cae56b825b Merged in david_s5/nuttx/upstream_to_greg_SDIO_fix (pull request #177) 
Allow a config to override the SDIO clock edge setting
 2016-12-07 12:48:11 +00:00
David Sidrane
7cc0a06f44 STM32: Allow the config to override the clock edge setting 2016-12-06 13:30:07 -10:00
Gregory Nutt
e190e1ee5b stm32fxxxxx_otgfs.h edited online with Bitbucket 2016-12-06 15:58:05 +00:00
Gregory Nutt
8e447453e1 Add a missing bit field definitions that was lost when stm32_otgfs.h was deleted. 2016-12-06 09:22:03 -06:00
Gregory Nutt
d6437407b1 Fix broken build. Previous commit removed a file that was being used. 2016-12-06 09:03:00 -06:00
Gregory Nutt
b6a21edb42 Merged in david_s5/nuttx/upstream_to_greg (pull request #176) 
Upstream to greg
 2016-12-06 12:22:42 +00:00
David Sidrane
885b718552 Expanded otgfs support to stm32F469 and stm32f446 
Added missing bits definitions
   Used stm32F469 and stm32f446 bit definitions
   Removed unsed header file
 2016-12-05 18:07:57 -10:00
David Sidrane
50f36f8967 Added support for stmf469 SAI and I2S PLL configuration and STM446 fixes 2016-12-05 14:21:46 -10:00
David Sidrane
8b31eda4d8 Added Timers 2-5 and control of SAI and I2S PLLs 2016-12-05 14:19:56 -10:00
Gregory Nutt
7467329a98 Eliminate CONFIG_NO_NOINTS. Lots of files changed -> lots of testing needed. 2016-12-03 16:28:19 -06:00
Janne Rosberg
a03d26e88d stm32_otghshost: if STM32F446 increase number of channels to 16 2016-11-30 12:17:12 -06:00
Gregory Nutt
934aded293 arch/: Adapt all Ethernet drivers to work as though CONFIG_NET_MULTIBUFFER were set. Remove all references to CONFIG_NET_MULTIBUFFER 2016-11-29 16:06:48 -06:00
Marc Rechté
3f91bd6056 STM32 DAC: Fix shift value whenever there are is a DAC2 and, hence, up to three interfaces. 2016-11-29 07:03:54 -06:00
Maciej Wójcik
0d0b1b64e2 Fix for F1 RTC Clock, tested on F103 2016-11-25 06:17:18 +01:00
Gregory Nutt
0804286ad3 arch/: Add option to use low-priority work queue to all Ethernet drivers in arch that support CONFIG_NET_NOINTS. 2016-11-19 09:20:01 -06:00
Paul A. Patience
8d9804d57b STM32: STM32F303xB and STM32F303xC chips have 4 ADCs 2016-11-18 19:28:09 -05:00
Gregory Nutt
19c1c9d78b All timer lower half drivers. Port Sebastien's changes to all all other implementations of the timer lower half. Very many just and untested. Expect some problems. 2016-11-17 15:03:31 -06:00
Marc Rechté
eb9a8ed790 STM37xx PWM: Add PWM driver support for STMF37xx. The changes have been tested successfuly for TIM4 and TIM17 (different IPs). 2016-11-07 09:35:48 -06:00
Gregory Nutt
8bd8ab1a45 configs/nucleo_f303re: Various fixes to get the adc configuration building again after PR. Refresh all configurations. 2016-11-04 06:59:28 -06:00
Gregory Nutt
0a5b4f684a arch: Disable priority inheritance on all semaphores used for signaling in the rest of the MCU drivers 2016-11-03 17:38:26 -06:00
Gregory Nutt
d28181da10 arch: Disable priority inheritance on all semaphores used for signaling in all USB host drivers 2016-11-03 17:05:53 -06:00
Gregory Nutt
bb6bfa633e arch: Disable priority inheritance on all semaphores used for signaling in all SD card drivers 2016-11-03 15:13:27 -06:00
Gregory Nutt
8b07aa6f7c arch: Disable priority inheritance on all semaphores used for signaling in all SPI drivers 2016-11-03 14:51:44 -06:00
Gregory Nutt
e1cd9febbf arch: Disable priority inheritance on all semaphores used for signaling in all I2C/TWI drivers 2016-11-03 14:23:42 -06:00
Paul A. Patience
93e9387689 STM32 ADC: Fix compilation error when DMA isn't enabled 2016-11-02 12:52:19 -04:00
David Sidrane
d870f4ab29 I think, that Size is (highest address+1 - Base address) 
Base address has been removed and if address+count >= size we are outside of the Flash
 2016-11-01 22:27:35 +00:00
Aleksandr Vyhovanec
2bb15fe789 Minor changes 2016-11-01 23:48:44 +03:00
Aleksandr Vyhovanec
20a1642552 To write the last page 2016-11-01 23:34:30 +03:00
Gregory Nutt
3bacda1565 STM32 Serial: Trivial removal of an extra space in a comment 2016-10-28 07:16:52 -06:00
Marc Rechte
483f012600 Initial implemention of the STM32 F37xx SDADC module. There are also changes to ADC, DAC modules. SDADC has only been tested in DMA mode and does not support external TIMER triggers. This is a work in progress. 2016-10-25 14:14:10 -06:00
Max Kriegleder
1d50259358 STM32 F4 I2c: A new implementation of the STM32 F4 I2C bottom half. The commin I2C as this did not handled correctly in the current implementation (see also https://github.com/PX4/NuttX/issues/54). The changes almost exclusively affect the ISR. 2016-10-24 16:32:10 -06:00
Maciej Wójcik
c719a32a40 add tim8 to stm32f103v pinmap 2016-10-19 16:34:07 +02:00
Gregory Nutt
30598c005f Cosmetic changes from review of last PR 2016-10-15 08:56:11 -06:00
David Sidrane
909ea5e8ef F4 Support versampling by 8 2016-10-15 03:56:07 -10:00
Jens Gräf
1d3abd17cc dma2d: fix an error in up_dma2dcreatelayer where an invalid pointer was returned when a certain underlying function failed. 2016-10-07 13:42:24 +02:00
Gregory Nutt
d61239e38f stm32_modifycr2 should be available on all platforms is DMA is enabled. 2016-10-06 08:50:52 -06:00
Sebastien Lorquet
9dcecd4b15 Add support for qencoders on various nucleo boards 2016-10-03 16:07:20 +02:00
Neil Hancock
ef475eb6a9 STM32 Ethernet: Correct typo in conditional logic 2016-10-01 07:32:41 -06:00
Mateusz Szafoni
9742757f26 Remove GPIO_ETH_RMII_TX_CLK. TX_CLK is not present in RMII 2016-09-22 10:05:45 +02:00
Pierre-noel Bouteville
829de7d5bd Set USB address to avoid a failed assertion 2016-09-15 08:36:45 -06:00
Gregory Nutt
9c3bade7b4 net/tcp: tcp_ipvX_bind() not actually using the ported selected with port==0. Also removes duplicate call to pkt_input(). Issues noted by Pascal Speck. 2016-08-30 07:59:57 -06:00
David Sidrane
f2809d52d3 stm32_otgfsdev.c edited online with Bitbucket 
dup SOF removed as noted by Sébastien Lorquet
 2016-08-26 17:20:38 +00:00
David Sidrane
87f4a8033a BugFix:Lost first word from FIFO 
1) Do not overwrite Reserved Bits in GINTSTS (per ref manual)*
    2) Acknowledge all pending int on entry to ISR that are Only rc_w1*
    3) Do not disable RXFVL*
    4) Loop until RXFVL is cleared*
    5) Only clear the NAK on the endpoint on the OTGFS_GRXSTSD_PKTSTS_SETUPDONE to
       not loose the first WORD of FIFO all the data  (Bug Fix)

Changed marked *are just driver clean up and ensure ints are not lost.
The bug fix is #5

Test case open putty and observer the Set/Get LineCoding
Without this fix #5 the Get will not match the Set, and
infact the data might be skewed by 4 bytes, that are lost
from the FIFO if the OTGFS_DOEPCTL0_CNAK bit is set in the
OTGFS_GRXSTSD_PKTSTS_SETUPRECVD as opposed to the OTGFS_GRXSTSD_PKTSTS_SETUPDONE

Set Line Coding DATA1: 4B | 00 c2 01 00 00 00 08 | c8 1B
Get Line Coding DATA1: 4B | .. .. .. .. 00 00 08   c8 .. 00 00 07 | 7a 72
 2016-08-25 06:51:52 -10:00
Aleksandr Vyhovanec
6bc952a2cc STM32: Add IAR-style STM32F1xx vectors. Tested on STM32F103RB and STM32F107RC. 2016-08-24 10:10:33 -06:00
Gregory Nutt
ae37c9859f Cosmetic changes from review of PR 120 2016-08-19 06:32:28 -06:00
Michał Łyszczek
0f175039ad Fix compilation warnings for stm32 eth with certain configs 2016-08-19 09:18:18 +02:00
Gregory Nutt
c0074fd6b8 Merged in mlyszczek/nuttx/stm32butterfly2_board (pull request #118) 
add stm32butterfly2 development board
 2016-08-18 11:14:10 -06:00
Alan Carvalho de Assis
a3e1bdde14 STM32 SPI: Fix STM32F3XXX SPI driver to read 8-bit correctly. 2016-08-18 08:38:49 -06:00
Gregory Nutt
d369eeec95 Remove a misleading comment 2016-08-18 07:13:04 -06:00
Gregory Nutt
01ae660c6c Merged in K-man23/nuttx/stm32_adc_fix (pull request #117) 
Change stm32 adc dma callback to send channel number instead of index
 2016-08-17 14:05:37 -06:00
Konstantin Berezenko
9b3bbc0f09 Change stm32 adc dma callback to send channel number instead of index 2016-08-17 13:02:36 -07:00
Michał Łyszczek
a05d9c18da Add connectivity line stm32 to be able to compile SYSCFG, add definitions for 
usb clock divs
 2016-08-17 20:11:15 +02:00
Konstantin Berezenko
42ee88fe89 STM32F411 and STM32F446 map i2c2_sda_4 to different alternate function numbers 2016-08-17 11:01:44 -07:00
Gregory Nutt
8052dc4955 STM32 SPI: nbits should be unsigned. Valid range is 4-16 for F3 and L4. 8 or 16 for others. 2016-08-13 16:01:50 -06:00
Gregory Nutt
1a10518dae Update ChangeLog 2016-08-13 12:03:12 -06:00
Gregory Nutt
eed5e41626 Add some comments 2016-08-13 10:24:40 -06:00
Gregory Nutt
172761163b STM32F3 SPI: Cannot write 16-bit value to DR register because of how the F3 implements data packing. 2016-08-13 10:11:23 -06:00
Gregory Nutt
51fcd89b98 Add and fix some SPI debug output 2016-08-13 08:31:37 -06:00
Gregory Nutt
42202c6365 STM32 and STM32L4: Enabling DMA loses other bits in CR2 2016-08-13 08:01:41 -06:00
Gregory Nutt
efc9f674d2 Trivial changes to comments and spacing 2016-08-13 07:50:54 -06:00
Alan Carvalho de Assis
805cb5c752 STM32F3 SPI: Fix a typo 2016-08-13 07:23:48 -06:00
Gregory Nutt
da5563c0e7 STM32: Add conditional logic for STM32F37xx 2016-08-13 06:43:13 -06:00
Gregory Nutt
10f90a1738 STM32 F3: Fix more SPI issues 2016-08-12 19:00:34 -06:00
Gregory Nutt
3383a25c38 Some logic missing from last commit 2016-08-12 18:40:25 -06:00
Gregory Nutt
afb02b56d4 STM32F3 SPI: Fix the number of bit setting for the F3. It works differently than for other parts. 2016-08-12 18:32:37 -06:00
Gregory Nutt
046acf6b54 Add a simulated oneshot lowerhalf driver 2016-08-12 13:14:03 -06:00
Gregory Nutt
b4e8876b09 Correct some spacing 2016-08-12 12:41:49 -06:00
Gregory Nutt
82b86cdcf3 oneshot interface: max_delay method should return time in a standard struct timespec form. 2016-08-12 11:33:10 -06:00
Gregory Nutt
89135c55e4 drivers/timer: Add an upper-half, oneshot timer character driver. 2016-08-12 10:40:07 -06:00
Gregory Nutt
1965e25da4 STM32L4: Add oneshot lower half driver. 2016-08-11 17:14:41 -06:00
Gregory Nutt
fa6866b046 SAMA5: Add option to support oneshot timer without free-running timer. Add oneshot lower half driver. 2016-08-11 16:47:17 -06:00
Gregory Nutt
d0ce5b1d1e Cosmetic changes to comments and function prototypes 2016-08-11 15:15:37 -06:00
Gregory Nutt
fb349508fd STM32 oneshot lower-half: Missed some data initialization. 2016-08-11 14:57:17 -06:00
Gregory Nutt
eb3a565153 STM32: Add oneshot lower half to build system. Fix some build problems. 2016-08-11 14:53:39 -06:00
Gregory Nutt
1bb93021df STM32: Add a experimental oneshot, lower-half driver for STM32 2016-08-11 14:07:43 -06:00
Gregory Nutt
accbccd78a Merged in mlyszczek/nuttx/stm32f1connline_pllfix (pull request #111) 
Fix bad pllmul values for stm32f1xx connectivity line.
 2016-08-11 06:44:19 -06:00
Michał Łyszczek
81df56086a Fix bad pllmul values for stm32f1xx connectivity line. 
stm32f1xx connectivity line supports only x4, x5, x6, x7, x8, x9 and x6.5 values
 2016-08-11 10:49:57 +02:00
Gregory Nutt
fdcf0f7e5f Correct some comments 2016-08-09 15:15:21 -06:00
Gregory Nutt
b5b7a21bb6 Make reference count a uin16_t and save a couple of bytes. 2016-08-09 13:54:57 -06:00
Gregory Nutt
8b5833f7fe A consequence of Max's change to the logic to enable access to the backup domain is that every call to enabledbkp(true) must be followed by a matching call to enablebkp(false). There was one cse in both RTCC drivers where that may not always be true. 2016-08-09 11:33:47 -06:00
Gregory Nutt
5d91b8cabb With last change, stm32_pwr_enablebkp() no longer returns a value 2016-08-09 07:50:31 -06:00
Max Neklyudov
1e3ccbac12 Make stm32_pwr_enablebkp thread safe 2016-08-09 07:36:13 -06:00
Alan Carvalho de Assis
8499f42bf9 Add STM32F37XX DMA channel configuration 2016-08-08 13:29:53 -06:00
Alan Carvalho de Assis
fcf1ae7e05 stm32f37xx: Fix SYSCFG_EXTICR_PORTE defined twice 2016-08-08 12:59:29 -06:00
Alan Carvalho de Assis
834f058573 I'm using NuttX on STM32F373 and saw the config was missing SPI2 and 
SPI3, see datasheet:
www.st.com/resource/en/datasheet/stm32f373cc.pdf

I searched for other members of STM32F37XX family and they also have 3 SPIs:
http://www.st.com/content/st_com/en/search.html#q=STM32F37-t=keywords-page=1
 2016-08-08 12:25:15 -06:00
Gregory Nutt
6df28bc74e Make bit-order SPI H/W feature configurable for better error detection 2016-08-08 11:54:13 -06:00
Gregory Nutt
c3cfd37791 Fix cloned variable error in all SPI drivers 2016-08-08 11:04:01 -06:00
Gregory Nutt
2ae3953f9e STM32/EFM32: If any hardware feature other and LSBFIRST is selected, return -ENOSYS. 2016-08-08 10:37:28 -06:00
Gregory Nutt
7d4cb73bd6 STM32 and EFM32 SPI drivers adopted an incompatible conventions somewhere along the line. The set the number of bits to negative when calling SPI_SETBITS which had the magical side-effect of setting LSB first order of bit transmission. This is not only a hokey way to pass control information but is supported by no other SPI drivers. 
This change three things:  (1) It adds HWFEAT_LSBFIRST as a new H/W feature.  (2) It changes the implementations of SPI_SETBITS in the STM32 and EFM32 derivers so that negated bit numbers are simply errors and it adds the SPI_HWFEATURES method that can set the LSB bit order, and (3) It changes all calls with negative number of bits from all drivers: The number of bits is now always positive and SPI_HWFEATUREs is called with HWFEAT_LSBFIRST to set the bit order.
 2016-08-08 08:28:13 -06:00
Gregory Nutt
309480d0f9 Merge branch 'timekeeping' of bitbucket.org:nuttx/nuttx 2016-07-28 09:34:00 -06:00
Gregory Nutt
9b9b721406 Rename alarm_enable to rtc_alarm_enabled; mark inline 2016-07-23 12:01:57 -06:00
Gregory Nutt
5a0f9fcb7d Fix STM32 RTC Alarm interrupts. They were being enabled BEFORE the interrupt system was being initialized. 2016-07-23 10:36:06 -06:00
Gregory Nutt
14de4b99f8 Simplify some computations 2016-07-23 08:13:25 -06:00
Gregory Nutt
0984fcda44 Back out last RTC alarm changes. I am mistaken, the interrupts are enabled by stm32[l4]_exti_alarm(). 2016-07-23 07:53:08 -06:00
Gregory Nutt
829c5610da STM32 F4 RTC ALARM: Was not enabling interrupts. 2016-07-23 07:19:14 -06:00
Gregory Nutt
a2035f7efd Move include/nuttx/1wire.h to include/nuttx/drivers/1wire.h 2016-07-21 13:51:28 -06:00
Gregory Nutt
1b9b3a7b47 pwm.h moved from include/nuttx/ to include/nuttx/drivers. 2016-07-20 13:48:24 -06:00
Gregory Nutt
ddcaa3d425 can.h moved from include/nuttx/ to include/nuttx/drivers. 2016-07-20 13:38:36 -06:00
Gregory Nutt
4b4dbc79a2 Move driver related prototypes out of include/nuttx/fs/fs.h and into new include/drivers/drivers.h 2016-07-20 13:15:37 -06:00
Sagitta Li
e07bd757ba STM32 F107: TIM8 not supported in F105/F107 2016-07-20 08:51:03 -06:00
Gregory Nutt
2119c5ce19 Fix another function naming error 2016-07-18 12:40:27 -06:00
Gregory Nutt
d36da2b560 Fix bad dev[u]random_register() function return value. 2016-07-18 12:25:05 -06:00
Gregory Nutt
078bbe5e5c All H/W RNG Drivers: Can now be configured to register as /dev/random and/or /dev/urandom 2016-07-18 11:10:37 -06:00
Gregory Nutt
1660329d06 Rename up_rnginitialize to devrandom_register 2016-07-18 10:55:37 -06:00
Pierre-noel Bouteville
76f12b1f69 I'm using syslog through ITM. In this case syslog_channel function is call before ram initialisation in stm32_clockconfig. But syslog channel uses a global variable that is reset to default by the RAM initialization. 2016-07-14 07:29:39 -06:00
Gregory Nutt
beaca7a17f Merge remote-tracking branch 'origin/master' into timekeeping 2016-07-13 10:22:38 -06:00
Max Neklyudov
067f63fc18 STM32: Fix bug in oneshot timer 2016-07-13 10:20:38 -06:00
Gregory Nutt
fb1855244e STM32 timer: Eliminate a warning 2016-07-11 13:13:17 -06:00
Gregory Nutt
246773faa7 Rename CONFIG_SCHED_TIMEKEEPING to CONFIG_CLOCK_TIMEKEEPING. That is a better compartmentalized name. 2016-07-11 06:54:02 -06:00
Max Neklyudov
8db29071da timekeeping: initial implementation 2016-07-10 16:14:25 -06:00
Gregory Nutt
c16500dfdb STM32 timer. More clean up: Add all function prototypes. Reorder functions to match ordering in operations structure. 2016-07-06 14:24:59 -06:00
Gregory Nutt
7c568f249a STM32: Various fixed to get a clean compile after integrating tickless mode. Mostly because patch came from an old version of NuttX. 2016-07-06 13:37:08 -06:00
Gregory Nutt
711f3318c5 STM32 timer: Reorganize to conform better with the NuttX coding style 2016-07-06 13:36:17 -06:00
Max Neklyudov
d8286a7f47 STM32: Add support for Tickless mode (two timer implementation) 2016-07-06 12:48:30 -06:00
Paul A. Patience
20c611c12b STM32 CAN: Bitfield definitions should be unsigned 
Shifting 1 by 31 is undefined behaviour because 1 is signed.
We should probably use 1ul instead of 1 everywhere else,
but for now this silences a compiler warning.
 2016-06-29 13:59:33 -04:00
Paul A. Patience
52a4a20efb STM32L4 CAN: Port support for both RX FIFOs from STM32 CAN 2016-06-29 13:59:29 -04:00
Gregory Nutt
6aa067e929 Mostly costmetic changes from review of last PR 2016-06-29 07:33:30 -06:00
David Sidrane
eacd672ab0 STM32 BBSRAM fixed (and formated) flags 2016-06-28 16:25:04 -10:00
Gregory Nutt
c40c107e7a STM32 F4 RTC: Fix some long lines 2016-06-28 16:55:06 -06:00
Gregory Nutt
a43da4d107 STM32 CAN: Clone missing stm32_enterinitmode() and _exitinitmode() from STM32L4. Don't know if this is write but is needed to compile. 2016-06-28 14:35:49 -06:00
Paul A. Patience
a4d5845887 efm32, lcp43, stm32, stm32l4: disable interrupts with NVIC_IRQ_CLEAR 2016-06-28 15:12:39 -04:00
Gregory Nutt
8e26d4c8e0 STM32 CAN: More fixes for compilation errors due to blind leverage of STM32L4 CAN filter IOCTLs to STM32 2016-06-27 15:16:13 -06:00
Gregory Nutt
1b5bef5325 STM32 CAN: Fix an error when filter methods were ported from STM32L4 2016-06-27 11:15:37 -06:00
Gregory Nutt
ea8760eb19 Cosmetic changes from review of last PR 2016-06-24 07:20:04 -06:00
Sebastien Lorquet
d3441668ee Port STM32L4 CAN IOCTLs to STM32 2016-06-24 11:53:17 +02:00
Sebastien Lorquet
6de8dba383 Preliminary rename of stm32 can driver functions 2016-06-24 11:29:31 +02:00
Sebastien Lorquet
8b1a607671 Here is a patch to 
-remove a wrong comment in atmel mcan ioctl
-add ioctls to set/get bit timing in stm32l4
-add ioctl hooks to allow future management of can id filters.
 2016-06-21 06:21:54 -06:00
Gregory Nutt
2a751068e6 Without lowsyslog() *llerr() is not useful. Eliminate and replace with *err(). 2016-06-20 12:44:38 -06:00
Gregory Nutt
43eb04bb8f Without lowsyslog() *llinfo() is not useful. Eliminate and replace with *info(). 2016-06-20 11:59:15 -06:00
Gregory Nutt
d40a473f72 Without lowsyslog() *llwarn() is not useful. Eliminate and replace with *warn(). 2016-06-20 09:37:08 -06:00
Gregory Nutt
8021354e01 ullinfo (vs ulinf) 2016-06-19 18:14:27 -06:00
Gregory Nutt
5b2aa7bf99 Remove all traces of CONFIG_SYSLOG 2016-06-19 13:59:43 -06:00
Gregory Nutt
77d01ab1da Cosmetic changes from review of last PR 2016-06-18 13:00:17 -06:00
Gregory Nutt
d563a205ea Merged in david_s5/nuttx/upstream_nucleo-144 (pull request #64) 
Upstream_nucleo 144
 2016-06-18 12:37:23 -06:00
David Sidrane
f8dd4dd3eb Missing Brace 2016-06-18 08:06:33 -10:00
Gregory Nutt
d20128cc11 STM32: In big change off err() to info(), several debug statements lost their ll property. 2016-06-18 07:40:27 -06:00
David Sidrane
1c472a5ff0 STM32 adc heared file error 2016-06-17 12:48:29 -10:00
David Sidrane
ae04f25965 Clean up and Use two level include 74xx77xx ADC 2016-06-17 12:48:29 -10:00
Gregory Nutt
0d3ecb3ddd Fix another victim of the mass name changes: xyz_errmonitor->xyz_dbgmonitor 2016-06-17 07:00:33 -06:00
Pascal Speck
794a64a99b hen configuring a GPIO via stm32_configgpio() the function will first set the mode to output and then set the initial state of the gpio later on. If you have an application with an externaly pulled-up pin, this would lead to a glitch on the line that may be dangerous in some applications (e.G. Reset Line for other chips, etc). This changes sets the output state before configuring the pin as an output. 2016-06-17 06:23:18 -06:00
Gregory Nutt
46de4a5779 Fix another search and replace error from last set of changes 2016-06-16 18:19:37 -06:00
Gregory Nutt
4a34540e8f Eliminate a warning 2016-06-16 16:22:01 -06:00
Gregory Nutt
088e9920a8 Cosmetic: Fix some long lines in comment blocks 2016-06-16 15:45:57 -06:00
Gregory Nutt
5ecb8da118 Eliminate a warning 2016-06-16 15:26:19 -06:00
Gregory Nutt
a63072d080 Fix yet more typos from the last commits 2016-06-16 15:06:13 -06:00
Gregory Nutt
ae13471244 One more time. Correct name of USB debug macros are uinfo and uerr, not usbinfo and usberr. 2016-06-16 13:36:37 -06:00
Gregory Nutt
865150f666 STM32: Logic to reset backup domain only applies if the RTC is enabled. 2016-06-16 13:36:50 -06:00
Gregory Nutt
53ec3ca1a2 Fix a cut-and-paste error: uusbinfo->usbinfo 2016-06-16 13:18:59 -06:00
Gregory Nutt
e60ced1835 Update last change... STM32 does not have STM32_RTC_BKR register. 2016-06-16 12:51:21 -06:00
Gregory Nutt
bf0a3bf0c8 Fix error in recent LSE-related fix: Requires CONFIG_STM32_PWR, or will not build correctly 2016-06-16 12:43:35 -06:00
Gregory Nutt
6c1678d1d9 STM32 Ethernet: Fix a bad cut and paster error from recent changes 2016-06-16 12:35:57 -06:00
Gregory Nutt
0c8c7fecf0 Add _ to the beginning of all debug macros to avoid name collisions 2016-06-16 12:33:32 -06:00
Gregory Nutt
fdaf3d7268 STM32: Move backup domain reset to stm32_rcc.c in order to avoid disabling LSE during RTC initialiation. 2016-06-16 09:52:15 -06:00
Gregory Nutt
f9652812e2 Change *err() to either info() or err(ERROR:..), depending upon if an error has occurred. 2016-06-16 09:38:16 -06:00
Gregory Nutt
b7f0fbc073 Centralize definitions associated with CONFIG_DEBUG_RTC 2016-06-16 07:39:23 -06:00
Gregory Nutt
6b517ed017 Centralize definitions associated with CONFIG_DEBUG_WATCHDOG 2016-06-16 06:28:04 -06:00
Gregory Nutt
03cbe671ad Centralize definitions associated with CONFIG_DEBUG_PWM 2016-06-15 17:23:56 -06:00
Gregory Nutt
5c89b18af8 Centralize definitions associated with CONFIG_DEBUG_I2C 2016-06-15 16:30:12 -06:00
Gregory Nutt
63b1eb09e6 Centralize definitions associated with CONFIG_DEBUG_CAN 2016-06-15 15:45:27 -06:00
Gregory Nutt
6d9a0511ad Rename CONFIG_DEBUG_HEAP to CONFIG_HEAP_COLORATION 2016-06-15 14:48:06 -06:00
Gregory Nutt
f2cac0ceb7 Merged in K-man23/nuttx/stm32f411-fix (pull request #60) 
Add GPIO_I2C2_SDA_4 to STM32F411
 2016-06-15 11:58:40 -06:00
Gregory Nutt
ba03134bed Centralize definitions associated with CONFIG_DEBUG_SPI 2016-06-15 10:41:13 -06:00
Konstantin Berezenko
89b192d080 Add GPIO_I2C2_SDA_4 to STM32F411 2016-06-15 09:06:08 -07:00
Gregory Nutt
c4e6f50eac Centralize definitions associated with CONFIG_DEBUG_IRQ 2016-06-15 08:35:22 -06:00
David Sidrane
0bded28cf3 Fix some naming errors that were recently introduced with mass substirutions 2016-06-14 09:42:04 -06:00
Gregory Nutt
a98bc05f65 New debug macro: alert(). This is high priority, unconditional output and is used to simplify and stanardize crash error reporting. 2016-06-14 09:07:53 -06:00
Gregory Nutt
0f249016a0 Eliminate some warnings 2016-06-13 14:01:32 -06:00
Gregory Nutt
26718cee5c Eliminate some warnings when CONFIG_DEBUG_FEATURES is enabled, but no output is enabled 2016-06-12 14:44:04 -06:00
Gregory Nutt
a1469a3e95 Add CONFIG_DEBUG_ERROR. Change names of *dbg() * *err() 2016-06-11 15:50:49 -06:00
Gregory Nutt
e99301d7c2 Rename *lldbg to *llerr 2016-06-11 14:55:27 -06:00
Gregory Nutt
1cdc746726 Rename CONFIG_DEBUG to CONFIG_DEBUG_FEATURES 2016-06-11 14:14:08 -06:00
Gregory Nutt
fc3540cffe Replace all occurrences of vdbg with vinfo 2016-06-11 11:59:51 -06:00
Gregory Nutt
3a74a438d9 Rename CONFIG_DEBUG_VERBOSE to CONFIG_DEBUG_INFO 2016-06-11 11:50:18 -06:00
Gregory Nutt
e6ca12f4c3 Changes from review of last PR 2016-06-09 16:57:05 -06:00
Konstantin Berezenko
2ebdcb463e Fix compilation errors in debug mode of stm32_pwm.c 2016-06-09 15:48:08 -07:00
Gregory Nutt
48c9aa08a3 Merged in marten_svanfeldt/nuttx-public/for_upstream/stm32_dma_fix (pull request #43) 
Fix STM32 DMA code and configuration for STM32F37X chips
 2016-06-09 09:10:13 -06:00
David Sidrane
44ead7f40a Fix email address in file headers 2016-06-09 08:26:14 -06:00
Marten Svanfeldt
1b36526e91 Fix STM32 DMA code and configuration for STM32F37X chips 
Signed-off-by: Marten Svanfeldt <marten@intuitiveaerial.com>
 2016-06-09 05:02:43 +02:00
Konstantin Berezenko
3fc7b6f0e5 Add stm32f105r support 2016-06-06 12:52:41 -07:00
Gregory Nutt
053ac343fd STM32 PWM: More review changes from last commit; improve handling of unsigned types 2016-06-05 16:01:29 -06:00
Pierre-noel Bouteville
0bd444ae47 Just update duty if frequency is not changed and PSM started. This removeis glitch or blinking when only duty is frequently changed. 2016-06-05 15:35:43 -06:00
Gregory Nutt
6b84637a5b Update some comments 2016-06-04 13:04:13 -06:00
Gregory Nutt
4965d0dc99 KL and LPC11: Perform similar name change as for STM32: xyz_lowputc -> up_putc 2016-06-04 11:29:27 -06:00
Alan Carvalho de Assis
86cfcfd58a Add the up_getc() function to STM32 in order to support the minnsh configuration. 2016-06-04 07:22:45 -06:00
Gregory Nutt
37e8536a88 STM32: Put timer selections in a separate menu 2016-06-04 07:11:05 -06:00
Gregory Nutt
34df98d97e Use DEBUG assertions to save space 2016-06-03 14:49:05 -06:00
Gregory Nutt
704fadb0e6 STM32 TIM: Assure that a compilation error will occur if the old timer input clock frequency definitions are used 2016-06-03 14:17:18 -06:00
Gregory Nutt
3ec2386be8 STM32 TIM: There is a TIM17 on some parts too 2016-06-03 14:08:28 -06:00
Gregory Nutt
282edefab3 STM32 TIM: Add hooks for all previously unsupported timers. Also fix some PWM warnings. 2016-06-03 13:51:43 -06:00
Gregory Nutt
c11e923ad4 Fix a cut'n'paste error left from last commit. 2016-06-03 12:11:55 -06:00
Gregory Nutt
910bac65fa STM32 Timer: Generalize and extend calculation of per-timer pre-scaler value. Inspired by original proposal from Pierre-noel Bouteville. 2016-06-03 11:38:59 -06:00
Gregory Nutt
88a41862b5 Revert "STM32 Timer Driver: Change calculation of per-timer pre-scaler value" 
This reverts commit 082d32226b.
 2016-06-03 09:41:17 -06:00
Pierre-noel Bouteville
082d32226b STM32 Timer Driver: Change calculation of per-timer pre-scaler value 2016-06-03 08:45:22 -06:00
Pierre-noel Bouteville
426e425a55 Correct conditional compilation in STM32 timer cpature logic 2016-06-03 08:41:53 -06:00
Pierre-noel Bouteville
6a2a0bf11f Note reserved bits in STM32 ADC 2016-06-03 08:39:17 -06:00
Gregory Nutt
fcdc17056b STM32 F4 RTC: I believe that the F405/407 has only a single alarm. Not sure. 2016-06-02 15:04:23 -06:00
Gregory Nutt
82c73e206e STM32 F4 RTC, trivial changes 2016-06-02 07:58:13 -06:00
Gregory Nutt
2f974ffeaf Merged in david_s5/nuttx/upstream_to_greg (pull request #37) 
Fix the Value Line adc IRQ number selection
 2016-05-31 19:18:11 -06:00
Gregory Nutt
82dec4acab STM32F4 RTC: Remove 24 hour limit; Fix calculation of the alarm register (was not including day of the month). Fix a bad shift value 2016-05-31 19:13:21 -06:00
David Sidrane
70f2b47a0d Fix the Value Line adc IRQ number selection 2016-05-31 14:54:04 -10:00
Gregory Nutt
6eac8bf28d Update some comments 2016-05-31 17:31:15 -06:00
Gregory Nutt
15810946b1 Update some comments 2016-05-31 17:28:02 -06:00
Gregory Nutt
8ca5daf2b3 Changes from review of last PR 2016-05-31 15:52:56 -06:00
neilh10
639410849e alarm 10 now runs to completion 2016-05-31 14:17:52 -07:00
Pierre-noel Bouteville
39c1e3aba2 Allow to not use all channet in a lower part of PWM 2016-05-30 11:58:22 -06:00
Gregory Nutt
f65616f872 Replace confusing references to uIP with just 'the network' 2016-05-30 09:16:32 -06:00
Konstantin Berezenko
5c6cd17d46 Add support for SPI 4 and 5 on stm32f411 chips 2016-05-27 11:08:18 -07:00
Gregory Nutt
3d3b7b5422 EFM32, STM32, TIVA: Allow lower half driver to build if any ADC is selected. Should not depend on CONFIG_ADC. 2016-05-27 06:46:33 -06:00
Gregory Nutt
31ac3f5123 STM32 ADC: Missed on adc_receive 2016-05-26 12:42:34 -06:00
Gregory Nutt
8f2a660c8b Add ADC bind method to the STM32 ADC drivers 2016-05-26 12:25:54 -06:00
Gregory Nutt
783bab6c82 Costmetic changes from review of last PR 2016-05-25 18:04:39 -06:00
Gregory Nutt
3603dc6218 1-wire: Initialization/uninitialization functions are not use MCU-independent up_ naming. Should use STM32-specific stm32_ naming. These are not globally accessible but only accessible from STM32 board logic. 2016-05-25 17:56:47 -06:00
Paul A. Patience
d31aefe4ef STM32 CAN: Add support for both RX FIFOs 2016-05-25 16:11:18 -04:00
Gregory Nutt
add152bf24 Update README 2016-05-25 14:07:59 -06:00