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14199 Commits

Author SHA1 Message Date
Alin Jerpelea
07d528fd8d license: Ken Pettit: update licenses to Apache 
Ken Pettit is the copyright holder for those files and he has submitted the
SGA as a result we can migrate the licenses to Apache.

Signed-off-by: Alin Jerpelea <alin.jerpelea@sony.com>
 2021-08-23 11:41:41 +08:00
chao.an
6cfb132232 arch/cortex-m: replace arm_switchcontext to c-style 
Signed-off-by: chao.an <anchao@xiaomi.com>
 2021-08-22 14:44:01 +08:00
Xiang Xiao
af72376773 fs: Remove magic field from partition_info_s 
since it is wrong and impossible to return file
system magic number from the block or mtd layer.

Signed-off-by: Xiang Xiao <xiaoxiang@xiaomi.com>
 2021-08-20 09:19:52 -03:00
Xiang Xiao
4b41579ccf arch/armv8-m: Add SAU support 
Signed-off-by: Xiang Xiao <xiaoxiang@xiaomi.com>
 2021-08-20 10:22:43 +09:00
raiden00pl
78962165d8 arch/stm32: add 3-phase Hall effect sensor lower half 2021-08-19 08:19:38 -07:00
chao.an
0a8d951837 arch/arm: correct the frame pointer register declare 
In AArch32, the frame pointer is stored in register R11 for ARM code or register R7 for Thumb code.
In AArch64, the frame pointer is stored in register X29.

Signed-off-by: chao.an <anchao@xiaomi.com>
 2021-08-19 01:26:07 -07:00
raiden00pl
532ec126e9 stm32/stm32_serial.c fix compile error when CONFIG_STM32_SERIALBRK_BSDCOMPAT=y. 
Fix for https://github.com/apache/incubator-nuttx/issues/4353
 2021-08-18 04:43:32 -07:00
Juha Niskanen
e02e1c25f6 arch/arm/src/stm32l4/Kconfig: add new STM32L4+ chip types 
Signed-off-by: Juha Niskanen <juha.niskanen@haltian.com>
Change-Id: I74050913643db23b4d03abaf516989ff3cdac142
 2021-08-17 06:27:18 -07:00
Alin Jerpelea
351091ed75 author: Pierre-noel Bouteville: update licenses to Apache 
Gregory Nutt has submitted the SGA as a result we can migrate the licenses to Apache.

Signed-off-by: Alin Jerpelea <alin.jerpelea@sony.com>
 2021-08-16 07:11:32 -07:00
Xiang Xiao
71269811ca mtd: Implement BIOC_PARTINFO for all drivers 
Signed-off-by: Xiang Xiao <xiaoxiang@xiaomi.com>
 2021-08-16 10:08:26 -03:00
Xiang Xiao
f63d1cfbbb arch/arm: Add NVIC_FPCCR_XXX macro to avoid the hard code value 
Signed-off-by: Xiang Xiao <xiaoxiang@xiaomi.com>
 2021-08-15 10:50:52 +02:00
Xiang Xiao
fad0c3b38b arch/arm: Add NVIC_CPACR_CP_XXX(n) macro to avoid the hard code value 
Signed-off-by: Xiang Xiao <xiaoxiang@xiaomi.com>
 2021-08-14 11:41:59 -07:00
Xiang Xiao
33666832c5 arch/arm: Add NVIC_AIRCR_VECTKEY macro to avoid the hard code value 
Signed-off-by: Xiang Xiao <xiaoxiang@xiaomi.com>
 2021-08-14 11:41:59 -07:00
Abdelatif Guettouche
5b350f3a0f arch/*_reprioritizertr.c: Fix typos in comments. 
Signed-off-by: Abdelatif Guettouche <abdelatif.guettouche@espressif.com>
 2021-08-14 11:19:34 -07:00
Alexander Vasiljev
4229099944 arch/arm/stm32h7: dma and serial: add TRBUFF flag. It is obligatory for uart. 2021-08-12 08:07:18 -03:00
Xiang Xiao
6b6c11f0ad mtd: Replace MTDIOC_XIPBASE with BIOC_XIPBASE 
Signed-off-by: Xiang Xiao <xiaoxiang@xiaomi.com>
 2021-08-12 08:01:29 -03:00
Xiang Xiao
d1687418db mtd: Remove the empty MTDIOC_XIPBASE implmentation 
Signed-off-by: Xiang Xiao <xiaoxiang@xiaomi.com>
 2021-08-11 09:50:51 -03:00
Abdelatif Guettouche
054e284785 *_cpustart.c: Fix typos in function description. 
Signed-off-by: Abdelatif Guettouche <abdelatif.guettouche@espressif.com>
 2021-08-11 11:06:27 +09:00
Fotis Panagiotopoulos
5b7ff03f40 lpc17_40: Fixed I2C port sanity check. 2021-08-10 09:04:33 -07:00
raiden00pl
2b3106fb47 Qencoder implementations for imxrt, stm32f7, stm32h7, stm32l4 and tivia don't support QEIOC_SETPOSMAX 2021-08-10 11:19:05 -03:00
raiden00pl
51b24c4bad stm32/qenco: add support for QEIOC_SETPOSMAX 2021-08-10 11:19:05 -03:00
raiden00pl
092a0c8453 stm32/qenco: add an option to disable encoder timer extension from 16-bit to 32-bit 
Previous implementation has always expanded the width of the timer to 32-bit.
This feature is not always needed and should be configurable from Kconfig.
 2021-08-10 11:18:40 -03:00
raiden00pl
b0c9a6133e stm32/qenco: fix TIM2 width for STM32F3 which is 32-bit not 16-bit 
STM32F3 has timers of the same length as in STM32F4.
 2021-08-10 11:18:40 -03:00
raiden00pl
3dd385ac0c stm32/qenco: add support for STM32G4 
This required generalization of RCC definitions that are not compatible with previous chips
 2021-08-10 11:18:40 -03:00
raiden00pl
21f59c874f stm32/qenco: fix compilation for STM32F1. GTIM_CCER_CCxNP bits are not present in F1 2021-08-10 11:18:40 -03:00
Xiang Xiao
776458143c fs/hostfs: Support fchstat and chstat callback 
Signed-off-by: Xiang Xiao <xiaoxiang@xiaomi.com>
 2021-08-09 17:55:44 -03:00
Xiang Xiao
7e0db977cc arch/arm: Add CONTROL register bit field definition 
and replace all hardcode value

Signed-off-by: Xiang Xiao <xiaoxiang@xiaomi.com>
 2021-08-07 09:20:10 -03:00
Daniel P. Carvalho
a7be1c9a2e stm32_pmw: fix pwm_stop() function to enable multiple PWM start and stop. 2021-08-05 14:48:44 -03:00
Michal Lenc
a3986eeba3 arch/arm/src/imxrt/imxrt_flexpwm.c: Set LDOK bits after all channels are set 
This commit changes the FLexPWM driver for iMXRT MCU so that LDOK bits in
Master Control Register are set at once after all channels are configured.
Setting LDOK bit enables the driver to load prescaler, modulus and PWM
values of corresponging submodule and start PWM output. Setting all bits
at once instead of doing it separately can help avoiding the channels to
be out of sync with each other.

Signed-off-by: Michal Lenc <michallenc@seznam.cz>
 2021-08-05 09:57:49 -07:00
Daniel P. Carvalho
2593089f84 stm32_dac: add support for DAC3 2021-08-04 20:22:58 +02:00
Xiang Xiao
6a396eb224 Fix the printf warning after off_t change 
Signed-off-by: Xiang Xiao <xiaoxiang@xiaomi.com>
Change-Id: Id46daa2ee690a73d3187b479f0e7ab0e2e361764
 2021-08-04 06:48:30 -07:00
licheng
431df45e97 EXC_SECURE and SECURE_STACK just can clear at TRUSTZONE_NONSECURE 2021-08-02 23:20:34 -07:00
Xiang Xiao
5d1a444812 Replace __attribute__ ((unused)) with unused_code 
Signed-off-by: Xiang Xiao <xiaoxiang@xiaomi.com>
 2021-07-29 21:55:21 -03:00
Xiang Xiao
69df58c2e8 Replace __attribute__((no_instrument_function)) with noinstrument_function; 
Signed-off-by: Xiang Xiao <xiaoxiang@xiaomi.com>
 2021-07-29 21:55:21 -03:00
Xiang Xiao
7bcd29dae0 Replace __attribute__((naked, no_instrument_function)) with naked_function 
Signed-off-by: Xiang Xiao <xiaoxiang@xiaomi.com>
 2021-07-29 21:55:21 -03:00
Xiang Xiao
919f8a9a72 Define __ramfunc__ to "locate_code(".ramfunc") farcall_function noinline_function" 
instead of "__attribute__ ((section(".ramfunc"),long_call,noinline))"

Signed-off-by: Xiang Xiao <xiaoxiang@xiaomi.com>
 2021-07-29 21:55:21 -03:00
Xiang Xiao
21b69cfd5d Replace all __attribute__((weak)) with weak_data/weak_function 
Signed-off-by: Xiang Xiao <xiaoxiang@xiaomi.com>
 2021-07-29 21:55:21 -03:00
Xiang Xiao
007adc7736 Replace all __attribute__((section(x)) with locate_data(x) 
Signed-off-by: Xiang Xiao <xiaoxiang@xiaomi.com>
 2021-07-29 21:55:21 -03:00
Xiang Xiao
b3f9ffbe72 Replace all __attribute__((aligned(x)) with aligned_data(x) 
Signed-off-by: Xiang Xiao <xiaoxiang@xiaomi.com>
 2021-07-29 21:55:21 -03:00
raiden00pl
f9937b28cc stm32g4: add CORDIC driver 2021-07-28 14:23:13 -03:00
raiden00pl
6128b298ee stm32g4: add CORDIC definitions 2021-07-28 14:23:13 -03:00
Michal Lenc
9fc806984c adc: add ioctl command to get the number of configured channels 
Number of configured ADC channels is currently only defined in board
level section, typically in xxx_adc.c file. This commit introduces
ioctl command ANIOC_GET_NCHANNELS that returns the number of configured
channels which is determined by the driver code. The change can allow the
applications to be more flexible when it comes to multiple ADC devices
with different number of configured channels.

Signed-off-by: Michal Lenc <michallenc@seznam.cz>
 2021-07-26 19:45:47 -07:00
Michal Lenc
7354ab187e pwm: add option to break the loops when using multiple PWM channels 
PWM drivers currently use channel number 0 for the channels that are not
used by the application. This commit adds number -1 which indicates that
all following channels are not configured and that the loop can be broken.

Signed-off-by: Michal Lenc <michallenc@seznam.cz>
 2021-07-26 10:34:16 -03:00
Nathan Hartman
b92aeb8209 Fix various typos 
arch/arm/src/eoss3/eoss3_serial.c:
arch/arm/src/imxrt/hardware/imxrt_flexcan.h:
arch/arm/src/imxrt/imxrt_flexcan.c:
arch/arm/src/imxrt/imxrt_flexpwm.c:
arch/arm/src/imxrt/imxrt_lpi2c.c:
arch/arm/src/kinetis/kinetis_flexcan.c:
arch/arm/src/nrf52/hardware/nrf52_rtc.h:
arch/arm/src/nrf52/nrf52_clockconfig.c:
arch/arm/src/nrf52/nrf52_radio.c:
arch/arm/src/nrf52/nrf52_tim.c:
arch/arm/src/rtl8720c/amebaz_depend.c:
arch/arm/src/s32k1xx/Kconfig:
arch/arm/src/s32k1xx/s32k1xx_flexcan.c:
arch/arm/src/s32k1xx/s32k1xx_lpi2c.c:
arch/arm/src/sama5/hardware/sam_sdmmc.h:
arch/arm/src/sama5/sam_gmac.c:
arch/arm/src/samd5e5/sam_wdt.c:
arch/avr/src/avr32/up_exceptions.S:
arch/avr/src/avr32/up_fullcontextrestore.S:
arch/renesas/src/rx65n/rx65n_dtc.c:
arch/renesas/src/rx65n/rx65n_usbhost.c:
arch/risc-v/src/esp32c3/esp32c3_tickless.c:
boards/arm/stm32h7/stm32h747i-disco/include/board.h:
include/nuttx/lcd/ili9225.h:
libs/libc/stdio/lib_fgetpos.c:
libs/libc/stdio/lib_fseek.c:
libs/libc/stdio/lib_fsetpos.c:

    * Fix typos.
 2021-07-25 18:36:53 -07:00
hartmannathan
c475a71d1c Update arch/arm/src/stm32/Kconfig 
Co-authored-by: Gustavo Henrique Nihei <38959758+gustavonihei@users.noreply.github.com>
 2021-07-25 14:16:22 -03:00
hartmannathan
bb5f302361 Update arch/arm/src/stm32l5/stm32l5_serial.c 
Co-authored-by: saramonteiro <saramonteirosouza44@gmail.com>
 2021-07-25 14:16:22 -03:00
Nathan Hartman
f617c27a8c arch: arm: stm32, stm32f0l0g0, stm32h7, stm32l4, stm32l5: Fix typos. 
arch/arm/src/stm32/stm32_foc.c,
arch/arm/src/stm32f0l0g0/hardware/stm32_adc.h,
arch/arm/src/stm32h7/stm32_allocateheap.c,
arch/arm/src/stm32h7/stm32_fmc.c,
arch/arm/src/stm32h7/stm32_pmstandby.c,
arch/arm/src/stm32h7/stm32_spi.h,
arch/arm/src/stm32h7/stm32_spi_slave.c,
arch/arm/src/stm32h7/stm32_wwdg.c,
arch/arm/src/stm32l4/stm32l4_adc.h,
arch/arm/src/stm32l5/hardware/stm32l562xx_rcc.h,
arch/arm/src/stm32l5/stm32l5_gpio.c,
arch/arm/src/stm32l5/stm32l5_gpio.h,
arch/arm/src/stm32l5/stm32l5_irq.c,
arch/arm/src/stm32l5/stm32l5_rcc.c,
arch/arm/src/stm32l5/stm32l5_rcc.h,
arch/arm/src/stm32l5/stm32l5_serial.c, and
arch/arm/src/stm32l5/stm32l5_spi.c:

    * Fix typos in comments. No functional changes.
 2021-07-25 14:16:22 -03:00
Nathan Hartman
3346ba304b arch: arm: stm32, stm32h7, stm32l5: Fix typos in KConfig help texts 
arch/arm/src/stm32/Kconfig:
* In configs STM32_ADC_MAX_SAMPLES, STM32_FOC_HAS_PWM_COMPLEMENTARY:
  Fix typos in help text.

arch/arm/src/stm32h7/Kconfig:
* In configs STM32H7_RTC_AUTO_LSECLOCK_START_DRV_CAPABILITY,
  STM32H7_FLASH_CR_PSIZE, STM32H7_RTC_LSECLOCK_START_DRV_CAPABILITY,
  and STM32H7_RTC_LSECLOCK_RUN_DRV_CAPABILITY: Fix typos in help text.

arch/arm/src/stm32l5/Kconfig:
* In configs STM32L5_FLOWCONTROL_BROKEN, STM32L5_SDMMC1_DMAPRIO: Fix
  typos in help text.
 2021-07-25 14:16:22 -03:00
Nathan Hartman
d178ff8a02 arch: arm: stm: Fix STM32_EXTI2_OFFSET 
arch/arm/src/stm32/hardware/stm32_exti.h:
* Change STM32_EXTI2_OFFSET (offset to EXTI2 registers) from 0x18
  to 0x20. This symbol is defined when CONFIG_STM32_STM32F30XX or
  CONFIG_STM32_STM32F33XX. According to the current reference
  manuals for STM32F334xx (RM0364 rev 4) and STM32F302xx (RM0365
  rev 8), EXTI_IMR1 is at offset 0x00 and EXTI_IMR2 is at offset
  0x20, i.e., 0x20 apart. The same offset applies to the rest of
  the registers: EMR1/EMR2, RTSR1/RTSR2, etc.
 2021-07-24 16:53:14 +02:00
Michal Lenc
4985f47155 arch/arm/src/stm32/stm32_qencoder.c: print uint32_t by using standard format PRIx32 
Signed-off-by: Michal Lenc <michallenc@seznam.cz>
 2021-07-24 04:22:11 -07:00
jordi
b87333bae8 Kconfig: remove empty help sections 
To avoid the setconfig warning: "has 'help' but empty help text"
 2021-07-23 02:32:19 -07:00
jordi
1e44270558 Kconfig: add quotes in default string value 
To avoid the setconfig warning: "style: quotes recommended around
default value for string symbol"
 2021-07-23 02:32:19 -07:00
jordi
f3af6edf93 Kconfig: add quotes in source to clean warnings from setconfig 
To avoid the setconfig warning "style: quotes recommended around xxx in
source xxx"
 2021-07-23 02:32:19 -07:00
ligd
4919d9b7df arm: add up_secure_irq support 
Change-Id: Ibc9402dcef4045ca122da400940d57de6b508308
Signed-off-by: ligd <liguiding1@xiaomi.com>
 2021-07-22 10:50:53 -03:00
ligd
29d6a6dcd3 arch: add depends to trigger_irq 
Change-Id: I334f625f8f1a6ebaa4fa5ea292de142a93120f51
Signed-off-by: ligd <liguiding1@xiaomi.com>
 2021-07-22 10:50:53 -03:00
Abdelatif Guettouche
e85b119363 arch/: Clean what was made during context in distclean. 
Cleaning during `clean_context` had the issue of remaking everything
when `menuconfig` was issued.  That's because `menuconfig` has a
`clean_context` on its way.

Signed-off-by: Abdelatif Guettouche <abdelatif.guettouche@espressif.com>
 2021-07-21 16:52:36 -03:00
David Sidrane
19fddc451c Kintis:LPUART add RX DMA 2021-07-20 19:28:51 -07:00
David Sidrane
34eb918665 kinetis:LPUART Add IOCTL for invert 2021-07-20 19:28:51 -07:00
Nathan Hartman
609ee6b54b Fix typos in comments and identifiers 2021-07-19 22:55:30 -03:00
ligd
aac0db368c ARM: fix CPSR corruption after exception handling 
It seems to be caused by the corrupted or wrong CPSR restored on return
from exception. NuttX restores the context using code like this:

    msr spsr, r1

GCC translates this to:

    msr spsr_fc, r1

As a result, not all SPSR fields are updated on exception return. This
should be:

    msr spsr_fsxc, r1

This bug has been fixed by Heesub Shin in:
343243c7c0

Change-Id: Ibc64db7bceecd0fb6ef39284fb5bc467f5603e2e
 2021-07-19 08:41:06 -03:00
Gustavo Henrique Nihei
50ea22314e arm/lpc43xx: Implement MTDIOC_ERASESTATE for SPIFI Flash driver 
Signed-off-by: Gustavo Henrique Nihei <gustavo.nihei@espressif.com>
 2021-07-17 09:00:41 -07:00
Xiang Xiao
98b5724b59 arch: Fix rtcb can't found error 
use the same condition check in declaration and reference

Signed-off-by: Xiang Xiao <xiaoxiang@xiaomi.com>
Change-Id: I7b05316e914708fceeddac394d784ee3720a3c1b
 2021-07-16 12:48:09 -03:00
Roberto Bucher
fc810e3db4 Restored previous files 2021-07-15 23:19:59 -07:00
David Sidrane
da01a39e39 Revert "Kinetis:Serial No DMA Poll needed" 
This reverts commit e659ae83b0.

    It turns out the DMA polling is needed. The IDLE INT will
    not happen on repetitive signals.
 2021-07-15 12:28:04 -07:00
Daniel P. Carvalho
3ca46ea8e2 Change DAC driver to support STM32G4. 2021-07-15 14:33:15 -03:00
Fotis Panagiotopoulos
7f361daf60 lpc17_40: style fix in WDT definitions. 2021-07-13 08:32:42 -07:00
Michal Lenc
3d26c3efb6 fix nxstyle errors and warnings 
Signed-off-by: Michal Lenc <michallenc@seznam.cz>
 2021-07-13 09:55:29 -03:00
Michal Lenc
b2a9f853e8 arch/arm/src/imxrt: added support for Tickless OS 
Signed-off-by: Michal Lenc <michallenc@seznam.cz>
 2021-07-13 09:55:29 -03:00
Fotis Panagiotopoulos
61cb524fa2 lpc17_40: Fixed progmem driver. 2021-07-09 21:49:16 -07:00
Jerry_tang
1e3a985155 AmebaZ2: Add soc src code 
Add soc src code for rtl8720c

Signed-off-by: Jerry_tang <jerry_tang@realsil.com.cn>
 2021-07-09 14:29:06 -03:00
guowei15
95b5dc523e arm/setjmp.h:add c++ support 
N/A

Change-Id: I619cc15570adeff10f3a9b69bf9a3cff83e625c1
Signed-off-by: guowei15 <guowei15@xiaomi.com>
 2021-07-09 14:06:10 -03:00
David Sidrane
282ab797bf stm32h7:Ethernet Add some delays so that ifup() does not hog the CPU. 2021-07-08 21:14:29 -05:00
David Sidrane
70c9cd1508 stm32h7:ethernet add timeout on MAC reset 2021-07-08 21:14:29 -05:00
David Sidrane
bf4e97177a stm32h7:Ethernet fix formating 2021-07-08 21:14:29 -05:00
Xiang Xiao
e97ffb1f79 arch/armv7-a: Remove the special SMP SGI process 
Signed-off-by: Xiang Xiao <xiaoxiang@xiaomi.com>
Change-Id: Iaf7fe77a3ab7cbf145d907dafb0b7ca54cc4a012
 2021-07-09 07:53:05 +09:00
Daniel P. Carvalho
2692b61a72 Fix newline at end of file. 2021-07-07 21:34:58 -03:00
Daniel P. Carvalho
ea701a84f2 Fix comments. 2021-07-07 21:34:58 -03:00
Daniel P. Carvalho
2a21c45e0a Add STM32G43XX Analog Comparator driver. 2021-07-07 21:34:58 -03:00
Xiang Xiao
76cdd5c329 mm: Remove mm_heap_impl_s struct 
it's more simple to make mm_heap_s opaque outside of mm

Signed-off-by: Xiang Xiao <xiaoxiang@xiaomi.com>
Change-Id: I5c8e435f6baba6d22b10c5f7e8d9191104fb5af2
 2021-07-07 04:25:15 -07:00
cgeng
d656417917 Fix compilation error when CONFIG_DEBUG_PWM_INFO on stm32h7 2021-07-07 03:46:31 -05:00
Alexander Lunev
8fd64854f5 stm32,stm32f7,stm32h7: supported ETH MAC promiscuous mode 2021-07-06 19:11:56 -03:00
Fotis Panagiotopoulos
9976635390 lpc17_40: fixed compiler warnings. 2021-07-06 06:17:59 -05:00
Fotis Panagiotopoulos
2f0b4eb363 lpc17xx: Added WDT driver. 2021-07-05 11:25:51 -05:00
Nathan Hartman
ce20211357 Fix various typos in comments and documentation 
Fix typos in these files:
    * Documentation/components/drivers/character/foc.rst
    * Documentation/guides/cpp_cmake.rst
    * Kconfig
    * arch/arm/src/imxrt/imxrt_lpspi.c
    * arch/arm/src/kinetis/kinetis_spi.c
    * arch/arm/src/kl/kl_spi.c
    * arch/arm/src/lpc31xx/lpc31_spi.c
    * arch/arm/src/nrf52/nrf52_radio.h
    * arch/arm/src/s32k1xx/s32k1xx_lpspi.c
    * arch/arm/src/stm32/Kconfig
    * arch/arm/src/stm32/stm32_adc.c
    * arch/arm/src/stm32/stm32_foc.c
    * arch/arm/src/stm32/stm32_foc.h
    * arch/arm/src/stm32/stm32_pwm.c
    * arch/arm/src/stm32/stm32_spi.c
    * arch/arm/src/stm32f0l0g0/stm32_spi.c
    * arch/arm/src/stm32f7/Kconfig
    * arch/arm/src/stm32f7/stm32_spi.c
    * arch/arm/src/stm32h7/Kconfig
    * arch/arm/src/stm32h7/stm32_allocateheap.c
    * arch/arm/src/stm32h7/stm32_fmc.c
    * arch/arm/src/stm32h7/stm32_fmc.h
    * arch/arm/src/stm32h7/stm32_pwm.c
    * arch/arm/src/stm32h7/stm32_qspi.c
    * arch/arm/src/stm32h7/stm32_spi.c
    * arch/arm/src/stm32l4/stm32l4_pwm.c
    * arch/arm/src/stm32l4/stm32l4_spi.c
    * arch/arm/src/stm32l5/Kconfig
    * arch/arm/src/stm32l5/stm32l5_spi.c
    * arch/renesas/src/rx65n/rx65n_dtc.c
    * arch/renesas/src/rx65n/rx65n_usbdev.c
    * arch/risc-v/src/rv32m1/rv32m1_serial.c
    * boards/arm/stm32/b-g431b-esc1/src/stm32_foc.c
    * boards/arm/stm32/nucleo-f103rb/src/stm32_foc_ihm07m1.c
    * boards/arm/stm32/nucleo-f302r8/src/stm32_foc_ihm07m1.c
    * boards/arm/stm32h7/nucleo-h743zi2/README.txt
    * boards/risc-v/rv32m1/rv32m1-vega/README.txt
    * boards/sim/sim/sim/scripts/Make.defs
    * drivers/1wire/1wire.c
    * drivers/1wire/1wire_internal.h
    * drivers/lcd/Kconfig
    * drivers/syslog/ramlog.c
    * fs/fat/Kconfig
    * libs/libc/debug/Kconfig
    * libs/libc/machine/Kconfig
    * libs/libc/stdio/lib_libvsprintf.c
    * libs/libc/stdlib/lib_div.c
    * libs/libc/stdlib/lib_ldiv.c
    * libs/libc/stdlib/lib_lldiv.c
    * libs/libdsp/lib_observer.c
 2021-07-04 11:23:26 -05:00
SPRESENSE
b3389cf751 arch: cxd56x: Add support for power management debug output 
Add support for power management debug output.
 2021-07-04 00:36:07 -05:00
SPRESENSE
7af6b394de arch: cxd56x: Add Kconfig for power management debug output 
Add configurations for power management debug output to Kconfig.
 2021-07-04 00:36:07 -05:00
SPRESENSE
4738f69569 arch: cxd56x: pmic: Fix a compile error 
Replace undefined logerr to _err function.
 2021-07-04 00:36:07 -05:00
SPRESENSE
5c26d68f31 arch: cxd56x: Add a configuration for PMIC interrupts 
Add a configuration for PMIC interrupts to Kconfig.
 2021-07-04 00:36:07 -05:00
SPRESENSE
618661df93 arch: cxd56xx: Fix compile error when CONFIG_LIBM is disabled 
It is no longer necessary to define CONFIG_ARCH_MATH_H when we would
like to link libm.a other than nuttx math library. So, this commit
removes the error condition.
 2021-07-04 00:36:07 -05:00
SPRESENSE
d29db87bdc arch: cxd56xx: Add eMMC configuration for vendor-specific commands 
The eMMC driver for cxd56xx has been implemented a vendor-specific command
for Toshiba eMMC device, and so add a new configuration to enable the code.
 2021-07-04 00:36:07 -05:00
SPRESENSE
cd06fc9761 arch: cxd56x: sdhci: Minor fix configuration name 
Modify the referenced CONFIG to CONFIG_DEBUG_MEMCARD_INFO.
 2021-07-04 00:36:07 -05:00
SPRESENSE
6a2733dd05 arch: cxd56x: emmc: Minor fix undefined configuration name 
Replace obsolete CONFIG_DEBUG_VERBOSE to CONFIG_DEBUG_FS_INFO.
 2021-07-04 00:36:07 -05:00
SPRESENSE
fa12fe9df1 arch: cxd56x: scu: Fix some printf format warnings 
Fix some printf format warnings by -Wformat.
 2021-07-04 00:36:07 -05:00
SPRESENSE
845da344fd arch: cxd56xx: Fix compile warning 
Fix warning by -Wimplicit-function-declaration
 2021-07-04 00:36:07 -05:00
SPRESENSE
75b6a260e0 arch: cxd56xx: Rename to nxsem_set_protocol 
nxsem_setprotocol function name was changed to nxsem_set_protocol.
Replace and fix hostif compile error.
 2021-07-04 00:36:07 -05:00
SPRESENSE
4364a291f0 arch: cxd56xx: Use arm_arch.h instead of up_arch.h 
Use arm_arch.h instead of up_arch.h and fix hostif compile error.
 2021-07-04 00:36:07 -05:00
SPRESENSE
cb6ad9dfbd arch: cxd56xx: Fix getting stuck by nested spinlock in serial 
Fix an issue the serial console gets stuck in SMP caused by nested
spin_lock_irqsave.
 2021-07-04 00:36:07 -05:00
Xiang Xiao
b1f711f790 mm: Move procfs_register_meminfo into common place 
to avoid the code duplication and ensure the consistent behaviour

Signed-off-by: Xiang Xiao <xiaoxiang@xiaomi.com>
 2021-07-03 09:39:32 -07:00
Masayuki Ishikawa
6370c820ea arch: rp2040: Introduce setintstack macro for SMP 
Summary:
- This commit introduces setintstack macro to rp2040
  which is used for SMP with interrupt stack

Impact:
- SMP with interrupt stack

Testing:
- Tested with raspberrypi-pico:smp
- NOTE: seed to set CONFIG_ARCH_INTERRUPTSTACK=2048

Signed-off-by: Masayuki Ishikawa <Masayuki.Ishikawa@jp.sony.com>
 2021-07-03 04:13:13 -05:00
Masayuki Ishikawa
9f206f2bb6 arch: armv6-m: Introduce setintstack macro 
Summary:
- This commit introduces setintstack macro which can be
  overridden for SMP with interrupt stack

Impact:
- SMP only

Testing:
- Tested with raspberrypi-pico:smp
- NOTE: more commits will be added later

Signed-off-by: Masayuki Ishikawa <Masayuki.Ishikawa@jp.sony.com>
 2021-07-03 04:13:13 -05:00
ligd
50eee2f081 arm: fix enable interrupt too earlier caused system crash 
reason:
	msr	cpsr, r2   /* Set the CPSR */

    // interrupt hanppend, context switch

	pop	{r0-r2, pc}

resolve:
    use SPSR instead, and recover with ldmia ^

Change-Id: Id7cee6452997ec19919eeecf6e7616164b3a0ab3
Signed-off-by: ligd <liguiding1@xiaomi.com>
(cherry picked from commit 6fa6c1676932d7babb7ff22ef556a17bb18f1c0d)
Signed-off-by: ligd <liguiding1@xiaomi.com>
 2021-07-01 22:20:36 -05:00
Fotis Panagiotopoulos
de213401a7 lpc17_40_progmem: fixed compilation issues. 2021-07-01 09:11:12 -05:00
Masanari Iida
839414987c efm32: Fix missing closing bracket 
This patch fixes missing closing bracket and semicolon.

Signed-off-by: Masanari Iida <standby24x7@gmail.com>
 2021-07-01 06:37:17 -07:00
David Sidrane
e659ae83b0 Kinetis:Serial No DMA Poll needed 2021-07-01 01:44:46 -05:00
David Sidrane
78584b4569 kinetis:Serial use eDMA 
kinetis:serial mark priv->rxdma after use
 2021-07-01 01:44:46 -05:00
David Sidrane
e5a1b2e797 kinetis:SPI use eDMA 
Kinetis:SPI only allocate DMA once
 2021-07-01 01:44:46 -05:00
David Sidrane
78bf264af0 kinetis:Replace DMA 
Kinetis:DMAMUX use hex in mask
 2021-07-01 01:44:46 -05:00
David Sidrane
3439c40044 stm32h7:SDMMC fix reset of do_gpio 
For the case when the watchdog is triggering a timeout we did not
correctly reset the d0 GPIO.

Without this fix, the SD card can become inaccessible.
 2021-07-01 01:37:58 -05:00
Julian Oes
6d6ca8f0b6 stm32:sdio: fix wrong ifdefs 
This was wrong but presumably did not matter.
 2021-07-01 01:37:58 -05:00
Julian Oes
2a86335055 stm32:sdio: fix reset of GPIO_SDIO_D0 
For the case when the watchdog is triggering a timeout we did not
correctly reset the GPIO_SDIO_D0.

Without this fix, the SD card can become inaccessible.
 2021-07-01 01:37:58 -05:00
Julian Oes
665f847760 stm32f7: fix reset of d0_gpio 
For the case when the watchdog is triggering a timeout we did not
correctly reset the d0 GPIO.

Without this fix, the SD card can become inaccessible.
 2021-07-01 01:37:58 -05:00
Julian Oes
154795a247 stm32f7: Removed bit that is reserved for f7 2021-07-01 01:37:58 -05:00
Julian Oes
87fd8903a0 stm32f7: whitespace fix 2021-07-01 01:37:58 -05:00
Julian Oes
804445fc15 stm32f7: unify identical sdmmc.h header files 
It turns out there is no difference in these two files as well as the
reference manual for the registers between the two parts, so it probably
makes sense to unify them
 2021-07-01 01:37:58 -05:00
Michal Lenc
b36171026e arch/arm/src/imxrt/imxrt_flexpwm.c: fix mistake in submodules address offset 
Signed-off-by: Michal Lenc <michallenc@seznam.cz>
 2021-06-28 09:03:06 -05:00
Michal Lenc
addfe182ae arch/arm/src/imxrt: added support for FlexPWM driver 
Signed-off-by: Michal Lenc <michallenc@seznam.cz>
 2021-06-26 09:58:52 -05:00
Abdelatif Guettouche
fc9c320bd8 arch/arm/cxd56xx: Remove the up_textheap_init function since it's not 
needed anymore.

Signed-off-by: Abdelatif Guettouche <abdelatif.guettouche@espressif.com>
 2021-06-26 09:52:43 -05:00
Xiang Xiao
ae9b5fd306 Replace mktime with timegm in rtc and fs driver 
since kernel component should use UTC instead local time

Signed-off-by: Xiang Xiao <xiaoxiang@xiaomi.com>
Change-Id: Icf939e1ab0af8e577105f539d2553bc67b3b3d10
 2021-06-23 13:43:32 -03:00
Alexander Lunev
f7c8875fd7 sdio,stm32h7: fixed an issue with not starting IDMA data transfer in case of IO_RW_EXTENDED command (CMD53); 
corrected setting SDMMC_DCTRL.DTMODE field for block data transfers ending on block count
and for block data transfers ending with STOP_TRANSMISSION command;
stm32_sdio: added more debug messages
 2021-06-21 02:47:46 -05:00
Xiang Xiao
ab974edc84 sched: Identify the stack need to free by TCB_FLAG_FREE_STACK 
instead calling kmm_heapmember or umm_heapmember because:
1.The stack supplied by caller may allocate from heap too
2.It's hard to implement these two function in ASan case

Signed-off-by: Xiang Xiao <xiaoxiang@xiaomi.com>
Change-Id: I196377822b7c4643ab4f29b7c1dc41dcd7c4dab1
 2021-06-18 05:44:41 -07:00
Abdelatif Guettouche
af5e0c620f Rename MODULE_TEXT to TEXT_HEAP as the latter is more generic. 
Signed-off-by: Abdelatif Guettouche <abdelatif.guettouche@espressif.com>
 2021-06-18 07:14:17 -05:00
Daniel P. Carvalho
91e82d1597 Changed the STM32 Analog Comparator driver. 2021-06-18 00:50:24 -05:00
Michal Lenc
6dc3c3d1b2 arch/arm/src/imxrt: fix nxstyle warnings and errors 
Signed-off-by: Michal Lenc <michallenc@seznam.cz>
 2021-06-16 21:22:03 -05:00
Michal Lenc
7bcd50955f arch/arm/src/imxrt: add missing clock to imxrt_xbar.c and fix usage of imxrt_enc.c while debug option is enable 
Signed-off-by: Michal Lenc <michallenc@seznam.cz>
 2021-06-16 21:22:03 -05:00
retogaeh
f109a96ad2 Update arch/arm/src/stm32h7/stm32_adc.c 
Co-authored-by: Gustavo Henrique Nihei <38959758+gustavonihei@users.noreply.github.com>
 2021-06-16 04:58:06 -07:00
GAEHWILER Reto
b9fba3edae stm32h7 fix adc port to handle overrun and the DR's fifo, adapt adc driver 
* port didn't know about data-register fifo
* port didn't handle overrun condition
* driver could get stuck if interrupts were skipped due to saturation
 2021-06-16 04:58:06 -07:00
Daniel P. Carvalho
4b351fc447 Adds PWM example to nucleo-g431kb board. 2021-06-14 18:45:04 -03:00
Yuichi Nakamura
9b8e81ebc1 arm/rp2040: Fix warnings when UART console is not used 2021-06-14 09:05:19 -03:00
Yuichi Nakamura
b860e3c4ad arm/rp2040:USB device controller support 
Summary:
- Add Raspberry Pi Pico (RP2040) USB device controller support.
- Confirmed that CDC/ACM, MSC and these composite device are working.
- The current implementation have an unresolved issue and some workaround
  for USB MSC SCSI driver is required.
  See the comment in the patch "usbmsc: Add USBMSC_NOT_STALL_BULKEP for RP2040 workaround".

Impact:
- RP2040 only

Testing:
- Tested with Windows 10 and Ubuntu-18.04/20.04 as the USB host.
- Tested configurations:
  - raspberrypi-pico:usbnsh
  - raspberrypi-pico:usbmsc
  - raspberrypi-pico:composite
 2021-06-14 09:05:19 -03:00
Daniel P. Carvalho
361703a881 Added basic support for nucleo-g431kb board. 2021-06-11 20:51:56 -05:00
Jiuzhu Dong
2fd25d7ea7 arch/armv7-a: Colorize the idle thread stack for other cpu(SMP) 
Keep previous modification.

Signed-off-by: Jiuzhu Dong <dongjiuzhu1@xiaomi.com>
 2021-06-11 01:26:50 -05:00
raiden00pl
d76f8ea04a arch/arm/src/stm32/stm32_foc.c: add workaround for an issue found in STM32G4 family 
From G4 erratas: "ADC channel 0 converted instead of the required ADC channel"
 2021-06-10 13:58:33 -03:00
raiden00pl
7c47f32a19 arch/arm/src/stm32/hardware/stm32g4xxc_pinmap.h: rename OPAMP pins to match the manual 2021-06-10 13:58:33 -03:00
raiden00pl
76824ba2a9 stm32g4xxxx_memorymap.h: remove invalid OPAMP1-6 definitions 2021-06-10 13:58:33 -03:00
raiden00pl
af0f2b4f37 stm32g4: add OPAMP defs 2021-06-10 13:58:33 -03:00
Alexander Vasiljev
9d0da9818c arch/arm/src/stm32h7: qspi use indirect write instead indirect read without data. 2021-06-10 10:46:34 -05:00
Fotis Panagiotopoulos
2ef90786c8 setjmp.h: Added missing include. 2021-06-10 08:58:52 -05:00
Xiang Xiao
c0fdddc5d7 arch: Remove all go_nx_start from chip specifc source 
since the idle stack color is done in the common code now

Signed-off-by: Xiang Xiao <xiaoxiang@xiaomi.com>
 2021-06-10 06:50:41 -07:00
Xiang Xiao
fa0d123f87 arch: Colorize the idle thread stack in an unified way 
Signed-off-by: Xiang Xiao <xiaoxiang@xiaomi.com>
Change-Id: Idae8da53e5a4799a8edc0e882f17fd515b70cb14
 2021-06-10 06:50:41 -07:00
Alexander Vasiljev
45672c269d Make: use gcc as LD 2021-06-10 03:43:18 -07:00
Peter van der Perk
3b94669b7f FlexCAN Fix TX abort process 2021-06-09 13:34:13 -05:00
Xiang Xiao
6576306bca arch: Rename xxx_getsp to up_getsp 
All modern desgin support stack pointer and it's also an
important information, so let's standardize this interface.

Signed-off-by: Xiang Xiao <xiaoxiang@xiaomi.com>
 2021-06-09 10:20:02 -07:00
Juha Niskanen
939e547ca8 arch/arm/src/stm32l4: fix some printf format errors and warnings 
Signed-off-by: Juha Niskanen <juha.niskanen@haltian.com>
 2021-06-09 11:52:33 -05:00
Xiang Xiao
5b2a17b892 Include assert.h in necessary place 
Signed-off-by: Xiang Xiao <xiaoxiang@xiaomi.com>
 2021-06-08 13:06:08 -07:00
David Sidrane
131e2490c9 stm32f7:bbsram add assert header 2021-06-08 13:19:22 -05:00
David Sidrane
a1de902708 stm32h7:bbsram add assert header 2021-06-08 13:19:22 -05:00
Gustavo Henrique Nihei
0b3c2c7603 spi: Refactor SPI Slave interface prefix to sync with I2C Slave 2021-06-05 04:50:34 -07:00
Masayuki Ishikawa
386946ee54 arch: cxd56xx: Fix address mapping in cxd56_modtext.c 
Summary:
- I noticed that DEBUGASSERTION() happens when executing
  an ELF application
- This commit fixes this issue by re-mapping the address
  to SYSBUS in up_module_text_free()

Impact:
- None

Testing:
- Tested with spresense (both DEBUG_ASSERTIONS=n and y)

Signed-off-by: Masayuki Ishikawa <Masayuki.Ishikawa@jp.sony.com>
 2021-06-04 01:40:37 -05:00
Masayuki Ishikawa
f0b689a063 arch: arm: Add select ARCH_HAVE_MODULE_TEXT to ARCH_CHIP_CXD56XX 
Summary:
- I noticed that make savedefconfig shows warnings regarding
  'unmet direct dependencies (ARCH_HAVE_MODULE_TEXT)'
- This commit fixes this issue

Impact:
- None

Testing:
- Tested with spresense:wifi

Signed-off-by: Masayuki Ishikawa <Masayuki.Ishikawa@jp.sony.com>
 2021-06-04 01:40:37 -05:00
Jaroslav Beran
d13be4ea57 samv7/spi: Allow 16-bit word size in spi_send 
Signed-off-by: Jaroslav Beran <jara.beran@gmail.com>
 2021-06-03 21:33:52 -05:00
Xiang Xiao
2e54df0f35 Don't include assert.h from public header file 
Signed-off-by: Xiang Xiao <xiaoxiang@xiaomi.com>
 2021-06-03 08:36:03 -07:00
Kazuya Hioki
038941b11d arch: cxd56xx: Fix a register name in cxd56_sdhci.c 
Signed-off-by: Kazuya Hioki <Kazuya.Hioki@sony.com>
 2021-06-02 22:13:10 -05:00
Masayuki Ishikawa
cfe6e313fb arch: cxd56xx: Introduce up_testset2 in cxd56_testset.c 
Summary:
- In cxd56xx, ldrex/strex behavior is slightly different from
  other Arm architectures. Dummy strex must be issued to release
  the exclusive load & store unit.

Impact:
- SMP only

Testing:
- Tested with spresense:smp
- Tested with spresese:wifi_smp, spresense:rndis_smp
- NOTE: CONFIG_CXD56_TESTSET=y must be removed from defconfigs

Signed-off-by: Kazuya Hioki <Kazuya.Hioki@sony.com>
Signed-off-by: Masayuki Ishikawa <Masayuki.Ishikawa@jp.sony.com>
 2021-06-02 22:13:10 -05:00
Masayuki Ishikawa
2fc6361231 arch: cxd56xx: Introduce CXD56_PHYSADDR 
Summary:
- This commit converts data to the physical address for DMA transfer.

Impact:
- cxd56_dmac.c, cxd56_sdhci.c, cxd56_usbdev.c
- cxd56_cisif.c, cxd56_emmc.c, cxd56_ge2d.c, cxd56_udmac.c

Testing:
- Tested with following configurations
- spresense:wifi, spresense:wifi_smp, spresense_rndis, spresense_rndis_smp
- NOTE: additional commits are needed for the test
- NOTE: cxd56_cisif.c, cxd56_emmc.c, cxd56_ge2d.c, cxd56_udmac.c are not tested

Signed-off-by: Kazuya Hioki <Kazuya.Hioki@sony.com>
Signed-off-by: Masayuki Ishikawa <Masayuki.Ishikawa@jp.sony.com>
 2021-06-02 22:13:10 -05:00
Masayuki Ishikawa
a6572fc8c9 arch: cxd56xx: Use uintptr_t for srcend/dstend in dma_descriptor_s 
Summary:
- This commit uses uintptr_t for srcend/dstend in dma_descriptor_s

Impact:
- None

Testing:
- N/A

Signed-off-by: Masayuki Ishikawa <Masayuki.Ishikawa@jp.sony.com>
 2021-06-02 22:13:10 -05:00
Masayuki Ishikawa
4ba5740c6e arch: cxd56xx: Introduce CONFIG_CXD56_USE_SYSBUS in Kconfig 
Signed-off-by: Masayuki Ishikawa <Masayuki.Ishikawa@jp.sony.com>
 2021-06-02 22:13:10 -05:00
Masayuki Ishikawa
8c97db37e0 arch: cxd56xx: Introduce cxd56_modtext.c 
Summary:
- This commit introduces cxd56_modtext.c to allocate a separate
  text memory for ELF

Impact:
- None

Testing:
- Tested with spresense:elf

Signed-off-by: Masayuki Ishikawa <Masayuki.Ishikawa@jp.sony.com>
 2021-06-02 22:13:10 -05:00
Masayuki Ishikawa
588deffb6c arch: cxd56xx: Adjust loops per msec for the new memory map 
Signed-off-by: Masayuki Ishikawa <Masayuki.Ishikawa@jp.sony.com>
 2021-06-02 22:13:10 -05:00
David Sidrane
9b29641bf5 s32k1xx:eeprom fix missing debug.h 2021-06-02 17:36:06 -03:00
Xiang Xiao
d7f96003cf Don't include debug.h from public header file 
Signed-off-by: Xiang Xiao <xiaoxiang@xiaomi.com>
 2021-06-01 06:42:02 +09:00
chao.an
6c69b12000 wireless/bluetooth: decoupling bt_driver_s and bt_buf_s 
Signed-off-by: chao.an <anchao@xiaomi.com>
 2021-05-31 09:50:54 -03:00
Alin Jerpelea
02b244cb6f arch: arm: update licenses to Apache 
Sebastien Lorquet has submitted the CLA

Uros Platise has submitted the CLA

Gregory Nutt is the copyright holder for those files and he has submitted the
SGA as a result we can migrate the licenses to Apache.

Signed-off-by: Alin Jerpelea <alin.jerpelea@sony.com>
 2021-05-31 01:37:27 -05:00
Han Raaijmakers
04d81b24e3 S32K1XX LSPI Double word up to 64 bits support 2021-05-27 11:37:46 -07:00
Masayuki Ishikawa
88c6524d7c arch: imx6: Add termios support to imx6 
Summary:
- This commit adds termios support to imx6

Impact:
- None

Testing:
- Tested with QEMU

Signed-off-by: Masayuki Ishikawa <Masayuki.Ishikawa@jp.sony.com>
 2021-05-25 07:17:29 -05:00
Xiang Xiao
001e7c3e76 sched: Don't include nuttx/sched.h inside sched.h 
But let nuttx/sched.h include sched.h instead to
avoid expose nuttx kernel API to userspace.

Signed-off-by: Xiang Xiao <xiaoxiang@xiaomi.com>
 2021-05-24 12:11:53 +09:00
David Sidrane
86523318fc stm32f7:i2c use inttypes 2021-05-22 08:53:07 -05:00
David Sidrane
8596fdd0bf stm32h7:i2c use inttypes 2021-05-22 08:53:07 -05:00
Huang Qi
f4a0b7aedd libc: Call pthread_exit in user-space by up_pthread_exit 
Drop to user-space in kernel/protected build with up_pthread_exit,
now all pthread_cleanup functions executed in user mode.

* A new syscall SYS_pthread_exit added
* A new tcb flag TCB_FLAG_CANCEL_DOING added
* up_pthread_exit implemented for riscv/arm arch

Signed-off-by: Huang Qi <huangqi3@xiaomi.com>
 2021-05-21 22:46:52 -06:00
Huang Qi
81a01d089b libc/pthread: Fix comment and document issue 
Signed-off-by: Huang Qi <huangqi3@xiaomi.com>
 2021-05-21 22:46:52 -06:00
Gregory Nutt
bb9b58bdde libc: Move pthread_create to user space 
Signed-off-by: Huang Qi <huangqi3@xiaomi.com>
Change-Id: I5c447d94077debc79158686935f288e4c8e51e01
 2021-05-21 22:46:52 -06:00
chao.an
6c40185985 arm/v7-a/fpu: add VFP-v3 D32 support 
Signed-off-by: chao.an <anchao@xiaomi.com>
 2021-05-21 09:55:00 -03:00
Anthony Merlino
c9ccbb9e03 stm32h7xxxx_rcc.c: Fixes typo in comment 2021-05-20 00:53:49 -07:00
Anthony Merlino
35553147ba stm32h7 rcc: Sync h7x7xx and h7x3xx. Changes are relevant to both 2021-05-20 00:53:49 -07:00
SPRESENSE
6b5a4cbfd3 arch: cxd56xx: Fix parameter check of hostif buffer 
Fix a parameter check of the buffer attribute in opening hostif driver.
 2021-05-20 07:23:48 +02:00
SPRESENSE
db9c94962b arch: cxd56xx: Add host interface driver 
Add host interface driver which supports I2C or SPI slave feature.
 2021-05-20 07:23:48 +02:00
SPRESENSE
5a7a118320 arch: cxd56xx: Fix uninitialized variable for gnss driver 
Fix uninitialized variable in gnss driver.
CodeSonar Warning 518288 - 518292
 2021-05-20 07:23:48 +02:00
SPRESENSE
151fec4e98 arch: cxd56xx: Do not re-initialize the console for subcore 
If the subcore configuration, which is mainly used in the Spresense
Arduino environment, is enabled, the serial console has been already
initialized by maincore. Then, don't need to re-initialize the UART1
serial driver.
 2021-05-20 07:23:48 +02:00
SPRESENSE
efd4789b72 arch: cxd56xx: gauge: Use the dedicated debug macro 
Replace to the battery dedicated debug macro instead of standard one.
 2021-05-20 07:23:48 +02:00
SPRESENSE
50cb0306b6 arch: cxd56xx: charger: Use the dedicated debug macro 
Replace to the battery dedicated debug macro instead of standard one.
 2021-05-20 07:23:48 +02:00
SPRESENSE
bb348cc464 arch: cxd56xx: gnss: Fix compile error in debug log 
Fix compile error when debug log is enabled.
Replace debug message from obsolete logerr() to _err().
 2021-05-20 07:23:48 +02:00
SPRESENSE
6d3fb9ee81 arch: cxd56xx: wdt: Fix compile error in debug log 
Fix compile error when CXD56_WDT_REGDEBUG is enabled.
 2021-05-20 07:23:48 +02:00
SPRESENSE
f0cae6cdf3 arch: cxd56xx: Fix multiple open and close ADC driver 
ADC driver does not support multiple open and close. It causes the memory
corruption by multiple free. This commit fixes this problem by introducing
the reference counter.
 2021-05-20 07:23:48 +02:00
SPRESENSE
98871e58af arch: cxd56xx: Fix gnss open error by clock change 
If the system clock is changed during loading gnssfw, gnss open may be
failed. So this commit prohibits clock change until loading gnssfw is
completed.
 2021-05-20 07:23:48 +02:00
SPRESENSE
e26da5f564 arch: cxd56xx: Update isop firmware 
Update isop firmware which supports for the error handling and i2c
multi-master environment.
 2021-05-20 07:23:48 +02:00
SPRESENSE
f548ffa7a7 arch: cxd56xx: Support execution error by SCU sequencer 
Enable interrupt by SCU sequencer execution error. If the interrupt
occurs, then it stops the sequencer and returns the error code.
 2021-05-20 07:23:48 +02:00
SPRESENSE
ba6201401f arch: cxd56xx: Remove unnecessary i2c settings 
Remove slave address register setting that is unnecessary for the
transfer by SCU sequencer.
 2021-05-20 07:23:48 +02:00
SPRESENSE
ade26c17d2 arch: cxd56xx: Update i2c register initialization 
Enable RX_FIFO_FULL_HLD_CTRL and RESTART of i2c control register in
i2c initial settings for transfer by SCU sequencer.
 2021-05-20 07:23:48 +02:00
SPRESENSE
a10a4c483f arch: cxd56xx: Add SCU register definitions 
Add SCU register definitions.
 2021-05-20 07:23:48 +02:00
SPRESENSE
09cc6b780b arch: cxd56xx: update loader and gnssfw version 
Update loader and gnssfw to version 2.2.20175
 2021-05-20 07:23:48 +02:00
SPRESENSE
a276de741f arch: cxd56xx: Fix SPI setmode function 
When SSP mode is changed, SSE bit of SSPCR1 register must be disabled.
 2021-05-20 07:23:48 +02:00
SPRESENSE
89fd987a1a arch: cxd56xx: Fix RTC alarm cancellation process 
There is an issue that the next alarm is expired immediately after
canceling a RTC alarm. Fixed alarm settings to be completely cleared
when canceling an RTC alarm.
 2021-05-20 07:23:48 +02:00
SPRESENSE
67a56410ee arch: cxd56xx: Prohibit clock change during SPI transfer 
If the system clock is changed during the SPI transfer, the SPI data can
be corrupted. So this commit prohibits the clock change during SPI transfer,
and keep the clock until the transfer is completed.
 2021-05-20 07:23:48 +02:00
SPRESENSE
db340a8941 arch: cxd56xx: Support for suppresion of clock change 
Introduce PM_CPUFREQLOCK_FLAG_HOLD into the frequency lock mechanism in
power manager, which is used to keep the current frequency without clock
change, for example, during the transfer of a periphral.
 2021-05-20 07:23:48 +02:00
SPRESENSE
9b3a80cc37 arch: cxd56xx: Fix uart getting stuck during a clock change 
UART driver is stopped and re-started during a clock change. When a UART
interrupt is generated in each process, the unexpected behavior will
occur and a console will get stuck with UART driver. This commit fixed
each process is performed atomically.
 2021-05-20 07:23:48 +02:00
Anthony Merlino
e37ce7677b Try to address CI build error and a few macro fixes. 2021-05-19 10:41:18 -07:00
Anthony Merlino
b54a4c7788 Replace more ATIM_/BTIM_ macros with GTIM_ macros 2021-05-19 10:41:18 -07:00
Anthony Merlino
58c92be39c stm32 timers: Make some register operations more readable. 2021-05-19 10:41:18 -07:00
Anthony Merlino
fa2b9ca43b stm32/stm32f7 tickless: Fix up_timer_getmask to be correct for the width of the timer. 2021-05-16 13:04:31 -05:00
Anthony Merlino
99a9d75cdd stm32f7: Remove references to BOARD_ENABLE_USBOTG_HSULPI. Prefer Kconfig option instead. 2021-05-16 01:02:51 -07:00
Juha Niskanen
abcb67a292 Remove final remaining CONFIG_DISABLE_SIGNALS and CONFIG_DISABLE_SIGNAL 2021-05-10 17:04:38 -03:00
Nathan Hartman
8af9d39667 Documentation, comments: Minor improvements and typos fixed 2021-05-09 19:12:13 -07:00
David Sidrane
17b786399c stm32:SDIO:Use 250 Ms Data path timeout, regardless of Card Clock frequency 2021-05-07 17:39:08 -04:00
David Sidrane
3e49d49cd9 stm32h7:SDMMC:Use 250 Ms Data path timeout, regardless of Card Clock frequency 2021-05-07 17:39:08 -04:00
David Sidrane
c45e03b75f stm32f7:SDMMC:Use 250 Ms Data path timeout, regardless of Card Clock frequency 2021-05-07 17:39:08 -04:00
Harri Luhtala
e5f1069654 arch/arm/src/stm32l4/hardware/stm32l4xrxx: pinmap alternative function for SPI2 2021-05-07 05:08:05 -07:00
Gustavo Henrique Nihei
534c058d93 spi: Adopt CPHA as the abbreviation for clock phase 2021-05-05 16:56:07 -03:00
David Sidrane
92dba32c8c stm32h7:Allow for reuse of the OTG_ID GPIO 
Currently Nuttx doesn't seem to be any real support for OTG.
    In the future when OTG is supported. This Knob can be removed
    and drivers can enable their pin sets based on CONFIG_OTG.
    (Adding CONFIG_OTG at this time would be misleading.)
 2021-05-05 12:22:11 -04:00
David Sidrane
cd603af958 stm32f7:Allow for reuse of the OTG_ID GPIO 2021-05-05 12:22:11 -04:00
David Sidrane
8624f9a444 s32k1xx:flexcan Use inttypes in printing macro 2021-05-05 06:07:50 -07:00
David Sidrane
7fb59e4f36 kinetis:flexcan Use inttypes in printing macro 2021-05-05 06:07:50 -07:00
David Sidrane
e5ceb062f9 stm32f7:Use inttypes in printing macro 
stm32f7:SDMMC Use inttypes in printing macro

stm32f7:CAN Use inttypes in printing macro

stm32f7:DMA Use inttypes in printing macro

stm32f7:serial fix compile error from UNUSED() change
 2021-05-05 06:07:50 -07:00
David Sidrane
cbe3e120d5 stm32h7:Use inttypes in printing macros 2021-05-05 06:07:50 -07:00
raiden00pl
b721ba05aa stm32_pwm.c: fix compilation warnings 2021-05-05 09:32:58 -03:00
raiden00pl
7cb7fe3f38 stm32_pwm: fixes for PULSECOUNT support 
1. generate an indefinite number of pulses when info->count = 0
2. timers that don't support pulse-count shouldn't use pulse-count logic
 2021-05-05 09:32:58 -03:00
raiden00pl
7b53a5fe1c stm32_adc.c: rename a struct member in struct adccmn_data_s from 'initialized' to 'refcount' 2021-05-05 01:27:56 -07:00
Gustavo Henrique Nihei
f8a36f10c3 arch: Uniformize optimization flag setting across architectures 2021-04-29 19:17:16 -07:00
Juha Niskanen
07cde736bd arch: fix some printf format errors 2021-04-29 19:16:56 +01:00
Alexander Vasiljev
940c5b69c3 stm32h7: serial: use dma tx semaphore as resource holder 2021-04-29 03:19:44 -07:00
Masayuki Ishikawa
8e161bc992 arch: rp2040: Add stack coloration for the idle task 
Summary:
- This commit adds stack coloration for the idle task

Impact:
- rp2040 with CONFIG_STACK_COLORATION=y

Testing:
- Tested with nsh, nshsram and smp configurations
- NOTE: CONFIG_STACK_COLORATION=y needs to be added
 2021-04-25 03:19:24 -05:00
Masayuki Ishikawa
dc9223f4cf arch: rp2040: Fix the initial stack pointer 
Summary:
- The NuttX for raspberrypi-pico boots via the boot_stage2 provided
  by the pico-sdk which sets the MSP at the end of the SRAM.
- However, the NuttX expects the MSP is set to the top of the idle stack.
- This commit fixes this issue.

Impact:
- None

Testing:
- Tested with nsh, nshsram and smp configrations
 2021-04-25 03:19:24 -05:00
Masayuki Ishikawa
1b00e5d518 spinlock: Remove SP_SECTION 
Summary:
- SP_SECTION was introduced to allocate spinlock in non-cachable
  region mainly for Cortex-A to stabilize the NuttX SMP kernel
- However, all spinlocks are now allocated in cachable area and
  works without any problems
- So SP_SECTION should be removed to simplify the kernel code

Impact:
- None

Testing:
- Build test only

Signed-off-by: Masayuki Ishikawa <Masayuki.Ishikawa@jp.sony.com>
 2021-04-20 22:41:44 -05:00
Masayuki Ishikawa
1a9e7efde5 smp: Remove CONFIG_SMP_IDLETHREAD_STACKSIZE 
Summary:
- The CONFIG_SMP_IDLETHREAD_STACKSIZE was introduced to optimize
  the idle stack size for other than CPU0
- However, there are no big differences between the idle stacks.
- This commit removes the config to simplify the kernel code

Impact:
- All SMP configurations

Testing:
- Tested with ostest with the following configs
- spresense:smp, spresense:rndis_smp
- esp32-devkitc:smp (QEMU), maix-bit:smp (QEMU)
- sabre-6quad:smp (QEMU), sabre-6quad:netnsh_smp (QEMU)
- raspberrypi-pico:smp, sim:smp (x86_64)

Signed-off-by: Masayuki Ishikawa <asayuki.Ishikawa@jp.sony.com>
 2021-04-19 21:46:39 -05:00
Anthony Merlino
14db894caf stm32h7: Allow selection of SDMMC clock source. 2021-04-19 08:57:49 -07:00
Yuichi Nakamura
048802bcd2 arm/rp2040: Add RP2040 I2S driver 2021-04-19 09:39:51 +09:00
Yuichi Nakamura
41b193e07f arm/rp2040: Add RP2040 PIO APIs 2021-04-19 09:39:51 +09:00
David Sidrane
c801de4201 stm32h7:Serial Add RX and TX DMA 
stm32h7:Serial Use Idel to poll RX DMA

stm32h7:Serial Do not loop in an ISR!

stm32h7:Serial signal txdma completion with semaphore

stm32h7:Serial Apply formatting suggestions from code review

Co-authored-by: Mateusz Szafoni <raiden00pl@gmail.com>

stm32h7: Serail Add Power Managment (Untested)
 2021-04-17 09:56:41 +02:00
Xiang Xiao
2335b69120 arch: Allocate the space from the beginning in up_stack_frame 
arch: Allocate the space from the beginning in up_stack_frame

and modify the affected portion:
1.Correct the stack dump and check
2.Allocate tls_info_s by up_stack_frame too
3.Move the stack fork allocation from arch to sched

Signed-off-by: Xiang Xiao <xiaoxiang@xiaomi.com>
 2021-04-16 12:41:41 +09:00
Xiang Xiao
8640d82ce0 arch: Rename g_intstackbase to g_intstacktop 
Signed-off-by: Xiang Xiao <xiaoxiang@xiaomi.com>
 2021-04-16 12:41:41 +09:00
David Sidrane
3feb3a247d stm32:Serial DMA config USART{4578} -> UART{4578} 2021-04-15 21:26:32 -05:00
raiden00pl
82ce1de7cd stm32/stm32_foc: remove the debug message before the calibration start 
For unknown reasons this message may interferre with the calibration
procedure and result in invalid calibariton data.
We leave only a message informing about the end of the the calibration.
The problem was observed for STM32G4 + IHM16M1.
 2021-04-15 06:37:15 -05:00
raiden00pl
13f62d15cc stm32/stm32_foc: do not enable PWM outputs that are not in use 2021-04-15 06:37:15 -05:00
Anthony Merlino
b1f637a6ea stm32h7: Don't automatically select HSI48 as it may depend on USBSEL. 
Add preprocessor logic that can catch the condition where the board is selecting the HSI48 as the USBSEL source, but the HSI48 isn't enabled.
 2021-04-15 02:00:37 -07:00
Anthony Merlino
4c8d70dd2e stm32h7: Initialize CSI and HSI48 clocks as needed based on enabled peripherals. 2021-04-15 02:00:37 -07:00
jturnsek
33b071ecb9 MIMXRT1064-EVK support 2021-04-14 14:57:26 -07:00
raiden00pl
ad8c09d0a1 stm32: include support for TIMERS_V3 2021-04-14 10:53:50 -04:00
raiden00pl
7c11397469 stm32: add definitions for TIMERS_V3. All credit goes to Nathan Hartman (hartmannathan) 2021-04-14 10:53:50 -04:00
raiden00pl
6d69600905 stm32/Kconfig: move configuration common for G4 under STM32_STM32G4XXX option 2021-04-14 10:53:50 -04:00
Marco Krahl
8456f3615e drivers/1wire: Moves header and adjusts include paths 
Moves header to 1wire include sub directory.
Moves over common crc definitions to new interface.

Signed-off-by: Marco Krahl <ocram.lhark@gmail.com>
 2021-04-14 02:49:28 -05:00
raiden00pl
beebb57445 stm32g4xx: add support for FOC 2021-04-13 14:38:28 -05:00
raiden00pl
835b129c94 stm32g4xx: add DBGMCU definitions 2021-04-13 14:38:28 -05:00
Anthony Merlino
9c8c2b0db2 Separate CLOCK_TIMEKEEPING and SCHED_TICKLESS. 2021-04-13 11:42:31 -05:00
raiden00pl
c90a6bdf2b stm32/Kconfig: enable ADCx DMA support if DMAMUX enabled 2021-04-13 12:08:17 -03:00
raiden00pl
bf04ef9a3c stm32g4: add support for DMA (DMAMUX) 2021-04-13 12:08:17 -03:00
raiden00pl
fbb7e95ebf stm32g4xxxx_dmamux.h: rename defs to match other chips and add DMAMAP defs 2021-04-13 09:20:18 -05:00
raiden00pl
a735252d78 stm32h7,stm32g0: fix typos in DMAMUX 2021-04-13 09:20:18 -05:00
raiden00pl
62001bff3b stm32g4xx: add support for PWM 2021-04-13 09:19:52 -05:00
raiden00pl
4c741bc9a5 stm32/Kconfig: G4 chips use TIMERS_V2 2021-04-13 09:19:52 -05:00
raiden00pl
ff2ae3e894 stm32g4xx: add support for ADC 2021-04-13 09:29:09 -03:00
Alin Jerpelea
20d315abfe NuttX: Falker Atomacao Agrícola Ltda: update licenses to Apache 
Falker Atomacao Agrícola Ltda has submitted the SGA and we can migrate the licenses
 to Apache.

Signed-off-by: Alin Jerpelea <alin.jerpelea@sony.com>
 2021-04-13 05:28:28 -05:00
Anthony Merlino
1a5a7a1b63 stm32h7: Allow OTGHS to use internal FS PHY 2021-04-12 23:21:34 -05:00
Jukka Laitinen
3f6bb76e01 arch/arm/src/stm32f7/stm32_allocateheap.c: Fix MPU alignments 
Change the logic for allocating user heap for PROTECTED_BUILD:
- Don't rely on SRAM1_END alignment
- Make better use of MPU subregions when allocating the heap
- Don't duplicate the calculation of user heap start in kernel heap
  allocation; use the previous calculation directly

Signed-off-by: Jukka Laitinen <jukkax@ssrc.tii.ae>
 2021-04-12 23:20:18 -05:00
Jukka Laitinen
ea36c2c7ea Remove MPU_RASR_S bit from stm32f7 MPU user mode intsram configration 
For some reason, setting the "shareable" bit makes the SRAM not writable

Signed-off-by: Jukka Laitinen <jukkax@ssrc.tii.ae>
 2021-04-12 23:20:18 -05:00
Xiang Xiao
3f9908f7d1 Remove the unnecessary math.h inclusion 
or move from header file to source file since math.h doesn't always exist

Signed-off-by: Xiang Xiao <xiaoxiang@xiaomi.com>
 2021-04-12 22:58:23 -04:00
Anthony Merlino
2b46a0fdde stm32h7: Adds guards around stm32_iocompensation. 2021-04-12 15:08:52 -07:00
Anthony Merlino
a45b8cc17c stm32h7: Add support for IO compensation. 2021-04-12 15:08:52 -07:00
jturnsek
bbe875876d Modified FlexSPI driver 2021-04-12 17:22:14 -03:00
jturnsek
7453e76d98 FlexSPI NOR driver 2021-04-12 11:35:44 -03:00
raiden00pl
cf645fc9ba arch/arm/src/stm32/stm32_foc.c: add modifications to support STM32F1 
- generalize DBGMCU for PWM timer
- use ADC common data only if coupled ADC present
- rename some ADC definitions that collide with stm32_adc.h
 2021-04-11 03:52:21 -05:00
raiden00pl
021a89569d arch/arm/src/stm32: introduce DBGMCU IP core versions 2021-04-11 03:52:21 -05:00
raiden00pl
3caf26fe3e arch/arm/src/stm32/stm32_adc.c: support adc_inj_startconv also for STM32F1 2021-04-11 03:52:21 -05:00
Anthony Merlino
2aa2b7669f stm32f7 tickless: Fix handling of overflow for different width timers. 2021-04-10 23:38:16 -05:00
Anthony Merlino
f979dd72c1 stm32/stm32f7 tickless: Fix clearing and checking of interrupts. 2021-04-10 23:38:16 -05:00
Anthony Merlino
dd00c6427e stm32 tickless: Fixes printf warnings 2021-04-10 23:38:16 -05:00
Xiang Xiao
3f67c67aaf arch: Fix the stack boundary calculation and check 
All supported arch uses a push-down stack:
The stack grows toward lower addresses in memory. The stack pointer
register points to the lowest, valid working address (the "top" of
the stack). Items on the stack are referenced as positive(include zero)
word offsets from sp.
Which means that for stack in the [begin, begin + size):
1.The initial SP point to begin + size
2.push equals sub and then store
3.pop equals load and then add

Signed-off-by: Xiang Xiao <xiaoxiang@xiaomi.com>
 2021-04-10 08:39:54 -07:00
Alin Jerpelea
7424683d29 arch: lpc17xx_40xx: Mixed Case Identifier fix 
Fix for Mixed Case Identifier reported by nxstyle.

Signed-off-by: Alin Jerpelea <alin.jerpelea@sony.com>
 2021-04-10 06:46:32 -05:00
Alin Jerpelea
6f5537eae2 arch: lpc2378: Fix for Mixed Case Identifier errors 
Fix for Mixed Case Identifier errors reported by nxstyle tool

Signed-off-by: Alin Jerpelea <alin.jerpelea@sony.com>
 2021-04-10 06:46:32 -05:00
Alin Jerpelea
eac1d28aae NuttX: Janne Rosberg: update licenses to Apache 
Janne Rosberg has submitted the ICLA and we can migrate the licenses
 to Apache.

David Sidrane has submitted the ICLA and we can migrate the licenses
 to Apache.

Ivan Ucherdzhiev has submitted the ICLA and we can migrate the licenses
 to Apache.

Gregory Nutt has submitted the SGA and we can migrate the licenses
 to Apache.

Signed-off-by: Alin Jerpelea <alin.jerpelea@sony.com>
 2021-04-10 06:42:19 -05:00
Alin Jerpelea
a2813b142f NuttX: Jose Pablo Carballo: update licenses to Apache 
Jose Pablo Carballo has submitted the ICLA and we can migrate the licenses
 to Apache.

Gregory Nutt has submitted the SGA and we can migrate the licenses
 to Apache.

Signed-off-by: Alin Jerpelea <alin.jerpelea@sony.com>
 2021-04-10 06:42:19 -05:00
Alin Jerpelea
231b8518b7 NuttX: Ken Pettit: update licenses to Apache 
Ken Pettit has submitted the ICLA and we can migrate the licenses
 to Apache.

Sebastien Lorquet has submitted the ICLA and we can migrate the licenses
 to Apache.

Gregory Nutt has submitted the SGA and we can migrate the licenses
 to Apache.

Signed-off-by: Alin Jerpelea <alin.jerpelea@sony.com>
 2021-04-10 06:42:19 -05:00
Anthony Merlino
d37275f348 stm32f7: Freeze tickless timer during debug halt. 2021-04-08 23:38:00 -05:00
Alin Jerpelea
e1d8b62209 arch: lpc43xx: spifilib_fam_standard_cmd.c: fix nxstyle errors 
fix errors reported by nxstyle tool

Signed-off-by: Alin Jerpelea <alin.jerpelea@sony.com>
 2021-04-08 22:49:09 -05:00
Alin Jerpelea
42d17dcaf4 arch: lpc43xx: Mixed Case Identifier fix 
Fix for Mixed Case Identifier reported by nxstyle tool.

Signed-off-by: Alin Jerpelea <alin.jerpelea@sony.com>
 2021-04-08 22:48:46 -05:00
Alin Jerpelea
602d384325 arch: tms570: fix Mixed Case Identifier 
Fix Mixed Case Identifier reported by nxstyle tool

Signed-off-by: Alin Jerpelea <alin.jerpelea@sony.com>
 2021-04-08 22:48:46 -05:00
Alin Jerpelea
37b314f29f LICENSE: add 3rd party license for Texas Instruments Incorporated 
Add 3rd party licenses for Texas Instruments Incorporated to the LICENSE file.

Signed-off-by: Alin Jerpelea <alin.jerpelea@sony.com>
 2021-04-08 22:48:46 -05:00
Alin Jerpelea
12aebdf1a6 LICENSE: add 3rd party license for Infineon Technologies AG 
Add 3rd party licenses for Infineon Technologies AG to the LICENSE file.

Signed-off-by: Alin Jerpelea <alin.jerpelea@sony.com>
 2021-04-08 22:48:46 -05:00
Alin Jerpelea
8dcd16d5a6 arch: arm: nxstyle fixes 
Fixes for nxstyle warnigs

Signed-off-by: Alin Jerpelea <alin.jerpelea@sony.com>
 2021-04-08 22:48:46 -05:00
Alin Jerpelea
d2e7ea05c6 NuttX: typo fix 
Yype fix for Public Functions reported by nxstyle

Signed-off-by: Alin Jerpelea <alin.jerpelea@sony.com>
 2021-04-08 22:48:46 -05:00
Gregory Nutt
a9e2195e65 Remove unused 'running' field from freerun lower half drivers. 
That field is never used and, in most cases, is never initialized correctly.

This should have no impact to anything with the possible exception of free-running drivers.

Verified using CI builds only.
 2021-04-07 20:35:50 -03:00
Alin Jerpelea
abdc60e72f arch: samXX: Gregory Nutt: update licenses to Apache 
Gregory Nutt has submitted the SGA and we can migrate the licenses
 to Apache.

Signed-off-by: Alin Jerpelea <alin.jerpelea@sony.com>
 2021-04-07 06:43:20 -05:00
Alin Jerpelea
9be2db897d arch: sam: move references from License header 
for compliance references should be moved after the license header

Signed-off-by: Alin Jerpelea <alin.jerpelea@sony.com>
 2021-04-07 06:43:20 -05:00
Alin Jerpelea
74cde4f9bf arch: armv7-r: Gregory Nutt: update licenses to Apache 
Gregory Nutt has submitted the SGA and we can migrate the licenses
 to Apache.

Signed-off-by: Alin Jerpelea <alin.jerpelea@sony.com>
 2021-04-07 06:43:20 -05:00
Alin Jerpelea
68cd957c62 arch: armv7-r: move references from License header 
for compliance references should be moved after the license header

Signed-off-by: Alin Jerpelea <alin.jerpelea@sony.com>
 2021-04-07 06:43:20 -05:00
Alin Jerpelea
ce08e0ca6c arch: armv7-a: move references from License header 
for compliance references should be moved after the license header

Signed-off-by: Alin Jerpelea <alin.jerpelea@sony.com>
 2021-04-07 06:43:20 -05:00
Xiang Xiao
bfbe705e3f arch/arm: Fix nxstyle warning 
Signed-off-by: Xiang Xiao <xiaoxiang@xiaomi.com>
 2021-04-07 16:18:27 +09:00
Xiang Xiao
eeb8931c04 arch/arm: align arm vector related code with armv7-a 
commit 3c30c8b90b
Author: Xiang Xiao <xiaoxiang@xiaomi.com>
Date:   Tue Apr 6 15:47:27 2021 +0800

    arch/arm: Remove g_irqtmp, g_undeftmp and g_aborttmp

    to avoid multiple CPU access them concurrently in SMP case

Signed-off-by: Xiang Xiao <xiaoxiang@xiaomi.com>
 2021-04-07 16:18:27 +09:00
Xiang Xiao
0779f34390 arch/arm: Add PSR_ prefix to the mode state like armv7-a 
no real function change

Signed-off-by: Xiang Xiao <xiaoxiang@xiaomi.com>
 2021-04-07 16:18:27 +09:00
Anthony Merlino
01fabe6c67 stm32h7: Actually use the AXI SRAM as the main heap as the documentation describes. 
The comments at the top of the file say this:
```
This will be automatically registered
 * - AXI SRAM is a 512kb memory area. This will be automatically registered
 *      with the system heap in up_allocate_heap, all the other memory
 *      regions will be registered in arm_addregion().
```

but the implementation was using SRAM123 instead. Furthermore, arm_addregion then re-adds SRAM123 again.
 2021-04-06 22:47:20 -05:00
Anthony Merlino
d69cd4ba03 stm32h7: Adds stm32_dbgmcu.h to match stm32f7 port. 2021-04-06 22:44:07 -05:00
Anthony Merlino
3a10f88bdf stm32h7: Fixes bug in stm32_sdmmc.c where DCACHE guards were blocking a needed variable. 2021-04-06 22:43:27 -05:00
Anthony Merlino
068e71d0c6 stm32h7: Expose flash lock, unlock, and write protect functions to boards. 2021-04-06 22:42:52 -05:00
Anthony Merlino
8c73ea68d6 stm32f7: Remove the one and only reference to STM32_BOARD_HCLK. 2021-04-06 22:42:06 -05:00
Xiang Xiao
a7f7796db1 arch/arm: Change all spsr_cxsf to spsr 
unify the SPSR register usage

Signed-off-by: Xiang Xiao <xiaoxiang@xiaomi.com>
 2021-04-07 06:44:37 +09:00
Alin Jerpelea
72041911ce NuttX: Marco Krahl: update licenses to Apache 
Marco Krahl has submitted the ICLA and we can migrate the licenses
 to Apache.

Gregory Nutt, S.A has submitted the SGA and we can migrate the licenses
 to Apache.

Signed-off-by: Alin Jerpelea <alin.jerpelea@sony.com>
 2021-04-06 12:50:41 -05:00
Xiang Xiao
3c30c8b90b arch/arm: Remove g_irqtmp, g_undeftmp and g_aborttmp 
to avoid multiple CPU access them concurrently in SMP case

Signed-off-by: Xiang Xiao <xiaoxiang@xiaomi.com>
 2021-04-06 22:45:51 +09:00
Xiang Xiao
822bb3ff78 arch/armv7-r: Add FIQ stack CONFIG_ARCH_INTERRUPTSTACK > 7 
just like what has done on armv7-a

Signed-off-by: Xiang Xiao <xiaoxiang@xiaomi.com>
 2021-04-06 22:45:51 +09:00
Fotis Panagiotopoulos
1dee243e29 syslog: Added multi device support in syslog_device. 2021-04-06 07:32:23 -05:00
Xiang Xiao
7d3266461b arch/armv7-a: Remove the special process of the nest level 
it shouldn't need anymore

Signed-off-by: Xiang Xiao <xiaoxiang@xiaomi.com>
 2021-04-06 17:07:46 +09:00
Anthony Merlino
b21cb3308a Fixes race condition in event wait logic of SDMMC driver. 
This change makes it so that the timeout is set as part of the SDIO_WAITENABLE call instead of the SDIO_EVENTWAIT call. By doing so, you eliminate all opportunity for a race condition.

stm32h7:sdmmc Check if busy ended early
 2021-04-05 23:08:45 -05:00
Xiang Xiao
807d4490da arch/arm: Minor style fix 
Signed-off-by: Xiang Xiao <xiaoxiang@xiaomi.com>
 2021-04-05 13:19:20 -07:00
Xiang Xiao
39fc9325cf arch/arm: Replace "b lr" or "mov pc, lr" with "bx lr" 
Signed-off-by: Xiang Xiao <xiaoxiang@xiaomi.com>
 2021-04-05 05:50:14 -07:00