arch/arm/src/stm32f0l0g0: Pinmap TIM1 GPIOs available for STM32G0
arch/arm/src/stm32f0l0g0: Add TIM driver lowerhalf
arch/arm/src/stm32f0l0g0/stm32_tim_lowerhalf.c: Handle 32-bit overflow on some calculations.
arch: armv7-m: Fix a deadlock in up_sigdeliver() in SMP mode.
In previous implementation, up_disable_irq() was called before
recovering local context. However, I noticed a deadlock happens
in the following situation. For example, if up_sigdevliver() is
in progress on CPU0 and CPU1 has called up_cpu_paused to CPU0,
hence g_cpu_irqlock has been locked by CPU1, in this case,
we would see a deadlock in later call of enter_critical_section()
to restore irqcount.
To avoid this situation, we need to call enter_critical_section()
to break the deadlock.
Signed-off-by: Masayuki Ishikawa <Masayuki.Ishikawa@jp.sony.com>
Approved-by: Gregory Nutt <gnutt@nuttx.org>
Spresense smp
* arch: arm: Add ARCH_GLOBAL_IRQDISABLE to ARCH_CHIP_CXD56XX in Kconfig
Signed-off-by: Masayuki Ishikawa <Masayuki.Ishikawa@jp.sony.com>
* arch: arm: cxd56xx: Make fpuconfg() public in cxd56_start.c
NOTE: fpuconfig() is called in both cxd56_start.c and cxd56_cpustart.c
Signed-off-by: Masayuki Ishikawa <Masayuki.Ishikawa@jp.sony.com>
* arch: arm: cxd56xx: Add support for SMP
NOTE: To run cxd56xx in SMP mode, new boot loader which will be
released later must be used.
Signed-off-by: Masayuki Ishikawa <Masayuki.Ishikawa@jp.sony.com>
* arch: arm: cxd56xx: Add irq routing for SMP in cxd56_irq.c
NOTE: In cxd56xx, each external interrupt controller can be
accessed from a local APP_DSP (Cortex-M4F) only. This commit
supports IRQ routing for SMP by calling up_send_irqreq() in
both up_enable_irq() and up_disable_irq().
Signed-off-by: Masayuki Ishikawa <Masayuki.Ishikawa@jp.sony.com>
* boards: spresense: Add smp configuration
Signed-off-by: Masayuki Ishikawa <Masayuki.Ishikawa@jp.sony.com>
Approved-by: Gregory Nutt <gnutt@nuttx.org>
cxd56xx: various fixes
* arch: arm: cxd56xx: Support to set any i2c frequency
This commit supports to be able to set the i2c frequency other than just
100 or 400 Hz.
* arch: arm: cxd56xx: Enable SD clock during access to SD card
- Improve GNSS low sensitivity with SD card inserted
- Reduce power consumption by stopping SD clock
* arch: arm: cxd56xx: Do PANIC() when cpu rx fifo is overflow
If CPU Rx FIFO is overflow, it's fatal error for system. In such a case,
this commit changes to allow the user to notice by calling PANIC() for
debuggability enhancement.
* arch: arm: cxd56xx: Fix compile error in sdhci debug code
* arch: arm: cxd56xx: Remove assertion in cpu tx queue
When CPU Tx queue is overflow, it returns -EAGAIN instead of assertion
to be able to retry.
* arch: arm: cxd56xx: Add configurations for cpu fifo elements
Signed-off-by: Alin Jerpelea <alin.jerpelea@sony.com>
* arch: arm: cxd56xx: Fix LPADC configuration
LPADC options defined in the same symbol name, so kconfig tool
couldn't process them correctly.
Signed-off-by: Alin Jerpelea <alin.jerpelea@sony.com>
* arch: arm: cxd56xx: Update loader and gnssfw ver.17660
* arch: arm: cxd56xx: Fix hang-up when error interrupt occurs
Fix a problem that error interrupts are not cleared.
Signed-off-by: Alin Jerpelea <alin.jerpelea@sony.com>
* arch: arm: cxd56xx: Fix sdhci semaphore
Fix inital value of semaphore in sdhci drive.r
Signed-off-by: Alin Jerpelea <alin.jerpelea@sony.com>
* boards: cxd56xx: Treat the initial value of LNA power as off
LNA is always turned power on when GNSS is started. So it is desirable
that the initial value of the LNA power is off by default.
* boards: cxd56xx: Remove initial setting of PIN_AP_CLK
PIN_AP_CLK is used as a port selector of SDIO expander on the extension
board, and is set output low in initalizing. Therefore, this pin cannot
be used for other board. To avoid this restriction, remove this initial
operation because this pin is pulled down by default on the extension
board.
Approved-by: Gregory Nutt <gnutt@nuttx.org>
Most of the bluetooth and wifi chips appear to need external firmware, and the 43438 is no exception. Fortunately, since Cypress got involved, these are much more straightforward to obtain and are shipped as part of their SDK, which is downloadable from their website. Those firmwares are already provided as C arrays, so their names just need updating to;
const unsigned char bt_firmware_hcd -> The bt firmware array.
const int bt_firmware_len = sizeof(bt_firmware_hcd);
arch/arm/src/stm32f0l0g0/stm32g0_rcc.c: Set VOS and flash wait states properly
arch/arm/src/stm32f0l0g0/stm32f0l0_pwr.c: Renamed from arch/arm/src/stm32f0l0g0/stm32_pwr.c
arch/arm/src/stm32f0l0g0/stm32g0_pwr.c: Preliminary implementation of PWR module for STM32G0 (stm32_pwr_setvos() only)
arch/arm/include/stm32f0l0g0: add support for STM32G070CB, STM32G070KB, STM32G070RB
arch/arm/src/stm32f0l0g0: add support for STM32G070CB, STM32G070KB, STM32G070RB
stm32h7: bbsram issues causing no writes and hardfaults
* stm32_pwr:Ensure data is flushed on backup domain access changes
* stm32h7:bbsram convince compiler to perform 32 bit write
Approved-by: Gregory Nutt <gnutt@nuttx.org>
noards: arm: cxd56xx: migrate common code
* boards: arm: cxd56xx: common: move boot to common
This is a common function and can be reused by all boards.
Signed-off-by: Alin Jerpelea <alin.jerpelea@sony.com>
* boards: arm: cxd56xx: common: move flash to common
This is a common function and can be reused by all boards.
Signed-off-by: Alin Jerpelea <alin.jerpelea@sony.com>
* boards: arm: cxd56xx: common: move I2C driver to common
This is a common function and can be reused by all boards.
Signed-off-by: Alin Jerpelea <alin.jerpelea@sony.com>
* boards: arm: cxd56xx: common: move uid to common
This is a common function and can be reused by all boards.
Signed-off-by: Alin Jerpelea <alin.jerpelea@sony.com>
* boards: arm: cxd56xx: common: move usbmsc to common
This is a common function and can be reused by all boards.
Signed-off-by: Alin Jerpelea <alin.jerpelea@sony.com>
* arch: arm: cxd56: add SPH
The SPH is used by the ASMP implementation from the SDK.
Signed-off-by: Alin Jerpelea <alin.jerpelea@sony.com>
Approved-by: Gregory Nutt <gnutt@nuttx.org>
boards: cxd56xx: add SCU sensors (2/2)
* boards: cxd56xx: add cxd56_bh1721fvc initialization
We are adding the sensor initialization for cxd56xx boards in the
common board folder.
Signed-off-by: Alin Jerpelea <alin.jerpelea@sony.com>
* boards: cxd56xx: add cxd56_bh1745nuc initialization
We are adding the sensor initialization for cxd56xx boards in the
common board folder.
Signed-off-by: Alin Jerpelea <alin.jerpelea@sony.com>
* boards: cxd56xx: add cxd56_bm1383glv initialization
We are adding the sensor initialization for cxd56xx boards in the
common board folder.
Signed-off-by: Alin Jerpelea <alin.jerpelea@sony.com>
* boards: cxd56xx: add cxd56_bm1422gmv initialization
We are adding the sensor initialization for cxd56xx boards in the
common board folder.
Signed-off-by: Alin Jerpelea <alin.jerpelea@sony.com>
* boards: cxd56xx: add cxd56_bmi160 initialization
We are adding the sensor initialization for cxd56xx boards in the
common board folder.
Signed-off-by: Alin Jerpelea <alin.jerpelea@sony.com>
* boards: cxd56xx: add cxd56_bmp280 initialization
We are adding the sensor initialization for cxd56xx boards in the
common board folder.
Signed-off-by: Alin Jerpelea <alin.jerpelea@sony.com>
* boards: cxd56xx: add cxd56_kx022 initialization
We are adding the sensor initialization for cxd56xx boards in the
common board folder.
Signed-off-by: Alin Jerpelea <alin.jerpelea@sony.com>
* boards: cxd56xx: add cxd56_lt1pa01 initialization
We are adding the sensor initialization for cxd56xx boards in the
common board folder.
Signed-off-by: Alin Jerpelea <alin.jerpelea@sony.com>
* boards: cxd56xx: add cxd56_rpr0521rs initialization
We are adding the sensor initialization for cxd56xx boards in the
common board folder.
Signed-off-by: Alin Jerpelea <alin.jerpelea@sony.com>
* boards: cxd56xx: add cxd56_sensors initialization
We are adding the sensor initialization for cxd56xx boards in the
common board folder.
Signed-off-by: Alin Jerpelea <alin.jerpelea@sony.com>
* arch: arm: cxd56: add Backup Log driver
The driver will be used to backup logs on crash.
Signed-off-by: Alin Jerpelea <alin.jerpelea@sony.com>
* boards: arm: cxd56xx: common: add crashlog driver
Add Crashlog driver with support for reset on crash
Signed-off-by: Alin Jerpelea <alin.jerpelea@sony.com>
* boards: arm: cxd56xx: move gs2200m initialization
Move the board gs2200m initalization to the common board folder
Signed-off-by: Alin Jerpelea <alin.jerpelea@sony.com>
* boards: arm: cxd56xx: move ili9340 initialization
Move the board ili9340 initalization to the common board folder
Signed-off-by: Alin Jerpelea <alin.jerpelea@sony.com>
* boards: arm: cxd56xx: move lpm013m091a initialization
Move the board lpm013m091a initalization to the common board folder
Signed-off-by: Alin Jerpelea <alin.jerpelea@sony.com>
* boards: arm: cxd56xx: common: typo fixes
HEADER: Updates on file location
Signed-off-by: Alin Jerpelea <alin.jerpelea@sony.com>
Approved-by: Gregory Nutt <gnutt@nuttx.org>
Squashed commit of the following:
arch/arm/src/s32k1xx: Update peripheral input clocking for the way that things are done for the S32K1XX. Fix other misc. compilation/configuration issues.
arch/arm/src/s32k1xx: Clean up LPSPI and LPI2C naming for S32K1XX. Using S32K1XX clock functions to get peripheral input clock.
arch/arm/src/s32k1xx: Clone i.MXRT LPSPI and LPI2C support. i.MXRT uses the same IP as S32K1XX.
arch/arm/src/s32k1xx/s32k1xx_lowputc.c: Fix a typo that prevented LPUART1 from working.
arch/arm/src/s32k1xx/s32k1xx_periphclocks.c and related files: Fix yet another case of confusion between pre-decremented and non-decremented divider values. Enforce the rule that dividers are not decremented until the moment they are written into registers.
arch/arm/src/s32k1xx/s32k1xx_clockconfig.c: Fix another problem related to whether a divider is pre-decremented or not. The answer must be the divder values are never pre-decremented. They are decremented just before being written to hardware.
arch/arm/src/s32k1xx/s32k1xx_clockconfig.c: Clean up some bad conditional logic. Precedence of operators problem.
boards/arm/s32k1xx/s32k118evb: Add support for execution out of SRAM. This is helpful for bringup when you want to avoid putting a lethal image in FLASH.
arch/arm/src/s32k1xx/s32k1xx_clockconfig.h: Remove crystal frequency, it is not used.
arch/arm/src/s32k1xx/s32k1xx_wdog.h: Fix a typo in a register name.i
boards/arm/s32k1xx/s32k*evb/configs/nsh/defconfig: Create Motorola SREC output format.
boards/arm/s32k1xx/s32k118evb/include/board.h: Add LPUART0 pin disambiguation.
arch/arm/src/s32k1xx/hardware: Add pin mux definitions for S32K116, 118, 142, 144, 146, and 148.
arch/arm/src/s32k1xx/s32k1xx_pin.c and .h: Add support for PIDR register that disables a gneral purpose pin from acting as an input.
arch/arm/src/s32k1xx/s32k1xx_pin.c and .h: The device does not support slew rate controls or open drain (on all the pins). Only pins that are configured for a protocol that requires open-drain (e.g;, LPI2C, LPUART single-wire) will work in open-drain mode.
arch/arm/src/s32k1xx/: Add logic to look up the peripheral clock frequency. Fix baud calcuation logic in s32k1xx_lowputc.c: In no longer tries to enable clocking. That must be done with board logic. Now gets the peripheral functional clock frequency to determine the baud rate.
arch/arm/src/s32k1xx: Add peripheral feature arrays.
Finishes peripheral clock initialization:
arch/arm/src/s32k1xx/s32k11x/s32k11x_clockmapping.c
arch/arm/src/s32k1xx/s32k14x/s32k14x_clockmapping.c
Provide MCU-specific mapping of clock names to PCC control registers.
boards/arm/s32k1xx/s32k118evb/src/s32k118_periphclocks.c
Provides initial clocking for for the S32K118EVB
arch/arm/src/s32k1xx/s32k1xx_periphclocks.c: Add logic to initialize peripheral clocking.
arch/arm/src/s32k1xx/s32k1xx_clockconfig.c: Add SIM clock configuration.
stm32h7 RTC and friends support
* stm32h7:Removed f7 in file path
* stm32f7:Fix overwritten IRQ enabled
System boot order calls clock_initialize then up_initalize.
clock_initialize was setting up the alarm IRQ
up_initalize is initializing the NVIC.
This most likely worked in the past due to a bug in the
NVIC init code that failed to clear the Interrupt enables.
That was fixed in 510b0f7e arch/arm/src: Correct all ARMv7-M
architectures. Interrupts were not be disabled correctly
on power up.
* stm32h7:Ported over F7 RTC
* nucleo-h743zi:Add RTC
Approved-by: Gregory Nutt <gnutt@nuttx.org>
arch/arm/src/s32k1xx/s32k1xx_clockconfig.c: Finishes the implementation of the core clock configuration logic.
arch/arm/src/s32k1xx/hardware/s32k1xx_smc.h: Add SMC register definition header file.
arch/arm/src/s32k1xx: Bring in GPIO logic from Kinetis. Looks like the same IP.
serial single-wire: add possibility to specify pull-up instead of open drain
Approved-by: David Sidrane <david.sidrane@nscdg.com>
Approved-by: Gregory Nutt <gnutt@nuttx.org>
Master
* Revert "Merged in yanqil-br/feature-multi_chan_pwm (pull request #973)"
This reverts commit aef0e0b538.
* arch/arm/src/{stm32/stm32f7/stm32h7/stm32l4}/stm32_pwm.c: configure multi-channel duty only if channel specified. This allows you to update duty cycle for a single channel
* nucleo-f303re/configs: add basic NSH configuration
* nucleo-f303re/configs/pwm: enable console on UART2 and set entry point to nsh_main
Approved-by: Gregory Nutt <gnutt@nuttx.org>
stm32f7: USART1_RXDMA is dependent on STM32F7_DMA2 not STM32F7_DMA1
Approved-by: David Sidrane <david.sidrane@nscdg.com>
Approved-by: Alan Carvalho de Assis <acassis@gmail.com>
Approved-by: Gregory Nutt <gnutt@nuttx.org>
arch/arm/src/tiva/Kconfig:
Remove EXPERIMENTAL dependency on TIVA_TIMER16_PWM.
arch/arm/src/tiva/common/tiva_timerlib.c:
Fix wrong 32/16-bit ifdef checks.
Add tiva_pwm16_sel_event() to choose GPTMCTL.TnEVENT value.
Implement tiva_pwm_mode16().
tiva_timer16_setinterval(): Fix wrong check for TIMER16_MODE_ONESHOT
and TIMER16_MODE_PERIODIC. Was comparing to config->cmn.mode
which can never have those values. This prevented interrupts being
enabled. Compare to timer->mode instead.
Add tiva_timer16pwm_setperiodduty() to set initial period, duty cycle,
and enable interrupts if requested in GPTM peripheral. Interrupts
are not enabled in NVIC until tiva_timer16_start() is called.
Add tiva_timer16pwm_setduty() to update duty cycle at any time.
arch/arm/src/tiva/hardware/lm/lm3s_timer.h,
arch/arm/src/tiva/hardware/lm/lm4f_timer.h,
arch/arm/src/tiva/hardware/tm4c/tm4c123_timer.h,
arch/arm/src/tiva/hardware/tm4c/tm4c129_timer.h:
Add missing defines; make surrounding defines consistent.
arch/arm/src/tiva/tiva_timer.h:
Add new TIMER_FLAG_* configuration flags to enable configuring the
16-bit PWM feature. Extend type of "flags" in tiva_timer32config_s
and tiva_timer16config_s from 8- to 32-bits to allow more flags.
If we are using the BASEPRI register to disable interrupts, then the answer is that we must disable ONLY the "normal interrupts". That is because we cannot disable SVCALL interrupts and we cannot permit SVCAll interrupts running at a higher priority than the high priority interrupts (otherwise, they will introduce jitter in the high priority interrupt response time.)
Hence, if you need to disable the high priority interrupt, you will have to disable the interrupt either at the peripheral that generates the interrupt or at the NVIC. Disabling global interrupts via the BASEPRI register cannot effect high priority interrupts.
arch/arm/src/tiva/common/tiva_timerlib.c:
* tiva_gptm_configure() and tiva_gptm_release(): Fix error: Was calling
tiva_emac_periphrdy() instead of tiva_gptm_periphrdy().
arch/arm/src/tiva/tiva_timer.h:
* Fix error in "abcde" description of bit flag defines.
kinetis:i2c transfer ensure correct result returned
kinetis_i2c_transfer released the mutex then fetched
the state, this resulted in returning the correct
results.
Approved-by: Gregory Nutt <gnutt@nuttx.org>
Move boards to boards folder
* boards: rename configs folder to boards
This is the proposed layout after the change:
boards: - folder containing board folders
<board>: - name of each board
drivers: - extra drivers specific for platform
include: - header files for the boars
scripts: - extra scripts specific for platform
src: - board specific code
tools: - extra tools specific for platform
<config>: - board specific configuration(s)
Note:
<xxx> names are dependent on platform
This is a logical change to aim to the arch layout but this is a
huge change it should be done in several steps to lower the risk.
Signed-off-by: Alin Jerpelea <alin.jerpelea@sony.com>
* Kconfig: replace configs with boards
The change is needed after the path change
Signed-off-by: Alin Jerpelea <alin.jerpelea@sony.com>
* Makefile: replace configs with boards
The change is needed after the path change
Signed-off-by: Alin Jerpelea <alin.jerpelea@sony.com>
* Makefile.*: replace configs with boards
The change is needed after the path change
Signed-off-by: Alin Jerpelea <alin.jerpelea@sony.com>
* Make.defs: replace configs with boards
The change is needed after the path change
Signed-off-by: Alin Jerpelea <alin.jerpelea@sony.com>
* .sh: replace configs with boards
The change is needed after the path change
Signed-off-by: Alin Jerpelea <alin.jerpelea@sony.com>
* .mk: replace configs with boards
The change is needed after the path change
Signed-off-by: Alin Jerpelea <alin.jerpelea@sony.com>
* .c & .h: replace configs with boards
The change is needed after the path change
Signed-off-by: Alin Jerpelea <alin.jerpelea@sony.com>
* .bat: replace configs with boards
The change is needed after the path change
Signed-off-by: Alin Jerpelea <alin.jerpelea@sony.com>
Approved-by: Gregory Nutt <gnutt@nuttx.org>
Rationale: TM4C1294NC is ambiguous:
TM4C1294NCPDT is a 128-TQFP
TM4C1294NCZAD is a 212-NFBGA
The TM4C1294NC part currently supported by NuttX is the TM4C1294NCPDT used on the TI EK-TM4C1294XL "Connected LaunchPad" (see configs/tm4c1294-launchpad). To ensure the correct part is fully specified, this commit updates all TM4C1294NC identifiers to TM4C1294NCPDT.
Rename:
CONFIG_ARCH_CHIP_TM4C1294NC to CONFIG_ARCH_CHIP_TM4C1294NCPDT
ARCH_CHIP_TM4C1294NC to ARCH_CHIP_TM4C1294NCPDT
TM4C1294NC to TM4C1294NCPDT
Rationale: In terms of firmware programming, there is no functional difference between these parts:
TM4C123GH6PMI7
TM4C123GH6PMI7R
TM4C123GH6PMT7
TM4C123GH6PMT7R
From a programming standpoint, all of the above parts are TM4C123GH6PM, which means it doesn't make sense to differentiate between PM and PMI. (The PM means 64-LQFP. The I means temperature range -40C to +85C. It could be T meaning -40C to +105C. The R means it ships in Tape and Reel packaging as opposed to Tray.)
arch/arm/include/tiva/chip.h:
arch/arm/include/tiva/tm4c_irq.h:
arch/arm/src/tiva/hardware/lm/lm3s_flash.h:
arch/arm/src/tiva/hardware/tm4c/tm4c_pinmap.h:
configs/tm4c123g-launchpad/README.txt:
configs/tm4c123g-launchpad/nsh/defconfig:
Rename: CONFIG_ARCH_CHIP_TM4C123GH6PMI to CONFIG_ARCH_CHIP_TM4C123GH6PM
arch/arm/src/tiva/Kconfig:
configs/Kconfig:
Rename: ARCH_CHIP_TM4C123GH6PMI to ARCH_CHIP_TM4C123GH6PM
arch/arm/src/tiva/hardware/tm4c/tm4c_memorymap.h:
Rename: CONFIG_ARCH_CHIP_TM4C123GH6PMI to CONFIG_ARCH_CHIP_TM4C123GH6PM
Remove redundant Peripheral Base Addresses section. There were two identical copies, one for CONFIG_ARCH_CHIP_TM4C123GH6PMI and another for CONFIG_ARCH_CHIP_TM4C123GH6PM.
Testing of the WiFi is minimal so far but functionality is proven. I'm specifically not happy that the driver doesn't recover elegantly from a DMA data checksum failure, but that is an issue that can be dealt with in due course ... I'm trying to get the rest of the interfaces fleshed out and the hardware proven so it can go for pre-production build. I _think_ there's only Bluetooth and USB-device left to implement now.
- Fix for mx25rxx driver as it does not work properly
- Add mx25rxx memory chip & smartfs support in b-l475e-iot01a/nsh config
- Update smartfs smart_scan() function
stm32f7: Fixes bad preprocessor logic preventing USB OTG HS to work when used without external ULPI.
Approved-by: David Sidrane <david.sidrane@nscdg.com>
Approved-by: Gregory Nutt <gnutt@nuttx.org>
Add support for LPC40xx family chips
* Corrected a few peripheral definitions and pin functions for the LPC17xx family.
Added configuration options, chip definitions, and additional pin functions for the LPC40xx family.
Added board configurations for Embedded Artists LPC4088 Quickstart board and LPC4088 Developer's kit. These configurations are still something of a work in progress. In particular, the LCD functionality is untested.
* First pass rename in *.c and *.h files.
* Renamed LPC17XX to LPC17XX_40XX in config files
* Rplaced LPC17xx with LPC17xx/LPC40xx in .c files
* Replaced LPC17xx with LPC17xx/LPC40xx in .h files
* Updated some documentation
* Working on moving directories
* moved arch/arm/src/lpc17xx and arch/arm/include/lpc17xx to lpc17xx_40xx
* Renamed LPC17_* constants / configuration options to LPC17_40_*
* Updated chip family name defines
* Renamed some chip-specific files
* Updated references to renamed files
* Updated references to lpc17_ to lpc17_40_
* Renamed source files from lpc17_* to lpc17_40_*
* Clean up white space
Approved-by: Gregory Nutt <gnutt@nuttx.org>
drivers/lcd/tda19988.c: Now uses the new common videomode structure of include/nuttx/video/videomode.h as do other video components.
video/, include/nuttx/video/videomode.h: Separate EDID and from videomode managment. They really are separate things.
back at physical address 0x2007C000 and 0x20080000 (i.e. right below and right
above a 512 KiB boundary). Memory from those two blocks is considered
continuous when assigned to a heap.
In the protected build mode, when the memory protection unit is used, though,
it must be split into two MPU regions. This is because MPU regions must be
naturally aligned, and the 32KiB continuous address space of the two 16KiB AHB
SRAM blocks does not start at an address divisible by 32KiB.
The only other configurations that use protected build mode on lpc17xx are
currently open1788/knsh and open1788/knxterm. The LPC1788 has the AHB SRAM
blocks mapped more sanely (from an MPU region point of view), which is
probably why no problems emerged here. Both still compile with my change and
other than wasting an MPU region (which would otherwise remain unused) should
work fine. That said, I have no hardware to confirm.
arch/arm/src/am335x: Add logic to map the framebuffer to a non-cached, non-buffered memory region.
arch/arm/src/am335x: Remove struct am335x_fbinfo_s. Replaced with configuration settings that provide the same information.
Squashed commit of the following:
arch/arm/src/am335x/am335x_lcdc.c: LCD driver now compiles.
arch/arm/src/am335x/am335x_lcd.c: This brings the LCD driver to code complete. Have not yet attempted to compile.
arch/arm/src/am335x/am335x_edid.c: Framebuffer is pre-allocated. In verification of video mode, include a test to assure that the video mode can be supported by the pre-allocated framebuffer memory.
arch/arm/src/am335x/am335x_lcd.c: At a little bit of LCD initialization logic. There is a long way to go.
arch/arm/src/am335x/am335x_edid.c: Add am335x_lcd_videomode() which provides an alternative way of initializing the LCD controller.
arch/arm/src/am335x/am335x_edid.c: edit.h has move to include/nuttx/video.
arch/arm/src/am335x/hardware/am335x_cm.h: Fix a typo in a macro name.
arch/arm/src/am335x/am335x_edid.c: Integrate video/edid support.
arch/arm/src/am335x/am335x_edid.c: Fall back to VGA mode is not valid videomode is availabe in the EDID data.
arch/arm/src/am335x/am335x_edid.c: Fixes for a partially clean compile.
arch/arm/src/am335x/am335x_edid.c: Add basic logic to convert EDID montor descriptions into a form usable for LCD configuration.
arch/arm/src/am335x: Add framework (only) for an LCD driver. Initial commit is simply the LPC54 framebuffer driver with naming changes.
Improve gs2200m performance
* arch/arm/src/cxd56xx: Fix dma initialization in cxd56_dmac.c
up_dma_initialize() must be used instead of up_dmainitialize()
Signed-off-by: Masayuki Ishikawa <Masayuki.Ishikawa@jp.sony.com>
* drivers/wireless: Introduce CONFIG_WL_GS2200M_SPI_FREQUENCY
Also, changed usleep(100) to up_udelay(100) to avoid invalid response.
Signed-off-by: Masayuki Ishikawa <Masayuki.Ishikawa@jp.sony.com>
* configs/spresense/wifi: Improve performance for webserver
This commit changes followings.
1. Enable SPI DMA for both TX and RX
2. Increase SPI clock speed from 4MHz to 10MHz
3. Increase buffer size for sendfile() from 512B to 1KB
4. Enable sendfile() for webserver
Signed-off-by: Masayuki Ishikawa <Masayuki.Ishikawa@jp.sony.com>
Approved-by: Gregory Nutt <gnutt@nuttx.org>
arch/arm/src/tiva: Add a workaround for tiva with qemu
With qemu, tiva_ifup() hangs because ethernet link status can not
be set correctly. This PR is a workaround to avoid this issue.
Signed-off-by: Masayuki Ishikawa <Masayuki.Ishikawa@jp.sony.com>
Approved-by: Gregory Nutt <gnutt@nuttx.org>
Squashed commit of the following:
configs/makerlisp/scripts/makerlisp_ram.linkcmd: Fixup .RESET and .STARTUP. These need to be redirected to RAM since they default to ROM.
configs/makerlisp/scripts/makerlisp_ram.linkcmd: Restore some settings that should be unnecessary but are really required by the current implementation.
configs/makerlisp: Rename nsh configuratinon to nsh_flash. Create new configuration, nsh_ram, that is identical to the nsh_flash configuration except that the code runs out of external SRAM.
configs/makerlisp/scripts: Add a linker script to support execution from RAM.
configs: spresense: add I2CTOOL support and extend GPIO for future use
* arch: arm: cxd56xx: add delay support
add delay support for cxd56xx chip
Signed-off-by: Alin Jerpelea <alin.jerpelea@sony.com>
* configs: spresense: register I2C busses
for development is usefull to register I2C busses when the I2CTOOL
is built
Signed-off-by: Alin Jerpelea <alin.jerpelea@sony.com>
* configs:spresense: enable GPIO interface
enable GPIO interface on spresense board
Signed-off-by: Alin Jerpelea <alin.jerpelea@sony.com>
Approved-by: Gregory Nutt <gnutt@nuttx.org>
arch: arm: cxd56xx: SCU, ADC, I2C
* nuttx: configs: spresense: LEDS: fix warnings
In the initial code several errors were missed because I pushed
the dirty code.
Signed-off-by: Alin Jerpelea <alin.jerpelea@sony.com>
* arch: arm: cxd56xx: add Sensor Control Unit (SCU)
Add Sensor Control Unit (SCU) on cxd56xx chip
Signed-off-by: Alin Jerpelea <alin.jerpelea@sony.com>
* arch: arm: cxd56xx: add I2C support
add I2C support on cxd56xx chip
Signed-off-by: Alin Jerpelea <alin.jerpelea@sony.com>
* arch: arm: cxd56xx: add ADC interface support
Add ADC interface support on cxd56xx chip
Signed-off-by: Alin Jerpelea <alin.jerpelea@sony.com>
* arch: arm: cxd56xx: Use DMAC for reading sensing data
Use DMAC for reading sensing data from SCU on cxd56xx chip
Signed-off-by: Alin Jerpelea <alin.jerpelea@sony.com>
* arch: arm: cxd56xx: code style sanitization
NuttX does not use Deoxygen for documentation and no file should contain Doxygen tags or Doxygen style comments.
Signed-off-by: Alin Jerpelea <alin.jerpelea@sony.com>
* configs: spresense: enable I2CDEV
add enable I2CDEV for spresense board
Signed-off-by: Alin Jerpelea <alin.jerpelea@sony.com>
* configs: spresense: add notification LEDs
Add usefull diagnostic LEDs on the speresense board
Signed-off-by: Alin Jerpelea <alin.jerpelea@sony.com>
Approved-by: Gregory Nutt <gnutt@nuttx.org>
arch: arm: cxd56xx: add UID support
* arch: arm: cxd56xx: add UID support
Add support to be able to read the HW UID
Signed-off-by: Alin Jerpelea <alin.jerpelea@sony.com>
* configs: spresense: enable USERLEDS
add USERLED for spresense board
Signed-off-by: Alin Jerpelea <alin.jerpelea@sony.com>
Approved-by: Gregory Nutt <gnutt@nuttx.org>
commit f5080f53516a853408dd80f09f85e1d1c139133f
Author: Gregory Nutt <gnutt@nuttx.org>
Date: Mon Jun 17 12:24:22 2019 -0600
arch/z80/src/ez80/ez80_spi.c: SPI driver still does not work. But the driver now has timeouts so that at least it does not hang the system on startup.
commit 5241e9ae643981c43c8c7fa8478a01d0c2e17eb0
Author: Gregory Nutt <gnutt@nuttx.org>
Date: Mon Jun 17 10:45:11 2019 -0600
arch/z80/src/ez80: Fixes to SPI baud rate calculation.
commit ce2e9e3703485563a0a5b6a57e4080ad45d91fd7
Author: Gregory Nutt <gnutt@nuttx.org>
Date: Mon Jun 17 09:29:13 2019 -0600
arch/z80/src/ez80: Cosmetic and unnecessary clean-up or serial driver.
commit 77287c8508a7e3262068d3e8cf1c5f8e27f3a144
Author: Gregory Nutt <gnutt@nuttx.org>
Date: Mon Jun 17 09:08:56 2019 -0600
arch/z80/src/common and arch/z80/src/ez80: Clean up some assertion-related logic.
commit 4d2d3594c22f7240119255825fce2d2437301404
Author: Gregory Nutt <gnutt@nuttx.org>
Date: Mon Jun 17 07:48:21 2019 -0600
configs/makerlisp/nsh/defconfig: Enable STACKDUMP on assertion.
commit 76b7a2faa3f213dd26634dd9440d12f746cac097
Author: Gregory Nutt <gnutt@nuttx.org>
Date: Mon Jun 17 07:47:55 2019 -0600
configs/makerlisp/include/board.h: Don't put the board in reset on a simple assertion, onlhy a full panic.
commit 0a0dc12edcd39c07696769cb7249d8c39a148ccc
Author: Gregory Nutt <gnutt@nuttx.org>
Date: Mon Jun 17 07:46:54 2019 -0600
arch/z80/src/ez80/ez80_rtc_lowerhalf.c: Remove all references to alarm ID.
commit 1a4dba1075fcf6466e87520a8ba66bbf91d696d7
Author: Gregory Nutt <gnutt@nuttx.org>
Date: Mon Jun 17 07:33:29 2019 -0600
configs/makerlisp/src/ez80_bringup.c: Fix an error that was causing MMC/SD to fail to initialize. Unfortunately now the system hangs.
commit 145a395c7a8e73336fe62caf803d108c59e306a5
Author: Gregory Nutt <gnutt@nuttx.org>
Date: Mon Jun 17 07:32:50 2019 -0600
arch/z80/src/ez80: Add an RTC lower half driver. Initial commit is just the STM32 RTC lower half with name changes.
arch: arm: cxd56xx: PM and PWM
* configs: spresense: add SPI configuration
add SPI configuration for spresense board
Signed-off-by: Alin Jerpelea <alin.jerpelea@sony.com>
* arch: arm: cxd56xx: add support for PWM
add support for PWM for cxd56xx
Signed-off-by: Alin Jerpelea <alin.jerpelea@sony.com>
* configs: spresense: enable PWM support
enable PWM support on spresense board
Signed-off-by: Alin Jerpelea <alin.jerpelea@sony.com>
* arch: arm: cxd56xx: add Power Management PROCFS support
the powermanager procfs support will export
/proc/pm:
clock
power
Signed-off-by: Alin Jerpelea <alin.jerpelea@sony.com>
* configs: spresense: enable powermanager procfs support
The powermanager procfs is disabled by default and need to be enabled
by the CONFIG_CXD56_PM_PROCFS option
Signed-off-by: Alin Jerpelea <alin.jerpelea@sony.com>
* arch: arm: cxd56xx: add timer driver
Add timer driver for cxd56xx.
NOTE
The timer allows a divider of 1, 16 and 256 options
Signed-off-by: Alin Jerpelea <alin.jerpelea@sony.com>
* arch: arm: cxd56xx: add Watch Dog Timer
Add Watch Dog Timer on cxd56xx
Signed-off-by: Alin Jerpelea <alin.jerpelea@sony.com>
* configs: spresense: enable timer
the platform support has been added and now we can use the timers
on spresense board.
Signed-off-by: Alin Jerpelea <alin.jerpelea@sony.com>
* configs: spresense: enable WatchDog timer
The platform support has been added and now we can use the WatchDog
Timer on spresense board.
Signed-off-by: Alin Jerpelea <alin.jerpelea@sony.com>
Approved-by: Gregory Nutt <gnutt@nuttx.org>
stm32 h7 Add ADC and a few fixes for timer and Serial
* stm32h7:Fix error when SINGLEWIRE or CONFIG_STM32H7_SERIALBRK_BSDCOMPAT defined
* stm32h7:time fixed compile errors with TIM13,TIM14, TIM7
* stm32h7:Added ADC Driver
* stmh7x3:Added ADC pins to pin map
* stm32h7:Added ADC clocking
* nucleo-h743zi:Add ADC
Approved-by: Gregory Nutt <gnutt@nuttx.org>
rndis on spresense
* arch/arm/src/cxd56xx: Fix ep0 out packet handling in cxd56_usbdev.c
This change fixes to handle ep0 out packet which exceeds EP0_MAXSIZE.
For example, 76 bytes of out packet is sent from rndis host during
rndis negotiation and finally the packet is split into two out packets
(64 bytes out packet + 12 bytes out packet). To handle these packets,
actual ep0reqlen is stored during ep0 out setup stage, and if all
out packets are received, it dispatches to cxd56_ep0setup(), otherwise,
it sets up the internal USB DMA to receive remaining out packets.
Signed-off-by: Masayuki Ishikawa <Masayuki.Ishikawa@jp.sony.com>
* configs/spresense: Add support for rndis configuration
Signed-off-by: Masayuki Ishikawa <Masayuki.Ishikawa@jp.sony.com>
Approved-by: Gregory Nutt <gnutt@nuttx.org>
Add syscontrol for cxd56xx
* arch: arm: cxd56xx: add sysctl
Add the syscontrol implementation for cxd56xx.
Signed-off-by: Alin Jerpelea <alin.jerpelea@sony.com>
* arch: arm: cxd56xx: timer updates
Add the function to change the clock speed.
Signed-off-by: Alin Jerpelea <alin.jerpelea@sony.com>
* arch: arm: cxd56xx: cxd56_uart updates
Add pinctrl and clock ctrl functionality.
Signed-off-by: Alin Jerpelea <alin.jerpelea@sony.com>
* arch: arm: cxd56xx: add conditional for SDHCI
The cxd56_sdhci should be built only if CONFIG_CXD56_SDIO is selected
Signed-off-by: Alin Jerpelea <alin.jerpelea@sony.com>
Approved-by: Gregory Nutt <gnutt@nuttx.org>
arch: arm: cxd56xx: add Power Management support
* arch: arm: cxd56xx: add Power Management support
Add power management on the cxd56xx
Signed-off-by: Alin Jerpelea <alin.jerpelea@sony.com>
* arch: arm: cxd56xx: add Far API
Signed-off-by: Alin Jerpelea <alin.jerpelea@sony.com>
Approved-by: Gregory Nutt <gnutt@nuttx.org>
nuttx/arch/z80/src: To properly follow the coding standard, the z80 architecture common should up_mmuinit should be called z80_mmu_initialize.
nuttx/arch/z80/src: To properly follow the coding standard, the z80 architecture common should up_loweserialinit should be called z80_lowserial_initialize.
configs/z80sim/src/z80_serial.c: Remove unused function up_earlyserialinit()
nuttx/arch/z80/src: To properly follow the coding standard, the z80 architecture common should up_serialinit should be called z80_serial_initialize.
nuttx/arch/z80/src: To properly follow the coding standard, the z80 architecture common should up_doirq should be called z80_doirq.
arch/z80/src/common: up_addregion() must be prototyped in nuttx/mm/mm.h, not up_internal.h
arch/z80/src/ez80: Clean-up RTC driver; get a clean compilation. Still untested.
arch/z80/src/ez80: This brings the RTC to code complete, but does not yet compile.
arch/z80/src/ez80/ez80_rtc.c: Bring in badly ported RTC driver from STM32F4. Little more than naming changing at this point not even ready to attempt comilation
arch/z80/src/ez80: Add RTC driver. Initial commit is just the STMF4 RTC driver with name changes.
configs/makerlisp/src/ez80_spi.c: Add hooks needed by SPI driver. Move SPI MMC/SD chip selected configuration from ez80_lowinit.c to here as it done in other NuttX architectures. This enables support for multiple devices on the SPI bus.
arch: arm: cxd56xx: add support for USB and SDIO
* arch: arm: cxd56xx: add support for USB connectivity
Add basic support for USB connectivity
Signed-off-by: Alin Jerpelea <alin.jerpelea@sony.com>
* arch: arm: cxd56xx: add SDHCI support
We add SDHCI driver for the cxd56xx
Signed-off-by: Alin Jerpelea <alin.jerpelea@sony.com>
Approved-by: Gregory Nutt <gnutt@nuttx.org>
arch: arm: cxd56xx: add Package Configuration
The CXD56xx can come in FCBGA 185 pin or WLCSP 100 pin package.
For each package we have to pick the right pin setup.
The default configuration is set to FCBGA 185 pin package
Signed-off-by: Alin Jerpelea <alin.jerpelea@sony.com>
Approved-by: Gregory Nutt <gnutt@nuttx.org>
Squashed commit of the following:
configs/makerlisp: Update comments about use of serial console.
configs/makerlisp: Add LED support, remove vestiges of button support (the board has no user buttons). Add support for SPI-based MMC/SD card slot.
arch/z80/src/ez80: Fix some link problems.
libs/libc/syslog/lib_syslog.c: The ZDS-II toolchain does not declare va_coy in stdarg.h. I think that the use of va_copy in vsyslog() is no necessary.
configs/makerlisp: Initial configuration directories cloned from ez80f910200zco with little more than naming changes.
ez80: Fixing a few more compile problems. I am afraid that the 5.3.0 compiler it too buggy to use.
ez80: Additional build-related fixed.
eZ80: Updating to use the newest ZDSII 5.3.0 toolchain.
