LD: nuttx.rel
objcopy: couldn't open symbol redefinition file nuttx-names.dat
(error: No such file or directory)
Makefile: 297: recipe for target 'nuttx.rel' failed
Change-Id: Ic78f030b77c3468ddbb96d4fb0558edad3abc3ae
Signed-off-by: chao.an <anchao@xiaomi.com>
When any error was detected the buffers descriptors were
blindly initialized. This caused the TX of the MAC to
be in a bad state. The correct thing to do, we disable
the MAC, init the bufffers and re-eanable the MAC.
The interrupts were being throlled at the NVIC. This been
cleaned up.
ASAN trace:
...
==32087==ERROR: AddressSanitizer: heap-buffer-overflow on address 0xf4502120 at pc 0x56673ca3 bp 0xff9b6a08 sp 0xff9b69f8
WRITE of size 1 at 0xf4502120 thread T0
#0 0x56673ca2 in strcpy string/lib_strcpy.c:64
0xf4502120 is located 0 bytes to the right of 8224-byte region [0xf4500100,0xf4502120)
allocated by thread T0 here:
#0 0xf7a60f54 in malloc (/usr/lib32/libasan.so.4+0xe5f54)
#1 0x5667725d in up_create_stack sim/up_createstack.c:135
#2 0x56657ed8 in nxthread_create task/task_create.c:125
#3 0x566580bb in kthread_create task/task_create.c:297
#4 0x5665935f in work_start_highpri wqueue/kwork_hpthread.c:149
#5 0x56656f31 in nx_workqueues init/nx_bringup.c:181
#6 0x56656fc6 in nx_bringup init/nx_bringup.c:436
#7 0x56656e95 in nx_start init/nx_start.c:809
#8 0x566548d4 in main sim/up_head.c:95
#9 0xf763ae80 in __libc_start_main (/lib/i386-linux-gnu/libc.so.6+0x18e80)
CALLSTACK:
#8 0xf79de7a5 in __asan_report_store1 () from /usr/lib32/libasan.so.4
#9 0x565fd4d7 in strcpy (dest=0xf4a02121 "", src=0xf5c00895 "k") at string/lib_strcpy.c:64
#10 0x565e4eb2 in nxtask_setup_stackargs (tcb=0xf5c00810, argv=0x0) at task/task_setup.c:570
#11 0x565e50ff in nxtask_setup_arguments (tcb=0xf5c00810, name=0x5679e580 "hpwork", argv=0x0) at task/task_setup.c:714
#12 0x565e414e in nxthread_create (name=0x5679e580 "hpwork", ttype=2 '\002', priority=224, stack=0x0, stack_size=8192, entry=0x565e54e1 <work_hpthread>, argv=0x0) at task/task_create.c:143
#13 0x565e42e3 in kthread_create (name=0x5679e580 "hpwork", priority=224, stack_size=8192, entry=0x565e54e1 <work_hpthread>, argv=0x0) at task/task_create.c:297
#14 0x565e5557 in work_start_highpri () at wqueue/kwork_hpthread.c:149
#15 0x565e3e32 in nx_workqueues () at init/nx_bringup.c:181
#16 0x565e3ec7 in nx_bringup () at init/nx_bringup.c:436
#17 0x565e3d96 in nx_start () at init/nx_start.c:809
#18 0x565e3195 in main (argc=1, argv=0xffe6b954, envp=0xffe6b95c) at sim/up_head.c:95
Change-Id: I096f7952aae67d055daa737e967242eb217ef8ac
Signed-off-by: chao.an <anchao@xiaomi.com>
like other related macro(e.g. INTMAX_MIN, INTMAX_MAX...)
Signed-off-by: Xiang Xiao <xiaoxiang@xiaomi.com>
Change-Id: I8863599960b1a9b1c22ae9c35735a379a4c745b0
stm32_i2sdev_initialize to stm32_i2sbus_initiliaze, to be consistent
with the way other buses are initialized.
The stm32_i2sdev_initiliaze (similar to stm32_spidev_initialize for
example) is a board specific function that does any necessary
initialization that's board depedent.
utilize the call inside nxtask_exit instead, also move
nxsched_suspend_scheduler to nxtask_exit for symmetry
Signed-off-by: Xiang Xiao <xiaoxiang@xiaomi.com>
Change-Id: I219fc15faf0026e452b0db3906aa40b40ac677f3
This fixes the following 3 issues:
1. Wait for send to complete in exchange
Before shutting down the SPI, we have to wait for send to complete; not only
DMA, since DMA just puts data to the SPI fifo. It is not yet out of SPI.
When doing exchange with both send & receive this is not an issue because when
receive dma has completed, it is certain that also the send is.
This can be accomplished by completing the transfer in SPI TXC interrupt
instead of DMA callback.
2. Fix TXDMAEN and RXDMAEN placement
According to the spec, the RXDMAEN must be enabled before
enabling DMA requests for Tx and Rx in DMA registers, and TXDMAEN
after that.
Cleaner place to do this is in spi_dmarxstart and spi_dmatxstart, where
also the dma requests are enabled. This also handles properly the
simplex modes.
3. Remove bus signal glitches when shutting off SPI block
Use AFCNTR to avoid glitches in SPI lines while turning SPI block
on/off during calls to exchange.
Signed-off-by: Jukka Laitinen <jukka.laitinen@intel.com>
arch/z80/src/Makefile: Correct inclusion of non-existent file. This was not a problem before because there was '-' before the include. Problem revealed with '-' removed.
arch/z80/src/ez80/Toolchain.defs: Apparently there are not too many '"' in path definition.
tools/incdir.c: No space between -usrinc: or -sysinc: and the list of paths.
574b25 broke the internal DMA buffers usage that solved
the following problem: The DMA capable interface does
not know the buffers extent. It calulates it from size.
The user may need to transfer less than a cachline bytes,
but STILL have a DMA cabable buffer. The user is therefore
foreced to transfer more data then needed to "trick" the
DMA cabable function. This is a wast of bus bandwith and
may not work will all devices. The internal buffer, solve
this issue.
stm32h7:stm32_spi review changes
Added sugestion from jlaitine to support RX only.
This is a work in progress, and now only serves as
DMA enabled simplex RX-only mode bus controller
Signed-off-by: Jukka Laitinen <jukka.laitinen@intel.com>
-Move task_init() and task_activate() prototypes from include/sched.h to include/nuttx/sched.h. These are internal OS functions and should not be exposed to the user.
-Remove references to task_init() and task_activate() from the User Manual.
-Rename task_init() to nxtask_init() since since it is an OS internal function
-Rename task_activate() to nxtask_activate since it is an OS internal function
Add support for the STM32G474 family of microcontrollers and the
B-G474E-DPOW1 Discovery Board, which features a STM32G474RET6.
This is a major pull request as it adds support for an entirely
new family of STM32. This support is implemented in
arch/arm/src/stm32 and shares implementation with other STM32
families supported by that code, such as the 'L15xx, 'F10xx,
'F20xx, 'F3xxx, and 'F4xxx.
arch/arm/Kconfig:
arch/arm/include/stm32/chip.h:
arch/arm/include/stm32/irq.h:
arch/arm/src/stm32/Kconfig:
arch/arm/src/stm32/hardware/stm32_adc.h:
arch/arm/src/stm32/hardware/stm32_adc_v2.h:
arch/arm/src/stm32/hardware/stm32_dma.h:
arch/arm/src/stm32/hardware/stm32_dma_v1.h:
arch/arm/src/stm32/hardware/stm32_flash.h:
arch/arm/src/stm32/hardware/stm32_i2c.h:
arch/arm/src/stm32/hardware/stm32_i2c_v2.h:
arch/arm/src/stm32/hardware/stm32_memorymap.h:
arch/arm/src/stm32/hardware/stm32_pinmap.h:
arch/arm/src/stm32/hardware/stm32_tim.h:
arch/arm/src/stm32/stm32_allocateheap.c:
arch/arm/src/stm32/stm32_dma.c:
arch/arm/src/stm32/stm32_dma_v1.c:
arch/arm/src/stm32/stm32_dumpgpio.c:
arch/arm/src/stm32/stm32_gpio.c:
arch/arm/src/stm32/stm32_gpio.h:
arch/arm/src/stm32/stm32_lowputc.c:
arch/arm/src/stm32/stm32_rcc.c:
arch/arm/src/stm32/stm32_rcc.h:
arch/arm/src/stm32/stm32_serial.c:
arch/arm/src/stm32/stm32_syscfg.h:
arch/arm/src/stm32/stm32_uart.h:
* Add architectural support to existing NuttX files. This
makes the STM32G474 family parts accessible to the system.
With big thanks for detailed code review:
David Sidrane (davids5)
Mateusz Szafoni (raiden00)
Abdelatif Guettouche (Ouss4)
Add support for the STM32G474 family of microcontrollers and the
B-G474E-DPOW1 Discovery Board, which features a STM32G474RET6.
This is a major pull request as it adds support for an entirely
new family of STM32. This support is implemented in
arch/arm/src/stm32 and shares implementation with other STM32
families supported by that code, such as the 'L15xx, 'F10xx,
'F20xx, 'F3xxx, and 'F4xxx.
arch/arm/include/stm32/stm32g47xxx_irq.h:
arch/arm/src/stm32/hardware/stm32g474cxx_pinmap.h:
arch/arm/src/stm32/hardware/stm32g474mxx_pinmap.h:
arch/arm/src/stm32/hardware/stm32g474qxx_pinmap.h:
arch/arm/src/stm32/hardware/stm32g474rxx_pinmap.h:
arch/arm/src/stm32/hardware/stm32g474vxx_pinmap.h:
arch/arm/src/stm32/hardware/stm32g47xxx_gpio.h:
arch/arm/src/stm32/hardware/stm32g47xxx_memorymap.h:
arch/arm/src/stm32/hardware/stm32g47xxx_pinmap.h:
arch/arm/src/stm32/hardware/stm32g47xxx_pwr.h:
arch/arm/src/stm32/hardware/stm32g47xxx_rcc.h:
arch/arm/src/stm32/hardware/stm32g47xxx_syscfg.h:
arch/arm/src/stm32/hardware/stm32g47xxx_uart.h:
arch/arm/src/stm32/stm32g47xxx_rcc.c:
* New files required for architectural support. Note that
existing NuttX files are not modified. As such, in this
revision, the system is unaffected by their addition.
With big thanks for detailed code review:
David Sidrane (davids5)
Mateusz Szafoni (raiden00)
Abdelatif Guettouche (Ouss4)
remove the TLS alignment check
Regression by:
--------------------------------------------------------
commit a6da3c2cb6
Author: Ouss4 <abdelatif.guettouche@gmail.com>
Date: Thu May 7 18:50:07 2020 +0100
arch/*/*_checkstack.c: Get aligned address only when
CONFIG_TLS_ALIGNED is enabled.
--------------------------------------------------------
commit c2244a2382
Author: Gregory Nutt <gnutt@nuttx.org>
Date: Thu May 7 09:46:47 2020 -0600
Remove CONFIG_TLS
A first step in implementing the user-space error is
force TLS to be enabled at all times. It is no longer optional
Signed-off-by: chao.an <anchao@xiaomi.com>
For SDMMC1, IDMA cannot access SRAM123 or SRAM4. Refer to ST AN5200 for
details. This patch makes stm32_dmapreflight check the buffer address and
return an error when the buffer is located in a invalid address space.
This does not fix the hardware limitation but at least makes it visible.
This simplifies the sdmmc driver when the IDMA is in use. There is no need to mix
IDMA and interrupt based transfers; instead, when making unaligned data tranfers,
just make IDMA into an internal aligned buffer and then copy the data.
Signed-off-by: Jukka Laitinen <jukka.laitinen@intel.com>
It should not be an error to clean cache beyond the dma source buffer
boundaries. It would just prematurely push some unrelated data from
cache to memory.
The only case where it would corrupt memory is that there is a dma
destination buffer overlapping the same cache line with the source
buffer. But this can't happen, because a destination buffer must always
be cache-line aligned when using write-back cache.
This patch enables doing dma tx-only transfer from unaligned source
buffer when using write-back cache.
Signed-off-by: Jukka Laitinen <jukka.laitinen@intel.com>
Correct flash write and erase functions, they inherit some
broken code from other platforms. Also fix the confusion between
eraseblock(sector) and page sizes.
Signed-off-by: Jari Nippula <jari.nippula@intel.com>
If the flash option register was locked before modifying it, return
it to the locked state after modify.
Signed-off-by: Jukka Laitinen <jukka.laitinen@intel.com>
Remove support for the Codesourcery, Atollic, DevKitArm, Raisonance, and CodeRed toolchains. Not only are these tools old and no longer used but they are all equivalent to standard ARM EABI toolchains. Retaining specific support has no effect (they are still supported, but now just as generic EABI toolchains).
First, configure the dmacfg in spi_dmarxsetup and spi_dmatxsetup. Then,
check for dmacapable, and only after that set up the dma.
This way the dmacapable actually works, and we don't need to initialize
the dmacfg structures twice.
Signed-off-by: Jukka Laitinen <jukka.laitinen@intel.com>
When starting dma transfer, the dcache for the TX buffer should be cleaned.
"flush" performs also invalidate, which is unnecessary. The TX buffer
can be unaligned to the cahche line in some(most) cases, whereas RX buffer
can never be.
The cache for the receive buffer can be dirty and valid before call to exchange.
Thus another memory access (hitting the same cache line) may corrupt receive data
while waiting for transfer to complete. So the receive buffer should be
invalidated before the transfer
Signed-off-by: Jukka Laitinen <jukka.laitinen@intel.com>
Modify some comments and debug assertions, which inherit from previous versions
and make no sense. Also add a few nerr printouts to make it easier to debug
running out of buffers
Signed-off-by: Jukka Laitinen <jukka.laitinen@intel.com>
See the following commit in SDK:
commit 62a2fb4fd3001aefad9ec3b2e2e7c47e5b0f21e1
Author: SPRESENSE <41312067+SPRESENSE@users.noreply.github.com>
Date: Fri Jan 24 13:32:04 2020 +0900
Enable dummy transfer by SPI using DMA
Signed-off-by: Masayuki Ishikawa <Masayuki.Ishikawa@jp.sony.com>
All complaints fixed except for those that were not possible to fix:
- Used of Mixed case identifier in ESP32 files. These are references to Expressif ROM functions which are outside of the scope of NuttX.
- Remove per-thread errno from the TCB structure (pterrno)
- Remove get_errno() and set_errno() as functions. The macros are still available as stubs and will be needed in the future if we need to access the errno from a different address environment (KERNEL mode).
- Add errno value to the tls_info_s structure definitions
- Move sched/errno to libs/libc/errno. Replace old TCB access to the errno with TLS access to the errno.
Move the logic to get TLS information from an inline function to a normal function. For the unaligned case, it is probably too large to be inlined.
Also fixes some minor things from review of previous commits.
rdrand was checking the wrong return value for the intrinsics
so it would block forever. The read function was also not returning
the actual number of bytes read.
This was tested by running the rand example application
NuttShell (NSH) NuttX-9.0.0
nsh>rand
Reading 8 random numbers
Random values (0x101584f70):
0000: 019a172df7d539f2df8550362e2d3f74 9b467c51ebe30b9f6510e540e34fabcc ...-..9...P6.-?t .F|Q....e..@.O..
Signed-off-by: Brennan Ashton <bashton@brennanashton.com>
The naming standard at https://cwiki.apache.org/confluence/display/NUTTX/Naming+FAQ requires that all architecture-private functions begin with the name of the arch, not up_.
This PR addresses only these name changes for the ARM-private functions up_instack_base() and up_instack_top() which should be called arm_instack_base() and arm_instack_top().
There should be no impact of this change (other that one step toward more consistent naming).
Normal PR checks are sufficient
The naming standard at https://cwiki.apache.org/confluence/display/NUTTX/Naming+FAQ requires that all MCU-private functions begin with the name of the MCU, not up_.
This PR addresses only these name changes for the STM32-private functions up_waste() which should be called stm32_waste.
There should be no impact of this change (other that one step toward more consistent naming).
Normal PR checks are sufficient
Summary
The naming standard at https://cwiki.apache.org/confluence/display/NUTTX/Naming+FAQ requires that all MCU-private functions begin with the name of the architecture, not up_.
This PR addresses function-like macro naming that was missing in previous PRs: up_savestate() and up_restorestate() which must be named arm_savestate() and arm_restorestate().
Impact
There should be no impact of this change (other that one step toward more consistent naming).
Testing
stm32f103-minimum:nsh
The are remaining nxstyle complaints due to the use of mixed case identifiers in arch/arm/src/lc823450/lc823450_irq.c This, cannot be easily fixed since it depends on register definitions in header files that have implications to section other lc823450 files.
Summary
The naming standard at https://cwiki.apache.org/confluence/display/NUTTX/Naming+FAQ requires that all MCU-private functions begin with the name of the architecture, not up_.
This PR addresses only these name changes for the ARM-private functions up_ramvec_initialize() and up_ramvec_attch().
Impact
There should be no impact of this change (other that one step toward more consistent naming).
Testing
stm32f4discovery:netnsh
Summary
The naming standard at https://cwiki.apache.org/confluence/display/NUTTX/Naming+FAQ requires that all MCU-private functions begin with the name of the architecture, not up_.
This PR addresses only these name changes for the ARM-private functions prototyped in arm_internal.h
This change to the files only modifies the name of called functions. nxstyle fixes were made for all core architecture files. However, there are well over 5000 additional complaints from MCU drivers and board logic that are unrelated to to this change but were affected by the name change. It is not humanly possible to fix all of these. I ask that this change be treated like other cosmetic changes that we have done which do not require full nxstyle compliance.
Impact
There should be not impact of this change (other that one step toward more consistent naming).
Testing
stm32f4discovery:netnsh
Summary
The naming standard at https://cwiki.apache.org/confluence/display/NUTTX/Naming+FAQ requires that all MCU-private files begin with the name of the architecture, not up_.
This PR addresses only these name changes for the up_*.S files.
The entire job required to be compatible with that Naming Convention will also require changing the naming of the up_() functions that are used only within arch/arm and board/arm.
Impact
There should be not impact of this change (other that one step toward more consistent naming).
Testing
stm32f4discovery:netnsh
Fix it after the following change:
commit bb4458b63f
Author: Ouss4 <abdelatif.guettouche@gmail.com>
Date: Thu Apr 30 19:05:12 2020 +0100
include/sys/stat.h: Per the POSIX standard, the atime, ctime and mtime field
s
have changed their type from time_t to struct timespec.
Summary
The naming standard at https://cwiki.apache.org/confluence/display/NUTTX/Naming+FAQ requires that all MCU-private files begin with the name of the architecture, not up_.
This PR addresses only these name changes for the up_*.h files. There are only three, but almost 1680 files that include them:
up_arch.h
up_internal.h
up_vfork.h
The only change to the files is from including up_arch.h to arm_arch.h (for example).
The entire job required to be compatible with that Naming Convention will also require changing the naming of the up_() functions that are used only within arch/arm and board/arm.
Impact
There should be not impact of this change (other that one step toward more consistent naming).
Testing
stm32f4discovery:netnsh
Since armv8-m now uses arm_fullcontextrestore instead of up_fullcontextrestore, _exit
should call arm_fullcontextrestore for armv8-m accordingly.
Signed-off-by: liuhaitao <liuhaitao@xiaomi.com>
This files in the arch/arm/src/armv8-m directory were cloned from arch/arm/src/armv7-m. Naming standards were created for the architecture files, function, and variable names: https://cwiki.apache.org/confluence/display/NUTTX/Naming+FAQ
There however were never appliced to arch/arm/src/armv7-m and so this bad naming was inherited by arch/arm/src/armv8-m. This commit corrects the file naming only and makes it compliant with the Naming FAQ.
In a fit of confusion, I accidentally committed PR 879 before it passed its nxstyle check (it did pass all of its build tests, but not the style check). It was really my intention to merge PR878, but I screwed that up and merged 879 instead.
This PR makes amends by passing all of the .c and .h files modified by PR879 through nxstyle and correcting all reported style problems.
Mac OS X was renamed to macOS at some point. Update references to
OSX, OS X, Mac OS X, Mac OSX, and other permutations, to macOS,
in README files and in comments of other files.
1. Add dsp extension; float point based on hardware and software.
2. Delete folder "iar"
3. Add tool chain for cortex-M23 and cortex-M35p
Signed-off-by: qiaowei <qiaowei@xiaomi.com>
Change-Id: I5bfc78abb025adb0ad4fae37e2b444915f477fe7
arch/arm/include/kinetis/kinetis_pmc.h:
* Fix several typos in comments.
* Rewrap some comment lines.
* Fix define KINETIS_PMC_VERSION_UKN: Put -1 in
parenthesis for safety.
* Fix nxstyle complaint regarding long line.
All parts in the STM32H7x3xx family have the same pinmap, etc.,
so extending support to all members of the family required only
minimal changes: Adding them to Kconfig, extending some
preprocessor logic, and minor code changes.
arch/arm/src/stm32h7/Kconfig:
* Add explicit support for all microcontrollers in the
STM32H7x3xx family by adding support for:
- STM32H743AG
- STM32H743AI
- STM32H743BG
- STM32H743BI
- STM32H743IG
- STM32H743II
- STM32H743VG
- STM32H743VI
- STM32H743XG
- STM32H743XI
- STM32H743ZG
- STM32H753AI
- STM32H753BI
- STM32H753VI
- STM32H753XI
- STM32H753ZI
* Fix TODO items for IO_CONFIG (all STM32H7X3XX).
* Because 100-pin parts lack GPIO ports F and G, but have
port H, create the new hidden configs STM32H7_HAVE_GPIOF
and STM32H7_HAVE_GPIOG.
* STM32H7_STM32H7X3XX:
- Select STM32H7_HAVE_GPIOF and STM32H7_HAVE_GPIOG only
when not STM32H7_IO_CONFIG_V (100-pin part).
- STM32H7_STM32H7X3XX: select STM32H7_HAVE_SPI5 for all
IO configs except V (100-pin part), which doesn't expose
SPI5 due to pin count.
* STM32H7_STM32H7X7XX: Always select STM32H7_HAVE_GPIOF and
STM32H7_HAVE_GPIOG because we aren't adding more part
numbers in this family.
* Remove extraneous (duplicate) "bool" and "default n"
lines.
* config STM32H7_FMC: Fix indent (contents were indented
with spaces while rest of file uses tabs).
arch/arm/include/stm32h7/chip.h:
* Extend preprocessor logic to add support for the new
MCU part numbers.
* Expand table of differences between family members.
* Define STM32H7_NGPIO based on IO_CONFIGs decided in Kconfig.
* If IO config is not known, issue compile-time #error
with grep-friendly "CONFIG_STM32H7_IO_CONFIG_x Not Set."
Suggested by davids5.
arch/arm/src/stm32h7/hardware/stm32h7x3xx_gpio.h:
arch/arm/src/stm32h7/stm32h7x3xx_rcc.c:
arch/arm/src/stm32h7/stm32h7x7xx_rcc.c:
* When checking STM32H7_NGPIO > 5 or 6, check also
CONFIG_STM32H7_HAVE_GPIOF or CONFIG_STM32H7_HAVE_GPIOG.
arch/arm/src/stm32h7/stm32_gpio.c:
* stm32_configgpio(): When applicable, make sure we're not
trying to configure one of the missing ports.
* Fix nxstyle complains (wrong end of line comment position
and several long lines). No functional changes.
* g_gpiobase[]: Init base address for ports F and G according to
CONFIG_STM32H7_HAVE_GPIOF and CONFIG_STM32H7_HAVE_GPIOG.
* stm32_configgpio(): Replace complicated check with g_gpiobase[]
null check. Suggested by davids5.
* stm32_gpiowrite() and stm32_gpioread(): Add previously missing
null check of g_gpiobase[].
arch/arm/src/stm32h7/stm32_gpio.h:
* Wrap the defines GPIO_PORTA, GPIO_PORTB, GPIO_PORTC, GPIO_PORTD,
GPIO_PORTE, GPIO_PORTF, GPIO_PORTG, GPIO_PORTH, GPIO_PORTI,
GPIO_PORTJ, and GPIO_PORTK in conditional logic so that the
compiler will prevent use of ports that do not exist on the
target MCU.
* Fix nxstyle complaints.
Documentation/NuttX.html:
* Remove copy-and-pasted anchor for stm32f76xx77xx.
* Correct link to README.txt for Nucleo-H743ZI board,
formerly on BitBucket, now on GitHub.
* Add list item for STMicro STM32H747I-DISCO board.
Co-Authored-By: David Sidrane <David.Sidrane@Nscdg.com>
lpc2148_spi1.c:142:24: warning: initialization of 'uint32_t (*)(struct spi_dev_s *, uint32_t)' {aka 'unsigned int (*)(struct spi_dev_s *, unsigned int)'} from incompatible pointer type 'uint16_t (*)(struct spi_dev_s *, uint16_t)' {aka 'short unsigned int (*)(struct spi_dev_s *, short unsigned int)'} [-Wincompatible-pointer-types]
142 | .send = spi_send,
| ^~~~~~~~
lpc2148_spi1.c:142:24: note: (near initialization for 'g_spiops.send')
In file included from ieee802154/mac802154_bind.c:49:
ieee802154/mac802154_internal.h: In function 'mac802154_setdevmode':
ieee802154/mac802154_internal.h:788:42: warning: converting a packed 'enum ieee802154_devmode_e' pointer (alignment 1) to a 'const union ieee802154_attr_u' pointer (alignment 4) may result in an unaligned pointer value [-Waddress-of-packed-member]
788 | (FAR const union ieee802154_attr_u *)&mode);
| ^~~~~~~~~~~~~~~~~
chip/stm32_hciuart.c: In function 'hciuart_read':
chip/stm32_hciuart.c:2104:30: warning: statement with no effect [-Wunused-value]
2104 | ntotal == (ssize_t)ret;
| ~~~~~~~^~~~~~~~~~~~~~~
wireless/ieee80211/bcm43xxx/bcmf_driver.c: In function 'bcmf_wl_auth_event_handler':
wireless/ieee80211/bcm43xxx/bcmf_driver.c:579:23: warning: taking address of packed member of 'struct bcmf_event_s' may result in an unaligned pointer value [-Waddress-of-packed-member]
579 | type = bcmf_getle32(&event->type);
| ^~~~~~~~~~~~
wireless/ieee80211/bcm43xxx/bcmf_driver.c:580:25: warning: taking address of packed member of 'struct bcmf_event_s' may result in an unaligned pointer value [-Waddress-of-packed-member]
580 | status = bcmf_getle32(&event->status);
| ^~~~~~~~~~~~~~
wireless/ieee80211/bcm43xxx/bcmf_driver.c: In function 'bcmf_wl_scan_event_handler':
wireless/ieee80211/bcm43xxx/bcmf_driver.c:619:25: warning: taking address of packed member of 'struct bcmf_event_s' may result in an unaligned pointer value [-Waddress-of-packed-member]
619 | status = bcmf_getle32(&event->status);
| ^~~~~~~~~~~~~~
wireless/ieee80211/bcm43xxx/bcmf_driver.c:620:35: warning: taking address of packed member of 'struct bcmf_event_s' may result in an unaligned pointer value [-Waddress-of-packed-member]
620 | escan_result_len = bcmf_getle32(&event->len);
| ^~~~~~~~~~~
wireless/ieee80211/bcm43xxx/bcmf_bdc.c: In function 'bcmf_bdc_process_event_frame':
wireless/ieee80211/bcm43xxx/bcmf_bdc.c:166:27: warning: taking address of packed member of 'struct bcmf_event_s' may result in an unaligned pointer value [-Waddress-of-packed-member]
166 | event_id = bcmf_getle32(&event_msg->event.type);
| ^~~~~~~~~~~~~~~~~~~~~~
wireless/ieee80211/bcm43xxx/mmc_sdio.c: In function 'sdio_io_rw_direct':
wireless/ieee80211/bcm43xxx/mmc_sdio.c:157:3: warning: converting a packed 'struct sdio_resp_R5' pointer (alignment 1) to a 'uint32_t' {aka 'unsigned int'} pointer (alignment 4) may result in an unaligned pointer value [-Waddress-of-packed-member]
157 | ret = SDIO_RECVR5(dev, SD_ACMD52, (uint32_t *)&resp);
| ^~~
wireless/ieee80211/bcm43xxx/mmc_sdio.c:79:28: note: defined here
79 | begin_packed_struct struct sdio_resp_R5
| ^~~~~~~~~~~~
wireless/ieee80211/bcm43xxx/mmc_sdio.c: In function 'sdio_io_rw_extended':
wireless/ieee80211/bcm43xxx/mmc_sdio.c:239:11: warning: converting a packed 'struct sdio_resp_R5' pointer (alignment 1) to a 'uint32_t' {aka 'unsigned int'} pointer (alignment 4) may result in an unaligned pointer value [-Waddress-of-packed-member]
239 | ret = SDIO_RECVR5(dev, SD_ACMD53, (uint32_t *)&resp);
| ^~~
wireless/ieee80211/bcm43xxx/mmc_sdio.c:79:28: note: defined here
79 | begin_packed_struct struct sdio_resp_R5
| ^~~~~~~~~~~~
wireless/ieee80211/bcm43xxx/mmc_sdio.c:244:11: warning: converting a packed 'struct sdio_resp_R5' pointer (alignment 1) to a 'uint32_t' {aka 'unsigned int'} pointer (alignment 4) may result in an unaligned pointer value [-Waddress-of-packed-member]
244 | ret = SDIO_RECVR5(dev, SD_ACMD53, (uint32_t *)&resp);
| ^~~
wireless/ieee80211/bcm43xxx/mmc_sdio.c:79:28: note: defined here
79 | begin_packed_struct struct sdio_resp_R5
| ^~~~~~~~~~~~
wireless/ieee80211/bcm43xxx/mmc_sdio.c:257:7: warning: converting a packed 'struct sdio_resp_R5' pointer (alignment 1) to a 'uint32_t' {aka 'unsigned int'} pointer (alignment 4) may result in an unaligned pointer value [-Waddress-of-packed-member]
257 | ret = SDIO_RECVR5(dev, SD_ACMD53, (uint32_t *)&resp);
| ^~~
wireless/ieee80211/bcm43xxx/mmc_sdio.c:79:28: note: defined here
79 | begin_packed_struct struct sdio_resp_R5
| ^~~~~~~~~~~~
wireless/ieee80211/bcm43xxx/mmc_sdio.c:265:3: warning: converting a packed 'struct sdio_resp_R5' pointer (alignment 1) to a 'uint32_t' {aka 'unsigned int'} pointer (alignment 4) may result in an unaligned pointer value [-Waddress-of-packed-member]
265 | SDIO_RECVR1(dev, SD_ACMD52ABRT, (uint32_t *)&resp);
| ^~~~~~~~~~~
wireless/ieee80211/bcm43xxx/mmc_sdio.c:79:28: note: defined here
79 | begin_packed_struct struct sdio_resp_R5
| ^~~~~~~~~~~~
chip/stm32_adc.c: In function 'adc_reset':
chip/stm32_adc.c:2860:7: warning: unused variable 'ret' [-Wunused-variable]
2860 | int ret;
| ^~~
chip/stm32_adc.c: In function 'adc_shutdown':
chip/stm32_adc.c:3044:7: warning: unused variable 'ret' [-Wunused-variable]
3044 | int ret;
| ^~~
chip/stm32_i2c.c:722:12: warning: 'stm32_i2c_sem_wait_noncancelable' defined but not used [-Wunused-function]
722 | static int stm32_i2c_sem_wait_noncancelable(FAR struct i2c_master_s *dev)
| ^~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
wireless/gs2200m.c: In function 'gs2200m_read':
wireless/gs2200m.c:727:20: warning: passing argument 1 of 'nxsem_wait' from incompatible pointer type [-Wincompatible-pointer-types]
727 | ret = nxsem_wait(dev);
| ^~~
| |
| struct gs2200m_dev_s *
.config:1207:warning: symbol value '' invalid for TESTING_OSTEST_FPUSIZE
platform/audio/cxd56_audio_analog.c:69:13: warning: inline function 'cxd56_audio_clock_is_enabled' declared but never defined
69 | inline bool cxd56_audio_clock_is_enabled(void);
| ^~~~~~~~~~~~~~~~~~~~~~~~~~~~
platform/audio/cxd56_audio_analog.c:68:13: warning: inline function 'cxd56_audio_clock_disable' declared but never defined
68 | inline void cxd56_audio_clock_disable(void);
| ^~~~~~~~~~~~~~~~~~~~~~~~~
platform/audio/cxd56_audio_analog.c:67:13: warning: inline function 'cxd56_audio_clock_enable' declared but never defined
67 | inline void cxd56_audio_clock_enable(uint32_t clk, uint32_t div);
| ^~~~~~~~~~~~~~~~~~~~~~~~
chip/stm32_adc.c: In function 'adc_reset':
chip/stm32_adc.c:1348:7: warning: unused variable 'ret' [-Wunused-variable]
1348 | int ret;
| ^~~
chip/stm32_adc.c: In function 'adc_shutdown':
chip/stm32_adc.c:1496:7: warning: unused variable 'ret' [-Wunused-variable]
1496 | int ret;
| ^~~
chip/stm32_i2c.c:729:12: warning: 'stm32_i2c_sem_wait_uninterruptble' defined but not used [-Wunused-function]
729 | static int stm32_i2c_sem_wait_uninterruptble(FAR struct i2c_master_s *dev)
| ^~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
wireless/lpwan/sx127x/sx127x.c:147:52: warning: missing terminating ' character
147 | # warning OOK support is not complete, RX+TX doesn't work yet!
| ^
str71_spi.c:435:24: warning: initialization of 'uint32_t (*)(struct spi_dev_s *, uint32_t)' {aka 'unsigned int (*)(struct spi_dev_s *, unsigned int)'} from incompatible pointer type
'uint16_t (*)(struct spi_dev_s *, uint16_t)' {aka 'short unsigned int (*)(struct spi_dev_s *, short unsigned int)'} [-Wincompatible-pointer-types]
435 | .send = spi_send,
| ^~~~~~~~
str71_spi.c:435:24: note: (near initialization for 'g_spiops.send')
chip/pic32mx-lowconsole.c:147:24: warning: 'pic32mx_getreg' defined but not used [-Wunused-function]
static inline uint32_t pic32mx_getreg(uintptr_t uart_base,
^
chip/pic32mx-gpio.c:113:20: warning: 'pic32mx_value' defined but not used [-Wunused-function]
static inline bool pic32mx_value(uint16_t pinset)
^
chip/pic32mz-gpio.c:124:20: warning: 'pic32mz_value' defined but not used [-Wunused-function]
static inline bool pic32mz_value(pinset_t pinset)
^
chip/pic32mx-usbdev.c:3065:1: warning: 'pic32mx_epreserved' defined but not used [-Wunused-function]
pic32mx_epreserved(struct pic32mx_usbdev_s *priv, int epno)
^
mmcsd/mmcsd_spi.c: In function 'mmcsd_mediachanged':
mmcsd/mmcsd_spi.c:1938:7: warning: 'return' with a value, in function returning void
return ret;
^
In file included from partition/fs_partition.c:42:0:
partition/partition.h:66:19: warning: 'read_partition_block' defined but not used [-Wunused-function]
static inline int read_partition_block(FAR struct partition_state_s *state,
^
local/local_netpoll.c: In function 'local_pollsetup':
local/local_netpoll.c:305:1: warning: label 'pollerr' defined but not used [-Wunused-label]
pollerr:
^~~~~~~
Signed-off-by: Xiang Xiao <xiaoxiang@xiaomi.com>
Change-Id: If3ea8f32b878aa218072130f7c3018f0d3c1aca5
As pointed out by Şükrü Bahadır Arslan in PR765, function calls
inside DEBUGASSERT() will not be executed if DEBUGASSERT is
disabled. Following that PR, I searched for other instances of
similar errors and found four. As there are many thousands of
DEBUGASSERT in the code, this is *not* an exhaustive fix.
arch/arm/src/tms570/tms570_boot.c:
* In function arm_boot(), call tms570_memtest_complete()
outside of the DEBUGASSERT(). Otherwise, if DEBUGASSERT is
disabled, we will never rendezvous with completion of the
test. (Two instances of this fix.)
arch/arm/src/tms570/tms570_clockconfig.c:
* In function tms570_clockconfig(), call
tms570_efc_selftest_complete() outside of the DEBUGASSERT()
for the same reason as above.
boards/arm/sam34/sam4s-xplained-pro/src/sam_boot.c:
* In function board_late_initialize(), call
sam_watchdog_initialize() outside of the DEBUGASSERT() for
the same reason as above.
Run all files modified by PR 766 through nxstyle and fix any resulting complaints.
NOTE: Numerous "Mixed case identifier" errors in arch/arm/src/cxd56xx/cxd56_gnss.c were not fixed because this problem is of much larger scope than this file.
This commit resolves issue #620:
Remove CONFIG_CAN_PASS_STRUCTS #620
The configuration option CONFIG_CAN_PASS_STRUCTS was added many years ago to support an old version of the SDCC compiler. That compiler is currently used only with the Z80 and Z180 targets. The limitation of that old compiler was that it could not pass structures or unions as either inputs or outputs. For example:
#ifdef CONFIG_CAN_PASS_STRUCTS
struct mallinfo mallinfo(void);
#else
int mallinfo(FAR struct mallinfo *info);
#endif
And even leads to violation of a few POSIX interfaces like:
#ifdef CONFIG_CAN_PASS_STRUCTS
int sigqueue(int pid, int signo, union sigval value);
#else
int sigqueue(int pid, int signo, FAR void *sival_ptr);
#endif
This breaks the 1st INVIOLABLES rule:
Strict POSIX compliance
-----------------------
o Strict conformance to the portable standard OS interface as defined at
OpenGroup.org.
o A deeply embedded system requires some special support. Special
support must be minimized.
o The portable interface must never be compromised only for the sake of
expediency.
o Expediency or even improved performance are not justifications for
violation of the strict POSIX interface
Also, it appears that the current SDCC compilers have resolve this issue and so, perhaps, this is no longer a problem: z88dk/z88dk#1132
NOTE: This commit cannot pass the PR checks because it depends on matching changes to the apps/ directory.
So call 'make EXTRAFLAGS=-Wno-cpp' could suppress the warnings with pre-processor
directive #warning in GCC.
Change-Id: Iaa618238924c9969bf91db22117b39e6d2fc9bb6
Signed-off-by: liuhaitao <liuhaitao@xiaomi.com>
- inline functions within mpu.h converted to macros or moved to up_mpu.c
- mpu.h and up_mpu.c are now conditionally included in build via CONFIG_ARM_MPU
Chips affected by these changes
- imxrt
- kinetis
- lpc17xx
- lpc43xx
- lpc54xx
- sam34
- stm32
- stm32f7
- stm32h7
- stm32l4
- tiva
- xmc4
