raiden00pl
4306910000
stm32/hardware/stm32_tim.h: fix comments
2021-03-30 01:13:39 -05:00
raiden00pl
5276077530
stm32/Kconfig: add STM32_HAVE_ADC1 option for consistency
2021-03-30 01:13:39 -05:00
raiden00pl
466ceb92cb
stm32/Kconfig: cosmetics for quenco options
2021-03-30 01:13:39 -05:00
raiden00pl
b16d5341d8
stm32/stm32_serial.c: simplify DMA #ifdefs
2021-03-29 21:39:35 -03:00
raiden00pl
3c34337064
stm32: add support for serial TX DMA
2021-03-29 21:39:35 -03:00
raiden00pl
0cca102d41
stm32: fix USART1 clock for STM32F302
2021-03-29 21:39:35 -03:00
Roberto Bucher
590ee65fa7
Integration of pysimCoder with NUTTX
2021-03-29 21:38:58 -03:00
raiden00pl
63a4807f28
stm32/stm32_pwm: add interfaces to access RCR register and add interface to modify TRGO
2021-03-29 21:37:41 -03:00
raiden00pl
94ff4564b4
stm32/stm32_adc.c: move maximum number of samples cfg to Kconfig.
...
The maximum number of samples which can be handled without overrun depends on various factors.
This is the user's responsibility to correctly select this value.
Since the interfece to update the sampling time is available for all supported devices,
the user can change the default vaules in the board initialization logic and avoid ADC overrun.
2021-03-29 21:35:46 -03:00
raiden00pl
88753afb75
stm32/stm32_adc.c: fix enable/disable interrupts logic for coupled ADC
2021-03-29 21:35:46 -03:00
raiden00pl
166bf0434b
stm32/stm32_adc.c: add an option to configure ANIOC_TRIGGER behavior
2021-03-29 21:35:46 -03:00
raiden00pl
58a03302d2
stm32/stm32_adc.c: add an option to configure SCAN mode for ADC IPv1
2021-03-29 21:35:46 -03:00
raiden00pl
e10a6647e9
stm32/stm32_adc.c: fix initial sample time write
2021-03-29 21:35:46 -03:00
Matias N
1b8a690b7c
sim: only abort sim in assertion if in interrupt context/IDLE task
...
This fixes the problem that an assertion in sim build aborted NuttX
even when the assertion was generated from userspace (in which case
simpy the task needs to exit). This required moving the relevant code
into the sim blob.
2021-03-29 06:57:18 -06:00
Brennan Ashton
6657d151ca
Fix indexing for stm32h7 usbhost tracing
2021-03-29 03:51:52 -05:00
Brennan Ashton
6106557034
usbhost: Add usb host tracing strings to stm32h7
2021-03-28 23:30:08 -05:00
Brennan Ashton
0a3b20e546
syslog: Drop extra carriage return from syslog calls
2021-03-28 21:24:00 -05:00
Alin Jerpelea
32894cda1c
arch: arm: sam: fix Mixed Case Errors
...
fix Mixed Case Errors to pass CI
Signed-off-by: Alin Jerpelea <alin.jerpelea@sony.com>
2021-03-28 13:34:50 -07:00
Alin Jerpelea
60424bc762
arch: arm: sam: fix nxstyle errors
...
Fix nxstyle errors to pass CI
Signed-off-by: Alin Jerpelea <alin.jerpelea@sony.com>
2021-03-28 13:34:50 -07:00
Alin Jerpelea
56471c77b3
arch: arm: sam: Author Gregory Nutt: update licenses to Apache
...
Gregory Nutt has submitted the SGA and we can migrate the licenses
to Apache.
Signed-off-by: Alin Jerpelea <alin.jerpelea@sony.com>
2021-03-28 13:34:50 -07:00
hotislandn
6aa86b469c
arch:rv64:c906:add PMP, change mem map for protect build.
...
Signed-off-by: hotislandn <hotislandn@hotmail.com>
2021-03-28 09:02:48 -05:00
Alin Jerpelea
20ce2f274a
arch: arm: lpc17xx_40xx: fix nxstyle errors
...
Fix nxstyle errors to pass CI
Signed-off-by: Alin Jerpelea <alin.jerpelea@sony.com>
2021-03-28 00:32:09 -05:00
Alin Jerpelea
75a8f353d4
arch: arm: lpcxxxx: Author Gregory Nutt: update licenses to Apache
...
Gregory Nutt has submitted the SGA and we can migrate the licenses
to Apache.
Signed-off-by: Alin Jerpelea <alin.jerpelea@sony.com>
2021-03-28 00:32:09 -05:00
Gustavo Henrique Nihei
96037f01d5
xtensa/esp32: Clean up unused include headers from DMA driver
2021-03-26 23:40:44 -05:00
Gustavo Henrique Nihei
d3342795a8
xtensa/esp32: Fix wrong math round operation on DMA init
2021-03-26 23:40:44 -05:00
Gustavo Henrique Nihei
eb505ed866
xtensa/esp32: Fix DMA burst mode being unintendedly disabled
2021-03-26 23:39:53 -05:00
Alin Jerpelea
bc794bcafe
arch: arm: s32k1xx: fix nxstyle errors
...
Fix nxstyle errors to pass CI
Signed-off-by: Alin Jerpelea <alin.jerpelea@sony.com>
2021-03-26 23:39:15 -05:00
Alin Jerpelea
253d7e2b7a
arch: arm: s32k1xx: Author Gregory Nutt: update licenses to Apache
...
Gregory Nutt has submitted the SGA and we can migrate the licenses
to Apache.
Signed-off-by: Alin Jerpelea <alin.jerpelea@sony.com>
2021-03-26 23:39:15 -05:00
Huang Qi
2e2af6e3d7
arch/arm: Use macro defined swi range in dispatch_syscall
...
Signed-off-by: Huang Qi <huangqi3@xiaomi.com>
Change-Id: Ia8503a13c5b04fa8cc13cee74b75b19623986c1d
2021-03-26 09:13:59 -07:00
Alin Jerpelea
575022debc
arch: arm: kinetis: fix Mixed Case error
...
Fix Mixed Case error to pass CI
Signed-off-by: Alin Jerpelea <alin.jerpelea@sony.com>
2021-03-26 09:03:11 -07:00
Alin Jerpelea
fafecbf107
arch: arm: kinetis: fix nxstyle errors
...
Fix nxstyle errors to pass CI
Signed-off-by: Alin Jerpelea <alin.jerpelea@sony.com>
2021-03-26 09:03:11 -07:00
Alin Jerpelea
d5beb72299
arch: arm: kinetis: Author Gregory Nutt: update licenses to Apache
...
Gregory Nutt has submitted the SGA and we can migrate the licenses
to Apache.
Signed-off-by: Alin Jerpelea <alin.jerpelea@sony.com>
2021-03-26 09:03:11 -07:00
Alin Jerpelea
cb296ee0e8
arch: arm: max326xx: fix nxstyle errors
...
Fix nxstyle errors to pass CI
Signed-off-by: Alin Jerpelea <alin.jerpelea@sony.com>
2021-03-26 09:01:37 -07:00
Alin Jerpelea
33eadd0a9a
arch: arm: max326xx: Author Gregory Nutt: update licenses to Apache
...
Gregory Nutt has submitted the SGA and we can migrate the licenses
to Apache.
Signed-off-by: Alin Jerpelea <alin.jerpelea@sony.com>
2021-03-26 09:01:37 -07:00
Xiang Xiao
4e66d55a17
arch/arm: Fix the style warning
...
Signed-off-by: Xiang Xiao <xiaoxiang@xiaomi.com>
2021-03-26 17:01:24 +01:00
Alin Jerpelea
ee32535bc9
arch: arm: nuc1xx: fix nxstyle errors
...
Fix nxstyle errors to pass CI
Signed-off-by: Alin Jerpelea <alin.jerpelea@sony.com>
2021-03-26 09:44:34 -05:00
Alin Jerpelea
dd9d21be87
arch: arm: nuc1xx: Author Gregory Nutt: update licenses to Apache
...
Gregory Nutt has submitted the SGA and we can migrate the licenses
to Apache.
Signed-off-by: Alin Jerpelea <alin.jerpelea@sony.com>
2021-03-26 09:44:34 -05:00
Alan Carvalho de Assis
76c02afc48
esp32c3-devkit: Add board support for SPIFlash
...
Co-authored-by: Abdelatif Guettouche <abdelatif.guettouche@espressif.com>
2021-03-26 09:19:25 +01:00
Alan Carvalho de Assis
4f8ff0765f
risc-v/esp32c3: Add SPIFlash support
...
Co-Authored-By: Dong Heng <dongheng@espressif.com>
Co-authored-by: Gustavo Henrique Nihei <gustavo.nihei@espressif.com>
Co-authored-by: Abdelatif Guettouche <abdelatif.guettouche@espressif.com>
2021-03-26 09:19:25 +01:00
Alin Jerpelea
da65128b8c
arch: arm: armv8-m: fix nxstyle errors
...
Fix nxstyle errors to pass CI
Signed-off-by: Alin Jerpelea <alin.jerpelea@sony.com>
2021-03-25 19:42:44 -07:00
Alin Jerpelea
df7bffe8fd
arch: arm: armv7-r: fix nxstyle errors
...
Fix nxstyle errors to pass CI
Signed-off-by: Alin Jerpelea <alin.jerpelea@sony.com>
2021-03-25 19:42:44 -07:00
Alin Jerpelea
2a9e424f9a
arch: arm: armv7-r: Author Gregory Nutt: update licenses to Apache
...
Gregory Nutt has submitted the SGA and we can migrate the licenses
to Apache.
Signed-off-by: Alin Jerpelea <alin.jerpelea@sony.com>
2021-03-25 19:42:44 -07:00
Alin Jerpelea
3ea545e7f3
arch: arm: armv7-a: fix nxstyle errors
...
Fix nxstyle errors to pass CI
Signed-off-by: Alin Jerpelea <alin.jerpelea@sony.com>
2021-03-25 19:42:44 -07:00
Alin Jerpelea
1d1da330da
arch: arm: armv7-a: Author Gregory Nutt: update licenses to Apache
...
Gregory Nutt has submitted the SGA and we can migrate the licenses
to Apache.
Signed-off-by: Alin Jerpelea <alin.jerpelea@sony.com>
2021-03-25 19:42:44 -07:00
Alin Jerpelea
8dc6fc74eb
arch: arm: armv7-m: fix nxstyle errors
...
Fix nxstyle errors to pass CI
Signed-off-by: Alin Jerpelea <alin.jerpelea@sony.com>
2021-03-25 19:42:44 -07:00
Alin Jerpelea
b2cd6fb980
arch: arm: armv6-m: fix nxstyle errors
...
Fix nxstyle errors to pass CI
Signed-off-by: Alin Jerpelea <alin.jerpelea@sony.com>
2021-03-25 19:42:44 -07:00
Alin Jerpelea
2f2bda3385
arch: arm: armv6-m: Author Gregory Nutt: update licenses to Apache
...
Gregory Nutt has submitted the SGA and we can migrate the licenses
to Apache.
Signed-off-by: Alin Jerpelea <alin.jerpelea@sony.com>
2021-03-25 19:42:44 -07:00
Alin Jerpelea
1809d56982
arch: arm: arm: Author Gregory Nutt: update licenses to Apache
...
Gregory Nutt has submitted the SGA and we can migrate the licenses
to Apache.
Signed-off-by: Alin Jerpelea <alin.jerpelea@sony.com>
2021-03-25 19:42:44 -07:00
mage1
5340fde427
sim: fix signal deliver calling error on sim platform
...
since the signal deliver handler should be called in signal owner task.
Change-Id: Ic55c08d1a880069864eddda8dab945ce677792d7
2021-03-25 19:42:31 -07:00
Alin Jerpelea
01cde40bdc
arch: arm: imx: fix nxstyle errors
...
Fix nxstyle errors to pass CI
Signed-off-by: Alin Jerpelea <alin.jerpelea@sony.com>
2021-03-25 19:41:36 -07:00
Alin Jerpelea
188a76f1f9
arch: arm: imx: Author Gregory Nutt: update licenses to Apache
...
Gregory Nutt has submitted the SGA and we can migrate the licenses
to Apache.
Signed-off-by: Alin Jerpelea <alin.jerpelea@sony.com>
2021-03-25 19:41:36 -07:00
David Sidrane
9e881449d9
tiva:cc13x0_adi3_refsys fix typo
2021-03-25 10:53:24 -07:00
Alin Jerpelea
307b6ed7ca
arch: arm: efm32: fix Mixed case identifier found error
...
fix Mixed case identifier errors reported by nxstyle
Signed-off-by: Alin Jerpelea <alin.jerpelea@sony.com>
2021-03-25 10:53:13 -07:00
Alin Jerpelea
a1b653d8b6
arch: arm: efm32: fix nxstyle errors
...
Fix nxstyle errors to pass CI
Signed-off-by: Alin Jerpelea <alin.jerpelea@sony.com>
2021-03-25 10:53:13 -07:00
Alin Jerpelea
de435a8a1e
arch: arm: efm32: Author Gregory Nutt: update licenses to Apache
...
Gregory Nutt has submitted the SGA and we can migrate the licenses
to Apache.
Signed-off-by: Alin Jerpelea <alin.jerpelea@sony.com>
2021-03-25 10:53:13 -07:00
Dong Heng
c55085c0d8
riscv/esp32c3: Add standard C atomic function
2021-03-25 12:02:48 -03:00
Virus.V
7c80826c21
risc-v/bl602: Add wifi and ble support
...
tcpip ok
update wifi demo configuration
fix tcpip input cause misalign fault
change some api definetions in nuttx
fix wifi manager strlen copy without suffix null character
fix 602 network buf allocation issue
wifi scan works
[ble] Add controller code
[BLE] Add nuttx adapt code for blecontroller .
[BLE] modified include file path, to fix cflag is too long.
[ble]Test ble peripheral pass, save code.
[ble] Organize the code
[BLE] Add blecontroller config for nuttx
[BLE] Add config for ble example
fix tcp lost packet when rx
support wpa3.
Copy default config from wifi default config. Create ble for local test and ble tester for autopts.
Add config for local test.
Add pts teset config for host test
Add config for mesh test
Create task to init blecontroller
Delete blecontroller rx thread.
using idle task to receive hci command from host
Set ble device name to /dev/ble, and fix code.
1.fix a ke schedule risk 2. CFG_HOST is enabled only in the case that CONFIG_BLE_HOST_DISABLE is not enabled, by lanlan
rm _sp_main stack.
change h/l workq_stack_size 6K
change l workq_stack_size 3K.
[ble] delete file_detach
color idle stack.
clear bl602 netdev code
SCAN is sorted according to RSSI
enlarge nsh command line buffer
fixup stack overflow check checkfail when startup
arch/risc-v/BL602:fix reboot cause crash
reboot default use romapi.
riscv/bl602:netdev support defered input, remove wifi_tx function
risc-v/bl602:fix sem_timedwait usage error in bl_cmds
risc-v/bl602:fix memory access out of bounds when copy ssid
remove ble and wifi source, download when build
add bl602 blob gitignore
risc-v/bl602:remove ble-pts defconfig
Fix some typos in NuttX style naming
Fix the replacement of tab to space
fix wlan interface down still receive packet
fix wapi crash, rx when ifdown,and ble_hci_rx_do
change system reset to rom dirver
change ble hci interval to 50ms
NuttX support wifi enable/disable log via KConfig
support country code configuration in Kconfig
fix ap tx not work
2021-03-25 01:38:45 -07:00
Alin Jerpelea
cf2aed1810
arch: arm: cm320: fix nxstyle errors
...
Fix nxstyle errors to pass CI
Signed-off-by: Alin Jerpelea <alin.jerpelea@sony.com>
2021-03-25 01:34:38 -07:00
Alin Jerpelea
17af7179a6
arch: arm: cm320: Author Gregory Nutt: update licenses to Apache
...
Gregory Nutt has submitted the SGA and we can migrate the licenses
to Apache.
Signed-off-by: Alin Jerpelea <alin.jerpelea@sony.com>
2021-03-25 01:34:38 -07:00
Alin Jerpelea
5419901c7b
arch: arm: common: nxstyle fixes
...
nxstyle files to pass CI
Signed-off-by: Alin Jerpelea <alin.jerpelea@sony.com>
2021-03-25 01:34:38 -07:00
Alin Jerpelea
42ed13aa4d
arch: arm: common: Author Gregory Nutt: update licenses to Apache
...
Gregory Nutt has submitted the SGA and we can migrate the licenses
to Apache.
Signed-off-by: Alin Jerpelea <alin.jerpelea@sony.com>
2021-03-25 01:34:38 -07:00
Alin Jerpelea
d1e4a0cc28
arch: arm: c5471: fix nxstyle errors
...
Fi nxstyle errors to pass CI
Signed-off-by: Alin Jerpelea <alin.jerpelea@sony.com>
2021-03-25 01:34:38 -07:00
Alin Jerpelea
197729e1ff
arch: arm: c5471: Author Gregory Nutt: update licenses to Apache
...
Gregory Nutt has submitted the SGA and we can migrate the licenses
to Apache.
Signed-off-by: Alin Jerpelea <alin.jerpelea@sony.com>
2021-03-25 01:34:38 -07:00
Alin Jerpelea
532640d383
arch: arm: am335x: fix nxstyle errors
...
Fi nxstyle errors to pass CI
Signed-off-by: Alin Jerpelea <alin.jerpelea@sony.com>
2021-03-25 01:34:38 -07:00
Alin Jerpelea
a6b7c024de
arch: arm: am335x: Author Gregory Nutt: update licenses to Apache
...
Gregory Nutt has submitted the SGA and we can migrate the licenses
to Apache.
Signed-off-by: Alin Jerpelea <alin.jerpelea@sony.com>
2021-03-25 01:34:38 -07:00
Alin Jerpelea
b5fd0af658
arch: arm: a1x: fix nxstyle errors
...
Fix nxstyle errors to pass CI
Signed-off-by: Alin Jerpelea <alin.jerpelea@sony.com>
2021-03-25 01:34:38 -07:00
Alin Jerpelea
f2813416d1
arch: arm: a1x: Author Gregory Nutt: update licenses to Apache
...
Gregory Nutt has submitted the SGA and we can migrate the licenses
to Apache.
Signed-off-by: Alin Jerpelea <alin.jerpelea@sony.com>
2021-03-25 01:34:38 -07:00
Alin Jerpelea
63a35488a8
arch: arm: kl: fix nxstyle errors
...
Fix nxstyle errors to pass CI
Signed-off-by: Alin Jerpelea <alin.jerpelea@sony.com>
2021-03-24 23:58:46 -07:00
Alin Jerpelea
f707d3f78e
arch: arm: kl: Author Gregory Nutt: update licenses to Apache
...
Gregory Nutt has submitted the SGA and we can migrate the licenses
to Apache.
Signed-off-by: Alin Jerpelea <alin.jerpelea@sony.com>
2021-03-24 23:58:46 -07:00
Alin Jerpelea
7869b7185b
arch: arm: xmc4: fix nxstyle errors
...
Fix nxstyle errors to pass CI
Signed-off-by: Alin Jerpelea <alin.jerpelea@sony.com>
2021-03-24 23:58:46 -07:00
Alin Jerpelea
f2f0193960
arch: arm: xmc4: Author Gregory Nutt: update licenses to Apache
...
Gregory Nutt has submitted the SGA and we can migrate the licenses
to Apache.
Signed-off-by: Alin Jerpelea <alin.jerpelea@sony.com>
2021-03-24 23:58:46 -07:00
Alin Jerpelea
d83628af1d
arch: arm: tms570: fix nxstyle errors
...
Fix nxstyle errors to pass CI
Signed-off-by: Alin Jerpelea <alin.jerpelea@sony.com>
2021-03-24 23:58:46 -07:00
Alin Jerpelea
0308842cf2
arch: arm: tms570: Author Gregory Nutt: update licenses to Apache
...
Gregory Nutt has submitted the SGA and we can migrate the licenses
to Apache.
Signed-off-by: Alin Jerpelea <alin.jerpelea@sony.com>
2021-03-24 23:58:46 -07:00
Alin Jerpelea
29bf33839b
arch: arm: str71x: fix nxstyle errors
...
Fix nxstyle errors to pass CI
Signed-off-by: Alin Jerpelea <alin.jerpelea@sony.com>
2021-03-24 23:58:46 -07:00
Alin Jerpelea
f30b6f9532
arch: arm: str71x: Author Gregory Nutt: update licenses to Apache
...
Gregory Nutt has submitted the SGA and we can migrate the licenses
to Apache.
Signed-off-by: Alin Jerpelea <alin.jerpelea@sony.com>
2021-03-24 23:58:46 -07:00
Alin Jerpelea
7511dbd814
arch: arm: nrf52: fix nxstyle errors
...
Fix nxstyle errors to pass CI
Signed-off-by: Alin Jerpelea <alin.jerpelea@sony.com>
2021-03-24 23:58:46 -07:00
Alin Jerpelea
5867ddac59
arch: arm: nrf52: Author Gregory Nutt: update licenses to Apache
...
Gregory Nutt has submitted the SGA and we can migrate the licenses
to Apache.
Signed-off-by: Alin Jerpelea <alin.jerpelea@sony.com>
2021-03-24 23:58:46 -07:00
Alin Jerpelea
5360d9b23f
arch: arm: moxart: fix nxstyle errors
...
Fix nxstyle errors to pass CI
Signed-off-by: Alin Jerpelea <alin.jerpelea@sony.com>
2021-03-24 23:58:46 -07:00
Alin Jerpelea
dcfea2ad89
arch: arm: moxart: Author Gregory Nutt: update licenses to Apache
...
Gregory Nutt has submitted the SGA and we can migrate the licenses
to Apache.
Signed-off-by: Alin Jerpelea <alin.jerpelea@sony.com>
2021-03-24 23:58:46 -07:00
Alin Jerpelea
df6cc29957
arch: arm: lc823450: fix nxstyle errors
...
Fix nxstyle errors to pass CI
Signed-off-by: Alin Jerpelea <alin.jerpelea@sony.com>
2021-03-24 23:58:46 -07:00
Alin Jerpelea
d6e16cac0b
arch: arm: lc823450: Author Gregory Nutt: update licenses to Apache
...
Gregory Nutt has submitted the SGA and we can migrate the licenses
to Apache.
Signed-off-by: Alin Jerpelea <alin.jerpelea@sony.com>
2021-03-24 23:58:46 -07:00
Alin Jerpelea
295f8c2cac
arch: arm: eoss3: fix nxstyle errors
...
Fix nxstyle errors to pass CI
Signed-off-by: Alin Jerpelea <alin.jerpelea@sony.com>
2021-03-24 23:58:46 -07:00
Alin Jerpelea
5239764f67
arch: arm: tiva: fix Mixed case identifier errors
...
fix nxstyle error for Mixed Case Identifier
Signed-off-by: Alin Jerpelea <alin.jerpelea@sony.com>
2021-03-24 23:49:48 -07:00
Alin Jerpelea
648b2669d1
arch: arm: tiva: fix nxstyle errors
...
Fix nxstyle errors to pass CI
Signed-off-by: Alin Jerpelea <alin.jerpelea@sony.com>
2021-03-24 23:49:48 -07:00
Alin Jerpelea
fa0dd46c6c
arch: arm: tiva: Author Gregory Nutt: update licenses to Apache
...
Gregory Nutt has submitted the SGA and we can migrate the licenses
to Apache.
Signed-off-by: Alin Jerpelea <alin.jerpelea@sony.com>
2021-03-24 23:49:48 -07:00
Jonathan
1ec65ee5e7
samv7: Fix sam_putreg() parameter type
...
Fix sam_getreg() parameter
Fixing file style to pass in CI
2021-03-24 21:27:44 -07:00
Nathan Hartman
93f0912b09
arch/stm32h7 - Fix compiler warnings and error in stm32_dma.c
...
arch/arm/src/stm32h7/stm32_dma.c:
* Include <inttypes.h> explicitly for format specifiers.
* In functions stm32_mdma_capable(), stm32_mdma_dump(),
stm32_sdma_setup(), stm32_sdma_capable(), stm32_sdma_dump(),
stm32_bdma_setup(), stm32_bdma_capable(), stm32_bdma_dump(),
stm32_dmamux_dump(), stm32_dmachannel(), stm32_dmafree(), and
stm32_dmadump():
Where appropriate, use format specifiers from <inttypes.h> in
calls to dmainfo(). This removes numerous compiler warnings
like:
warning: format '%x' expects argument of type 'unsigned int',
but argument 3 has type 'uint32_t {aka long unsigned int}'
[-Wformat=]
* In function stm32_mdma_disable():
Remove wrong redefinition of 'dmachan' parameter as a local
variable. This fixes the following compiler error that occurs
when building with CONFIG_STM32H7_MDMA:
chip/stm32_dma.c:930:17: error: 'dmachan' redeclared as
different kind of symbol
DMA_CHANNEL dmachan = (DMA_CHANNEL)handle;
^~~~~~~
chip/stm32_dma.c:928:44: note: previous definition of 'dmachan'
was here
static void stm32_mdma_disable(DMA_CHANNEL dmachan)
^~~~~~~
chip/stm32_dma.c:930:43: error: 'handle' undeclared (first use
in this function); did you mean 'random'?
DMA_CHANNEL dmachan = (DMA_CHANNEL)handle;
^~~~~~
random
2021-03-24 21:21:57 -07:00
Sara Souza
59313c86d1
xtensa/esp32: Adds oneshot timer driver.
2021-03-24 16:01:26 -03:00
David Sidrane
21159666fc
stm32h7:SPI Fix 16 bit SPI mode
2021-03-24 15:17:20 -03:00
Petteri Aimonen
3dfc4e0afd
STM32 USB OTGFSDEV: Update comments
2021-03-24 11:12:40 -07:00
Petteri Aimonen
18bfef1b38
STM32 USB OTGFSDEV: Fix code style issues
2021-03-24 11:12:40 -07:00
Petteri Aimonen
3c610d5d70
STM32 USB OTGFSDEV: Fix handling of SETUP OUT longer than 64 bytes.
...
For example Windows RNDIS driver issues SETUP requests that are 76 bytes
long. Previously NuttX would read them all, but only if they arrive at
the same time. If host transfer scheduling causes a pause between the
two DATA packets, stm32_ep0out_receive() would proceed with an incomplete
transfer. The rest of the data could either be skipped by the error handler
branch, or be left in NAK state forever, stopping any further communication
on the endpoint.
This commit changes it so that the whole transfer has to be received before
SETUP handler is called. Depending on CONFIG_USBDEV_SETUP_MAXDATASIZE any
excess bytes will be discarded, but doing this in a controlled way ensures
deterministic behavior. In the specific case of RNDIS, the trailing bytes
are unused padding bytes and can be safely discarded.
2021-03-24 11:12:40 -07:00
Roberto Bucher
9a2cb311a3
File for the integration of pysimCoder with NUTTX
2021-03-23 20:37:56 -03:00
chenwen
f54aef9977
xtensa/esp32: Support esp32 wireless ioctl cmd
2021-03-23 16:29:52 -03:00
YAMAMOTO Takashi
7f8d0c327b
sim: Add dlsym to nuttx-names.in
...
Fixes the following crash with CONFIG_SIM_SANITIZE=y on Linux.
```
Program received signal SIGSEGV, Segmentation fault.
getpid () at task/task_getpid.c:76
76 task/task_getpid.c: No such file or directory.
rax 0x2feeb4 3141300
rbx 0xc53f83 12926851
rcx 0x6837665ee4c00 1833394399759360
rdx 0x472080 4661376
rsi 0xc53f83 12926851
rdi 0xffffffffffffffff -1
rbp 0x7ffe4cdfe140 0x7ffe4cdfe140
rsp 0x7ffe4cdfe0f0 0x7ffe4cdfe0f0
r8 0xffffffffffffffff -1
r9 0x0 0
r10 0x22 34
r11 0x246 582
r12 0x472080 4661376
r13 0x7ffe4cdfe3e8 140730188162024
r14 0x472080 4661376
r15 0xf60398 16122776
rip 0x4e9b93 0x4e9b93 <getpid+35>
eflags 0x10206 [ PF IF RF ]
cs 0x33 51
ss 0x2b 43
ds 0x0 0
es 0x0 0
fs 0x0 0
gs 0x0 0
#0 getpid () at task/task_getpid.c:76
#1 0x00000000006ad25a in modlib_registry_lock () at modlib/modlib_registry.c:89
#2 0x0000000000c3648d in modsym (handle=0xffffffffffffffff, name=0xc53f83 "mmap") at module/mod_modsym.c:77
#3 0x0000000000c2cd3a in dlsym (handle=0xffffffffffffffff, name=0xc53f83 "mmap") at dlfcn/lib_dlsym.c:149
#4 0x00000000004a0034 in __interception::InterceptFunction(char const*, unsigned long*, unsigned long, unsigned long) ()
#5 0x000000000048181e in InitializeCommonInterceptors() ()
#6 0x000000000048106a in __asan::InitializeAsanInterceptors() ()
#7 0x000000000049b85e in __asan::AsanInitInternal() ()
#8 0x00007f09cfb04ce6 in ?? () from /lib64/ld-linux-x86-64.so.2
#9 0x00007f09cfaf413a in ?? () from /lib64/ld-linux-x86-64.so.2
#10 0x0000000000000001 in ?? ()
#11 0x00007ffe4cdfff56 in ?? ()
#12 0x0000000000000000 in ?? ()
```
2021-03-23 07:27:09 -07:00
Xiang Xiao
6f6a5a7cb2
arch/arm: Fix nxstyle warning in stm32h7/stm32_dma.c
...
Signed-off-by: Xiang Xiao <xiaoxiang@xiaomi.com>
2021-03-23 13:57:31 +01:00
YAMAMOTO Takashi
6797826b84
arch/sim/src/sim/up_hostmemory.c: build fix for older macOS versions
...
I'm still using 10.14 (Mojave) for nuttx related things.
Note: the CI is using 10.15. (Catalina)
2021-03-23 02:48:50 -07:00
Masayuki Ishikawa
083a11a3c3
arch: sim: Fix sim_sigdeliver() for SMP
...
Summary:
- In the previous implementation, signal handling for SMP was done
in a critical section that is not correct
- This commit fixes this issue
Impact:
- signal handling for SMP
Testing:
- Tested with ostest
Signed-off-by: Masayuki Ishikawa <Masayuki.Ishikawa@jp.sony.com>
2021-03-23 00:41:57 -07:00
Abdelatif Guettouche
fcafacb9a3
esp32_allocateheap.c: Adjust the region of the heap coming from the
...
external memory when a BSS section is allowed to reside there.
Signed-off-by: Abdelatif Guettouche <abdelatif.guettouche@espressif.com>
2021-03-23 16:39:01 +09:00
Abdelatif Guettouche
cc23bdeca4
boards/xtensa/esp32: Add a section in external memory to hold some BSS
...
data.
Signed-off-by: Abdelatif Guettouche <abdelatif.guettouche@espressif.com>
2021-03-23 16:39:01 +09:00
David Sidrane
9800256507
stm32h7:DMA BDMA does not auto disabled on completion
2021-03-22 19:50:53 -07:00
YAMAMOTO Takashi
37300a43a5
esp32_part_ioctl: Return -ENOTTY for unknown commands
...
It's traditional to use ENOTTY for this purpose.
Littlefs seems to rely on this behavior for BIOC_FLUSH.
Also, drop the log level.
2021-03-22 19:49:27 -07:00
Nathan Hartman
f83b30bda1
arch/stm32: Fix wrong Kconfig names for STM32G4xxx MCUs
...
arch/arm/src/stm32/Kconfig:
* configs ARCH_CHIP_STM32G431K, ARCH_CHIP_STM32G431C,
ARCH_CHIP_STM32G431R, ARCH_CHIP_STM32G431M, and
ARCH_CHIP_STM32G431V: Fix copy/paste of incorrect
names shown in the Kconfig menu.
2021-03-22 19:47:32 -07:00
Alin Jerpelea
1fdae80321
arch: arm: kinetis: fix nxstyle errors
...
fix nxstyle errors to pass CI
Signed-off-by: Alin Jerpelea <alin.jerpelea@sony.com>
2021-03-22 19:28:38 -07:00
Alin Jerpelea
b6a987afe0
arch: arm: imxrt: nxstyle fix
...
nxstyle is complaining that the headers are defines outside
Included Files section and we have to duplicate the definitions
to the imported files to avoid build errors.
Signed-off-by: Alin Jerpelea <alin.jerpelea@sony.com>
2021-03-22 19:28:38 -07:00
Alin Jerpelea
881cfe4b70
arch: arm: kl: fix Mixed case identifier
...
Mixed case identifier fix to pass CI
Signed-off-by: Alin Jerpelea <alin.jerpelea@sony.com>
2021-03-22 19:28:38 -07:00
Alin Jerpelea
ee0861ae7a
arch: arm: fixes for nxstyle errors
...
Nxstyle error fixes to pass CI
Signed-off-by: Alin Jerpelea <alin.jerpelea@sony.com>
2021-03-22 19:28:38 -07:00
Alin Jerpelea
c39339a7a8
arch: arm: include: nxstyle fixes
...
nxstyle fixes to pass CI
Signed-off-by: Alin Jerpelea <alin.jerpelea@sony.com>
2021-03-22 19:28:38 -07:00
Alin Jerpelea
4daa276903
arch: arm: include: Author Gregory Nutt: update licenses to Apache
...
Gregory Nutt has submitted the SGA and we can migrate the licenses
to Apache.
Signed-off-by: Alin Jerpelea <alin.jerpelea@sony.com>
2021-03-22 19:28:38 -07:00
Alin Jerpelea
35e0d13d18
arch: Author Sebastien Lorquet: update licenses to Apache
...
Sebastien Lorquet has submitted the ICL and we can migrate the licenses
to Apache.
Gregory Nutt has submitted the SGA and we can migrate the licenses
to Apache.
Signed-off-by: Alin Jerpelea <alin.jerpelea@sony.com>
2021-03-22 19:28:38 -07:00
Alin Jerpelea
85bcf1bd4c
arch: Author Alan Carvalho de Assis: update licenses to Apache
...
Alan Carvalho de Assis has submitted the ICL and we can migrate the licenses
to Apache.
Gregory Nutt has submitted the SGA and we can migrate the licenses
to Apache.
Signed-off-by: Alin Jerpelea <alin.jerpelea@sony.com>
2021-03-22 19:28:38 -07:00
Alin Jerpelea
37f91b023c
arch: Author David Sidrane: update licenses to Apache
...
David Sidrane has submitted the ICL and we can migrate the licenses
to Apache.
Gregory Nutt has submitted the SGA and we can migrate the licenses
to Apache.
Signed-off-by: Alin Jerpelea <alin.jerpelea@sony.com>
2021-03-22 19:28:38 -07:00
Alin Jerpelea
8dd660ecd4
nuttx: Author David S. Alessio: update licenses to Apache
...
David S. Alessio has submitted the ICL and we can migrate the licenses
to Apache.
Gregory Nutt has submitted the SGA and we can migrate the licenses
to Apache.
Signed-off-by: Alin Jerpelea <alin.jerpelea@sony.com>
2021-03-22 19:28:38 -07:00
mage1
6ff11d8c76
mm: add heap policy and anta logic to support mm debug on sim platform
...
since atan tool will enhance memory debug operation.
Change-Id: Ic953755faff156832e84b6a764452751dc14f0e3
2021-03-22 11:02:20 -07:00
Xiang Xiao
e14c458747
mm/heap: Move semaphore related declaration to private header
...
since other subsystem doesn't need call these function anymore
Signed-off-by: Xiang Xiao <xiaoxiang@xiaomi.com>
Change-Id: Idfb217c412db62d9f17f427310b75bb78785dc50
2021-03-22 15:35:32 +01:00
hotislandn
fdaf265ed0
arch:rv64:c906:colorize the idle stack area;minor fixes.
...
Signed-off-by: hotislandn <hotislandn@hotmail.com>
2021-03-22 06:06:24 -07:00
Nathan Hartman
4653dc14d3
Fix typos (and nxstyle errors)
...
ReleaseNotes,
arch/arm/src/cxd56xx/cxd56_dmac_common.h,
arch/arm/src/efm32/efm32_dma.h,
arch/arm/src/lpc54xx/lpc54_lcd.c,
arch/arm/src/rp2040/rp2040_dmac.h,
arch/arm/src/stm32/stm32_dma.h,
arch/arm/src/stm32f0l0g0/stm32_dma.h,
arch/arm/src/stm32f7/stm32_dma.h,
arch/arm/src/stm32h7/stm32_dma.h,
arch/arm/src/stm32l4/stm32l4_dma.h,
arch/renesas/src/rx65n/rx65n_dtc.h,
fs/spiffs/src/spiffs_vfs.c,
net/route/cacheroute.h,
net/route/net_cacheroute.c,
net/route/net_foreach_fileroute.c,
net/route/net_foreach_ramroute.c,
net/route/net_foreach_romroute.c, and
net/route/route.h:
* Fix the following typos:
- remove spurious "are"
- "tot he" -> "to the"
arch/arm/src/stm32f0l0g0/stm32_dma.h and
arch/arm/src/stm32l4/stm32l4_dma.h:
* Fix nxstyle errors.
2021-03-21 21:51:14 +01:00
Gustavo Henrique Nihei
e4efa9dfa7
xtensa/esp32: Fix interrupt flag configuration for DMA transfers
...
Previously SPI interrupts were enabled on DMA initialization. But since
the addition of SPI Mixed mode it created a side-effect, breaking
polling transfers. So now interrupts are enabled before the DMA
transactions and disabled once they are finished.
Furthermore, the transaction done flag is also cleared before a new
transaction starts.
2021-03-21 00:16:59 -07:00
Gustavo Henrique Nihei
20d24fe148
xtensa/esp32: Fix esp32_spi_setbits for Polling when DMA is also enabled
...
Commit 6382b2ba introduced the possibility of using SPI in Mixed mode,
i.e. performing SPI transfers via both polling and interrupts. However,
setbits was only applying the configuration if DMA was not enabled.
2021-03-21 00:16:59 -07:00
Gustavo Henrique Nihei
27e2da33b4
xtensa/esp32: Fix buffer size word-alignment for DMA transfers
2021-03-20 19:23:44 -07:00
Gustavo Henrique Nihei
bfc551484a
xtensa/esp32: Clean up esp32_dma_init code
...
Removed "isrx" parameter whose only purpose is to trigger an assertion
on DEBUG builds. Also performed a minor refactor.
2021-03-20 19:23:44 -07:00
Abdelatif Guettouche
51283bd99a
arch/risc-v/syscall.h: Fix syscall function names in comments.
...
Signed-off-by: Abdelatif Guettouche <abdelatif.guettouche@espressif.com>
2021-03-20 13:02:54 -03:00
Abdelatif Guettouche
fb0fd36a5c
arch/risc-v: Internal functions should be prefixed by "riscv_" instead
...
of "up_"
Signed-off-by: Abdelatif Guettouche <abdelatif.guettouche@espressif.com>
2021-03-20 13:02:54 -03:00
Gustavo Henrique Nihei
dc7a0b0a5c
xtensa/esp32: Use Polling instead of DMA for transfers below threshold
...
Also refactored code to remove a confusing duplicate "dma_chan" field
which had the same purpose of the "use_dma" boolean.
2021-03-19 23:13:32 -07:00
Michael Jung
d397e90b9d
stm32l5: Enable SPI support and license clearing
...
Since the original stm32l4 version of this code already has an ASF
license header do that for stm32l5, too.
Apply latest changes to stm32l4_spi.c to stm32l5_spi.c as well.
Update stm32l5/Kconfig to allow selection of SPI1/2/3.
Signed-off-by: Michael Jung <mijung@gmx.net>
2021-03-19 23:02:37 -07:00
Nathan Hartman
4de28efbcb
arch/stm32h7: Fix nxstyle errors
...
arch/arm/src/stm32h7/hardware/stm32_bdma.h:
* Fix nxstyle errors.
2021-03-19 22:48:35 -07:00
hotislandn
e452b667ef
arch:rv64:fix 64bit data type and insn for FPU handlers.
...
Signed-off-by: hotislandn <hotislandn@hotmail.com>
2021-03-18 22:53:03 -07:00
Michael Jung
a1d0360e5e
stm32l5_lse: Drive reduction after start-up
...
The LSE crystal oscillator driving strength can only be decreased to the
lower drive capability (LSEDRV = 00b) once the LSE is running, but not
to any other drive capability. Instead of letting the user select a
value between 0 and 3 and then failing the build if the selected value
was not 0, make it a boolean option.
Signed-off-by: Michael Jung <mijung@gmx.net>
2021-03-18 19:59:41 -07:00
Michael Jung
a0ca686490
stm32l5: Rename up_waste to stm32l5_waste
...
To comply to NuttX naming conventions.
Signed-off-by: Michael Jung <mijung@gmx.net>
2021-03-18 19:59:41 -07:00
Michael Jung
2dbfa54150
stm32l5: Optional LSE xtal drive strength ramp-up
...
Ported from stm32f7/h7: If configured this way, ramp-up the LSE crystal
oscillator driving strength until the LSE starts up.
Signed-off-by: Michael Jung <mijung@gmx.net>
2021-03-18 19:59:41 -07:00
Nathan Hartman
cbb8a542e5
arch/stm32f0l0g0: Fix nxstyle errors
...
arch/arm/include/stm32f0l0g0/chip.h:
arch/arm/include/stm32f0l0g0/irq.h:
arch/arm/include/stm32f0l0g0/stm32f0_irq.h:
arch/arm/include/stm32f0l0g0/stm32g0_irq.h:
* Fix nxstyle errors.
2021-03-18 22:55:51 +01:00
hotislandn
f16a0a7380
arch:rv64:keep the stack to be 16bytes aligned.
...
Signed-off-by: hotislandn <hotislandn@hotmail.com>
2021-03-17 19:50:35 -07:00
Abdelatif Guettouche
27d5c9340a
esp32_allocateheap.c: Don't allocate the ROM CPU regions the same way in
...
QEMU, the image is different.
Signed-off-by: Abdelatif Guettouche <abdelatif.guettouche@espressif.com>
2021-03-18 11:28:36 +09:00
Nathan Hartman
5b813f0c14
arch/stm32l4: Fix nxstyle errors
...
arch/arm/include/stm32l4/stm32l4x3xx_irq.h:
arch/arm/include/stm32l4/stm32l4xrxx_irq.h:
* Fix nxstyle errors.
2021-03-17 21:49:30 +01:00
Xiang Xiao
335ba21657
arch/arm: Fix syscall number out of swi range in thumb mode
...
The immediate number is 8bits in thumb mode:
+---------------------+---------------+
|15 14 13 12 11 10 9 8|7 6 5 4 3 2 1 0|
+---------------------+---------------+
| 1 1 0 1 1 1 1 1| imm8 |
+---------------------+---------------+
The immediate number is 24bits in arm mode:
+-----------+-------------------------------------------------------------------------+
|31 30 29 28|27 26 25 24|23 22 21 20 19 18 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0|
+-----------+-----------+-------------------------------------------------------------+
| cond | 1 1 1 1| imm24 |
+-----------+-----------+-------------------------------------------------------------+
Signed-off-by: Xiang Xiao <xiaoxiang@xiaomi.com>
Change-Id: I62503cdc377fcee81864e88e981d389bce2e1b45
2021-03-17 14:52:58 -03:00
Jiuzhu Dong
e96c8b9283
fs: allocate file/socket dynamically
...
Change-Id: I8aea63eaf0275f47f21fc8d5482b51ffecd5c906
Signed-off-by: Jiuzhu Dong <dongjiuzhu1@xiaomi.com>
2021-03-17 06:46:42 -07:00
SPRESENSE
2f29521dd1
cxd56_cpu1signal: Fix an issue that gnss does not work
...
Because a thread of gnss receiver is created by pthread in the
AppBringUp task, the thread would be killed when AppBringUp
task exits.
Change to use kthread_create instead of pthread_create to prevent
this issue.
2021-03-17 06:36:33 -07:00
SPRESENSE
f7047d8ea3
cxd56_gnss: Add missing include header for cxd56_gnss.c
...
cxd56_gnss.c uses file descriptor operation from next change.
0536953
Kernel module should prefer functions with nx/kmm prefix
But this change need to add fcntl.h in include header.
So, add missing header.
2021-03-17 03:11:54 -07:00
YAMAMOTO Takashi
9bd10898d2
arch/arm/src/lc823450: Make LC823450_IPL2 select BCH
2021-03-17 01:25:16 -07:00
Peter van der Perk
4dd457854d
[FlexCAN] Correct reset state for CTRL1 register
2021-03-16 19:50:58 -07:00
Nathan Hartman
f165270a80
arch/stm32l4: Fix nxstyle errors
...
arch/arm/include/stm32l4/chip.h:
arch/arm/include/stm32l4/irq.h:
arch/arm/include/stm32l4/stm32l4x5xx_irq.h:
arch/arm/include/stm32l4/stm32l4x6xx_irq.h:
* Fix nxstyle errors.
2021-03-16 19:38:30 -07:00
Michael Jung
b3ab373f3a
stm32l5: Fix findings with latest nxstyle
...
Fix some incorrect relative file paths in ASF headers found with the
latest version of nxstyle.
Signed-off-by: Michael Jung <mijung@gmx.net>
2021-03-16 12:04:00 -07:00
Michael Jung
fb14125320
stm32l5: Coding style fixes
...
Put blanks around the '+' in register address definitions.
Signed-off-by: Michael Jung <mijung@gmx.net>
2021-03-16 12:04:00 -07:00
Michael Jung
3581289661
stm32l5: Put a timeout on waiting for LSE
...
Do not run into an infinite loop if the LSE does not start up.
Signed-off-by: Michael Jung <mijung@gmx.net>
2021-03-16 12:04:00 -07:00
Michael Jung
c031e4d2ee
stm32l562xx_pinmap.h: Coding style fix
...
Remove spaces around binary-or operators in GPIO defines everywhere to
get a consistent coding style.
Signed-off-by: Michael Jung <mijung@gmx.net>
2021-03-16 12:04:00 -07:00
Michael Jung
8e14cb6065
stm32l5: Remove drive strengths from GPIO defines
...
As proposed by David Sidrane. Required drive strength is board specific
and should be defined in the respective board.h file.
Signed-off-by: Michael Jung <mijung@gmx.net>
2021-03-16 12:04:00 -07:00
Michael Jung
78a69a89d8
stm32l5: Remove unused CACHE_LINESIZE defines
...
Cortex-M33 does neither have an I- nor a D-Cache. Both defines are not
used across the stm32l5 architecture code. Thus, just remove them.
_Originally posted by @acassis in https://github.com/apache/incubator-nuttx/pull/2974#discussion_r588224862_
Signed-off-by: Michael Jung <mijung@gmx.net>
2021-03-16 12:04:00 -07:00
Michael Jung
33892dcc54
armv8-m/arm_svcall.c: Fix compiler warning
...
regs[REG_R0] is uint32_t type, but '%d' expects int type.
Signed-off-by: Michael Jung <mijung@gmx.net>
2021-03-16 12:04:00 -07:00
Michael Jung
f3a5675cc4
stm32l5: Architecture Support for STM32L5
...
Architecture support for STMicroelectronics STM32L552xx and STM32L562xx
MCUs. This is based on corresponding code for STM32L4, but has been
considerably adjusted. Tested with Nucleo-L552ZE-Q and STM32L562E-DK
boards with simple NSH configurations.
Signed-off-by: Michael Jung <mijung@gmx.net>
2021-03-16 12:04:00 -07:00
hotislandn
fb7a5b86ca
arch:rv64:c906:demo protect build without PMP.
...
Signed-off-by: hotislandn <hotislandn@hotmail.com>
2021-03-16 11:43:10 -03:00
Dong Heng
458caf2732
riscv/esp32c3: Add ESP32-C3 WLAN netcard driver
2021-03-16 10:42:32 -03:00
Dong Heng
b2f5031e96
xtensa/esp32: Refactor ESP32 WiFi driver to support station and softAP coexistence
2021-03-16 10:20:59 -03:00
Abdelatif Guettouche
28160823b6
arch/xtensa/esp32: ~6KB of memory at address 0x3ffae6f0 is not used by
...
the ROM bootloader, add that to the heap as well.
Signed-off-by: Abdelatif Guettouche <abdelatif.guettouche@espressif.com>
2021-03-16 16:22:08 +09:00
Abdelatif Guettouche
8389e83742
esp32/memory_layout.h: Update the layout taking under consideration the
...
changes to the heap regions and to the internal heap.
Signed-off-by: Abdelatif Guettouche <abdelatif.guettouche@espressif.com>
2021-03-16 16:22:08 +09:00
Abdelatif Guettouche
9cfc30fa85
memory_layout.h: Fix the start of region2 when a QEMU image generation
...
is enabled.
That region is technically part of the PRO CPU and we should be able to
allocate it early. However, QEMU uses a slightly different bootloader
image that uses the same part for both CPU. So, when APP CPU starts
during the SMP bring up it will corrupt some data.
Signed-off-by: Abdelatif Guettouche <abdelatif.guettouche@espressif.com>
2021-03-16 16:22:08 +09:00
Abdelatif Guettouche
7fbc350589
xtensa/esp32: Warn about unused memory regions.
...
In case CONFIG_MM_REGIONS doesn't include all the available memory
regions the user will have a warning to increase it.
Signed-off-by: Abdelatif Guettouche <abdelatif.guettouche@espressif.com>
2021-03-16 16:22:08 +09:00
Abdelatif Guettouche
5c7d041b91
arch/xtensa/esp32: In SMP case move the internal memory to region 3.
...
Region 2 is only 15KB in SMP, so we don't have enough memory to play
with.
Signed-off-by: Abdelatif Guettouche <abdelatif.guettouche@espressif.com>
2021-03-16 16:22:08 +09:00
Abdelatif Guettouche
cba44928d2
arch/xtensa/esp32: Part of the ROM regions in middle of DRAM are not
...
used, retrieve them as heap.
Signed-off-by: Abdelatif Guettouche <abdelatif.guettouche@espressif.com>
2021-03-16 16:22:08 +09:00
Abdelatif Guettouche
a68a39c785
xtensa/esp32: Move internal heap to the beginning of region 2.
...
Internal heap was occupying the region straight after .data up to
HEAP_REGION1. The issue with this is if static allocation is large,
we'll end up with too little memory left for the internal heap.
Moving it to the beginning of region 2 gives us more room to play with.
Signed-off-by: Abdelatif Guettouche <abdelatif.guettouche@espressif.com>
2021-03-16 16:22:08 +09:00
Nathan Hartman
13816de7ac
arch/stm32f7: Fix nxstyle errors
...
arch/arm/include/stm32f7/chip.h:
arch/arm/include/stm32f7/irq.h:
arch/arm/include/stm32f7/stm32f72xx73xx_irq.h:
arch/arm/include/stm32f7/stm32f74xx75xx_irq.h:
arch/arm/include/stm32f7/stm32f76xx77xx_irq.h:
* Fix nxstyle errors.
2021-03-15 17:01:31 +01:00
Masayuki Ishikawa
73786e71ff
arch: sam34: Author Masayuki Ishikawa: Update license to Apache
...
Signed-off-by: Masayuki Ishikawa <asayuki.Ishikawa@jp.sony.com>
2021-03-14 22:23:05 -07:00
Yuichi Nakamura
40fe666d3f
arm/rp2040: Fix SPI halfword DMA transfer
2021-03-14 22:21:22 -07:00
Sara Souza
4ca0c6e3c8
xtensa/esp32: timer driver refactor
2021-03-14 20:22:36 -03:00
Abdelatif Guettouche
65a7ecec09
arch/risc-v: Remove a declaration of "up_boot" function that was never used.
...
Signed-off-by: Abdelatif Guettouche <abdelatif.guettouche@espressif.com>
2021-03-13 19:07:02 -03:00
Abdelatif Guettouche
ea0dc8c1d2
arch/risc-v: up_allocate_heap is already declared in nuttx/arch.h
...
Signed-off-by: Abdelatif Guettouche <abdelatif.guettouche@espressif.com>
2021-03-13 19:07:02 -03:00
Abdelatif Guettouche
44ada05549
arch/risc-v: Internal functions should be prefixed with riscv_ not up_
...
Signed-off-by: Abdelatif Guettouche <abdelatif.guettouche@espressif.com>
2021-03-13 19:07:02 -03:00
Alin Jerpelea
f7c11c92c3
arch: Makefile: Alan Carvalho de Assis: update licenses to Apache
...
Alan Carvalho de Assis has submitted the SGA and we can migrate the licenses
to Apache.
Gregory Nutt has submitted the SGA and we can migrate the licenses
to Apache.
Signed-off-by: Alin Jerpelea <alin.jerpelea@sony.com>
2021-03-13 05:56:43 -08:00
Alin Jerpelea
bd94263a33
arch: Makefile: Author Gregory Nutt: update licenses to Apache
...
Gregory Nutt has submitted the SGA and we can migrate the licenses
to Apache.
Signed-off-by: Alin Jerpelea <alin.jerpelea@sony.com>
2021-03-13 05:56:43 -08:00
David Sidrane
0c57351f78
mmcsd:Stuck in 1-bit mode, Removed CONFIG_ARCH_HAVE_SDIO_DELAYED_INVLDT
...
mmcsd:Remove CONFIG_ARCH_HAVE_SDIO_DELAYED_INVLDT
stm32h7:sdmmc remove CONFIG_ARCH_HAVE_SDIO_DELAYED_INVLDT
stm32f7:sdmmc remove CONFIG_ARCH_HAVE_SDIO_DELAYED_INVLDT
stm32f7:sdmmc WRITE COMPLETE prevent false triggers
stm32h7:sdmmc WRITE COMPLETE prevent false triggers
While testing PR #2989 on the H7 I noticed that the cards
were staying in 1-bit mode. The root cause was that the
scr read path was using DMA without an invlidate.
This was caused by CONFIG_ARCH_HAVE_SDIO_DELAYED_INVLDT,
but the sdmmc driver, did not use the delayed invalidate
nor would it work on 8 bytes.
The driver fully supported dcache mgt on runt buffers, but
the #ifdef CONFIG_ARCH_HAVE_SDIO_DELAYED_INVLDT blocked it.
Reviewing the PR that added CONFIG_ARCH_HAVE_SDIO_DELAYED_INVLDT
it may have been valid at the time. But after the dcache operations
we fixed. It is not necessary and offers no benefit.
2021-03-12 16:42:16 -03:00
Nathan Hartman
6061981e37
arch/stm32h7: Fix nxstyle errors
...
arch/arm/include/stm32h7/irq.h:
arch/arm/include/stm32h7/stm32h7x7xx_irq.h:
* Fix nxstyle errors.
2021-03-12 16:58:51 +00:00
Sara Souza
d28962bbc0
risc-v/esp32-c3: Adds termios support.
2021-03-12 08:41:51 +00:00
YAMAMOTO Takashi
51be5c08bf
arch/sim/include/limits.h: Fix the type of LONG_MIN, LONG_MAX, ULONG_MAX
2021-03-12 16:23:26 +08:00
Masayuki Ishikawa
bb255d075c
arch: risc-v: Author Masayuki Ishikawa: Update license to Apache
...
Signed-off-by: Masayuki Ishikawa <Masayuki.Ishikawa@jp.sony.com>
2021-03-12 16:15:44 +08:00
Masayuki Ishikawa
9aaa4068c1
arch: imx6: Fix an error message in imx_enet.c
...
Summary:
- This commit fixes an error message in imx_enet.c
Impact:
- None
Testing:
- Build only
Suggested-by: David Sidrane <David.Sidrane@NscDg.com>
Signed-off-by: Masayuki Ishikawa <Masayuki.Ishikawa@jp.sony.com>
2021-03-12 11:30:08 +08:00
Gustavo Henrique Nihei
d87274c123
risc-v/esp32c3: Release stuck I2C slaves on Reset
2021-03-11 19:32:03 -03:00
Gustavo Henrique Nihei
cb1c415b46
risc-v/esp32c3: Add support for I2C tracing
2021-03-11 19:32:03 -03:00
Gustavo Henrique Nihei
0f508c1a5f
risc-v/esp32c3: Fix erroneous index for I2C IRQ
2021-03-11 19:32:03 -03:00
Gustavo Henrique Nihei
0b672b9c57
risc-v/esp32c3: Fix I2C timeout register mask
2021-03-11 19:32:03 -03:00
Gustavo Henrique Nihei
11b1f0f9dd
risc-v/esp32c3: Add driver for I2C peripheral
2021-03-11 19:32:03 -03:00
Yuichi Nakamura
174a4c1b68
arm/rp2040: Add RP2040 GPIO interrupt functions
2021-03-11 19:31:17 -03:00
Nathan Hartman
9fd0df3931
arch/stm32: Fix nxstyle errors
...
arch/arm/include/stm32/stm32f10xxx_irq.h:
arch/arm/include/stm32/stm32f20xxx_irq.h:
arch/arm/include/stm32/stm32f30xxx_irq.h:
arch/arm/include/stm32/stm32f33xxx_irq.h:
arch/arm/include/stm32/stm32f37xxx_irq.h:
arch/arm/include/stm32/stm32l15xxx_irq.h:
* Fix nxstyle errors.
2021-03-11 21:39:27 +00:00
Xiang Xiao
c047c1412f
Remove all gap8(risc-v) arch and board source code
...
Signed-off-by: Xiang Xiao <xiaoxiang@xiaomi.com>
2021-03-11 10:51:11 -08:00
Xiang Xiao
c54d617f2c
Remove nr5m100(risc-v) arch and board source code
...
Signed-off-by: Xiang Xiao <xiaoxiang@xiaomi.com>
2021-03-11 10:51:11 -08:00
Masayuki Ishikawa
ad094552f8
arch: cxd56xx: Add CONFIG_ARCH_LEDS_CPU_ACTIVITY to cxd56_idle.c and cxd56_irq.c
...
Summary:
- This commit adds CPU activity LED feature to cxd56_idle.c and cx56_irq.c
- An LED for the current CPU will turn off before calling WFI
- An LED for the current CPU will turn on when an interrupt happens
Impact:
- CONFIG_ARCH_LEDS_CPU_ACTIVITY=y only
Testing:
- defconfigs will be commited later.
Signed-off-by: Masayuki Ishikawa <Masayuki.Ishikawa@jp.sony.com>
2021-03-11 15:30:38 +01:00
Abdelatif Guettouche
7d406c9f9f
xtensa_backtrace.S: Fix the file header.
...
Signed-off-by: Abdelatif Guettouche <abdelatif.guettouche@espressif.com>
2021-03-11 21:24:01 +08:00
hotislandn
d898bc445c
arch:rv64:c906:enable DP FPU support.
...
Signed-off-by: hotislandn <hotislandn@hotmail.com>
2021-03-11 10:34:47 +08:00
hotislandn
5e50938726
arch:riscv64:basic porting for C906.
...
Signed-off-by: hotislandn <hotislandn@hotmail.com>
2021-03-10 19:23:24 +08:00
Xiang Xiao
f292b67dce
arch/sim: Remove DRVLIB and reuse STDLIBS instead
...
Change-Id: I5f79eca9039a296eca705d25b3541199a7fbaf9e
Signed-off-by: Xiang Xiao <xiaoxiang@xiaomi.com>
2021-03-09 23:33:16 -08:00
YAMAMOTO Takashi
16d3e787de
xtensa hostfs: Make host_stat populate st_size
...
A clumsy implementation using lseek.
This would allow more applications to use hostfs directly.
Tested lightly with CONFIG_EXAMPLES_STAT.
2021-03-10 14:15:24 +08:00
Masayuki Ishikawa
2c753be0df
Revert "arch: cxd56xx: Fix cxd56_usbdev.c for SMP"
...
Summary:
- The original commit was added to avoid hardfault but the
root cause was the stack corruption which has been fixed by
the previous commit. So let me revert the original commit.
Impact:
- SMP only
Testing:
- spresense:rndis_smp with nxplayer + telnet
This reverts commit 197187d826
.
Signed-off-by: Masayuki Ishikawa <Masayuki.Ishikawa@jp.sony.com>
2021-03-10 14:14:52 +08:00
Virus.V
c34667b450
risc-v/bl602:fix bl602_flash_erase to erase the wrong block
2021-03-09 07:56:00 -08:00
Gustavo Henrique Nihei
330eff36d7
sourcefiles: Fix relative path in file header
2021-03-09 23:18:28 +08:00
Gustavo Henrique Nihei
47cb41c92f
makefiles: Fix relative path in file header
2021-03-09 23:18:28 +08:00
Dong Heng
2f4e1c02de
xtensa/esp32: Add WPA2 Enterprise and WPA3 support
2021-03-09 11:20:34 -03:00
Sara Souza
c885e718a7
risc-v/esp32-c3: complements serial driver
2021-03-09 11:17:10 -03:00
Sara Souza
85a93be5d7
risc-v/esp32-c3: Adds timer driver
2021-03-09 11:16:53 -03:00
Sara Souza
d00e97cbca
risc-v/esp32-c3:free cpu in case it was preallocated in wdt driver
2021-03-09 10:57:58 +00:00
Yuichi Nakamura
938b1daf02
arm/rp2040: RP2040 SPI DMA transfer support
2021-03-08 17:37:48 -03:00
Yuichi Nakamura
b69df289bd
arm/rp2040: Add RP2040 DMAC functions
2021-03-08 17:37:48 -03:00
Xiang Xiao
88e3231ed9
arch/sim: Don't remove OPOST in the raw mode
...
to ensure '\n' from host library output correctly(translate to '\r\n')
Change-Id: I9ce81adb04ca01cfd8a0ec8e8dc85c7fad848601
Signed-off-by: Xiang Xiao <xiaoxiang@xiaomi.com>
2021-03-08 08:39:24 -08:00
Anthony Merlino
892b6393e3
stm32h7x7xx: Setup UART1 and UART6 clocks as part of APB2 bringup if enabled.
2021-03-08 01:51:54 -08:00
Anthony Merlino
3705202b85
Fix missing IO_CONFIG setting for STM32H747XI
2021-03-08 01:51:54 -08:00
Yuichi Nakamura
2d7aabf13b
arm/rp2040: Add RP2040 SPI device support
2021-03-08 17:06:07 +09:00
Yuichi Nakamura
a8d269df98
arm/rp2040: Add rp2040_gpio_init/put/get/setdir()
2021-03-08 17:06:07 +09:00
Anthony Merlino
40217e644f
stm32h7: Allow custom clock configuration to use stdclockconfig
2021-03-07 23:40:29 -08:00
Masayuki Ishikawa
197187d826
arch: cxd56xx: Fix cxd56_usbdev.c for SMP
...
Summary:
- This commit fixes hardfault when running nxplayer with rndis_smp
Impact:
- SMP only
Testing:
- Tested with rndis_smp
Signed-off-by: Masayuki Ishikawa <Masayuki.Ishikawa@jp.sony.com>
2021-03-07 19:51:12 -08:00
Anthony Merlino
67b9f5f9e3
Fix nxstyle issues.
...
# Conflicts:
# arch/arm/src/armv7-m/dwt.h
2021-03-07 02:35:56 -08:00
Anthony Merlino
afd6ad4ff5
arch/armv7-m: Adds dwt helper functions for controlling watchpoints in code.
...
In scenarios where there is suspicion that someone might be touching your data when you don't expect, you can setup a watchpoint, and then guard accesses that you know are valid. If the debugger halts due to the watchpoint, you'll see where the unexpected access is coming from.
2021-03-07 02:35:56 -08:00
David Sidrane
da2f9f1357
stm32h7:Ethernet Fixed hardfaults, from too big frames
2021-03-06 03:07:58 -08:00
David Sidrane
ac2e35bb0f
stm32f7:Ethernet Fixed hardfaults, from too big frames
2021-03-06 03:07:58 -08:00
David Sidrane
abda656076
stm32:Ethernet Fix too big frames
2021-03-06 03:07:58 -08:00
Peter Bee
e223f60c09
net/socket: move si_send/recv into sendmsg/recvmsg
...
Implement si_send/sendto/recvfrom with si_sendmsg/recvmsg, instead of
the other way round.
Change-Id: I7b858556996e0862df22807a6edf6d7cfe6518fc
Signed-off-by: Peter Bee <bijunda1@xiaomi.com>
2021-03-05 04:46:13 -08:00
YAMAMOTO Takashi
e05762c488
esp32/memory_layout.h: Replace Gregory Nutt's copyright notice
...
The old copyright notice was inherited from esp32_allocateheap.c.
The new copyright notice was copy-and-pasted from sched_getcpu.c.
2021-03-05 10:15:52 +00:00
YAMAMOTO Takashi
3857d7491f
esp32: Extract memory layout definitions to a separate header
2021-03-05 10:15:52 +00:00
Gustavo Henrique Nihei
cd02fd1700
xtensa/esp32: Add support for I2C tracing
2021-03-04 22:09:37 +00:00
Gustavo Henrique Nihei
1aebe47c71
xtensa/esp32: Use OR operation when configuring pin driver
2021-03-04 16:36:48 +00:00
Gustavo Henrique Nihei
23f0d8c17b
xtensa/esp32: Fix default GPIO function when no option is provided
2021-03-04 16:36:48 +00:00
Gustavo Henrique Nihei
9c366aad94
xtensa/esp32: Allow pin to be configured as Input and Output simultaneously
2021-03-04 16:36:48 +00:00
Gustavo Henrique Nihei
210a77de93
xtensa/esp32: Configure GPIO as INPUT only when required
2021-03-04 16:36:48 +00:00
Gustavo Henrique Nihei
fa36897541
risc-v/esp32c3: Fix Kconfig file formatting
2021-03-04 16:31:51 +00:00
Gustavo Henrique Nihei
f5342d00fc
xtensa/esp32: Fix Kconfig file formatting
2021-03-04 16:31:51 +00:00
Gustavo Henrique Nihei
984e0f0ec9
xtensa/esp32: Add missing option for I2C reset
2021-03-04 16:31:51 +00:00
Gustavo Henrique Nihei
79ea96a1d0
xtensa/esp32: Fix ESP32_I2C option bringing the char driver
2021-03-04 16:31:51 +00:00
David Sidrane
8b73e30185
arch/arm/src/stm32h7/Kconfig
...
stm32h7:lse fix Kconfig help text
2021-03-04 07:10:18 -08:00
David Sidrane
296d94b5cb
stm32f7:lse Use Kconfig values directly
2021-03-04 00:16:10 -08:00
ligd
d009074ed5
sim/up_uart.c: fix losting uart data when user paste long cmd
...
N/A
Change-Id: I66c01c0789fc83ae8f6db522d61ff8ab63cd9211
Signed-off-by: ligd <liguiding1@xiaomi.com>
2021-03-03 19:05:22 -08:00
Fotis Panagiotopoulos
f423403dfa
stm32_wwdg debug log formatting
2021-03-03 19:02:04 -08:00
Gustavo Henrique Nihei
5e9e2bec32
xtensa/esp32: Change I2C SCL default pin to a valid one
...
Current default pin for I2C SCL is not available for mapping with IOMUX
peripheral.
2021-03-03 19:00:15 -08:00
Nathan Hartman
3ac61053ce
arch/stm32, arch/stm32f7: Fix nxstyle errors
...
arch/arm/src/stm32/hardware/stm32_dma2d.h,
arch/arm/src/stm32/hardware/stm32_ltdc.h,
arch/arm/src/stm32/stm32_dma2d.c,
arch/arm/src/stm32/stm32_ltdc.c,
arch/arm/src/stm32f7/hardware/stm32_dma2d.h,
arch/arm/src/stm32f7/hardware/stm32_ltdc.h,
arch/arm/src/stm32f7/stm32_dma2d.c, and
arch/arm/src/stm32f7/stm32_ltdc.c:
* Fix nxstyle "mixed case identifier" errors for the
following identifiers:
DMA2D_xGPFCCR_ALPHA -> DMA2D_XGPFCCR_ALPHA
DMA2D_xGPFCCR_AM -> DMA2D_XGPFCCR_AM
DMA2D_xGPFCCR_CCM -> DMA2D_XGPFCCR_CCM
DMA2D_xGPFCCR_CM -> DMA2D_XGPFCCR_CM
DMA2D_xGPFCCR_CS -> DMA2D_XGPFCCR_CS
DMA2D_xGPFCCR_START -> DMA2D_XGPFCCR_START
LTDC_LxBFCR_BF1 -> LTDC_LXBFCR_BF1
LTDC_LxBFCR_BF2 -> LTDC_LXBFCR_BF2
LTDC_LxCFBLR_CFBLL -> LTDC_LXCFBLR_CFBLL
LTDC_LxCFBLR_CFBP -> LTDC_LXCFBLR_CFBP
LTDC_LxCR_CLUTEN -> LTDC_LXCR_CLUTEN
LTDC_LxCR_COLKEN -> LTDC_LXCR_COLKEN
LTDC_LxCR_LEN -> LTDC_LXCR_LEN
LTDC_LxWHPCR_WHSPPOS -> LTDC_LXWHPCR_WHSPPOS
LTDC_LxWHPCR_WHSTPOS -> LTDC_LXWHPCR_WHSTPOS
LTDC_LxWVPCR_WVSPPOS -> LTDC_LXWVPCR_WVSPPOS
LTDC_LxWVPCR_WVSTPOS -> LTDC_LXWVPCR_WVSTPOS
STM32_LTDC_LxWHPCR_WHSTPOS -> STM32_LTDC_LXWHPCR_WHSTPOS
STM32_LTDC_LxWVPCR_WVSTPOS -> STM32_LTDC_LXWVPCR_WVSTPOS
STM32_LTDC_Lx_BYPP -> STM32_LTDC_LX_BYPP
DMA2D_xGCOLR_BLUE -> DMA2D_XGCOLR_BLUE
DMA2D_xGCOLR_BLUE_MASK -> DMA2D_XGCOLR_BLUE_MASK
DMA2D_xGCOLR_BLUE_SHIFT -> DMA2D_XGCOLR_BLUE_SHIFT
DMA2D_xGCOLR_GREEN -> DMA2D_XGCOLR_GREEN
DMA2D_xGCOLR_GREEN_MASK -> DMA2D_XGCOLR_GREEN_MASK
DMA2D_xGCOLR_GREEN_SHIFT -> DMA2D_XGCOLR_GREEN_SHIFT
DMA2D_xGCOLR_RED -> DMA2D_XGCOLR_RED
DMA2D_xGCOLR_RED_MASK -> DMA2D_XGCOLR_RED_MASK
DMA2D_xGCOLR_RED_SHIFT -> DMA2D_XGCOLR_RED_SHIFT
DMA2D_xGOR -> DMA2D_XGOR
DMA2D_xGOR_MASK -> DMA2D_XGOR_MASK
DMA2D_xGOR_SHIFT -> DMA2D_XGOR_SHIFT
DMA2D_xGPFCCR_ALPHA_MASK -> DMA2D_XGPFCCR_ALPHA_MASK
DMA2D_xGPFCCR_ALPHA_SHIFT -> DMA2D_XGPFCCR_ALPHA_SHIFT
DMA2D_xGPFCCR_AM_MASK -> DMA2D_XGPFCCR_AM_MASK
DMA2D_xGPFCCR_AM_SHIFT -> DMA2D_XGPFCCR_AM_SHIFT
DMA2D_xGPFCCR_CM_MASK -> DMA2D_XGPFCCR_CM_MASK
DMA2D_xGPFCCR_CM_SHIFT -> DMA2D_XGPFCCR_CM_SHIFT
DMA2D_xGPFCCR_CS_MASK -> DMA2D_XGPFCCR_CS_MASK
DMA2D_xGPFCCR_CS_SHIFT -> DMA2D_XGPFCCR_CS_SHIFT
LTDC_LxBFCR_BF1_MASK -> LTDC_LXBFCR_BF1_MASK
LTDC_LxBFCR_BF1_SHIFT -> LTDC_LXBFCR_BF1_SHIFT
LTDC_LxBFCR_BF2_MASK -> LTDC_LXBFCR_BF2_MASK
LTDC_LxBFCR_BF2_SHIFT -> LTDC_LXBFCR_BF2_SHIFT
LTDC_LxCACR_CONSTA -> LTDC_LXCACR_CONSTA
LTDC_LxCACR_CONSTA -> LTDC_LXCACR_CONSTA
LTDC_LxCACR_CONSTA_MASK -> LTDC_LXCACR_CONSTA_MASK
LTDC_LxCACR_CONSTA_SHIFT -> LTDC_LXCACR_CONSTA_SHIFT
LTDC_LxCFBLNR_LN -> LTDC_LXCFBLNR_LN
LTDC_LxCFBLNR_LN -> LTDC_LXCFBLNR_LN
LTDC_LxCFBLNR_LN_MASK -> LTDC_LXCFBLNR_LN_MASK
LTDC_LxCFBLNR_LN_SHIFT -> LTDC_LXCFBLNR_LN_SHIFT
LTDC_LxCFBLR_CFBLL_MASK -> LTDC_LXCFBLR_CFBLL_MASK
LTDC_LxCFBLR_CFBLL_SHIFT -> LTDC_LXCFBLR_CFBLL_SHIFT
LTDC_LxCFBLR_CFBP_MASK -> LTDC_LXCFBLR_CFBP_MASK
LTDC_LxCFBLR_CFBP_SHIFT -> LTDC_LXCFBLR_CFBP_SHIFT
LTDC_LxCKCR_CKBLUE -> LTDC_LXCKCR_CKBLUE
LTDC_LxCKCR_CKBLUE -> LTDC_LXCKCR_CKBLUE
LTDC_LxCKCR_CKBLUE_MASK -> LTDC_LXCKCR_CKBLUE_MASK
LTDC_LxCKCR_CKBLUE_SHIFT -> LTDC_LXCKCR_CKBLUE_SHIFT
LTDC_LxCKCR_CKGREEN -> LTDC_LXCKCR_CKGREEN
LTDC_LxCKCR_CKGREEN -> LTDC_LXCKCR_CKGREEN
LTDC_LxCKCR_CKGREEN_MASK -> LTDC_LXCKCR_CKGREEN_MASK
LTDC_LxCKCR_CKGREEN_SHIFT -> LTDC_LXCKCR_CKGREEN_SHIFT
LTDC_LxCKCR_CKRED -> LTDC_LXCKCR_CKRED
LTDC_LxCKCR_CKRED -> LTDC_LXCKCR_CKRED
LTDC_LxCKCR_CKRED_MASK -> LTDC_LXCKCR_CKRED_MASK
LTDC_LxCKCR_CKRED_SHIFT -> LTDC_LXCKCR_CKRED_SHIFT
LTDC_LxCLUTWR_BLUE -> LTDC_LXCLUTWR_BLUE
LTDC_LxCLUTWR_BLUE -> LTDC_LXCLUTWR_BLUE
LTDC_LxCLUTWR_BLUE_MASK -> LTDC_LXCLUTWR_BLUE_MASK
LTDC_LxCLUTWR_BLUE_SHIFT -> LTDC_LXCLUTWR_BLUE_SHIFT
LTDC_LxCLUTWR_CLUTADD -> LTDC_LXCLUTWR_CLUTADD
LTDC_LxCLUTWR_CLUTADD -> LTDC_LXCLUTWR_CLUTADD
LTDC_LxCLUTWR_CLUTADD_MASK -> LTDC_LXCLUTWR_CLUTADD_MASK
LTDC_LxCLUTWR_CLUTADD_SHIFT -> LTDC_LXCLUTWR_CLUTADD_SHIFT
LTDC_LxCLUTWR_GREEN -> LTDC_LXCLUTWR_GREEN
LTDC_LxCLUTWR_GREEN -> LTDC_LXCLUTWR_GREEN
LTDC_LxCLUTWR_GREEN_MASK -> LTDC_LXCLUTWR_GREEN_MASK
LTDC_LxCLUTWR_GREEN_SHIFT -> LTDC_LXCLUTWR_GREEN_SHIFT
LTDC_LxCLUTWR_RED -> LTDC_LXCLUTWR_RED
LTDC_LxCLUTWR_RED -> LTDC_LXCLUTWR_RED
LTDC_LxCLUTWR_RED_MASK -> LTDC_LXCLUTWR_RED_MASK
LTDC_LxCLUTWR_RED_SHIFT -> LTDC_LXCLUTWR_RED_SHIFT
LTDC_LxDCCR_DCALPHA -> LTDC_LXDCCR_DCALPHA
LTDC_LxDCCR_DCALPHA -> LTDC_LXDCCR_DCALPHA
LTDC_LxDCCR_DCALPHA_MASK -> LTDC_LXDCCR_DCALPHA_MASK
LTDC_LxDCCR_DCALPHA_SHIFT -> LTDC_LXDCCR_DCALPHA_SHIFT
LTDC_LxDCCR_DCBLUE -> LTDC_LXDCCR_DCBLUE
LTDC_LxDCCR_DCBLUE -> LTDC_LXDCCR_DCBLUE
LTDC_LxDCCR_DCBLUE_MASK -> LTDC_LXDCCR_DCBLUE_MASK
LTDC_LxDCCR_DCBLUE_SHIFT -> LTDC_LXDCCR_DCBLUE_SHIFT
LTDC_LxDCCR_DCGREEN -> LTDC_LXDCCR_DCGREEN
LTDC_LxDCCR_DCGREEN -> LTDC_LXDCCR_DCGREEN
LTDC_LxDCCR_DCGREEN_MASK -> LTDC_LXDCCR_DCGREEN_MASK
LTDC_LxDCCR_DCGREEN_SHIFT -> LTDC_LXDCCR_DCGREEN_SHIFT
LTDC_LxDCCR_DCRED -> LTDC_LXDCCR_DCRED
LTDC_LxDCCR_DCRED -> LTDC_LXDCCR_DCRED
LTDC_LxDCCR_DCRED_MASK -> LTDC_LXDCCR_DCRED_MASK
LTDC_LxDCCR_DCRED_SHIFT -> LTDC_LXDCCR_DCRED_SHIFT
LTDC_LxPFCR_PF -> LTDC_LXPFCR_PF
LTDC_LxPFCR_PF -> LTDC_LXPFCR_PF
LTDC_LxPFCR_PF_MASK -> LTDC_LXPFCR_PF_MASK
LTDC_LxPFCR_PF_SHIFT -> LTDC_LXPFCR_PF_SHIFT
LTDC_LxWHPCR_WHSPPOS_MASK -> LTDC_LXWHPCR_WHSPPOS_MASK
LTDC_LxWHPCR_WHSPPOS_SHIFT -> LTDC_LXWHPCR_WHSPPOS_SHIFT
LTDC_LxWHPCR_WHSTPOS_MASK -> LTDC_LXWHPCR_WHSTPOS_MASK
LTDC_LxWHPCR_WHSTPOS_SHIFT -> LTDC_LXWHPCR_WHSTPOS_SHIFT
LTDC_LxWVPCR_WVSPPOS_MASK -> LTDC_LXWVPCR_WVSPPOS_MASK
LTDC_LxWVPCR_WVSPPOS_SHIFT -> LTDC_LXWVPCR_WVSPPOS_SHIFT
LTDC_LxWVPCR_WVSTPOS_MASK -> LTDC_LXWVPCR_WVSTPOS_MASK
LTDC_LxWVPCR_WVSTPOS_SHIFT -> LTDC_LXWVPCR_WVSTPOS_SHIFT
* Fix all other nxstyle errors in the affected files.
2021-03-03 18:49:20 -08:00
Gustavo Henrique Nihei
b1b4190802
risc-v/esp32c3: Fix default GPIO function when no option is provided
2021-03-03 18:46:43 -08:00
Gustavo Henrique Nihei
bc335009d9
risc-v/esp32c3: Allow pin to be configured as Input and Output simultaneously
2021-03-03 18:46:43 -08:00
Abdelatif Guettouche
85620c3c1a
risc-v/esp32c3: Add more flash options to esptool.
...
Signed-off-by: Abdelatif Guettouche <abdelatif.guettouche@espressif.com>
2021-03-03 18:28:18 -08:00
Abdelatif Guettouche
77302f9d3a
xtensa/esp32: Add more flash options to esptool.
...
Signed-off-by: Abdelatif Guettouche <abdelatif.guettouche@espressif.com>
2021-03-03 18:28:18 -08:00
Xiang Xiao
c8d4a4c76a
mtd/progmem: Add up_progmem_read callback guarded by ARCH_HAVE_PROGMEM_READ
...
since sometime platform code need do some special action during memcpy
Signed-off-by: Xiang Xiao <xiaoxiang@xiaomi.com>
Change-Id: Id108ef4232376feab3e37e9b3aee9a7927a03bd4
2021-03-03 13:47:59 -08:00
ligd
f9d20ea4d2
sigdeliver: fix system block when kill signal to idle in SMP
...
Bug description:
CONFIG_SMP=y
Suppose we have 2 cores in SMP, here is the ps return:
PID GROUP CPU PRI POLICY TYPE NPX STATE STACK USED FILLED COMMAND
0 0 0 0 FIFO Kthread N-- Assigned 004076 000748 18.3% CPU0 IDLE
1 0 1 0 FIFO Kthread N-- Running 004096 000540 13.1% CPU1 IDLE
nsh> kill -4 0
or:
nsh> kill -4 1
system blocked.
Reason:
In func xx_sigdeliver() restore stage, when saved_irqcount == 0, that means
rtcb NOT in critical_section before switch to xx_sigdeliver(), then we need
reset the critical_section state before swith back.
Fix:
Add condition to cover saved_irqcount == 0.
Change-Id: I4af7f95e47f6d78a4094c3757d39b01ac9d533b3
Signed-off-by: ligd <liguiding1@xiaomi.com>
2021-03-03 15:03:32 +00:00
Yuichi Nakamura
9d0b3594f6
arm/rp2040: Add RP2040 I2C device support
2021-03-03 09:35:45 -03:00
Yuichi Nakamura
60b18467f3
arm/rp2040: Add rp2040_gpio_set_pulls()
2021-03-03 09:35:45 -03:00
David Sidrane
ab5f46d46c
stm32h7:Add DBGMCU
2021-03-02 18:28:19 -08:00
chenwen
19627095e4
esp32/esp32_allocateheap.c: Support the maximum available internal heap configuration
2021-03-02 18:27:20 -08:00
chenwen
516c553b97
esp32/esp32_wifi_adapter.c: Fix the issue of WiFi internal malloc from PSRAM
2021-03-02 18:27:20 -08:00
Nathan Hartman
a3f0923ad0
arch/stm32f7: Fix nxstyle errors
...
arch/arm/src/stm32f7/stm32_tim.h:
* Fix nxstyle errors.
2021-03-02 21:34:33 +00:00
David Sidrane
1e5754232a
stm32f7:Add option to auto select LSE CAPABILITY
...
This Knob will cycle through the values from
low to high. To avoid damaging the crystal.
We want to use the lowest setting that gets
the OSC running. See app note AN2867
2021-03-02 14:34:56 -03:00
David Sidrane
9fbd7f9dc5
stm32h7:Add option to auto select LSE CAPABILITY
...
This Knob will cycle through the correct*
values from low to high. To avoid damaging
the crystal. We want to use the lowest setting
that gets the OSC running. See app note AN2867
*It will take into account the rev of the silicon
and use the correct code points to achive the drive
strength. See Eratta ES0392 Rev 7 2.2.14 LSE oscillator
driving capability selection bits are swapped.
2021-03-02 14:34:56 -03:00
Michael Jung
fbfddda28b
armv8-m: Fix EXC_RETURN for non-secure usage
...
With TrustZone support in armv8-m the bit-fields in EXC_RETURN have been
extended. Bit 6 ('S') now specifies whether the interrupted program was
running in the Non-Secure (S=0) or Secure (S=1) security state.
Furthermore, Bit 0 ('ES' - Exception Secure) specifies the
security state athe exception is taken to (0: Non-Secure, 1: Secure).
When NuttX is run together with TrustedFirmware-M as the application in
the non-secure world both the S and the ES bits have to be set to '0'.
For armv8-m those are also the correct values if TrustZone is not
implemented on the respective MCU or if it is disabled.
Signed-off-by: Michael Jung <mijung@gmx.net>
2021-03-02 07:28:42 -03:00
YAMAMOTO Takashi
c230edea29
esp32_ummap: write back spiram cache before calling Cache_Flush
...
This seems to fix esp32_readdata_encrypted() with spiram "buffer".
Note: I'm not sure if this is the right fix or not.
I couldn't find any documentation about Cache_Flush.
2021-03-02 08:37:50 +00:00
Nathan Hartman
75eb3e8ec2
arch/stm32f7: Fix nxstyle errors
...
arch/arm/src/stm32f7/stm32_lowputc.c:
* Fix nxstyle errors.
2021-03-01 18:13:06 +00:00
Xiang Xiao
3d24288a66
arm/cxd56xx: Beautify the coding style in cxd56_gnss.c
...
Signed-off-by: Xiang Xiao <xiaoxiang@xiaomi.com>
2021-03-01 10:00:13 -05:00
Xiang Xiao
9473434587
Ensure the kernel component don't call userspace API
...
Signed-off-by: Xiang Xiao <xiaoxiang@xiaomi.com>
2021-03-01 09:23:09 +09:00
Masayuki Ishikawa
ef1826e133
arch: armv6-m: Apply armv7-m signal handling logic
...
Summary:
- This commit applies armv7-m signal handling logic
Impact:
- armv6-m signal handling
Testing:
- Tested with ostest with the following configs
- raspberrypi-pico:nsh, raspberrypi-pico:smp
Signed-off-by: Masayuki Ishikawa <Masayuki.Ishikawa@jp.sony.com>
2021-02-26 22:23:03 -06:00
Fotis Panagiotopoulos
40fdf388bd
Fixed __stack_overflow_trap declaration typo.
2021-02-26 12:08:16 -08:00
Nathan Hartman
9d48beb2c8
arch/stm32f7: Fix nxstyle errors
...
arch/arm/src/stm32f7/stm32_ltdc.h,
arch/arm/src/stm32f7/stm32_pm.h,
arch/arm/src/stm32f7/stm32_pmsleep.c,
arch/arm/src/stm32f7/stm32_pmstandby.c,
arch/arm/src/stm32f7/stm32_pmstop.c,
arch/arm/src/stm32f7/stm32_pwm.h:
* Fix nxstyle errors.
2021-02-26 17:13:05 +00:00
Peter van der Perk
4842868be2
[FlexCAN] Fix TX drop #2792 and correctly set CAN timings to non-zeroed registers
2021-02-26 06:14:33 -08:00
Byron Ellacott
1105cf0669
ez80: fix several bugs in emac driver
...
IRQs cannot be individually disabled on the eZ80, so using
`up_disable_irq()` had no effect. This left the IRQ handler being
constantly triggered without the lower half handler running.
The macro for EMAC stats was incompatible with Clang. The simplified
form gives identical results under ZDS-II.
The MII clock speed must be set before trying to read MII registers.
It's now done before resetting the PHY using the Mode Control Register.
MII initialization waited on the auto-neogotiate restart bit being set
but PHY hardware is frequently fast enough to have cleared the bit
before the first read of it. It now instead just waits on auto-negotiate
completing. The MII poll loop now uses `up_mdelay` because it was far
too fast at 50MHz using a busy loop, giving time for a link to be
established.
Bad packets are now processed enough to release their buffers back to
the EMAC hardware.
A few typos, unused variables, and other miscellaneous issues were also
fixed.
2021-02-26 03:25:58 -06:00
Michal Lenc
04fc5e314d
arch/arm/src/imxrt: updated flexcan driver to support classical and FD frames at once
...
Signed-off-by: Michal Lenc <michallenc@seznam.cz>
2021-02-25 22:31:04 -08:00
Abdelatif Guettouche
39016f6d68
risc-v/esp32c3: Configure clock and call board initialize at startup.
...
Signed-off-by: Abdelatif Guettouche <abdelatif.guettouche@espressif.com>
2021-02-25 22:13:26 -08:00
hotislandn
651b905b99
arch:rv64:add API up_copyfullstate for later FPU support.
...
Signed-off-by: hotislandn <hotislandn@hotmail.com>
2021-02-25 11:26:27 -08:00
Yuichi Nakamura
a556bbf3a4
arm/rp2040: Fix LDFLAGS for boot stage2
2021-02-25 11:25:27 -08:00
Gustavo Henrique Nihei
7fe096c65e
risc-v: Fix typos reported by codespell
2021-02-25 16:25:47 +00:00
Gustavo Henrique Nihei
ed0a1b724b
xtensa/esp32: Fix typos reported by codespell
2021-02-25 15:02:15 +00:00
hotislandn
30cb7d3983
arch:rv32:up_sigdeliver missing fpu contexts.
...
Signed-off-by: hotislandn <hotislandn@hotmail.com>
2021-02-24 23:42:18 -08:00
Masayuki Ishikawa
8085010ae8
arch: arm: Add 'select ARM_HAVE_WFE_SEV' to ARCH_CHIP_RP2040
...
Summary:
- This commit adds 'select ARM_HAVE_WFE_SEV' to ARCH_CHIP_RP2040
- Now NuttX spinlock uses WFE/SEV to reduce power consumption
- Also, modify a comment on rp2040
Impact:
- rp2040 only
Testing:
- Tested with raspberrypi-pico:smp
Signed-off-by: Masayuki Ishikawa <Masayuki.Ishikawa@jp.sony.com>
2021-02-24 19:12:22 -08:00
Nathan Hartman
7c5174a53b
arch/stm32f7: Fix nxstyle errors
...
arch/arm/src/stm32f7/stm32_config.h,
arch/arm/src/stm32f7/stm32_dma.h,
arch/arm/src/stm32f7/stm32_dma2d.h,
arch/arm/src/stm32f7/stm32_dtcm.h,
arch/arm/src/stm32f7/stm32_dumpgpio.c,
arch/arm/src/stm32f7/stm32_ethernet.h,
arch/arm/src/stm32f7/stm32_gpio.c,
arch/arm/src/stm32f7/stm32_gpio.h:
* Fix nxstyle errors.
2021-02-24 22:39:49 +00:00
Yuichi Nakamura
01699e00e0
arm/rp2040: Raspberry Pi Pico SMP support
2021-02-25 07:20:59 +09:00
Gustavo Henrique Nihei
6edeb9ebd9
risc-v/esp32c3: Free CPU interrupt if irq_attach fails
2021-02-24 15:56:26 +00:00
Gustavo Henrique Nihei
5c24c98880
risc-v/esp32c3: Invalidate CPU interrupt number after free
2021-02-24 15:56:26 +00:00
YAMAMOTO Takashi
ee8cea1f4b
esp32: xtensa_user: Implement a few more instructions
...
You can find them used in the ROM version of memcpy.
While it might be controversial if it's a good idea to use the ROM version
of these functions, it's nicer to support more instructions here anyway.
2021-02-24 10:34:55 +00:00
Abdelatif Guettouche
fb68a4b777
esp32c3: Add system reset.
...
Signed-off-by: Abdelatif Guettouche <abdelatif.guettouche@espressif.com>
2021-02-23 18:13:02 -08:00
Gustavo Henrique Nihei
48ff647fe9
risc-v/esp32c3: Fix erroneous references to ESP32-C3
2021-02-23 18:12:16 -08:00
David Sidrane
62321fa5db
s32k1xx:Support ramfunc
2021-02-23 18:11:41 -08:00
Nathan Hartman
c90fffcc09
arch/stm32f7: Fix nxstyle errors
...
arch/arm/src/stm32f7/stm32_pwr.c,
arch/arm/src/stm32f7/stm32_pwr.h,
arch/arm/src/stm32f7/stm32_usbhost.h:
* Fix nxstyle errors.
2021-02-22 18:18:58 -08:00
Gustavo Henrique Nihei
af8e71d9e9
risc-v/esp32c3: Fix inconsistent guard comment
2021-02-22 09:24:14 -08:00
Gustavo Henrique Nihei
628e2288aa
risc-v/esp32c3: Add missing header guard for lowputc
2021-02-22 09:24:14 -08:00
Gustavo Henrique Nihei
ca30c1db69
risc-v/esp32c3: Build serial driver only when selected
2021-02-22 09:24:14 -08:00
Abdelatif Guettouche
491a4c1ed2
risc-v/esp32c3: Don't reserve any vectors for any special use.
...
Signed-off-by: Abdelatif Guettouche <abdelatif.guettouche@espressif.com>
2021-02-22 09:21:24 -08:00
Gustavo Henrique Nihei
291a5755cc
risc-v/esp32c3: Add support for MWDT0 and MWDT1
2021-02-22 17:18:01 +00:00
Yuichi Nakamura
7b8c72ec1b
boards: raspberrypi-pico: Add nshsram defconfig for SRAM build
2021-02-22 09:11:09 -08:00
Brennan Ashton
f23f2a8557
Fix context switch bug for pic32mx
2021-02-21 22:24:12 -08:00
Masayuki Ishikawa
cf72133d3c
rp2040: Continue to build even if PICO_SDK_PATH is not set
...
Summary:
- In the previous implementation, the build system stops if
PICO_SDK_PATH is not set.
- However, this behavior is not good for CI. Because the path
is only used to generate a flash image.
- This commit fixes this issue
Impact:
- rp2040 only
Testing:
- Tested with and without PICO_SDK_PATH
2021-02-21 20:30:58 -08:00
Brennan Ashton
7a9e9b770f
pic32mz does not have ANSELJ register on port K
2021-02-21 18:27:56 -08:00
Alexander Vasiljev
8bb50b578b
arch/stm32h7: add definitions for DAC
2021-02-21 07:39:05 -08:00
Abdelatif Guettouche
067da56d0c
esp32c3: Some cosmetics and style fixes.
...
Signed-off-by: Abdelatif Guettouche <abdelatif.guettouche@espressif.com>
2021-02-21 10:29:43 -03:00
Abdelatif Guettouche
10822799fb
esp32c3: Add GPIO IRQ support.
...
The GPIO example was also extended to include testing an interrupt pin.
Co-authored-by: Abdelatif Guettouche <abdelatif.guettouche@espressif.com>
Co-authored-by: Alan Carvalho <alan.carvalho@espressif.com>
2021-02-21 10:29:43 -03:00
Alan Carvalho
4a42998f36
esp32-c3: Add the GPIO driver.
...
This commits adds support for the ESP32-C3 IO Mux and GPIO Matrix. It
also includes necessary board logic to run the GPIO example with 2
outputs.
Co-authored-by: Alan Carvalho <alan.carvalho@espressif.com>
Co-authored-by: Abdelatif Guettouche <abdelatif.guettouche@espressif.com>
2021-02-21 10:29:43 -03:00
Yuichi Nakamura
96a473d39d
arch/arm: Add support for boot stage2 from Raspberry Pi Pico SDK
2021-02-20 03:45:24 -08:00
Yuichi Nakamura
ed1da60f52
arch/arm: Add RP2040 (Raspberry Pi Pico's SoC) support
2021-02-20 03:45:24 -08:00
Yuichi Nakamura
d0002b24c7
arm: ARMv6-M vector table offset register support
2021-02-19 19:24:09 -08:00
Byron Ellacott
9a1b726bae
fs: change geometry types from size_t
to blkcnt_t
and blksize_t
...
This change reflects that the geometry isn't related to the largest
allocatable unit on the platform.
Calls to read and write block devices are also affected and have
been updated.
2021-02-18 20:38:22 -08:00
Masayuki Ishikawa
e87d14721e
arch: xtensa: Fix stack coloring
...
Summary:
- Call up_stack_color() correctly in the up_create_stack()
- Fix nwords calculation in up_stack_color()
- Also, refactor up_stack_color()
- Fix do_stackcheck() to consider stack alignment
Impact:
- Only for CONFIG_STACK_COLORATION=y
Testing:
- Tested with esp32-devkitc:wapi_smp
Signed-off-by: Masayuki Ishikawa <Masayuki.Ishikawa@jp.sony.com>
2021-02-18 19:05:07 -08:00
Gustavo Henrique Nihei
7750de72bb
stdint.h: Use conversion macros for the definition of MIN and MAX constants
2021-02-18 18:35:35 -08:00
Gustavo Henrique Nihei
9fcca55ad6
z80/inttypes.h: Add INT24_C and UINT24_C function macros
2021-02-18 18:35:35 -08:00
Augusto Fraga Giachero
43a98662f3
lpc17xx_40xx/lpc17_40_i2c.c: Propagate I2C I/O errors
...
Check if all messages were transferred, if not, return -ENXIO.
This is particularly useful when the slave returns an unexpected NAK,
the application code should catch the error to avoid failing silently.
2021-02-18 18:33:05 -08:00
Abdelatif Guettouche
4c3412faaa
risc-v/esp32c3: Add clock configuration
...
Signed-off-by: Abdelatif Guettouche <abdelatif.guettouche@espressif.com>
2021-02-18 01:21:53 -08:00
Sara Souza
998f7e5d4c
risc-v/esp32c3: Add basic UART support for console
2021-02-18 01:21:53 -08:00
Dong Heng
b11a5ca8b2
risc-v/esp32c3: Add ESP32-C3 basic support
...
Co-authored-by: Dong Heng <dongheng@espressif.com>
Co-authored-by: Abdelatif Guettouche <abdelatif.guettouche@espressif.com>
2021-02-18 01:21:53 -08:00
Masayuki Ishikawa
3ddfab239f
arch: xtensa: Fix a compile warning in xtensa_dumpstate.c
...
Summary:
- This commit fixes a compile warning if CONFIG_ARCH_INTERRUPTSTACK is set
Impact:
- None
Testing:
- Built with esp32-devkitc:smp
Signed-off-by: Masayuki Ishikawa <Masayuki.Ishikawa@jp.sony.com>
2021-02-18 09:11:27 +00:00
Byron Ellacott
458e021c86
eZ80: remove private function prototype from header
2021-02-17 02:32:12 -08:00
Byron Ellacott
bf7bd51a62
eZ80: fix typos in emac driver
2021-02-17 02:32:12 -08:00
Byron Ellacott
256c5c266a
eZ80: fix name of SP register in stack frame
2021-02-17 02:32:12 -08:00
Byron Ellacott
e50b5bef8b
eZ80: ensure DECL_SAVESTATE() is done when needed
2021-02-17 02:32:12 -08:00
Byron Ellacott
f0ccce3212
eZ80: include inttypes from inttypes
2021-02-17 02:32:12 -08:00
Byron Ellacott
ed83ee2675
eZ80: update register offsets
2021-02-17 02:32:12 -08:00
Masayuki Ishikawa
102adaf026
arch: esp32: Fix a memory leak when discarding a large packet.
...
Summary:
- Recently I noticed that ESP32-DevKitC-32D suddenly stops
during receiving ping packets from PC after 10-20mins
- Actually, sometimes memory leak happened when some device
sent a big broadcast packet periodically on the network
- This commit fixes this issue by calling esp_wifi_free_eb()
in the case that the packet exceeds WLAN_BUF_SIZE.
- Also, this commit applies the same logic in the case that
the Wi-Fi interface is down
Impact:
- None
Testing:
- Tested with esp32-devkitc:wapi
Suggested-by: YAMAMOTO Takashi <yamamoto@midokura.com>
Signed-off-by: Masayuki Ishikawa <Masayuki.Ishikawa@jp.sony.com>
2021-02-17 12:55:08 +09:00
Brennan Ashton
9f1017feb3
board/freedom-k64f: Add usbdev support with cdcacm example
2021-02-14 19:51:34 -08:00
David Jablonski
41bddc8461
litex: fix mtime and mtimecmp register address
2021-02-13 15:24:28 -08:00
David Jablonski
11167857c3
litex: nsh working
2021-02-13 15:24:28 -08:00
jpeng
af42079cc7
fix spi bug
2021-02-13 10:31:25 -08:00
liang
5914af84c7
arch/risc-v/bl602: spi_master support.
2021-02-13 10:31:25 -08:00
Nathan Hartman
01248cae8d
arch/stm32f7: Fix nxstyle errors
...
arch/arm/src/stm32f7/stm32_qencoder.c,
arch/arm/src/stm32f7/stm32_rng.c,
arch/arm/src/stm32f7/stm32_rtc.c,
arch/arm/src/stm32f7/stm32_rtc.h,
arch/arm/src/stm32f7/stm32_rtc_lowerhalf.c,
arch/arm/src/stm32f7/stm32_sai.h,
arch/arm/src/stm32f7/stm32_sdmmc.h,
arch/arm/src/stm32f7/stm32_spi.h,
arch/arm/src/stm32f7/stm32_tim_lowerhalf.c,
arch/arm/src/stm32f7/stm32_uid.c,
arch/arm/src/stm32f7/stm32_userspace.c,
arch/arm/src/stm32f7/stm32_userspace.h,
arch/arm/src/stm32f7/stm32f72xx73xx_rcc.c,
arch/arm/src/stm32f7/stm32f76xx77xx_rcc.c:
* Fix nxstyle errors.
2021-02-12 10:27:13 -08:00
YAMAMOTO Takashi
aed24f1255
esp32: Retire XTENSA_IMEM_PROCFS
...
Now /proc/meminfo has the equivalent.
2021-02-12 03:16:03 -08:00
YAMAMOTO Takashi
7bb849535c
esp32_modtext.c: Report the usage with procfs_register_meminfo
2021-02-12 03:16:03 -08:00
YAMAMOTO Takashi
c51e2a0cb3
esp32_imm.c: Report the usage with procfs_register_meminfo
2021-02-12 03:16:03 -08:00
Alan C. Assis
f56ff40101
Add esp32_gpio_matrix_in/out to replace ROM functions
2021-02-11 20:39:51 +00:00
Masayuki Ishikawa
c024b414f8
arch: cxd56xx: Introduce driver-specific spinlock in cxd56_serial.c
...
Summary:
- This commit introduces driver-specific spinlock in cxd56_serial.c
to improve performance
Impact:
- SMP only
Testing:
- Tested with spresense:wifi and spresense:wifi_smp
Signed-off-by: Masayuki Ishikawa <Masayuki.Ishikawa@jp.sony.com>
2021-02-09 11:29:18 -08:00
chenwen
dcec04f5b2
xtensa/esp32: Writeback PSRAM data when mapping SPI Flash address to ESP32's address bus
2021-02-09 08:26:45 -03:00
YAMAMOTO Takashi
2220827463
esp32_allocateheap.c: Add a sanity check
2021-02-09 07:51:12 +00:00
YAMAMOTO Takashi
63c08a79be
esp32_allocateheap.c: Add a comment
2021-02-09 07:51:12 +00:00
Gustavo Henrique Nihei
a8cf8abfaa
esp32: Create chip selection config to improve capabilities refinement
2021-02-08 21:17:22 +00:00
hotislandn
84daebf2cc
arch:risc-v:bl602: enable FPU for this target.
2021-02-08 00:29:34 -08:00
Masayuki Ishikawa
d87f350831
arch, boards, drivers, include, sched, wireless: Change spinlock APIs.
...
Summary:
- This commit changes spinlock APIs (spin_lock_irqsave/spin_unlock_irqrestore)
- In the previous implementation, the global spinlock (i.e. g_irq_spin) was used.
- This commit allows to use caller specific spinlock but also supports to use
g_irq_spin for backword compatibility (In this case, NULL must be specified)
Impact:
- None
Testing:
- Tested with the following configurations
- spresnse:wifi, spresense:wifi_smp
- esp32-devkitc:smp (QEMU), sabre6-quad:smp (QEMU)
- maxi-bit:smp (QEMU), sim:smp
- stm32f4discovery:wifi
Signed-off-by: Masayuki Ishikawa <Masayuki.Ishikawa@jp.sony.com>
2021-02-07 21:28:56 -08:00
Abdelatif Guettouche
6547c3df55
arch/riscv: Fix file names in headers that were still using the old 'up_' prefix.
...
Signed-off-by: Abdelatif Guettouche <abdelatif.guettouche@espressif.com>
2021-02-05 21:19:20 -03:00
Gustavo Henrique Nihei
29b9cf652e
xtensa/esp32: Add extern modifier to ROM function declaration
2021-02-05 14:05:44 -03:00
Abdelatif Guettouche
685c2ce506
esp32_spiflash.c: Fix preprocessor condition.
...
Signed-off-by: Abdelatif Guettouche <abdelatif.guettouche@espressif.com>
2021-02-05 12:16:55 -03:00
Masayuki Ishikawa
96d4bc11c0
arch: s32k1xx: Fix style warnings in s32k1xx_edma.c
...
Summary:
- This commit fixes style warnings in s32k1xx_edma.c
Impact:
- None
Testing:
- N/A
Signed-off-by: Masayuki Ishikawa <Masayuki.Ishikawa@jp.sony.com>
2021-02-04 21:49:16 -08:00
Masayuki Ishikawa
9f414cf6db
arch: max32660: Fix style warnings and compile errors
...
Summary:
- This commit fixes style warnings under max32660
- Also fix compile errors in max32660_gpio.c with CONFIG_DEBUG_GPIO_INFO=y
Impact:
- None
Testing:
- Built with max32660-evsys:nsh
Signed-off-by: Masayuki Ishikawa <Masayuki.Ishikawa@jp.sony.com>
2021-02-04 21:49:16 -08:00
Masayuki Ishikawa
dabd835bb7
arch: imxrt: Fix style warnings in imxrt_edma.[c,h]
...
Summary:
- This commit fixes style warnings in imxrt_edna.[c,y]
Impact:
- None
Testing:
- N/A
Signed-off-by: Masayuki Ishikawa <Masayuki.Ishikawa@jp.sony.com>
2021-02-04 21:49:16 -08:00
Alan C. Assis
c4f87977dc
xtensa/esp32: Fix cache issue detected by DEBUG_ASSERTION
2021-02-04 21:22:01 +00:00
Masayuki Ishikawa
12a515ebb6
arch: imxrt: Introduce CONFIG_NET_GUARDSIZE to imxrt_enet.c
...
Summary:
- In the previous imxrt_enet.c, imxrt_enet.c assumed that
CONFIG_NET_ETH_PKTSIZE includes the ethernet CRC (4bytes)
- However, most of the driver implementation explicitly
add CONFIG_NET_GUARDSIZE for the CRC to the internal buffer
- This commit conforms to such rules
Imapct:
- No impact
Testing:
- Tested with iperf with imxrt1060-evk
- NOTE: need to add the following configs
+CONFIG_EXAMPLES_IPERF=y
+CONFIG_EXAMPLES_IPERFTEST_DEVNAME="eth0"
+CONFIG_IOB_NBUFFERS=128
+CONFIG_NET_ETH_PKTSIZE=1514
+CONFIG_NET_GUARDSIZE=4
+CONFIG_RR_INTERVAL=200
Signed-off-by: Masayuki Ishikawa <Masayuki.Ishikawa@jp.sony.com>
2021-02-04 00:29:07 -08:00
Huang Qi
aabb870d6b
stm32f7/stm32_qspi.c: Fix warning of format strings
...
Signed-off-by: Huang Qi <huangqi3@xiaomi.com>
2021-02-03 08:49:46 +00:00
David Sidrane
18ce105e8b
stm32f412:Corrected Pin count
...
Port C was not working because the GPIO pin count was
wrong. The 48 pin packages has 34 GPIO (Not counting PH0 & PH1)
It is GPIOA GPIO B (sans PB11) and GPIOC PC13-PC15
2021-02-02 18:41:39 -08:00
Matias N
45b392be7e
nRF52: add support for building SoftDevice BLE controller
2021-02-02 14:40:26 -08:00
Matias N
74e7e2b5b2
nRF52 tickless RTC: fix timer not firing on edge case
...
The calls via RTC API weren't fast enough for the edge case
of minimum counter value, resulting in the timer never
expiring as the counter had already passed the compare value.
This now uses direct register access functions and also
gets the latest counter value in edge case.
2021-02-02 14:37:22 -08:00
Matias N
27ac9a6948
nRF52 SPI: fix for RX transfers when !SPI_EXCHANGE
2021-02-02 14:37:22 -08:00
Matias N
e9a45ea183
nRF52 SPI: use PPI API instead of direct register access
2021-02-02 14:37:22 -08:00
Peter van der Perk
22437698f1
[imxrt] Fix FlexCAN tx dropping frames
2021-02-02 17:51:29 -03:00
Abdelatif Guettouche
5447f28742
riscv: Remove the nx_start prototype from riscv_internal.h
...
This function is already declared in include/nuttx/init.h include this
file instead.
Signed-off-by: Abdelatif Guettouche <abdelatif.guettouche@espressif.com>
2021-02-02 17:48:40 -03:00
Abdelatif Guettouche
db2a8f0dc5
arch/risc-v: Remove incorrect ARM references.
...
Signed-off-by: Abdelatif Guettouche <abdelatif.guettouche@espressif.com>
2021-02-02 17:48:06 -03:00
Abdelatif Guettouche
37b93bd498
arch/risc-v: Don't declare riscv_addregion if CONFIG_MM_REGIONS is < 1.
...
Don't declare riscv_addregion if CONFIG_MM_REGIONS is < 1, so we won't
have to provide a dummy stub for every chip.
Also rename the function from up_addregion to riscv_addregion since it's
not exported outside the arch directory.
Signed-off-by: Abdelatif Guettouche <abdelatif.guettouche@espressif.com>
2021-02-01 18:45:25 -08:00
Pavel Pisa
56be7c54ea
arch/arm/src/samv7/sam_mcan.c: fix some mismatches caused by renaming.
...
The MCAN driver private structure has been renamed to struct sam_mcan_s,
but some functions reference sam_can_s. There are missing defines
of return variable in some functions.
Signed-off-by: Pavel Pisa <ppisa@pikron.com>
2021-02-01 18:28:35 -08:00
Nathan Hartman
d82cc3ccc6
arch/stm32f7: Fix nxstyle errors
...
arch/arm/src/stm32f7/chip.h,
arch/arm/src/stm32f7/stm32_adc.h,
arch/arm/src/stm32f7/stm32_allocateheap.c,
arch/arm/src/stm32f7/stm32_bbsram.h,
arch/arm/src/stm32f7/stm32_can.h,
arch/arm/src/stm32f7/stm32_capture.c,
arch/arm/src/stm32f7/stm32_capture.h:
* Fix nxstyle errors.
2021-01-31 19:55:34 +00:00
Alan C. Assis
b0d611d3dc
Replace ARM_LWL_CONSOLE with generic LWL_CONSOLE
2021-01-31 06:14:50 -08:00
Abdelatif Guettouche
52b4c73a61
arch/riscv: Remove references to MIPS.
...
Signed-off-by: Abdelatif Guettouche <abdelatif.guettouche@espressif.com>
2021-01-30 15:46:38 -08:00
Xiang Xiao
418a87af4c
arch/sim: Fix typo error(HCITTY->BTUART)
...
Signed-off-by: Xiang Xiao <xiaoxiang@xiaomi.com>
2021-01-30 15:43:03 -08:00
Masayuki Ishikawa
5bcdeb0851
arch: imx6: Fix a compile error with CONFIG_DEBUG_ASSERTIONS=y
...
Summary:
- This commit fixes a compile error in imx_enet.c
with CONFIG_DEBUG_ASSERTIONS=y
Impact:
- None
Testing:
- Tested with sabre-6quad:netnsh with QEMU
Signed-off-by: Masayuki Ishikawa <Masayuki.Ishikawa@jp.sony.com>
2021-01-29 12:09:47 -03:00
Masayuki Ishikawa
585884fde9
arch: imx6: Add CONFIG_IMX_ENET_NTXBUFFERS check in imx_enet.c
...
Summary:
- This commit checks CONFIG_IMX_ENET_NTXBUFFERS without
CONFIG_NET_TCP_WRITE_BUFFERS
Impact:
- None
Testing:
- Tested with sabre-6quad:netnsh with QEMU
Signed-off-by: Masayuki Ishikawa <Masayuki.Ishikawa@jp.sony.com>
2021-01-29 00:05:01 -08:00
Masayuki Ishikawa
6140969f16
arch: imx6: Fix imx_enet.c if CONFIG_IMX_ENET_NTXBUFFERS=1
...
Summary:
- This commit fixes imx_enet.c if CONFIG_IMX_ENET_NTXBUFFERS=1
- Also adds some ninfo() debug messages
Impact:
- imx_enet.c only
Testing:
- Tested with sabre-6quad:netnsh with QEMU
Signed-off-by: Masayuki Ishikawa <Masayuki.Ishikawa@jp.sony.com>
2021-01-28 18:41:34 -08:00
Alan C. Assis
bf384a7e33
esp32/psram: Fix missing configs
2021-01-28 05:14:36 -08:00
Masayuki Ishikawa
977367ce04
arch: imx6: Apply the latest imxrt/imxrt_enet.c to imx6/imx_enet.c
...
Summary:
- Since imx_enet.c is based on imxrt_enet.c and still under debugging,
the differences should be minimum to keep tracking the changes
Impact:
- None
Testing:
- Tested with sabre-6quad:netnsh with QEMU
Signed-off-by: Masayuki Ishikawa <Masayuki.Ishikawa@jp.sony.com>
2021-01-27 22:58:29 -08:00
Abdelatif Guettouche
0f2b774dec
arch/risc-v: Remove unused and undefined file section "Public Variables"
...
Signed-off-by: Abdelatif Guettouche <abdelatif.guettouche@espressif.com>
2021-01-27 18:40:10 -08:00
Abdelatif Guettouche
82aae4deb6
esp32/esp32_wifi_adapter.c: Print debug output only when DEBUG_WIRLESS*
...
are enabled.
Signed-off-by: Abdelatif Guettouche <abdelatif.guettouche@espressif.com>
2021-01-28 07:51:31 +09:00
Abdelatif Guettouche
6bc070024d
arch/xtensa/Kconfig: Reduce the default value of the internal memory.
...
The static memory is now divided at almost the middle to not override
the ROM data. The old 0x28000 will take all of what's left for heap
region1.
Signed-off-by: Abdelatif Guettouche <abdelatif.guettouche@espressif.com>
2021-01-27 09:49:58 -08:00
Matias N
e5200d4af9
nrf52: add stackcheck support
2021-01-27 09:49:16 -08:00
Masayuki Ishikawa
b9d4bd0854
arch: esp32: Fix compile errors with CONFIG_SMP=y
...
Summary:
- This commit fixes compile errors in esp32_spiflash.c and
esp32_wifi_adapter.c with CONFIG_SMP=y
Impact:
- SMP only
Testing:
- Tested with esp32-devkitc:wapi
- NOTE: the following configs need to be added.
+CONFIG_SMP=y
+CONFIG_SMP_IDLETHREAD_STACKSIZE=3072
+CONFIG_SMP_NCPUS=2
+CONFIG_SPINLOCK_IRQ=y
Signed-off-by: Masayuki Ishikawa <Masayuki.Ishikawa@jp.sony.com>
2021-01-27 04:47:05 -08:00
Alan C. Assis
6a87b85285
xtensa/esp32: Add efuse driver
2021-01-26 18:23:43 -08:00
Abdelatif Guettouche
6bf826acca
arch/xtensa/src/esp32/esp32_spiflash.c: Fix the value of the page start
...
address.
It was incorrectly taken from the size.
Signed-off-by: Abdelatif Guettouche <abdelatif.guettouche@espressif.com>
2021-01-26 15:27:16 -03:00
baggio63446333
7723ce46ce
arch: cxd56xx: Add I2C bitbang lower driver
...
Add I2C bitbang lower driver for cxd56xx.
2021-01-26 13:59:30 -03:00
Xiang Xiao
39f96361a3
arch/sim: Rename bthcitty driver to btuart driver
...
align with other soc naming style
Signed-off-by: Xiang Xiao <xiaoxiang@xiaomi.com>
2021-01-25 08:23:23 -08:00
Xiang Xiao
503780497a
board/sim: Support NuttX BLE stack through uart shim driver
...
and add new btuart config to test it
Signed-off-by: Xiang Xiao <xiaoxiang@xiaomi.com>
2021-01-24 19:04:37 -08:00
Matias N
d2f9544556
nRF52 GPIO: tiny optimization, do not decode PORT when no PORT1
2021-01-24 19:03:56 -08:00
Matias N
28caf27229
nRF52: add I2C bitbang implementation
2021-01-24 19:03:56 -08:00
Alin Jerpelea
56ef94086f
arch: arm: cxd56xx: update license to Apache 2.0
...
This is a license change to Apache 2.0 license.
Signed-off-by: Alin Jerpelea <alin.jerpelea@sony.com>
2021-01-25 09:09:30 +09:00
Xiang Xiao
7f2317e90a
Fix nxstyle warning
...
Signed-off-by: Xiang Xiao <xiaoxiang@xiaomi.com>
2021-01-22 08:34:07 +01:00
Xiang Xiao
94da3e4c3a
arch: Remove critical section inside up_schedule_sigaction
...
since nxsig_tcbdispatch already hold it for us
Signed-off-by: Xiang Xiao <xiaoxiang@xiaomi.com>
Change-Id: I2fe6ad840bdca3ec0eaa76a9af3b6929c7d5a721
2021-01-22 08:34:07 +01:00
Alan C. Assis
394cfba1d8
Fix himem debug assert error
2021-01-22 00:00:04 +01:00
Dong Heng
4bbc17454c
xtensa/esp32: Add AES hardware accelerator driver
2021-01-21 15:06:35 -03:00
David Sidrane
a2f82542ef
stm32f412:Replaced Kludged pinmap with one for SoC.
...
The stm32f412 was not a clean port. This is one step to fix
it. The shortcuts taken has caused more wasted hours finding
bad pin mappings then doing the job correctlry to begin with.
stm32:Kconfig Add CAN2 on STM32F412
2021-01-21 06:56:33 -08:00
Abdelatif Guettouche
c87e5965b7
xtensa/esp_allocateheap.c: Correct ROM memory boundries.
...
SMP was broken because the ROM memory wasn't set correctly. Some
regions were shared with the ROM code.
Signed-off-by: Abdelatif Guettouche <abdelatif.guettouche@espressif.com>
2021-01-21 11:13:19 -03:00
YAMAMOTO Takashi
a4a2d5ff7d
esp32_dma_init: Fix a dubious assertion
...
Requiring the size to be a multiple of 3 is a very strange restriction.
It doesn't even work with the default value of SPI_SLAVE_BUFSIZE.
I guess it was a typo.
2021-01-21 10:51:46 +01:00
YAMAMOTO Takashi
8c02b366f8
esp32_free_cpuint: Fix an assertion
...
The original assertion was wrong because:
* cpuint numbers for edge interrupts are not dense
(while ESP32_CPUINT_NEDGEPERIPHS is 4, EPS32_CPUINT_EDGESET is not 0xf.)
* This function is used for level interrupts too
2021-01-21 10:37:03 +01:00
Matias N
ed5e494298
nRF52: FIX wrong bitmask for DRIVE setting
...
This bug made certain values of DRIVE setting
to be wrongly applied (which can be dangerous
under certain situations since for example H0D1
was mapped to H0H1).
2021-01-21 00:36:56 -08:00
Jiuzhu Dong
f6cfd1c87b
vfork: support sim vfork
...
N/A
Change-Id: I15920bcbacfc5ea519cfe12c39cb64dfe6365838
Signed-off-by: Jiuzhu Dong <dongjiuzhu1@xiaomi.com>
2021-01-20 08:39:17 -08:00
chao.an
a32856f965
sim/hcitty: remove the poll lock to avoid invalid wait
...
it it unnecessary to protect pollnotify() since the wakeup
source comes from idle thread
Signed-off-by: chao.an <anchao@xiaomi.com>
2021-01-19 03:38:15 -08:00
Matias N
5fc34a6e8c
nRF52: support stack coloration
2021-01-18 17:29:36 -03:00
Nathan Hartman
3620728db2
arch/stm32h7: Fix nxstyle errors
...
arch/arm/src/stm32h7/stm32_dtcm.c:
arch/arm/src/stm32h7/stm32_lowputc.c:
* Fix nxstyle issues.
2021-01-18 17:28:05 -03:00
Xiang Xiao
34a300b647
arch/sim: Fix up_hcitty.c:366:20: warning: ‘eventset’ may be used uninitialized
...
Signed-off-by: Xiang Xiao <xiaoxiang@xiaomi.com>
2021-01-18 11:20:06 -03:00
Xiang Xiao
aa37399c89
arch/sim: Extend hcitty_register to accept device name
...
Signed-off-by: Xiang Xiao <xiaoxiang@xiaomi.com>
2021-01-18 11:20:06 -03:00
Xiang Xiao
8c8c30b9d7
arch/sim: Rename g_hcitty_ops to g_bthcitty_ops
...
Signed-off-by: Xiang Xiao <xiaoxiang@xiaomi.com>
2021-01-18 11:20:06 -03:00
Xiang Xiao
db0b661f37
arch/sim: Don't potect recvsem in bthcitty_pollnotify
...
Signed-off-by: Xiang Xiao <xiaoxiang@xiaomi.com>
2021-01-18 11:20:06 -03:00
Dong Heng
eb2937003b
xtensa/esp32: Fix ESP32 SPI driver issues
...
1. reset SPI hardware when deinitializing
2. reset SPI priavte configuration data when deinitializing
3. free interrupt when deinitializing
2021-01-18 12:54:12 +01:00
Brennan Ashton
b6fbcb649c
nrf52: Add a static copy buffer for i2c
...
Signed-off-by: Brennan Ashton <bashton@brennanashton.com>
2021-01-18 00:45:59 -08:00
Dong Heng
4693857b2c
xtensa/esp32: Fix ESP32 I2C driver issues
...
1. when sending a message in a group fails, exit immediately
2. when catch I2C error interrupt, close interrupt
3. clear clock configuration when deinit I2C
4. free I2C interrupt when deinit I2C
2021-01-18 09:23:47 +01:00
Brennan Ashton
3a64783273
nrf52: Add simple i2c test configuration
...
Signed-off-by: Brennan Ashton <bashton@brennanashton.com>
2021-01-17 23:46:01 -08:00
raiden00pl
0f1c026a16
nrf52_i2c: add support for I2C_M_NOSTART flags
2021-01-17 13:39:28 -08:00
Nathan Hartman
df8139c59b
arch/stm32h7: Fix nxstyle errors
...
arch/arm/src/stm32h7/stm32_rtc.c:
arch/arm/src/stm32h7/stm32_rtc.h:
* Fix nxstyle issues.
2021-01-17 09:52:17 -08:00
chao.an
328b7c06bc
sim/hcitty: add hcitty adapter
...
add support to attach the devices via HCI TTY to Bluetooth Host
Reference:
drivers/wireless/bluetooth/bt_uart_shim.c
Signed-off-by: chao.an <anchao@xiaomi.com>
2021-01-16 21:32:10 -08:00
Matias N
93ef2e7174
nrf52 GPIO: set GPIO drive setting and missing input buffer configuration
2021-01-16 21:04:44 -08:00
Matias N
2fcfd63f8e
nrf52: fix build without serial
2021-01-16 21:04:44 -08:00
Matias N
6f3f1c07fb
nrf52 i2c: disable peripheral while configuring
2021-01-16 21:04:44 -08:00
Matias N
e1b3374bce
nrf52 spi: build fixes and a missing register setting (polarity)
2021-01-16 21:04:44 -08:00
Matias N
ebe596bcd1
nrf52: enable and fix build for SPI BITORDER
2021-01-16 21:04:44 -08:00
Matias N
5d4463121f
nrf52: fix SPI3 irq macro naming
2021-01-16 21:04:44 -08:00
Matias N
c526f01ba7
nrf52: fix build for PWM without multichan enabled
2021-01-16 21:04:44 -08:00
Masayuki Ishikawa
497e2f9e0c
arch: tiva: Fix lm3s_ethernet.c with DEBUGASSERT
...
Summary:
- This commit fixes DEBUGASSERT in lm3s_ethernet.c
Impact:
- lm3s_ethernet.c only
Testing:
- Tested with lm3s6965-ek:discover with QEMU
Signed-off-by: Masayuki Ishikawa <Masayuki.Ishikawa@jp.sony.com>
2021-01-16 10:40:17 +01:00
Nathan Hartman
75d3ae959f
arch/stm32h7: Fix nxstyle errors
...
arch/arm/src/stm32h7/stm32_sdmmc.h:
* Fix nxstyle issues.
2021-01-15 23:23:08 +01:00
Nathan Hartman
fda9f63bd8
arch/stm32h7: Fix nxstyle errors
...
arch/arm/src/stm32h7/stm32_tim.c:
* Fix nxstyle issues.
2021-01-15 23:23:08 +01:00
Nathan Hartman
c76fd28b83
arch/stm32h7: Fix nxstyle errors
...
arch/arm/src/stm32h7/stm32_uid.c:
* Fix nxstyle issues.
2021-01-15 23:23:08 +01:00
Nathan Hartman
07b1014ef0
arch/stm32h7: Fix nxstyle errors
...
arch/arm/src/stm32h7/stm32_usbhost.h:
* Fix nxstyle issues.
2021-01-15 23:23:08 +01:00
Nathan Hartman
938db2fa9e
arch/stm32h7: Fix nxstyle errors
...
arch/arm/src/stm32h7/stm32_userspace.c:
arch/arm/src/stm32h7/stm32_userspace.h:
* Fix nxstyle issues.
2021-01-15 23:23:08 +01:00
Abdelatif Guettouche
c00141c41a
arch/xtensa/Kconfig: The ESP32 has a different numbers for vectors and
...
IRQs.
Signed-off-by: Abdelatif Guettouche <abdelatif.guettouche@espressif.com>
2021-01-15 09:47:33 +01:00
Masayuki Ishikawa
5f0e334974
arch: cxd56xx: Fix a compile warning with CONFIG_DEBUG_ERROR=y
...
Summary:
- This commit fixes a compile warning in cxd56_sdhci.c
Impact:
- None
Testing:
- Built with spresense:wifi
Signed-off-by: Masayuki Ishikawa <Masayuki.Ishikawa@jp.sony.com>
2021-01-14 20:48:25 -06:00
liang
caf2d1430e
arch/risc-v/bl602: add gpioirq and i2c(master) driver
2021-01-14 08:55:03 -08:00
Abdelatif Guettouche
8e4397968c
net/ & esp32/wlan: Fix some typos and nxstyle issues.
...
Signed-off-by: Abdelatif Guettouche <abdelatif.guettouche@espressif.com>
2021-01-14 07:57:27 -06:00
YAMAMOTO Takashi
27a49331fc
sim: Link libc++abi for LIBCXX + macOS
2021-01-14 04:26:12 -06:00
David Sidrane
657088318a
stm32412: Fixes pinmap CAN1
2021-01-13 11:01:44 -06:00
Nathan Hartman
095d99717b
arch/stm32h7: Fix nxstyle errors
...
arch/arm/src/stm32h7/stm32_rcc.c:
arch/arm/src/stm32h7/stm32_rcc.h:
* Fix nxstyle issues.
2021-01-13 11:01:03 -06:00
YAMAMOTO Takashi
ca0932f842
esp32_i2c.c: Remove useless casts
2021-01-13 11:04:59 +01:00
Xiang Xiao
0dc6990166
Fix nxstyle warning
...
Signed-off-by: Xiang Xiao <xiaoxiang@xiaomi.com>
2021-01-13 08:57:58 +01:00
Xiang Xiao
0536953ded
Kernel module should prefer functions with nx/kmm prefix
...
Signed-off-by: Xiang Xiao <xiaoxiang@xiaomi.com>
2021-01-13 08:57:58 +01:00
Nathan Hartman
15480e51cf
arch/stm32h7: Fix nxstyle errors
...
arch/arm/src/stm32h7/stm32_qencoder.c:
* Fix nxstyle issues.
2021-01-12 19:06:44 +01:00
liang
32708ab849
arch/risc-v/bl602 : add spiflash(hardware sf controller)
2021-01-11 17:59:00 -08:00
Dong Heng
7a953bb154
xtensa/esp32: Fix ESP32 SPI3 slave ops data error
2021-01-11 09:10:18 +01:00
Xiang Xiao
fbc68912b9
arch/sim: Simplify SYMBOL macro definition
...
Change-Id: I1772b65b9bbe29917885e432056f84921b562eb0
Signed-off-by: Xiang Xiao <xiaoxiang@xiaomi.com>
2021-01-10 11:10:09 +01:00
liang
2889315c20
arch/risc-v/bl602 : add pwm onshot watchdog driver.
2021-01-06 23:40:37 -08:00
Nathan Hartman
2cfbfa8213
arch/stm32h7: Fix nxstyle errors
...
arch/arm/src/stm32h7/stm32_pwr.c:
* Fix nxstyle issues.
2021-01-07 01:11:43 +01:00
Nathan Hartman
f30097d0ab
arch/stm32h7: Fix nxstyle errors
...
arch/arm/src/stm32h7/stm32_pmstop.c:
* Fix nxstyle issues.
2021-01-07 01:11:43 +01:00
Nathan Hartman
4c82459851
arch/stm32h7: Fix nxstyle errors
...
arch/arm/src/stm32h7/stm32_dma.h:
* Fix nxstyle issues.
2021-01-07 01:11:43 +01:00
Nathan Hartman
8cc9308da7
arch/stm32h7: Fix nxstyle errors
...
arch/arm/src/stm32h7/chip.h:
* Fix nxstyle issues.
2021-01-07 01:11:43 +01:00
ligd
f63db66382
mqueue: add file_mq_xx for kernel use
...
Change-Id: Ida12f5938388cca2f233a4cde90277a218033645
Signed-off-by: ligd <liguiding1@xiaomi.com>
2021-01-05 02:40:43 -06:00
Nathan Hartman
4ccaedf91f
arch/stm32h7: Fix nxstyle errors
...
arch/arm/src/stm32h7/stm32_adc.c:
arch/arm/src/stm32h7/stm32_adc.h:
* Fix nxstyle issues.
2021-01-04 13:04:51 -06:00
Dong Heng
fadae0bf39
xtensa/esp32: Fix ESP32 serial UART tx ready check error
2021-01-04 09:19:53 +01:00
Nathan Hartman
ec0b2f063c
arch/stm32h7: Fix nxstyle errors
...
arch/arm/src/stm32h7/stm32_bbsram.h:
* Fix nxstyle issues.
2021-01-03 20:30:45 -06:00
Brennan Ashton
dd26d9c9f9
BL602: Add support for system reboot modes
...
Signed-off-by: Brennan Ashton <bashton@brennanashton.com>
2021-01-02 00:14:37 -06:00
Nathan Hartman
7592fc17d3
arch/stm32: Fix nxstyle errors
...
arch/arm/src/stm32/stm32_otghs.h:
* Fix nxstyle issues.
2021-01-01 18:17:03 +01:00
Nathan Hartman
588227ed7b
arch/stm32: Fix nxstyle errors
...
arch/arm/src/stm32/stm32_otgfs.h:
* Fix nxstyle issues.
2020-12-31 20:32:13 +01:00
Xiang Xiao
c647faa117
Fix nxstyle warning
...
Signed-off-by: Xiang Xiao <xiaoxiang@xiaomi.com>
2020-12-31 09:37:29 +01:00
Xiang Xiao
0defe43282
OS internal function should indicate the error by return negative value
...
instead to change errno value by calling set_errno
Signed-off-by: Xiang Xiao <xiaoxiang@xiaomi.com>
2020-12-31 09:37:29 +01:00
Brennan Ashton
c8db3293bb
BL602: Use sig mask instead of number for AHB swrst
2020-12-30 23:27:42 -06:00
Brennan Ashton
e062bd08ce
bl602: Update register defines and drivers
2020-12-30 23:27:42 -06:00
Nathan Hartman
81224cc596
arch/stm32: Fix nxstyle errors
...
arch/arm/src/stm32/stm32_spi.h:
* Fix nxstyle issues.
2020-12-30 10:20:15 -06:00
chao.an
961532a5da
arch/sim/hci: reuse the reserved fields of hci buffer
...
Reuse the reserved fields of hci buffer to avoid redundant packet type splitting
Change-Id: I79d70ae939111bb909a6e0981c50e401734590f2
Signed-off-by: chao.an <anchao@xiaomi.com>
2020-12-29 18:10:04 -08:00
chao.an
2ca99ed1be
sim/host/hcisocket: add avail/close interface
...
Change-Id: I3d96f62c4c3c7d703bfec74952953bee4aef9c7c
Signed-off-by: chao.an <anchao@xiaomi.com>
2020-12-29 18:10:04 -08:00
Nathan Hartman
763aae8155
arch/stm32: Fix nxstyle errors
...
arch/arm/src/stm32/stm32_rtc.h:
* Fix nxstyle issues.
2020-12-29 08:36:31 -06:00
Virus.V
5f71e2be79
fix ci build failed
2020-12-29 01:52:09 -08:00
Virus.V
3e0a84182e
check bl602 license
2020-12-29 01:52:09 -08:00
yangyue
d354a2f19f
fix some code style
2020-12-29 01:52:09 -08:00
Virus.V
12258d72d2
Fix the BL602 mtimer frequency error.
2020-12-29 01:52:09 -08:00
Virus.V
2b8e0945a9
Fix BL602 CI Build failed.
...
Modify the default configuration in KConfig.
Sync latest commit from mainline.
Remove unused demo configuration
fixup bl602 nsh defconfig cause CICD failed
Rebase from mainline code
2020-12-29 01:52:09 -08:00
Virus.V
7e84874cb1
Reconstruct bl602 readme; move up_irq_save/restore declaration to common place
2020-12-29 01:52:09 -08:00
Virus.V
ce40edbd11
Solve the problems pointed out in the comments
2020-12-29 01:52:09 -08:00
Virus.V
417d0d4ccd
fix checkpatch warning
2020-12-29 01:52:09 -08:00
Lei Chen
58bd873729
Add Basic support for BL602(UART timer CLIC)
2020-12-29 01:52:09 -08:00
Peter van der Perk
673a4b5b39
arch: S32K/Kinetis: Fix RTC settime prescaler
2020-12-28 23:32:33 +01:00
Sara Souza
65f39fc0c7
xtensa/esp32: Added driver api to reload counter instantly
2020-12-28 12:08:27 +01:00
Masayuki Ishikawa
b784fd6c3c
arch: cxd56xx: Replace license header with Apache License 2.0
...
Summary:
- This commit replaces SHES related headers under cxd56xx
Impact:
- No impact
Testing:
- Build check only
Signed-off-by: Masayuki Ishikawa <Masayuki.Ishikawa@jp.sony.com>
2020-12-28 08:43:35 +01:00
dongjiuzhu
b83ae99456
rpmsg_uart: fix compile break when enable rptun
...
nuttx.rel: In function `rpmsg_serialinit':
nuttx/arch/sim/src/sim/up_rptun.c:257: undefined reference to `uart_rpmsg_init'
collect2: error: ld returned 1 exit status
Makefile:310: recipe for target 'nuttx' failed
Change-Id: I93a20941bc07f749165dc8f012da46ddb7b02b00
Signed-off-by: dongjiuzhu <dongjiuzhu1@xiaomi.com>
2020-12-25 21:07:04 +01:00
YAMAMOTO Takashi
e1c53eaeb0
arch/sim/include/irq.h: Make 32-bit xcpt_reg_t unsigned
...
* 64-bit version is already unsigned
* up_copyfullstate uses unsigned for 32-bit
Error: sim/up_unblocktask.c:107:33: error: pointer targets in passing argument 1 of 'up_copyfullstate' differ in signedness [-Werror=pointer-sign]
107 | up_savestate(rtcb->xcp.regs);
| ~~~~~~~~~^~~~~
| |
| xcpt_reg_t * {aka int *}
sim/up_internal.h:133:45: note: in definition of macro 'up_savestate'
133 | #define up_savestate(regs) up_copyfullstate(regs, (xcpt_reg_t *)CURRENT_REGS)
| ^~~~
sim/up_internal.h:205:33: note: expected 'uint32_t *' {aka 'unsigned int *'} but argument is of type 'xcpt_reg_t *' {aka 'int *'}
205 | void up_copyfullstate(uint32_t *dest, uint32_t *src);
| ~~~~~~~~~~^~~~
2020-12-24 21:57:39 -06:00
Nathan Hartman
080b2dfceb
arch/stm32: Fix nxstyle errors
...
arch/arm/src/stm32/stm32_exti.h:
arch/arm/src/stm32/stm32_flash.c:
arch/arm/src/stm32/stm32_fsmc.c:
arch/arm/src/stm32/stm32_fsmc.h:
arch/arm/src/stm32/stm32_hciuart.h:
arch/arm/src/stm32/stm32_mpuinit.h:
arch/arm/src/stm32/stm32_rtc.c:
* Fix nxstyle issues.
2020-12-24 23:21:16 +01:00
chao.an
08b22784c3
sim/names: add writev/readv into name list
...
Signed-off-by: chao.an <anchao@xiaomi.com>
2020-12-24 11:09:59 -03:00
Nathan Hartman
dad32ccd47
arch/stm32: Fix nxstyle errors
...
arch/arm/src/stm32/stm32_dma.h:
* Fix nxstyle issues.
2020-12-23 20:35:42 -06:00
Masayuki Ishikawa
ace6e70f57
arch: imx6: Add imx_enet driver
...
Summary:
- This commit adds imx_enet driver derived from imxrt_enet
Impact:
- imx6 only
Testing:
- Tested with sabre-6quad:netnsh
- NOTE: telnetd works with QEMU
2020-12-23 16:56:25 -03:00
Masayuki Ishikawa
1725e50a13
arch: imx6: Fix peripheral IP offsets in AIPS-2
...
Summary:
- This commit fixes peripheral IP offsets in AIPS-2
Impact:
- No impact because there is no drivers
Testing:
- Tested with sabre-6quad:nsh and sabre-6quad:smp
2020-12-23 16:56:25 -03:00