Gregory Nutt
|
67b5785d58
|
Kconfigs: Interrupt prioritization should not be automatically selected
|
2013-12-20 08:42:54 -06:00 |
|
Gregory Nutt
|
ed56d3aa83
|
Replace explicit hex MMU value with definition
|
2013-12-18 12:47:43 -06:00 |
|
Gregory Nutt
|
e9d7ab1ba3
|
A10: Extend register debug logic
|
2013-12-18 11:26:48 -06:00 |
|
Gregory Nutt
|
447e79dccc
|
Fix bad register name in INTC debug function
|
2013-12-18 10:14:12 -06:00 |
|
Gregory Nutt
|
e23dcc6384
|
Cortex-A: Fix start-up cache invalidation logi
|
2013-12-18 09:01:43 -06:00 |
|
Gregory Nutt
|
d67eeb1f8a
|
A10: Make sure that interrupts are disabled and cleared
|
2013-11-17 11:40:58 -06:00 |
|
Gregory Nutt
|
a542164b1d
|
Page lies in SRAM A2 not A1
|
2013-11-17 10:37:10 -06:00 |
|
Gregory Nutt
|
fa3593a2c5
|
Remove executable mode bits
|
2013-11-17 08:27:11 -06:00 |
|
Gregory Nutt
|
d46dd5f8e2
|
A10: Fix DDR mapping
|
2013-12-17 09:22:27 -06:00 |
|
Gregory Nutt
|
1771b69b62
|
Cosmetic changes to comments and README files
|
2013-12-16 13:48:20 -06:00 |
|
Gregory Nutt
|
cbe5751c3b
|
Trivial updates to comments and README files
|
2013-12-16 11:13:55 -06:00 |
|
Gregory Nutt
|
96918171ee
|
Review Cortex-A9 CP15 registers and update register definitions
|
2013-12-16 10:23:29 -06:00 |
|
Gregory Nutt
|
93914d8686
|
Back port some A10 changes into the SAMA5 memory map definitions
|
2013-12-16 09:21:55 -06:00 |
|
Gregory Nutt
|
c4380b5a8f
|
ARMv7-A: If the page table does not like in same address range as .text and primary RAM, then we will need to set up an additional mapping for the page table at boot time.
|
2013-12-16 08:26:07 -06:00 |
|
Gregory Nutt
|
9f01df47ea
|
Create procfs_utils.c; File missed from last commit; + remove warning from mm_memalign.c (how did this work before?)
|
2013-12-14 08:53:23 -06:00 |
|
Gregory Nutt
|
623229057f
|
A10 serial driver (still needs some work). From Alan Carvalho de Assis
|
2013-12-13 16:41:44 -06:00 |
|
Gregory Nutt
|
c5f56cb39b
|
Eliminate some warnings in the pcDuino A10 build
|
2013-12-13 13:09:45 -06:00 |
|
Gregory Nutt
|
756fd631ca
|
A10: Add A10 configuration header file
|
2013-12-13 12:53:33 -06:00 |
|
Gregory Nutt
|
d6b81cc7ef
|
A10: Timer interrupt handler
|
2013-12-13 12:42:26 -06:00 |
|
Gregory Nutt
|
124bd68c6f
|
Finish A10 Timer register definitions
|
2013-12-13 11:44:52 -06:00 |
|
Gregory Nutt
|
c0367fcc0a
|
Beginning of Timer register definition file for the A10
|
2013-12-12 12:27:30 -06:00 |
|
Gregory Nutt
|
1f097aa856
|
A10/pcDuino/Linux build fixes
|
2013-12-11 17:05:08 -06:00 |
|
Gregory Nutt
|
70a8510fb9
|
A10: Re-vamp pin configuratin header file
|
2013-12-11 14:40:52 -06:00 |
|
Gregory Nutt
|
482d94cfd2
|
A10+pcDuino: PIO support, LED and button support
|
2013-12-11 13:23:40 -06:00 |
|
Gregory Nutt
|
06f08899dc
|
A10 PIO register definition header file
|
2013-12-10 15:53:32 -06:00 |
|
Gregory Nutt
|
e282aad903
|
Move include/nuttx/fb.h to include/nuttx/video/fb.h
|
2013-12-10 09:23:54 -06:00 |
|
Gregory Nutt
|
bdfb2f7eb6
|
More OV2640 initialization logic
|
2013-12-10 09:10:39 -06:00 |
|
Gregory Nutt
|
ae10aea36c
|
A10 peripheral selection logic
|
2013-12-09 15:24:54 -06:00 |
|
Gregory Nutt
|
59d5c8151d
|
A little SAMA5 camera stuff
|
2013-12-09 14:20:11 -06:00 |
|
Gregory Nutt
|
0297ed0966
|
A10 UART: Register definition header file
|
2013-12-09 14:18:32 -06:00 |
|
Gregory Nutt
|
4d07c15932
|
Add OV2640 camera support to test the SAMA5 ISI peripheral
|
2013-12-09 10:51:22 -06:00 |
|
Gregory Nutt
|
227cddccfa
|
A10: Re-write of interrupt management logic
|
2013-12-09 07:47:15 -06:00 |
|
Gregory Nutt
|
4a3629180e
|
A10 interrupt logic
|
2013-12-08 10:18:28 -06:00 |
|
Gregory Nutt
|
c661c4014f
|
A10 mmu configuration and INTC register definitions
|
2013-12-08 09:11:52 -06:00 |
|
Gregory Nutt
|
ae044a485c
|
pcDuino: More changes to get the code fragments that are in place building successfully
|
2013-12-07 16:44:23 -06:00 |
|
Gregory Nutt
|
22fefb59da
|
Add board support infrastructure for the pcDuino board. There is not much there on the initial checkin
|
2013-12-07 14:25:35 -06:00 |
|
Gregory Nutt
|
05759e0721
|
Add basic directory structure to support the Allwinner A10
|
2013-12-07 13:06:34 -06:00 |
|
Gregory Nutt
|
7b6b2bbd7c
|
Minor updates to comments and README files
|
2013-12-07 07:00:48 -06:00 |
|
Gregory Nutt
|
9afdaa6744
|
SAMA5 NAND: Fix some DMA-related issues
|
2013-12-06 13:04:15 -06:00 |
|
Gregory Nutt
|
08e027b42f
|
SAMA5 NAND: bugfixes
|
2013-12-06 11:34:29 -06:00 |
|
Gregory Nutt
|
6157214f4c
|
SAMA5 NAND: Fix several bugs associated with PMECC data transfers
|
2013-12-05 18:20:32 -06:00 |
|
Gregory Nutt
|
692b087d07
|
LM: Don't initialize .data if running in SRAM. Global missing intialize type. SAMA5 NAND: Fix for read nand in smaller chunks
|
2013-12-05 10:37:55 -06:00 |
|
Gregory Nutt
|
422b225401
|
Cosmetic updates to comments and READMEs
|
2013-12-04 16:41:45 -06:00 |
|
Gregory Nutt
|
698baf9baa
|
LPC31 EHCI: Fix errors in DEBUGASSERT statements
|
2013-12-04 14:29:24 -06:00 |
|
Gregory Nutt
|
adc0b36c8f
|
SAMA5 NAND: PMECC logic was reading past the end of the user buffer
|
2013-12-04 13:14:26 -06:00 |
|
Gregory Nutt
|
ae01f868b2
|
SAMA5 NAND: Fix some PMECC setup logic
|
2013-12-04 11:56:56 -06:00 |
|
Gregory Nutt
|
13010883eb
|
SAMA5 NAND: Do not perform DMA on small transfers
|
2013-12-04 07:41:29 -06:00 |
|
Gregory Nutt
|
2318531d93
|
Condition out most of the recent NXFFS changes for NAND. NXFFS will never be able to support NAND
|
2013-12-03 13:11:11 -06:00 |
|
Gregory Nutt
|
59c4739312
|
SAMA5 DMA: Address of next descriptor in list is a physical address
|
2013-12-03 09:48:13 -06:00 |
|
Gregory Nutt
|
875b49913a
|
SAMA5 NAND: Only CS3 can have NAND
|
2013-12-03 06:59:22 -06:00 |
|
Gregory Nutt
|
d46001a4ba
|
Kconfigs: Fix and issue with SERCOMM_CONSOLE being define in two places
|
2013-12-02 17:21:46 -06:00 |
|
Gregory Nutt
|
006db0be7c
|
SAMA5 NAND: Can't DMA using DMAC1. Add lots of NAND DMA debug instrumentation
|
2013-12-02 17:15:57 -06:00 |
|
Gregory Nutt
|
5f76fe9cb4
|
SAMA5 NAND: Basic NAND access now work (software ECC and no DMA)
|
2013-12-01 18:21:41 -06:00 |
|
Gregory Nutt
|
0c8ffc6d83
|
SAMA5 NAND: Return value should not be ignored
|
2013-12-01 13:39:28 -06:00 |
|
Gregory Nutt
|
360a451268
|
ViewTool STM32F107: Basic NSH checks out okay
|
2013-12-01 10:05:40 -06:00 |
|
Gregory Nutt
|
c50277149f
|
SAMA5 NAND: Fix some race conditions in checking status bits
|
2013-11-30 14:17:32 -06:00 |
|
Gregory Nutt
|
2b3f691fef
|
SAMA5 EHCI: Fix case when interrupt endpoints enabled
|
2013-11-29 16:42:44 -06:00 |
|
Gregory Nutt
|
25f7e45708
|
Make naming consistent for USB host initialiation functions
|
2013-11-29 14:31:44 -06:00 |
|
Gregory Nutt
|
4c7cc446c1
|
LPC31 EHCI: Verified that driver works with keyboard (low-speed, interrupt endpoints)
|
2013-11-29 14:31:42 -06:00 |
|
Gregory Nutt
|
15274c82fc
|
SAMA5 NAND: Don't use HSMC interrupts. They occur to quickly and cause mysterious race conditions
|
2013-11-29 11:52:47 -06:00 |
|
Gregory Nutt
|
a2117320e3
|
LPC31 EHCI: Fixes so that high- and low-speed devices work with the EHCI host
|
2013-11-28 15:13:56 -06:00 |
|
Gregory Nutt
|
de797768cd
|
LPC31 EHCI: Make stream disable a configurable option
|
2013-11-28 13:30:06 -06:00 |
|
Gregory Nutt
|
1ea447867a
|
SAMA5 NAND: Still debugging
|
2013-11-28 12:21:33 -06:00 |
|
Gregory Nutt
|
755ee7f34b
|
STM32 F4: Add support for GPIOK and GPIOJ. From Ken Pettit
|
2013-11-28 08:13:59 -06:00 |
|
Gregory Nutt
|
afb0209207
|
LPC31 EHCI: Seems to work after re-ordering some initialization logic
|
2013-11-27 13:14:23 -06:00 |
|
Gregory Nutt
|
5fb0062d2d
|
SAMA5 NAND: A few bug fixes for integration. Still lots more to do
|
2013-11-27 11:04:40 -06:00 |
|
Gregory Nutt
|
ac275259bd
|
SAMA5 NAND: Fix some DMA related issues
|
2013-11-27 07:37:42 -06:00 |
|
Gregory Nutt
|
014a85af1b
|
SAMA5 DMA: Add an option to disable DMA for debug purposes
|
2013-11-26 06:55:14 -06:00 |
|
Gregory Nutt
|
0c3a0bfd3f
|
SAMA5 NAND: Changes made durint testing (still does not work)
|
2013-11-25 18:38:03 -06:00 |
|
Gregory Nutt
|
4483117a60
|
SAMA5 NAND: Trivial changes
|
2013-11-25 14:16:04 -06:00 |
|
Gregory Nutt
|
2be17cd41f
|
SAMA5 NAND: Fix a few race conditions
|
2013-11-25 13:53:58 -06:00 |
|
Gregory Nutt
|
45a4eba015
|
SAMA5D3x-EK NAND: Integrate SAMA5 NAND support into SAMA5D3x-EK board support
|
2013-11-25 12:10:24 -06:00 |
|
Gregory Nutt
|
20564e8c73
|
SAMA5 PMECC: Code complete
|
2013-11-25 09:04:41 -06:00 |
|
Gregory Nutt
|
0974441b79
|
SAMA5 NAND: Retrofit trim page logic
|
2013-11-24 14:57:30 -06:00 |
|
Gregory Nutt
|
2a103d9f4d
|
SAMA5 PMECC: Ported Gallois tables
|
2013-11-24 12:36:42 -06:00 |
|
Gregory Nutt
|
15f6e382cb
|
SAMA5 NAND: Finish upper part of PMECC logic; add HSMC interrupt handling
|
2013-11-24 11:51:30 -06:00 |
|
Gregory Nutt
|
d1b4f1c466
|
SAMA5 PMECC: More progress, still not complete
|
2013-11-24 09:37:59 -06:00 |
|
Gregory Nutt
|
e844610b98
|
SAMA5 PMECC: A little more
|
2013-11-23 11:26:33 -06:00 |
|
Gregory Nutt
|
f4c6a16c3d
|
SAMA5 PMECC: Some ROM-related interface updates
|
2013-11-23 10:06:33 -06:00 |
|
Gregory Nutt
|
d2ce5423cd
|
Cosmetic changes
|
2013-11-22 13:36:07 -06:00 |
|
Gregory Nutt
|
be8d067a1e
|
SAMA5 NAND: More stuff
|
2013-11-22 11:19:32 -06:00 |
|
Gregory Nutt
|
d46f24cdf8
|
LPC31xx EHCI: Power power changes
|
2013-11-21 18:25:10 -06:00 |
|
Gregory Nutt
|
eba19bef85
|
LPC3131 EHCI: More fixes
|
2013-11-21 16:39:49 -06:00 |
|
Gregory Nutt
|
37591022ca
|
LPC-H3131: SDRAM timing update. Still does not work
|
2013-11-21 14:46:49 -06:00 |
|
Gregory Nutt
|
e93894b53a
|
SAMA5 NAND: More progress
|
2013-11-21 11:13:08 -06:00 |
|
Gregory Nutt
|
22378d66c5
|
lpc31 ECHI. Early debug changes
|
2013-11-20 16:24:10 -06:00 |
|
Gregory Nutt
|
8f0c334d04
|
ARM9: More cache control functions
|
2013-11-20 15:24:14 -06:00 |
|
Gregory Nutt
|
31004d1cf7
|
SAMA5 NAND: Add block erase logic
|
2013-11-20 13:55:23 -06:00 |
|
Gregory Nutt
|
da5670d10b
|
LPC3131 EHCI: Add USB host tracing support
|
2013-11-19 15:48:02 -06:00 |
|
Gregory Nutt
|
448c8572cd
|
Rethinking some NAND interfaces
|
2013-11-19 08:50:12 -06:00 |
|
Gregory Nutt
|
a184224660
|
Add support for the Olimex LPC-H3131 board
|
2013-11-18 14:51:38 -06:00 |
|
Gregory Nutt
|
d8a3f21a47
|
Finishes up NAND software ECC logic
|
2013-11-18 11:42:17 -06:00 |
|
Gregory Nutt
|
3faa880ef1
|
MTD NAND: Beginning of software ECC logic
|
2013-11-18 09:43:44 -06:00 |
|
Gregory Nutt
|
d54832a942
|
More NAND stuff
|
2013-11-17 12:22:09 -06:00 |
|
Gregory Nutt
|
0e7a8668a5
|
Continuing NAND integration
|
2013-11-17 08:56:30 -06:00 |
|
Gregory Nutt
|
03b9f5a8e6
|
More NAND logic (still not complete)
|
2013-11-16 18:26:07 -06:00 |
|
Gregory Nutt
|
d421eb4fd6
|
Futher NAND development
|
2013-11-16 13:19:09 -06:00 |
|
Gregory Nutt
|
7ccbbe07cb
|
Further NAND development
|
2013-11-16 11:46:35 -06:00 |
|
Gregory Nutt
|
c7657c9c5e
|
EA3131: Framework for USB host support
|
2013-11-15 15:56:24 -06:00 |
|
Gregory Nutt
|
897572a552
|
Moved include/nuttx/mtd.h to include/nuttx/mtd/mtd.h
|
2013-11-15 11:22:23 -06:00 |
|
Gregory Nutt
|
121de26583
|
SAMA5 NAND: Basic support for access to NAND FLASH
|
2013-11-15 09:30:05 -06:00 |
|
Gregory Nutt
|
8353d234aa
|
LPC31 EHCI: First cut at an EHCI driver for the LPC31
|
2013-11-14 16:12:22 -06:00 |
|
Gregory Nutt
|
b3faf95a7c
|
LPC31: Configuration and build support for a forthcoming USB host driver; configs/ea3131/nsh converted to use kconfig-frontend tools
|
2013-11-14 15:33:43 -06:00 |
|
Gregory Nutt
|
b9d5acf6e4
|
SAMA5 PCK: Need to configure the programmable clock output pin as well
|
2013-11-14 11:41:59 -06:00 |
|
Gregory Nutt
|
778a41de1b
|
SAMA5 ISI: Framework for ISI drivers. Not much there on initial check-in
|
2013-11-14 11:17:00 -06:00 |
|
Gregory Nutt
|
b7ef5917be
|
SAMA5 PCK: Add support for programmable clock outputs
|
2013-11-14 11:16:04 -06:00 |
|
Gregory Nutt
|
bc58422444
|
STM32 CAN: Options for TSEG1 and TSEG2 quanta missing from Kconfig file
|
2013-11-14 08:29:36 -06:00 |
|
Gregory Nutt
|
8e1abbc561
|
SAMA SSC: Add bufffer dump debug instrumentation
|
2013-11-12 16:22:05 -06:00 |
|
Gregory Nutt
|
dc5d404fb4
|
SAMA5 SSC: Fix DMA data width: 16 not 32 bits
|
2013-11-12 15:53:02 -06:00 |
|
Gregory Nutt
|
a016db8680
|
SAMA5: Fix issues with RX synch
|
2013-11-12 14:56:00 -06:00 |
|
Gregory Nutt
|
26640e6031
|
SAMA5 SSC: With these changes, the TX DMA works. But nothing is received from the loopback
|
2013-11-12 12:19:11 -06:00 |
|
Gregory Nutt
|
6cfca5e9d7
|
SAMA5 SSC: Fix an error in the DMA timeout calculation
|
2013-11-12 10:59:41 -06:00 |
|
Gregory Nutt
|
015da87d6a
|
SAMA4 SSC: Additional DEBUG instrumentation
|
2013-11-12 10:19:52 -06:00 |
|
Gregory Nutt
|
2dec8fbf58
|
Various fixes from initial attempts to integrate the SAMA5 SSC/I2C driver with the I2C character driver loopback test
|
2013-11-11 15:18:57 -06:00 |
|
Gregory Nutt
|
0db55f5b4c
|
STM32F429 LTDC header files and framebuffer driver framework from Ken Pettit
|
2013-11-11 14:05:29 -06:00 |
|
Gregory Nutt
|
3214ff0755
|
SAMA5 I2S Kconfig update
|
2013-11-11 13:50:25 -06:00 |
|
Gregory Nutt
|
6e1523cc45
|
Support for the Atmel SAM4E family. From Mitko
|
2013-11-11 07:45:09 -06:00 |
|
Gregory Nutt
|
1db36fb2f4
|
SAMA5 LCD: More bad color format definitions
|
2013-11-10 16:31:21 -06:00 |
|
Gregory Nutt
|
b552595a3b
|
SAMA5 LCD: Fix some bad color format definitions
|
2013-11-10 16:16:33 -06:00 |
|
Gregory Nutt
|
8c16506277
|
SAMA5 I2S: Need to update the count of valid bytes at the conclusion of the read DMA
|
2013-11-10 15:02:51 -06:00 |
|
Gregory Nutt
|
64a7e96f1f
|
I2S simplifed audio buffer queuing
|
2013-11-10 14:51:33 -06:00 |
|
Gregory Nutt
|
4b998d84a7
|
Small but important typo in the last commit
|
2013-11-10 11:51:50 -06:00 |
|
Gregory Nutt
|
725ef58a19
|
SAMA5 SSC: Add support for loopback mode. Plus unrelated Make.defs file from the last checkin
|
2013-11-10 11:46:45 -06:00 |
|
Gregory Nutt
|
c9d3cdb85e
|
Kinetis KL: PWM driver from Alan Carvalho de Assis
|
2013-11-10 10:34:45 -06:00 |
|
Gregory Nutt
|
f5c82c0df9
|
Add an I2S character driver. This driver is only intended to support I2S testing and is inappropriate for use with real I2S devices
|
2013-11-10 10:24:09 -06:00 |
|
Gregory Nutt
|
4db4c4d770
|
STM32 OTG FS device and host drivers extended so that they can support either the OTG FS peripheral or the OTG HS peripheral (in FS mode). This was done as a quick way to get USB support on the STM32F429 which has only OTG HS. From Ken Pettit
|
2013-11-10 07:23:06 -06:00 |
|
Gregory Nutt
|
2168a6a481
|
SAMA5 I2S: Try to chain as many DMAs together as possible
|
2013-11-09 15:01:18 -06:00 |
|
Gregory Nutt
|
50ec4df77b
|
SAMA5 I2S: Fix compile errors when all debug options enabled
|
2013-11-09 13:46:12 -06:00 |
|
Gregory Nutt
|
ac120d60c3
|
SAMA5 I2S: Driver is code complete, untested and subject to some rethinking
|
2013-11-09 13:08:20 -06:00 |
|
Gregory Nutt
|
abdd0c637c
|
SAMA5 I2S: Improved I2S buffering
|
2013-11-08 16:09:20 -06:00 |
|
Gregory Nutt
|
c7cab0a5ff
|
SAMA5 SSC: Updated I2S driver
|
2013-11-08 12:03:18 -06:00 |
|
Gregory Nutt
|
0516a4d1e9
|
Back out a small part of the recent STM32 usbdev fix. From David Sidrane
|
2013-11-07 19:07:16 -06:00 |
|
Gregory Nutt
|
d8d469fa58
|
STM32 F1 USB: Fix OUT SETUP command bug. From David Sidrane
|
2013-11-07 17:25:05 -06:00 |
|
Gregory Nutt
|
9d653bdfee
|
Support for the STM32F429 from Ken Pettit
|
2013-11-07 16:47:43 -06:00 |
|
Gregory Nutt
|
cdc9bafd54
|
SAMA5 SSC: Mostly cosmetic name changes
|
2013-11-07 16:13:48 -06:00 |
|
Gregory Nutt
|
4214dc9ce9
|
SAMA5 SSC: Add framework (only) for a forthcoming SSC-based I2S driver
|
2013-11-07 12:26:53 -06:00 |
|
Gregory Nutt
|
e231270215
|
SAMA5 PWM: PWM driver is now functional
|
2013-11-07 09:17:46 -06:00 |
|
Gregory Nutt
|
27c8c83b91
|
SAMA5 PWM: Cosmetic changes to debug output
|
2013-11-06 14:46:19 -06:00 |
|
Gregory Nutt
|
3aa348035d
|
SAMA5D3x-EK: Add support board-specific PWM testing
|
2013-11-06 14:38:19 -06:00 |
|
Gregory Nutt
|
b5791ac7a6
|
SAMA5 PWM: Driver now in build and configuration system
|
2013-11-06 12:24:51 -06:00 |
|
Gregory Nutt
|
e73d77c73f
|
SAMA5 PWM: Add first cut at PWM driver
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2013-11-06 10:55:12 -06:00 |
|
Gregory Nutt
|
7394517bab
|
NSH library: Allow USB trace without a USB console
|
2013-11-06 07:09:00 -06:00 |
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Gregory Nutt
|
4cb6c0ad80
|
STM32 F1 USB device: Fix handling of EP0 start for large buffers; Add support for decoded USB trace strings. From Davice Sidrane
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2013-11-05 08:56:06 -06:00 |
|
Gregory Nutt
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b33123a8f7
|
SAMA5 CAN: Don't enable some many useless error interrupts
|
2013-11-04 11:29:16 -06:00 |
|
Gregory Nutt
|
b9130ff601
|
SAMA5 CAN: Fix a data alignment problem
|
2013-11-03 10:41:24 -06:00 |
|
Gregory Nutt
|
ad791dd275
|
Fixing typos from previous check-ins. Also, missed the ARMv7 IDLE stack coloration
|
2013-11-01 16:06:43 -06:00 |
|
Gregory Nutt
|
3f81d6f0b3
|
Port IDLE/interrupt stack coloration to ARM and ARMv7-A architectures
|
2013-11-01 15:30:18 -06:00 |
|
Gregory Nutt
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f8b3dbaa61
|
Extend stack debug logic to include IDLE and interrupt stacks. Also color the heap as well. Based on suggestions from David Sidrane
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2013-11-01 11:16:51 -06:00 |
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Gregory Nutt
|
532d4c7cbe
|
arch/arm/src/stm32/stm32_usbdev.c: On a failure to bind the class driver, the driver reference was being nullified too soon. This caused an exception in usbdev_reset() later. The driver reference will be null
ified later usbdev_unregister when the caller gets the error. From David Sidrane
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2013-10-31 15:27:52 -06:00 |
|
Gregory Nutt
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aebeb50a91
|
SAMA5 PWM register definition header file
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2013-10-31 10:33:43 -06:00 |
|
Gregory Nutt
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37d8faff37
|
SAMA5 SSC: Add SSC register definition header file
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2013-10-30 16:15:51 -06:00 |
|
Gregory Nutt
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d9f16bba82
|
apps/platform: A new now for platform-specific applicatin code
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2013-10-30 09:04:37 -06:00 |
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Gregory Nutt
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1d5b786fa2
|
Minor changes while pondering a camera interface
|
2013-10-29 16:57:06 -06:00 |
|
Gregory Nutt
|
3fd4629bd7
|
SAMA5 ADC: Seems functional in all modes including DMA
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2013-10-28 10:08:12 -06:00 |
|
Gregory Nutt
|
1027d9f751
|
STM32 SPI DMA: Fix related to CONFIG_STM32_DMACAPABLE from Ken Pettit
|
2013-10-27 16:23:44 -06:00 |
|
Gregory Nutt
|
da251ade8b
|
SAMA5 ADC: If DMA is enabled, then you should be able to configuration larger DMA transfers
|
2013-10-27 12:04:37 -06:00 |
|
Gregory Nutt
|
d04952385f
|
SAMA5 ADC: Fix sample frequency scaling and sequencer setup
|
2013-10-27 10:29:07 -06:00 |
|
Gregory Nutt
|
509f08daa9
|
SAMA5 ADC: Correct setup of time compare registers
|
2013-10-27 09:35:30 -06:00 |
|
Gregory Nutt
|
c534eb262e
|
SAM3/4 serial: Same supersitituous change as for SAMA5
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2013-10-26 16:17:07 -06:00 |
|
Gregory Nutt
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ba6fe788ea
|
SAMA5 serial: Restore logic to minimize TX interrupts. Oddly, seems to improve ADC stability
|
2013-10-26 16:02:07 -06:00 |
|
Gregory Nutt
|
0ab6d8382f
|
SAMA5 TC: Debug instrumentation
|
2013-10-26 14:03:30 -06:00 |
|
Gregory Nutt
|
ff682d5292
|
SAMA5: Register definition file for camera interface
|
2013-10-26 08:25:58 -06:00 |
|
Gregory Nutt
|
2226a44b2a
|
arch/arm/src/sama5/sam_adc.c: Remove a warning
|
2013-10-25 15:18:32 -06:00 |
|
Gregory Nutt
|
f39467339e
|
Add ioctl to support software triggering of ADC/DAC conversions
|
2013-10-25 14:19:09 -06:00 |
|
Gregory Nutt
|
b3afc8bd75
|
sam_tc.c: Fix a timer initialization bug
|
2013-10-25 10:05:00 -06:00 |
|
Gregory Nutt
|
4647775ed2
|
SAMA5 ADC+TC: Several updates/fixes from ongoing debug
|
2013-10-25 08:46:57 -06:00 |
|
Gregory Nutt
|
1668aa408e
|
SAMA5 ADC+TC: Early debug fixes + lots of new debug instrumentation
|
2013-10-24 16:50:51 -06:00 |
|
Gregory Nutt
|
28d50790f2
|
SAMA5D3x-EK: Add support for app/examples/adc
|
2013-10-24 15:39:56 -06:00 |
|
Gregory Nutt
|
da7a3d9c9a
|
SAMA5: Add ADC-side of the logic to hook in timer/counter logic needed to drive periodic ADC sampling
|
2013-10-24 13:56:23 -06:00 |
|
Gregory Nutt
|
aab5b6b2d9
|
SAMA5: Hook in timer/counter logic so that it can driver periodic ADC sampling
|
2013-10-24 12:35:42 -06:00 |
|
Gregory Nutt
|
ec84f19454
|
STM32 PWM and ADC: Add some bits that should have been cleared. From Martin Lederhilger
|
2013-10-24 08:27:09 -06:00 |
|
Gregory Nutt
|
f10069907a
|
Add support for the STM32F207ZE chip. From Martin Lederhilger
|
2013-10-24 08:25:05 -06:00 |
|
Gregory Nutt
|
e5b093cd3a
|
Remove carriage returns from SAMA5 TC files just commited
|
2013-10-23 15:39:00 -06:00 |
|
Gregory Nutt
|
f6f2d2b961
|
SAMA5 Timer/counter library
|
2013-10-23 14:53:37 -06:00 |
|
Gregory Nutt
|
fe0f5ce44b
|
STM32 F1 DAM fix from David Sidrane
|
2013-10-23 14:05:26 -06:00 |
|
Gregory Nutt
|
69e49938f0
|
SAMA5 CAN: Update readme on how to configure CAN
|
2013-10-23 11:32:12 -06:00 |
|
Gregory Nutt
|
e019782db5
|
Update Changelog
|
2013-10-23 09:13:28 -06:00 |
|
Gregory Nutt
|
e5c2496d6a
|
SAMA5 CAN: Driver is now code complete but still untested
|
2013-10-22 15:47:52 -06:00 |
|
Gregory Nutt
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f5674c21fa
|
SAMA5: Beginning of a CAN driver
|
2013-10-21 15:52:23 -06:00 |
|
Gregory Nutt
|
781119c0e6
|
SAMA5 CAN: Add register definition file
|
2013-10-21 12:22:27 -06:00 |
|
Gregory Nutt
|
ba1ea91e37
|
SAMA5 TC: Add timer/counter register definition file
|
2013-10-20 14:47:02 -06:00 |
|
Gregory Nutt
|
dbeee18171
|
SAMA5 TRNG: /dev/random appears to be functional
|
2013-10-20 12:08:39 -06:00 |
|
Gregory Nutt
|
0ebdbfbc88
|
SAMA5 TRNG: Add a /dev/random driver based on the SAMA5D3 TRNG peripheral
|
2013-10-20 11:38:31 -06:00 |
|
Gregory Nutt
|
891c463381
|
SAMA5 WDT driver is now functional
|
2013-10-20 09:24:30 -06:00 |
|
Gregory Nutt
|
cc4c4f4593
|
SAMA5 WDT: Miss watchdog fixes
|
2013-10-20 08:24:05 -06:00 |
|
Gregory Nutt
|
6ee8857f9b
|
SAMA5: Initial WDT timer (untested)
|
2013-10-19 12:26:47 -06:00 |
|
Gregory Nutt
|
8954161288
|
SAMA5: Hook RTC into build system; Finish RTC alarm logic; Verify correct behavior of the basic RTC functionality
|
2013-10-19 10:41:20 -06:00 |
|
Gregory Nutt
|
a1df31266c
|
SAMA5: Add GPBR register definitions
|
2013-10-19 10:22:21 -06:00 |
|
Gregory Nutt
|
b05bf917b8
|
SAMA5 RTC: Beginning of an RTC driver for the SAMA5
|
2013-10-18 16:56:46 -06:00 |
|
Gregory Nutt
|
2137ef96c0
|
SAMA5: Add RTC and WDT register definition header files
|
2013-10-18 14:47:50 -06:00 |
|
Gregory Nutt
|
aa51df493a
|
STM32 DMA Priority: Select the correct default for F1 and other family members
|
2013-10-18 14:13:53 -06:00 |
|
Gregory Nutt
|
d72a99bc64
|
SAMA5 LCD: Move framebuffers to center of free memory region. That creates a guard band around the framebuffers that gives a little protection from any bad writes into the framebuffer
|
2013-10-18 10:11:20 -06:00 |
|
Gregory Nutt
|
46bf97abfc
|
Add SDIO preflight method
|
2013-10-18 08:15:09 -06:00 |
|
Gregory Nutt
|
944e0fe81d
|
Changes to stm32_dmacapable interfaces from Mike Smith
|
2013-10-18 08:06:23 -06:00 |
|
Gregory Nutt
|
973d11f625
|
STM32 DMA priority corrections from Mike Smith
|
2013-10-18 07:37:24 -06:00 |
|
Gregory Nutt
|
2b70abad0d
|
Typo fixes for UART7 and UART8 DMA configs. From Mike Smith
|
2013-10-18 07:17:55 -06:00 |
|
Gregory Nutt
|
1143b537c2
|
SAMA5 TSD: Fix to prohibit reading samples when not valid
|
2013-10-17 17:26:06 -06:00 |
|
Gregory Nutt
|
d71289dd43
|
STM32 F103C: Correct some errors in pinmapping. From David Sidrane
|
2013-10-16 07:26:41 -06:00 |
|
Gregory Nutt
|
87d8d3a7d5
|
Misc changes to README files; Update SAMA5D3x-EK NxWM configuration to use Calibration instruction messages
|
2013-10-14 14:53:38 -06:00 |
|
Gregory Nutt
|
fa71c8211c
|
SAMA5 LCDC: Correct how framebuffer memory was being mapped; Remove options to get framebuffer memory in various. Because of the mapping and aligment requirements, those options really cannot be supported
|
2013-10-13 13:08:05 -06:00 |
|
Gregory Nutt
|
3cfe4c2113
|
SAMA5 LCDC: Move framebuffer to lower memory; I suspect some corruption by interference
|
2013-10-13 10:42:14 -06:00 |
|
Gregory Nutt
|
02f7c5d8d5
|
SAMA5 LCDC: Fixed backlight PWM divider. Backlight no longer flashes
|
2013-10-11 17:12:35 -06:00 |
|
Gregory Nutt
|
e9187d3199
|
SAMA5 LCDC: Wait when the LCDC is resynchronizing (SIF); Try start-up parameters from Barebox (this still don't work)
|
2013-10-10 18:44:08 -06:00 |
|
Gregory Nutt
|
de5ae1a584
|
SAMA5 LCDC: Default resolution if now RGB565; Add option to select a different output resolution than the sofware resolution (needs to the 24BPP for this LCD).
|
2013-10-10 18:41:42 -06:00 |
|
Gregory Nutt
|
b641545f93
|
SAMA5 LCDC: Move DMA descriptors out of internal SRAM and into SDRAM. I am not completely clear, but it looks like the LCDC cannot support DMA from internal SRAM
|
2013-10-10 12:02:41 -06:00 |
|
Gregory Nutt
|
0a81f51502
|
SAMA5: Allow portions of external memory to be added to the heap instead of the whole thing
|
2013-10-10 12:00:32 -06:00 |
|
Gregory Nutt
|
8ae85daf3d
|
SAMA5 LCDC: Fix a few compilation errors that show up when additional layers are enabled
|
2013-10-09 18:46:05 -06:00 |
|
Gregory Nutt
|
03ebf1cf4a
|
SAMA5 LCDC: Few more bug fixes but still not working
|
2013-10-09 18:22:21 -06:00 |
|
Gregory Nutt
|
ff64ccb539
|
SAMA5 LCDC: Corrections from first debug sessions. Still a way to go
|
2013-10-09 13:21:27 -06:00 |
|
Gregory Nutt
|
f8397f8238
|
SAMA5: LCDC driver incorporated into the build system.
|
2013-10-08 15:30:38 -06:00 |
|
Gregory Nutt
|
1807a662a8
|
SAMA5: LCD driver is code complete but untested
|
2013-10-08 12:16:30 -06:00 |
|
Gregory Nutt
|
0907691978
|
SAMA5: More LCDC driver progress
|
2013-10-08 08:57:48 -06:00 |
|
Gregory Nutt
|
8238ea7477
|
SAMA5: More LCDC driver progress
|
2013-10-07 15:54:08 -06:00 |
|
Gregory Nutt
|
ed980b51f7
|
SAMA5: LCDC driver progress
|
2013-10-07 12:05:16 -06:00 |
|
Gregory Nutt
|
d3fa588250
|
SAMA5 LCDC: Add 'skeleton' files that will eventually become an LCDC driver for the SAMA5
|
2013-10-06 09:08:52 -06:00 |
|
Gregory Nutt
|
3325c192f5
|
SAMA5: Completes LDCDC register definition file
|
2013-10-04 15:43:19 -06:00 |
|
Gregory Nutt
|
d7426cd34d
|
SAMA5: Add LCD register definition header file
|
2013-10-04 10:11:12 -06:00 |
|
Gregory Nutt
|
a8951de086
|
SAMA5: Touchscreen driver now works
|
2013-10-04 08:03:38 -06:00 |
|
Gregory Nutt
|
6ca0850605
|
SAMA5: First changes from touchscreen debug
|
2013-10-03 17:11:30 -06:00 |
|
Gregory Nutt
|
9d6bfb5238
|
SAMA5: ADC and touchscreen drivers now build without errors
|
2013-10-03 14:32:21 -06:00 |
|
Gregory Nutt
|
a4123ed6d5
|
SAMA5: Integrate touchscreen and ADC drivers into the build
|
2013-10-03 12:49:13 -06:00 |
|
Gregory Nutt
|
6c8d7f2184
|
SAMA5 ADC and touchscreen: Drivers are code complete and ready for test
|
2013-10-03 10:06:14 -06:00 |
|
Gregory Nutt
|
97a4ecb306
|
SAMA Touchscreen/ADC: More progress
|
2013-10-02 16:55:22 -06:00 |
|
Gregory Nutt
|
fee65851ca
|
Add framework for Spark Core board support. The initial commit is a clone of the Maple Mini and still needs Spark customizations
|
2013-10-02 08:24:46 -06:00 |
|
Gregory Nutt
|
e92ed407aa
|
SAMA5 ADC/Touchscreen: A little more logic
|
2013-10-01 14:40:34 -06:00 |
|
Gregory Nutt
|
efb1695c0c
|
KL: Now builds up_puts
|
2013-10-01 11:51:27 -06:00 |
|
Gregory Nutt
|
9a634c882d
|
KL: Missing header file in low level getc logic
|
2013-10-01 11:25:01 -06:00 |
|
Gregory Nutt
|
a737c93ea2
|
SAMA5 touchscreen and ADC: A little more progress
|
2013-10-01 11:23:24 -06:00 |
|
Gregory Nutt
|
4cecf0b618
|
SAMA5 ADC/Touchscreen: A little more progress. Still not complete
|
2013-09-30 14:28:42 -06:00 |
|
Gregory Nutt
|
50123bd30f
|
Add freedom-kl25z/minnsh configuration: This is an experiment to see just how small we and get an NSH configuration. From Alan Carvalho de Assis.
|
2013-09-30 09:20:11 -06:00 |
|
Gregory Nutt
|
0a1a68b77a
|
KL25Z: Add low-level up_lowgetc function that can be used to provide an NSH console when the file system (and hence the serial driver) is disabled. From Alan Carvalho de Assis
|
2013-09-30 09:15:31 -06:00 |
|
Gregory Nutt
|
3e09f94985
|
KL25Z: Add low-level up_lowgetc function that can be used to provide an NSH console when the file system (and hence the serial driver) is disabled. From Alan Carvalho de Assis
|
2013-09-30 09:11:54 -06:00 |
|
Gregory Nutt
|
744f3776b7
|
SAMA5: Framework for an touchscreen driver (incomplete)
|
2013-09-30 09:04:21 -06:00 |
|
Gregory Nutt
|
ecd7502c34
|
SAMA5 ADC: Framework for an ADC driver (incomplete)
|
2013-09-30 07:22:34 -06:00 |
|
Gregory Nutt
|
0e02d2b7b4
|
SAMA5 ADC: Beginning ADC register definition file
|
2013-09-29 18:34:09 -06:00 |
|
Gregory Nutt
|
54b1275de9
|
Work around a start-up error in the GMAC that I still do not understand
|
2013-09-29 16:46:22 -06:00 |
|
Gregory Nutt
|
7ee6ded1c2
|
SAMA5 GMAC: Various fixes from initial debug
|
2013-09-29 15:03:57 -06:00 |
|
Gregory Nutt
|
c038f4efe0
|
Dependency generation fix for directories that keep object files in a sub-directory
|
2013-09-29 11:46:10 -06:00 |
|
Gregory Nutt
|
417f67c132
|
Clean up some naming: fd vs. fildes vs. filedes and filep vs filp
|
2013-09-28 16:50:07 -06:00 |
|
Gregory Nutt
|
7b9b7cbdec
|
configs/compal_e88 converted to use the kconfig-frontends tools
|
2013-09-27 16:12:44 -06:00 |
|
Gregory Nutt
|
f7e4f25760
|
SAMA5 GMAC and GMII support is code complete and ready for test
|
2013-09-27 13:12:04 -06:00 |
|
Gregory Nutt
|
cdb56b81b8
|
Networking: Fix backward conditional in test to see if address is in ARP table. From Max Holtzberg
|
2013-09-27 08:27:35 -06:00 |
|
Gregory Nutt
|
e4af9572d0
|
Beginng of support for GMII/RGMII PHYs
|
2013-09-26 15:55:21 -06:00 |
|
Gregory Nutt
|
d417ff6460
|
SAMA5 GMAC: Initial driver check-in is just the EMAC driver forced to compile with the GMAC register definitions
|
2013-09-26 10:35:52 -06:00 |
|
Gregory Nutt
|
3c4f9926c9
|
SAMA5: Completes GMAC register definition header file
|
2013-09-26 09:13:14 -06:00 |
|
Gregory Nutt
|
bbccd73dd0
|
SAMA5 EMAC: Need to pace RX and TX because and RX can result in a TX; Process TX interrupt events before TX interrupt events for the same reason
|
2013-09-25 14:22:35 -06:00 |
|
Gregory Nutt
|
4a99a9e2e3
|
SAMA5 EMAC: Add some need D-Cache Flush/Invalidate operations. Add support for CONFIG_NET_DUMPPACKET
|
2013-09-25 11:51:49 -06:00 |
|
Gregory Nutt
|
d3daad87f1
|
Move CONFIG_NET_DUMPPACKET from LPC17 and STM32 to commong network drivers. Automatically enabled CONFIG_NETDEVICES when any Ethernet driver is enabled
|
2013-09-25 11:50:31 -06:00 |
|
Gregory Nutt
|
22fe508443
|
Move CONFIG_NET_DUMPPACKET from LPC17 and STM32 to commong network drivers. Automatically enabled CONFIG_NETDEVICES when any Ethernet driver is enabled
|
2013-09-25 11:50:05 -06:00 |
|
Gregory Nutt
|
788d1623ae
|
Fix badly applied patch to ENCX24J600
|
2013-09-25 08:26:56 -06:00 |
|
Gregory Nutt
|
9a9fc90794
|
SAMA5 UDPHS: Dont' reject read request submissions while stalled. That causes an infinite loop. When stalling, cancel all pending write requests, but cancel only a reqd request if it is in progress. It will be immediately requeued
|
2013-09-24 15:06:17 -06:00 |
|
Gregory Nutt
|
446ced4799
|
Comment out assertion that apparently fires inappropriately
|
2013-09-24 15:01:25 -06:00 |
|
Gregory Nutt
|
2de3781ebf
|
Slightly improved debug output
|
2013-09-24 13:47:03 -06:00 |
|
Gregory Nutt
|
5d192f72e3
|
Stack monitor fixes
|
2013-09-24 12:14:52 -06:00 |
|
Gregory Nutt
|
7affa54e7e
|
Standardize stack checking interface
|
2013-09-24 11:45:13 -06:00 |
|
Gregory Nutt
|
9bb771b8b8
|
SAMA5 UDPHS: Minor clean-up of STALL logic
|
2013-09-23 18:10:41 -06:00 |
|
Gregory Nutt
|
c68c0cb268
|
SAMA5 HSMCI: Disable TX DMA. it is not reliable
|
2013-09-23 13:54:32 -06:00 |
|
Gregory Nutt
|
a1220e3440
|
SAMA5 HSMCI DMA clean-up. There are still some issues
|
2013-09-23 11:25:39 -06:00 |
|
Gregory Nutt
|
773a693ee2
|
Cosmetic changes to comments and coding style fixes
|
2013-09-22 14:48:22 -06:00 |
|
Gregory Nutt
|
8a1e33cb10
|
Un-neccesary, cosmetic changes to label names and comments
|
2013-09-22 08:54:06 -06:00 |
|
Gregory Nutt
|
3ceac07042
|
SAMA5 OHCI: Back out a change, the real root cause was a bug in the cache logic so the hack is no longer necessary
|
2013-09-22 07:53:51 -06:00 |
|
Gregory Nutt
|
9cb23c5ccb
|
ARMv7-A: Fix some error in alignment to cache line boundaries in the cache operations
|
2013-09-21 15:47:00 -06:00 |
|
Gregory Nutt
|
d31d809bbf
|
SAMA5 OHCI: Fix some strange Dcache problems that I still don't understand; end address on cache operations is end+1, not end
|
2013-09-21 12:21:10 -06:00 |
|
Gregory Nutt
|
c900c580ae
|
ARMv7-A: Clarify end address paramet in cache operations: It is the end+1 address, not the end address
|
2013-09-21 12:16:34 -06:00 |
|
Gregory Nutt
|
34804c8ee7
|
SAMA5 OHCI: Fix some problems with D-Cache coherency and physical addressing related to interrupt endpoints
|
2013-09-20 15:22:09 -06:00 |
|
Gregory Nutt
|
dbf07d6d01
|
SAMA5 OHCI: When UPLL drives OHCI the logically correct divider of 10 does not work; But a divider of 5 does. Why?
|
2013-09-19 16:10:46 -06:00 |
|
Gregory Nutt
|
92617fade5
|
SAMA5 EHCI: Fix bits being clobbered in PORTSC on hand-off to OHCI. OHCI: Fix some more trace configuration issues. Both: Don't muck with SFR port selection bits once they have been initialized
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2013-09-19 10:52:33 -06:00 |
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Gregory Nutt
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1600e02962
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More USB host trace conditional compilation problems
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2013-09-19 09:08:55 -06:00 |
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Gregory Nutt
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ac3dfce614
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Fix inconsistency in USB host tracing definitions
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2013-09-19 08:46:33 -06:00 |
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Gregory Nutt
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0c62e5797e
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SAMA5: Add support for the FPU OS test
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2013-09-18 10:35:03 -06:00 |
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Gregory Nutt
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8f88387712
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LPC17xx SPI: Remove an unused static prototype that caused a compile time warning
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2013-09-17 17:14:08 -06:00 |
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Gregory Nutt
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14ac82c11c
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SAMA5 EMAC: Changes from early debug sessions. Still a way to go
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2013-09-17 15:52:19 -06:00 |
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Gregory Nutt
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226839692d
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SAMA5 EMAC: Resolve issues with DUAL PHY support needed for both EMAC and GMAC peripherals. EMAC driver is now code complete and builds without complaint
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2013-09-17 10:55:13 -06:00 |
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Gregory Nutt
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e7479e9b9d
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Add prefex ETH0 to all PHY configurations to support multiple NICs
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2013-09-17 10:45:07 -06:00 |
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Gregory Nutt
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b06216ff11
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SAMA4 EMAC: Remove some editor garbage that ended up in the last commit
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2013-09-16 18:04:38 -06:00 |
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Gregory Nutt
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7ef1bd2f4c
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SAMA5 EMAC: Add basic PHY logic
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2013-09-16 18:00:21 -06:00 |
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Gregory Nutt
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50fd028680
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SAMA5 EMAC: Packet transmission logic
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2013-09-16 14:58:11 -06:00 |
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Gregory Nutt
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09e6c653cc
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SAMA4 EMAC: Add basic interrupt handling logic
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2013-09-16 13:57:57 -06:00 |
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Gregory Nutt
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9d59d5ef13
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SAMA5 EMAC: Incremental progress. Still not code complete
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2013-09-16 11:36:12 -06:00 |
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Gregory Nutt
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af61f846f9
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Freescale Kinetis KL25Z PIT and TPM module register definitions
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2013-09-15 17:00:50 -06:00 |
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Gregory Nutt
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285f5201dc
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SAMA4 EMAC buffer allocation logic
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2013-09-15 14:26:25 -06:00 |
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Gregory Nutt
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ed7c7a25e7
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SAMA5 Ethernet: Add support for PHY interrupts
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2013-09-15 12:24:42 -06:00 |
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Gregory Nutt
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58dad361b8
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SAMA5: Update Ethernet initalization logic to handle both EMAC and GMAC
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2013-09-14 08:19:36 -06:00 |
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Gregory Nutt
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14b3417a85
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SAMA5 EMAC: Create a empty, skeleton file that will eventually become the SAMA5 EMAC driver
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2013-09-13 15:04:46 -06:00 |
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Gregory Nutt
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50f482f902
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STM32: Support for the LeafLabs Maple and Maple Mini boards. From Librae
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2013-09-13 12:45:33 -06:00 |
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Gregory Nutt
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b5bdde09cc
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STM32 Kconfig: Fix STM32 UART7/8 kconfig names and UART DMA. Provided by Lorenz Meier
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2013-09-13 11:45:32 -06:00 |
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Gregory Nutt
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b5254cc5af
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Make filter register accessible for CAN1 and CAN2. Provided by Lorenz Meier
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2013-09-13 11:20:10 -06:00 |
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Gregory Nutt
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7e33cee02f
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SAMA5 EMAC and GMAC: More additions to register definition files
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2013-09-13 03:35:56 -06:00 |
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Gregory Nutt
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f2f40f35bd
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SAMA5: Beginning of EMAC and GMAC register definition header files
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2013-09-12 15:45:12 -06:00 |
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Gregory Nutt
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c839aa84ca
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SAMA5D3x-EK README update
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2013-09-12 14:17:56 -06:00 |
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Gregory Nutt
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4e0c905d61
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SAMA5 TWI: Misc improvements during debug (still not getting interupts)
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2013-09-12 12:25:31 -06:00 |
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Gregory Nutt
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0330eea54d
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SAMA5 TWI: Cleanup compilation errors that occur when I2C debug is enabled
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2013-09-12 09:46:20 -06:00 |
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Gregory Nutt
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b3194bd5e5
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SAMA5 TWI: Add support for I2C readwrite and transfer methods
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2013-09-11 17:52:23 -06:00 |
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Gregory Nutt
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b5eed8c9cb
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SAMA5: Barebones TWI driver implementation
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2013-09-11 16:48:56 -06:00 |
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Gregory Nutt
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382a066eae
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SAMA5: Framework for a TWI driver (incomplete)
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2013-09-11 12:28:52 -06:00 |
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Gregory Nutt
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e49069b92b
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SAMA5: TWI register definition file
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2013-09-11 10:23:46 -06:00 |
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Gregory Nutt
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7391afb5c2
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SAMA5D3x-EK demo configuration now supports HSMCI0 and HSMCI1
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2013-09-11 09:50:36 -06:00 |
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Gregory Nutt
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462dd6936c
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Clean-up a few USB trace formats
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2013-09-10 16:17:06 -06:00 |
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Gregory Nutt
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990d3a65a4
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SAMA5: Add tracing support to the OHCI driver
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2013-09-10 16:01:44 -06:00 |
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Gregory Nutt
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89c829d1ae
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SAMA5 EHCI: Did not work with DEBUG off. Appears to be because of some D-Cache flushing that was performed only with DEBUG ON. Now is unconditional
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2013-09-10 10:12:51 -06:00 |
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Gregory Nutt
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c6bf25bca0
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Extent the the USB host trace logic to include verbose debug output
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2013-09-09 17:27:21 -06:00 |
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Gregory Nutt
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3ba64b0cfe
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USB monitor extended so that it can also be used with USB host trace data
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2013-09-09 15:02:33 -06:00 |
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Gregory Nutt
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fbd5ab0758
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Beginning of support for USB host side tracing
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2013-09-09 14:01:52 -06:00 |
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Gregory Nutt
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a992004b0e
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USB MSC host class driver: Don't bother retrying to initialize the FLASH if the interface is returning fatal transfer errors
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2013-09-09 10:00:16 -06:00 |
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Gregory Nutt
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40f84dfa19
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Trivial updates assocaited with USB host mass storage and SAMA5 EHCI
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2013-09-08 13:42:56 -06:00 |
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Gregory Nutt
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59f6aeefd2
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SAMA5: Add support EHCI/OHCI to sama5d3x-ek/demo (does not work yet); Fix some EHCI/OHCI compilation issues when DEBUG is disabled
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2013-09-07 11:43:06 -06:00 |
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Gregory Nutt
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e30cb1d470
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SAMA5D3x-EK: Add a new 'demo' configuration
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2013-09-06 11:40:46 -06:00 |
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Gregory Nutt
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fb37248343
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CDC/ACM and PL2303 device drivers: Don't use the max packet size assigned to an endpoint in order to determine the request buffer size. The endpoint has not yet been configured that max packet size may be wrong.
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2013-09-05 18:00:16 -06:00 |
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Gregory Nutt
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6dae945fb0
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SAMA5 UDPHS: Fix bad setup for sam_req_write call introduce in last commit
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2013-09-05 15:51:27 -06:00 |
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Gregory Nutt
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d0923ee830
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SAMA5 UDPHS: Major changes to DMA interrupt and request handling to better handle DMA
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2013-09-05 14:33:27 -06:00 |
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Gregory Nutt
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4377b4f5e8
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SAMA5 UDPHS: Fix DMA channel vs. matching endpoint
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2013-09-04 15:08:19 -06:00 |
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Gregory Nutt
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8c64ca58b2
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SAMA5 UDPHS: More USB fixes mostly related to byte counts, endpoint configuration, and dma configuration
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2013-09-04 13:36:52 -06:00 |
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Gregory Nutt
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a478b680a3
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SAMA5 UDPHS: More zero length packet fixes; revamped request queue structures
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2013-09-04 09:48:08 -06:00 |
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Gregory Nutt
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a9a8801472
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SAMA5 UDPHS: Fixes related to null packet and SETUP OUT data handling
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2013-09-03 19:13:34 -06:00 |
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Gregory Nutt
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d294826cfd
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SAMA5 UDPHS: Small change to zero length packet handling
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2013-09-03 16:24:11 -06:00 |
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Gregory Nutt
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10da3662e4
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SAMA5 UDPHS: Fix some issues with TX interrupt handling
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2013-09-03 14:53:10 -06:00 |
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Gregory Nutt
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43a62c63d9
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SAMA5 UDPHS: A little debugging progress. Not all transfers are working yet
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2013-09-03 13:09:50 -06:00 |
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Gregory Nutt
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84439348df
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SAMA5 UDPHS: Changes from initial debug session. Still a long way to go
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2013-09-02 16:59:07 -06:00 |
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Gregory Nutt
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37579db920
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SAMA5 UDPHS: Fixes related to soft connect pullup and DMA buffer allocation
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2013-09-02 14:55:33 -06:00 |
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Gregory Nutt
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c162cca9e8
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SAMA5 UDPHS: Some very early debug corrections. Not yet working.
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2013-09-02 12:26:15 -06:00 |
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Gregory Nutt
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742e89783b
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SAMA5 UDPHS: Add logic to handle deferred address setting; add logic to handle EP0 SETUP OUT data
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2013-09-02 10:08:18 -06:00 |
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Gregory Nutt
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393b44f059
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STM32 Timer Register Bit Definitions: Some CCER bit settings changed per SourceForge bug #18 submitted by CCCTSAO
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2013-09-02 08:01:09 -06:00 |
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Gregory Nutt
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387795ecdf
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SAMA5 UDPHS: Clean up some write request handling
|
2013-09-01 16:56:22 -06:00 |
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Gregory Nutt
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66b5ed14d5
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SAMA5 UDPHS: Resolve a few of easier REVISIT pre-processor warnings
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2013-09-01 15:36:17 -06:00 |
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Gregory Nutt
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8587026c18
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SAMA5 UPPHS: Fix a small mountain of compilation errors. Still things to REVISIT so it is not ready for test
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2013-09-01 11:31:12 -06:00 |
|
Gregory Nutt
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5c950889cf
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SAMA5 UDPHS: Support USPHS clock configuration
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2013-09-01 11:29:51 -06:00 |
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Gregory Nutt
|
f4c1568c17
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SAMA UDPHS: Add pull-up and stall logic. Added to build system but does not yet build
|
2013-08-31 17:37:51 -06:00 |
|
Gregory Nutt
|
9d2f55ca97
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SAMA5 UDPHS: Add endpoint configuration and read DMA logic
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2013-08-31 12:20:00 -06:00 |
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Gregory Nutt
|
8df66532ce
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SAMA5 UDPHS: Bring in UDPHS endpoint interrupt handling logic
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2013-08-31 10:43:58 -06:00 |
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Gregory Nutt
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4a9748dfdf
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SAMA5 UDPHS: Write DMA logic added. Still incomplete
|
2013-08-30 15:41:06 -06:00 |
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Gregory Nutt
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6548308982
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SAMA5: Updated UDPHS driver. Still incomplete
|
2013-08-30 14:51:41 -06:00 |
|
Gregory Nutt
|
024da6049d
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SAMA5 UDPHS interrupt decoding logic
|
2013-08-29 18:11:34 -06:00 |
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Gregory Nutt
|
8c92beb70e
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SAMA5 UDPHS interrupt decoding logic
|
2013-08-29 17:34:05 -06:00 |
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Gregory Nutt
|
3b1323a74b
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SAMA5: Initial framework for a UDPHS USB device side driver
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2013-08-29 16:29:27 -06:00 |
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Gregory Nutt
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be88385911
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SAMA5: Add high-speed USB register definition header file
|
2013-08-28 17:50:05 -06:00 |
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Gregory Nutt
|
e862d5d197
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SAMA5 EHCI: Implemented (but did not test) interrupt endpoint logic
|
2013-08-28 13:07:35 -06:00 |
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Gregory Nutt
|
1ab10a20bd
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SAMA5 EHCI: Correct and extend pool allocation logic; Fix data toggle values
|
2013-08-28 10:03:48 -06:00 |
|
Gregory Nutt
|
beb58c2520
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SAMA5: Fixes a bug in the way that the heap regions were being allocated
|
2013-08-27 16:43:19 -06:00 |
|
Gregory Nutt
|
a3af5b3aaf
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SAMA5 OHCI+EHCI: Using cp15_clean instead of cp15_coherent; EHCI: Need to set alt pointer in order to handle short transfers.
|
2013-08-27 13:07:21 -06:00 |
|
Gregory Nutt
|
bc46b447dc
|
Fix all occurrences of "the the" in documentation and comments
|
2013-08-27 09:40:19 -06:00 |
|
Gregory Nutt
|
c5802dd5a0
|
Add hooks to select Cortex-A8
|
2013-08-27 08:46:37 -06:00 |
|
Gregory Nutt
|
18126a5fd4
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SAMA4 EHCI: Correct some backward conditional compilation; fix some warnings
|
2013-08-26 17:03:52 -06:00 |
|
Gregory Nutt
|
12beaf4b1a
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Add a new method to the USB host driver interface: getdevinfo. This method will return information about the currently connected device. At present, it only returns the device speed. The speed is needed by the enumeration logic in order to set a credible initial EP0 max packet size
|
2013-08-26 15:46:16 -06:00 |
|
Gregory Nutt
|
8130f5bd64
|
SAMA5 EHCI: Status phase is the opposite direction as the data phase
|
2013-08-26 14:28:13 -06:00 |
|
Gregory Nutt
|
40525cedcd
|
SAMA5 EHCI: Taking direction from wrong bit in SETUP request; need to flush data buffer before starting SETUP request
|
2013-08-26 11:05:23 -06:00 |
|
Gregory Nutt
|
03ad60426d
|
#17 Fix if CONFIG_SDIO_BLOCKSETUP defined, OS will crash. From CCTSAO
|
2013-08-26 08:54:46 -06:00 |
|
Gregory Nutt
|
b3df0c1037
|
SAMA5 EHCI: Data toggle and status phase fixes
|
2013-08-25 14:45:08 -06:00 |
|
Gregory Nutt
|
bea6894bd7
|
EHCI reset bit was not being set correctly
|
2013-08-25 10:46:41 -06:00 |
|
Gregory Nutt
|
f1a20f49ff
|
SAMA5 OHCI: Fix semaphore handling bug. OHCI is now function by itself again after changes to integrate with EHCI
|
2013-08-25 08:57:35 -06:00 |
|
Gregory Nutt
|
042abb0856
|
SAMA5 OHCI: Fix backward conditional compilation. Clean-up OHCI/EHCI debug output
|
2013-08-25 08:30:21 -06:00 |
|