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501 Commits

Author SHA1 Message Date
Gregory Nutt
b2ba12e02a SMP: Basic function 2016-11-26 14:23:23 -06:00
Gregory Nutt
785ed5faf2 SMP: A few more compile/link issues. Still problems. 2016-11-26 13:20:11 -06:00
Gregory Nutt
aae306e942 i.MX6 SMP: Inter-CPU data no saved in a non-cacheable region. 2016-11-26 12:04:02 -06:00
Gregory Nutt
e3fe320e08 SMP: Add support for linking spinlocks into a special, non-cached memory region. 2016-11-26 08:47:03 -06:00
Gregory Nutt
b08fb33c28 SMP: Fix typos in some conditional compilation 2016-11-24 17:59:45 -06:00
Gregory Nutt
7f636f2280 SMP: Add spin_trylock(). Use this in conditions where other CPUs need to stopped but we cannot call enter_critical_section. 2016-11-24 13:33:43 -06:00
Gregory Nutt
f77dcdf323 ARMv7-A SMP: Add a little logic to signal handling. 2016-11-24 11:45:05 -06:00
Gregory Nutt
c03d126da6 arm_cpupause.c edited online with Bitbucke. What was I thinking... Back out previous change. 2016-11-24 04:45:07 +00:00
Gregory Nutt
19e7f2210e arm_cpupause.c edited online with Bitbucket. Fix a typo in a comment. 2016-11-24 04:24:40 +00:00
Gregory Nutt
4b0bbf41ca SMP: Fix backward condition in test. 2016-11-23 22:24:14 -06:00
Gregory Nutt
f90525a5d1 SMP: Update some comments; trivial improvement by inlining static function. 2016-11-22 16:48:57 -06:00
Gregory Nutt
bac7153609 SMP: Add logic to avoid a deadlock condition when CPU1 is hung waiting for g_cpu_irqlock and CPU0 is waitin for g_cpu_paused 2016-11-22 11:34:16 -06:00
Gregory Nutt
130bfa3f6b Remove a assertion condition that appears to rarely cause false-alarm assertions. Teported by Petteri Aimonen 2016-11-21 14:43:56 -06:00
Gregory Nutt
bb19f1b499 spinlocks should be volatile. 2016-11-17 10:04:22 -06:00
Gregory Nutt
841e1aa77f Fix a cloned typo 2016-10-19 09:14:21 -06:00
Gregory Nutt
7f16548f57 Replaces last three commits. Does the same thing, but does it in a way that does not change the usage model. 2016-06-21 05:26:08 -06:00
Gregory Nutt
c05da80a27 Eliminate a warning 2016-06-20 22:54:58 -06:00
Gregory Nutt
505ca542e8 Remove some last traces of lowvsyslog that were missed; Add a SYSLOG emergency channel for handling assertion output more cleanly 2016-06-20 16:11:50 -06:00
Gregory Nutt
43eb04bb8f Without lowsyslog() *llinfo() is not useful. Eliminate and replace with *info(). 2016-06-20 11:59:15 -06:00
Gregory Nutt
15c260a428 armv7-a/armv6-m/arm/a1x: Convert *err() to either *info() or add ERROR:, depending on if an error is reported 2016-06-17 16:44:50 -06:00
Gregory Nutt
b39e53391d Add underscore at beginning of alert() as well 2016-06-16 12:38:05 -06:00
Gregory Nutt
0c8c7fecf0 Add _ to the beginning of all debug macros to avoid name collisions 2016-06-16 12:33:32 -06:00
Gregory Nutt
6f08216621 Centralize definitions associated with CONFIG_DEBUG_SYSCALL 2016-06-16 08:12:38 -06:00
Gregory Nutt
c4e6f50eac Centralize definitions associated with CONFIG_DEBUG_IRQ 2016-06-15 08:35:22 -06:00
Gregory Nutt
a98bc05f65 New debug macro: alert(). This is high priority, unconditional output and is used to simplify and stanardize crash error reporting. 2016-06-14 09:07:53 -06:00
Gregory Nutt
0f249016a0 Eliminate some warnings 2016-06-13 14:01:32 -06:00
Gregory Nutt
be80a0b99c Eliminate some warnings 2016-06-11 16:40:53 -06:00
Gregory Nutt
a1469a3e95 Add CONFIG_DEBUG_ERROR. Change names of *dbg() * *err() 2016-06-11 15:50:49 -06:00
Gregory Nutt
e99301d7c2 Rename *lldbg to *llerr 2016-06-11 14:55:27 -06:00
Gregory Nutt
1cdc746726 Rename CONFIG_DEBUG to CONFIG_DEBUG_FEATURES 2016-06-11 14:14:08 -06:00
Gregory Nutt
fc3540cffe Replace all occurrences of vdbg with vinfo 2016-06-11 11:59:51 -06:00
Gregory Nutt
3a74a438d9 Rename CONFIG_DEBUG_VERBOSE to CONFIG_DEBUG_INFO 2016-06-11 11:50:18 -06:00
Gregory Nutt
80d0b2736e Reorder some logic: (1) set initial CPU IDLE task regsters AFTER allocating stack, (2) invalidate cache in CPU start-up BEFORE handling first interrupt. 2016-05-22 15:01:49 -06:00
Gregory Nutt
356692d70e SMP: Need to enable FPU on other CPUs as well 2016-05-20 13:35:58 -06:00
Gregory Nutt
07acd5327a SMP: Clean CPU0 D-Cache before starting new CPU; Invalidate D-Cache when new CPU started. 2016-05-20 12:39:02 -06:00
Gregory Nutt
f454b38d6e ARMv7-A SMP: Allow CONFIG_SMP_NCPUS=1 for testing purposes 2016-05-18 09:17:02 -06:00
Gregory Nutt
e6728bac29 Cortex-A9 GIC: Add an interface to set interrupt edge/level trigger 2016-05-16 14:42:55 -06:00
Gregory Nutt
4feeb0c2b4 Cortex-A9 GIC: Some fixes that I don't fully understand but do indeed give me serial interrupts 2016-05-16 12:50:35 -06:00
Gregory Nutt
a3f3cc12c0 Update some comments; Fix grammatic error in ChangeLog. 2016-05-13 17:36:08 -06:00
Gregory Nutt
faca2fb1e7 ARMv7-A/i.MX6: Add logic to handle allocation of CPU IDLE thread stacks more efficiently 2016-05-13 11:39:42 -06:00
Gregory Nutt
d14d84c1a6 ARMv7M/i.MX6: Implement CPUn n=1,2,3 startup logic 2016-05-13 09:11:55 -06:00
Gregory Nutt
70782b0f14 ARMv7-A i.MX6: More SMP logic. Still untested. 2016-05-12 15:04:46 -06:00
Gregory Nutt
99e695398c Rename up_boot to arm_boot 2016-05-12 13:42:49 -06:00
Gregory Nutt
26ba3a2b96 Cosmetic changes from review of last PR 2016-04-18 06:50:45 -06:00
Gregory Nutt
84b399136e GIC: Level or edge sensitive interrupt? 2016-04-01 13:26:57 -06:00
Gregory Nutt
f698f3dcbe ARMv7-A GIC: Fix another initialization errors 2016-04-01 08:53:43 -06:00
Gregory Nutt
ddc1b88027 ARMv7-A GIC: Fix some initialization errors 2016-04-01 08:40:51 -06:00
Gregory Nutt
855c9a5225 ARMv7-A GIC: Move debug logic to a separate file; fix some errors in debug logic. 2016-04-01 06:58:49 -06:00
Gregory Nutt
37cacc6178 ARMv7 GIC: Fix some formatting errors in GIC debug output 2016-03-31 18:26:15 -06:00
Gregory Nutt
70683d08bc i.MX6: Add GIC debug output 2016-03-31 17:25:04 -06:00
Gregory Nutt
756e6050e4 ARMv7-A: Need to set bits in the ICDDCR to enable forwarding of interrupts 2016-03-31 09:18:55 -06:00
Gregory Nutt
12064b276a ARMv7-A: Fix an error in GIC initialization 2016-03-31 08:05:12 -06:00
Gregory Nutt
1c56b8dd87 Update some ARM registers for Cortex-A9 2016-03-29 11:47:35 -06:00
Gregory Nutt
dcc93a7a44 Make it clear that GIC support is GICv2 2016-03-14 10:50:54 -06:00
Gregory Nutt
41b3af52b7 i.MX6: Revamp GIC initialization logic; add missing register bit definitions and initialization of GIC control register for secure cases 2016-03-13 10:12:45 -06:00
Gregory Nutt
6288e381ee Conform to revised SMP interfaces. Improve i.MX6 SMP startup handshake. 2016-03-12 15:22:45 -06:00
Gregory Nutt
8ad1188fe5 i.MX6: Finish initial cut at all SMP support 2016-03-12 13:23:49 -06:00
Gregory Nutt
cbe7321508 i.MX6: Finish GIC initialization 2016-03-12 11:38:16 -06:00
Gregory Nutt
4d484399a9 ARM: Remove some obsolete and incorrect conditional compilation 2016-03-11 12:42:58 -06:00
Gregory Nutt
87e7e135ba i.MX6: GIC decode and prioritization logic 2016-03-11 09:49:00 -06:00
Gregory Nutt
bc0fb5453a i.MX6: A little more GIC initialization logic 2016-03-11 09:00:49 -06:00
Gregory Nutt
3d6519a223 Implement Cortex-A9 up_cpu_index() using the MPIDR register. Thanks Alan. 2016-03-10 14:02:58 -06:00
Gregory Nutt
a94febb551 MPCore: Fix missing header file inclusion; Add GIC-based implementations of up_enabable_irq(0 and up_disable_irq() 2016-03-10 08:37:34 -06:00
Gregory Nutt
5c75f83b55 ARMv7-A GIC: Add definitions for shared interrupt IDs 2016-03-10 07:13:40 -06:00
Gregory Nutt
4d4f54a789 Rename current_regs to g_current_regs; For ARM, g_current_regs needs to be an array to support multiple CPUs 2016-03-09 13:41:48 -06:00
Gregory Nutt
7b0a696498 i.MX6: Add a system timer based on the i.MX6 GPT 2016-03-09 12:16:44 -06:00
Gregory Nutt
80dce6dba1 i.MX6: Add incomplete GPT header file 2016-03-09 09:08:01 -06:00
Gregory Nutt
613786ff3d ARMv7-A: Add global timer header file 2016-03-09 08:36:22 -06:00
Gregory Nutt
c404eae718 Costmetic update to comments 2016-03-03 09:12:13 -06:00
Gregory Nutt
3a14a4c4c6 i.MX6: Put in basic framework for interrupt handling 2016-03-03 08:50:56 -06:00
Gregory Nutt
a0783791a9 GIC: Fix some name collisions and naming inconsistencies 2016-03-03 08:50:25 -06:00
Gregory Nutt
52d499ba33 ARMv7-A: Add hooks for some common GIC logic 2016-03-02 14:56:54 -06:00
Gregory Nutt
db331d47dd ARMv7-A: Clean up some kruft in gic.h 2016-03-01 12:55:48 -06:00
Gregory Nutt
f2eb90cd1c i.MX6: Add definition of base address of ARM multi-core registers 2016-03-01 08:26:30 -06:00
Gregory Nutt
6949ff553b ARMv7-A: Revamp gic.h. Add mpcore.h 2016-03-01 08:21:26 -06:00
Gregory Nutt
bb62237c80 ARMv7-A: gic.h: Use register names from MPCore spec 2016-02-29 19:25:59 -06:00
Gregory Nutt
1fdc8db30c ARMv7-A: Add GIC register definition header file 2016-02-29 18:13:51 -06:00
Gregory Nutt
83bc1c97c3 Rename irqsave() and irqrestore() to up_irq_save() and up_irq_restore() 2016-02-14 16:11:25 -06:00
Gregory Nutt
70e502adb0 Replace irqsave() with enter_critical_section(); replace irqrestore() with leave_critical_section() 2016-02-13 19:11:09 -06:00
Gregory Nutt
a6eb9a351c Add spinlock support for ARMv7-M architectures 2016-02-09 13:44:22 -06:00
Gregory Nutt
5d449e9991 Add spinlock support for ARMv7-A architectures 2016-02-09 12:53:10 -06:00
Gregory Nutt
ed4e3c0a9e ARM: Replace explicit references to g_readytorun with indirect references via the macro this_task() 2016-02-06 13:41:28 -06:00
Gregory Nutt
10001f8556 WINTOOl should be selected only for Cygwin. MSYS and native should not have it. 2016-01-09 16:34:33 -06:00
Gregory Nutt
6d0650349a Add support for ARM big-endian toolchains with prefix armeb- 2015-12-26 18:13:01 -06:00
Gregory Nutt
9bcf27d15b TMS570 is big-endian 2015-12-26 14:47:54 -06:00
Gregory Nutt
092c681157 TMS570: Add a little more IRQ/FIQ logic 2015-12-21 10:57:01 -06:00
Gregory Nutt
63d5032d3b TMS4570: Was not building arm_head.S or up_allocateheap.c; ARMv7-R: Fix variious problems not that arm_head.S is being built 2015-12-19 18:56:23 -06:00
Gregory Nutt
bacf7cf07e ARMv7-R: fix some issues to get a clean compilation; TMS570: Add enough logic to support a minimum build. Not much there on the initial commit 2015-12-16 09:03:14 -06:00
Gregory Nutt
1f05f49e66 ARMv7-A: Update some co-processor register naming 2015-12-14 13:04:03 -06:00
Gregory Nutt
6e9aa0a1d7 ARMv7-A/M: Cosmetic changes 2015-12-14 11:56:39 -06:00
Gregory Nutt
edecfc2dac ARMv7-A: Cosmetic changes 2015-12-14 08:42:39 -06:00
Gregory Nutt
daea1e614b All architectures need to build ELF support if either CONFIG_ELF or CONFIG_MODULE are selected. Cortex-M7 also must support module cache corherence 2015-12-12 09:35:05 -06:00
Gregory Nutt
79df561669 Rename board_led_off to board_autoled_off 2015-11-01 09:09:36 -06:00
Gregory Nutt
b28e32e3d3 Rename board_led_on to board_autoled_on 2015-11-01 09:07:06 -06:00
Gregory Nutt
b6638315a4 Correct some spacing issues 2015-10-07 11:39:06 -06:00
Gregory Nutt
0ca999e119 Make some spacing comply better with coding standard 2015-10-06 16:23:32 -06:00
Gregory Nutt
3fdd914203 Costmetic fixes to C coding style 2015-10-05 17:13:53 -06:00
Gregory Nutt
6fc6d17760 Fix some spacing problems 2015-10-04 14:59:08 -06:00
Gregory Nutt
cae0c9a2e3 Standardize the width of all comment boxes in header files 2015-10-02 17:47:23 -06:00
Gregory Nutt
36726b1bc4 Standardize the width of all comment boxes in header files 2015-10-02 17:42:29 -06:00
Gregory Nutt
26347891ac Apply same fix for ARMv7-M to other architectures 2015-09-30 11:21:04 -06:00
Gregory Nutt
70f1a49fbe arch/arm/src/up_iternal.h and several ARM Make.defs files: In the original implementation, NOT defined(CONFIG_ARMV7M_CMNVECTOR) was a sufficient test to determine if lazy floating point register saving was being used. But recents changes added common lazy register as well so now that test must be (NOT defined(CONFIG_ARMV7M_CMNVECTOR) || defined(CONFIG_ARMV7M_LAZYFPU)). 2015-08-31 08:40:02 -06:00
Gregory Nutt
0843af5367 Fixes that call sched_resume_scheduler and sched_suspend_scheduler must include nuttx/sched.h 2015-07-29 16:51:26 -06:00
Gregory Nutt
eddf8161a5 Add scheduler resume/suspend calls to all implementations of up_release_pending() 2015-07-26 10:13:29 -06:00
Gregory Nutt
37969b8279 Add scheduler resume/suspend calls to all implementations of up_reprioritize_rtr() 2015-07-26 09:46:28 -06:00
Gregory Nutt
838c5355eb Correct resume scheduler hooks and add suspend scheduler hooks to all implementations of up_unblock_task 2015-07-26 09:07:47 -06:00
Gregory Nutt
a92c0a10ab Add scheduler resume/suspend calls in all implementations of up_block_task() 2015-07-26 08:31:23 -06:00
Gregory Nutt
9d98177daa Add logic to reset the replenish the sporadic scheduler when a task is resumed 2015-07-24 09:54:28 -06:00
Gregory Nutt
1839d132f0 Add a dummy arch_invalidate_icache because for symmetry in the naming of cache operations 2015-07-02 11:13:23 -06:00
Gregory Nutt
fb926e7283 Fix references to the no-longer-existent misc/ directory in comments, README files, and documentation 2015-06-28 08:08:57 -06:00
Gregory Nutt
29136e51cc Clean up and review of header files for conformance to standards 2015-06-12 19:26:01 -06:00
Gregory Nutt
6481f1f68e ARMv7-A: Port some assertion debug logic from ARMv7-M 2015-05-02 09:53:57 -06:00
Gregory Nutt
ae15c6963c Make some file section headers more consistent with standard 2015-04-08 08:04:12 -06:00
Gregory Nutt
a5043d5e60 Add support for dumping board-specific information on assertion. From David Sidrane 2015-03-04 07:00:29 -06:00
Gregory Nutt
429863f348 arch/: board function prototypes are now in include/nuttx/board.h. Remove from architecture header file; Add inclusion of nuttx/board.h to all files referencing board functions 2015-02-27 17:19:38 -06:00
Gregory Nutt
f0d318c124 Big, very risky change: Remove all occurrences of up_maskack_irq() that disable and enable interrupts with up_ack_irq() that only acknowledges the interrupts. This is only used in interrupt decoding logic. Also remove the logic that unconditionally re-enables interrupts with the interrupt exits. This interferes with the drivers ability to control the interrupt state. This is a necessary, sweeping, global change and unfortunately impossible to test. 2015-02-09 16:12:11 -06:00
Gregory Nutt
25f187d754 ARMv7-A interrupt handler: Should not automatically re-enable interrupts on interrupt return. That interferes with the driver's ability to manage interrupts. 2015-02-09 15:24:31 -06:00
Gregory Nutt
56200909a0 ARM assembly language memcpy.S was not returning a value in R0 it is required to do. From David Sidrane 2015-01-29 06:36:53 -06:00
Gregory Nutt
30b141e2c8 Remove CONFIG_DEBUG_STACK. Adding CONFIG_STACK_COLORATION makes this configuration option pointless 2015-01-24 06:49:51 -06:00
Gregory Nutt
e8f266001d Add CONFIG_STACK_COLORATION that does the same thing as CONFIG_DEBUG_STACK but without enabling debug. From David Sidrane 2015-01-24 06:03:39 -06:00
Gregory Nutt
db9901e2f9 Update everything under nuttx/arch to use the corrected syslog interfaces 2014-10-08 12:48:47 -06:00
Gregory Nutt
083e808ad8 This completes the implementation of shared memory support 2014-09-24 09:27:17 -06:00
Gregory Nutt
327628ca19 Build support for platform-specific shared memory logic. Not logic yet in place 2014-09-24 07:39:06 -06:00
Gregory Nutt
25b52a111e Cosmetic 2014-09-23 16:03:52 -06:00
Gregory Nutt
a9864bc100 Extend virtual/physical address conversions to include addresses in shared memory. 2014-09-23 16:03:08 -06:00
Gregory Nutt
cce614c67e Fix some inconsistent field name in struct task_group_s: addrenv should be tg_addrenv. 2014-09-23 16:01:44 -06:00
Gregory Nutt
df26163f1f Add logic necessary to handler remapping of shared memory on contex switches 2014-09-23 13:19:30 -06:00
Gregory Nutt
e94adf8ff4 Ooops... a file that I forgot to add yesterday 2014-09-17 09:52:07 -06:00
Gregory Nutt
04f75c42cc Add a sharable version of arm_virtpgaddr() 2014-09-16 16:49:44 -06:00
Gregory Nutt
d936f1a918 First round of changes to get the ELF configuration building again 2014-09-16 15:37:05 -06:00
Gregory Nutt
c20907b86c These files were deleted and moved to a different location (see previos commit) 2014-09-16 13:36:51 -06:00
Gregory Nutt
8058de7874 remove tailing blank line 2014-09-16 13:36:14 -06:00
Gregory Nutt
bd6f7c50e8 Move common/up_signal_dispatch.c to armv6-m, armv7-m, and armv7-a. The armv7-a version needs to be different to handle the case where we are dispatch kernel mode signals when running under a user mode group 2014-09-16 13:35:29 -06:00
Gregory Nutt
8c3fd5a162 Correct stack handling is signal deliver to user processes 2014-09-16 13:33:13 -06:00
Gregory Nutt
ebc10e0237 Move some share-able logic from sama5/sam_pgalloc.c to armv7-a/arm_physpgaddr.c 2014-09-16 13:31:48 -06:00
Gregory Nutt
4a04ea48e4 Move some share-able logic from sama5/sam_pgalloc.c to armv7-a/arm_physpgaddr.c 2014-09-16 13:31:24 -06:00
Gregory Nutt
9879f47bbb Move some share-able logic from sama5/sam_pgalloc.c to armv7-a/arm_physpgaddr.c 2014-09-16 13:29:43 -06:00
Gregory Nutt
4f1ca4cbb7 Partial fix to an cache cleaning problem 2014-09-15 16:04:42 -06:00
Gregory Nutt
35a282bc30 Fix an error in a debug statement 2014-09-15 15:15:57 -06:00
Gregory Nutt
e2952e4088 Eliminate a bug introduced in last checking 2014-09-15 15:10:50 -06:00
Gregory Nutt
d14d3b29bb ARMv7-A: Improvements to assertion output for kernel mode 2014-09-15 15:03:55 -06:00
Gregory Nutt
9aae0adffa If we are configured to use a kernel stack while in SYSCALL handling, then we need to switch back to the user stack to deliver a signal 2014-09-15 11:38:48 -06:00
Gregory Nutt
949cc1b20c Fix a typo in system call when fetching parameter from the stack: regs[REG_PC]+4 is the address, not regs[REG_PC+4] 2014-09-15 10:55:10 -06:00
Gregory Nutt
946b916f69 Initial integration of kernel stack (does not work) 2014-09-14 11:19:34 -06:00
Gregory Nutt
16ddffc941 Add the initial implementation of the process kernel stack logic. Not yet integrated into the main OS logic nor tested. 2014-09-14 09:53:54 -06:00
Gregory Nutt
ffff51c1b1 Rename everything associated with the dynamic process stack to ustack to make room in the name space for a kstack 2014-09-14 09:10:09 -06:00
Gregory Nutt
d956936535 Add logic need to manage a virtualized stack. Not yet incorporated into base OS logic. 2014-09-13 13:45:35 -06:00
Gregory Nutt
5d4f336b1f Move static helper routines from arm_addrenv.c and may them global so that they can be shared both forthcoming stack address environment logic. 2014-09-13 13:17:44 -06:00
Gregory Nutt
f4bcb27962 Add a configuration option for dynamic stack management 2014-09-13 12:25:32 -06:00
Gregory Nutt
fe48417a96 Comsetic updates to comments, debug output 2014-09-12 10:31:58 -06:00
Gregory Nutt
fba35f0c41 ARMv7-A: Modify up_fullcontextrestore() for CONFIG_BUILD_KERNEL. It changed CPSR while in kernel. That will crash is the new CPSR is user mode while executing in kernel space. Fixed by adding a SYS_context_restore system call. There is an alternative, simpler modification to up_fullcontextrestore() that could have been done: It might have been possible to use the SPSR instead of the CPRSR and then do an exception return from up_fullcontextrestore(). That would be more efficient, but I never tried it. 2014-09-12 08:04:27 -06:00
Gregory Nutt
6084fad7e0 Fix logic for returning from exceptions to user-mode contexts 2014-09-11 18:43:30 -06:00
Gregory Nutt
62e608be8c All tasks, even user mode tasks, must start in supervisor mode until they get past the start-up trampoline 2014-09-11 18:42:52 -06:00
Gregory Nutt
4821587509 Update some comments/function headers 2014-09-11 17:15:26 -06:00
Gregory Nutt
401b8543cd Tighten up some ARM assembly language. You can always do better 2014-09-11 15:12:08 -06:00
Gregory Nutt
bd7f16d16a ARMv7-A: Exception register save/restore needs to work a little differently if we support user mode processes 2014-09-11 14:34:10 -06:00
Gregory Nutt
998c5ee0a9 Trivial kernel build related fixes for consistency 2014-09-11 12:35:23 -06:00
Gregory Nutt
1f23ad9bad Misc fixes to repair some of the breakage to the SAMA5D4-EK elf configuration caused by changes for the knsh configuration 2014-09-11 10:31:12 -06:00
Gregory Nutt
006cf7d745 Add logic to initialize the per-process user heap when each user process is started 2014-09-10 15:55:36 -06:00
Gregory Nutt
2da0392ae2 SAMA5D4-EK: These configurations now use the fixed DRAM mapping for manipulating the page memory pool. 2014-09-10 08:44:09 -06:00
Gregory Nutt
6238e87aaa Add configuration to use the fixed DRAM mapping for the page pool (if available) instead of remapping dynamically to access L2 page tables and page data. Also, add logic in address environment creation to initialize the shared data at the beginning of the .bss/.data process memory region. 2014-09-10 08:41:01 -06:00
Gregory Nutt
8a99c421ff pcDuino: Several fixes so that it still builds after other Cortex-A changes. 2014-09-10 06:24:39 -06:00
Gregory Nutt
aaf190dcf6 ELF relocations. Some relocation types do not have a named symbol associated with them. The design did not account for that case 2014-09-09 16:52:51 -06:00
Gregory Nutt
8b64dc003e SAMA5D4-EK: In kernel build with address environment, need logic to map user virtual addresses to physical addresses, and vice versa 2014-09-07 19:25:30 -06:00
Gregory Nutt
53bd807186 Fix loop counter... was overrunning a table on larger ELF files 2014-09-07 14:42:04 -06:00
Gregory Nutt
dcc711f3f2 Correct size comparison (pages vs. sections) 2014-09-07 13:47:01 -06:00
Gregory Nutt
3dd3b1f5e2 The 'make export' target needs to bundle up the user C startup file (crt0), not the kernel head object 2014-09-04 13:31:34 -06:00
Gregory Nutt
70e5350942 Mostly cosmetic changes 2014-09-04 10:28:38 -06:00
Gregory Nutt
15e439d6de I love/hate conditional compilation 2014-09-03 11:43:23 -06:00
Gregory Nutt
12775801c9 Add support for delivery of use-mode signals in the kernel build. 2014-09-02 15:58:14 -06:00
Gregory Nutt
8557f1a1bb Space at the beginning of the process data space is now reserved for user heap management structures. In the kernel build mode, these heap structures are shared between the kernel and use code in order to allocate user-specific data. 2014-09-02 11:21:23 -06:00
Gregory Nutt
4d8367a009 sbrk() need to initialized the memory manager on the first call 2014-09-02 08:05:11 -06:00
Gregory Nutt
587520a7d2 Completes the implementation of sbrk() (untested) 2014-09-01 10:46:51 -06:00
Gregory Nutt
4537a905f6 ARMv7 address environment: Static functions not marked static 2014-09-01 08:49:08 -06:00
Gregory Nutt
05b6217876 ARMv7-A: A little more logic and a few more fixes for Cortex-A kernel build 2014-08-31 07:15:46 -06:00
Gregory Nutt
e11679acf8 Rename CONFIG_NUTTX_KERNEL to CONFIG_BUILD_PROTECTED; Partially integrate new CONFIG_BUILD_KERNEL 2014-08-29 14:47:22 -06:00
Gregory Nutt
67721c50f1 Fix hard coded values in dispatch_sysall inline assembly. Back out/corect part of last change; that was going the wrong direction. 2014-08-29 10:10:47 -06:00
Gregory Nutt
48c2c9ed08 Fix a cloned typo 2014-08-29 10:09:07 -06:00
Gregory Nutt
27e463dfaa Various fixes to the ARMv7-A system call logic 2014-08-29 08:24:00 -06:00
Gregory Nutt
8196b629a4 Rename arch/arm/src/armv7-a/syscall.h to svcall.h to work around some include path name collisions; fix some compilation errors in SYSCALL logic when debug is enabled 2014-08-29 07:48:16 -06:00
Gregory Nutt
8dd679e875 ARMv7-A: Add SYSCALL handling logic 2014-08-28 14:52:14 -06:00
Gregory Nutt
cbf0141d6c Add an ARMv7-A system call definition header file 2014-08-28 13:21:36 -06:00
Gregory Nutt
4fa5b52e43 Cortex-A address environments: Fix issue with page privileges 2014-08-28 11:00:41 -06:00
Gregory Nutt
26f6d90fa9 Remove a warning 2014-08-28 10:04:41 -06:00
Gregory Nutt
35b11a7533 Fix an error introduced into ALL implmentations of interrupt dispatch logic 2014-08-28 08:41:57 -06:00
Gregory Nutt
8bdde7b2d1 Add address environment support to ALL implementatins of up_release_pending() 2014-08-28 08:10:19 -06:00
Gregory Nutt
1b24afe6fc Add address environment support to ALL implementatins of up_reprioritize_rtr() 2014-08-28 07:54:07 -06:00
Gregory Nutt
0e9a0150ba ARM: Move address environment switch from the task switchers to the interrupt handler. That may save doing the actin multiple times per interrupt 2014-08-28 06:49:05 -06:00
Gregory Nutt
540a7e4a35 ARM: Move address environment switch from the task switchers to the interrupt handler. That may save doing the actin multiple times per interrupt 2014-08-28 06:34:09 -06:00
Gregory Nutt
7055bce8b4 Add ADDRENV support to ALL implementations of up_unblock_task() 2014-08-27 16:15:46 -06:00
Gregory Nutt
5bf114e604 Add ADDRENV support to all implementations of up_block_task() 2014-08-27 15:36:52 -06:00
Gregory Nutt
8ec74b1a9e Minor address environment clean-up. Cannot generate debug contexts in certain contexts 2014-08-27 14:22:00 -06:00
Gregory Nutt
032ff50313 Add up_addrenv_coherent which will be called before address environment switches 2014-08-26 14:53:19 -06:00
Gregory Nutt
d6a4eb6266 up_coherent_dcache should do nothing the the length is zero 2014-08-26 14:51:53 -06:00
Gregory Nutt
e8094292e3 Rename up_addrenv_assign() to up_addrenv_clone() and generalize its arguments so that can be used for other purposes 2014-08-26 12:16:05 -06:00
Gregory Nutt
b1066775a2 Fix confusion about what is a page of data and what is a page of L2 page table; restructure functions to reduce duplicated logic 2014-08-26 10:41:43 -06:00
Gregory Nutt
45d0b2c5fb Add lots of debug output 2014-08-26 07:54:43 -06:00
Gregory Nutt
b3473bfa26 Cortex-A address environment: Fix some section mapping and address increments 2014-08-26 06:33:26 -06:00
Gregory Nutt
a593729cb2 ARMv7-A: Use of write back might be unpredictable 2014-08-25 16:34:22 -06:00
Gregory Nutt
cfa8174fe4 Bugfixes.. still integrating SAMA5 ELF with address environment 2014-08-25 15:27:58 -06:00
Gregory Nutt
699a54a022 Misc changed to get the SAMA5 ELF configuration with address environments working 2014-08-25 13:28:13 -06:00
Gregory Nutt
8907616478 Cortex-A/SAMA5 address environment support is code complete (untested) 2014-08-25 11:18:32 -06:00
Gregory Nutt
2566ba7b1d Change naming of ELF interfaces from arch_ to up_ for consistency 2014-08-25 06:47:14 -06:00
Gregory Nutt
1f5813a763 After cached related fix, the ELF example is now functional 2014-08-24 14:12:45 -06:00
Gregory Nutt
dde84a0a20 addrenv interface changes: up_addrenv_create() may need to create .text and .bss/.data separately because of differing access privileges (read/execute vs read/write). And, as a consequence, up_addrenv_vaddr() needs to be split into up_addrenv_vtext(0 and up_addrenv_vdata(). 2014-08-24 11:54:14 -06:00
Gregory Nutt
95c79c675c Add addrenv.h; First cut at Cortex-A address environment structures; Add configuration options to setup address enviornment 2014-08-24 09:57:53 -06:00
Gregory Nutt
66abb71c57 Change CONFIG_ADDRENV to CONFIG_ARCH_ADDRENV; change how it is selected -- the architecure must first declare support 2014-08-24 06:42:11 -06:00
Gregory Nutt
41196945d6 ARMv7-A: Add skeleton environment and build support for process address environments 2014-08-23 18:59:24 -06:00
Gregory Nutt
6455f60c60 Remove os_internal.h it has been replace by several new header files under sched/. There have been some sneak inclusion paths via os_internal.h, so expect a few compilation errors for some architectures 2014-08-08 18:39:28 -06:00
Gregory Nutt
4dc151097e Replace os_internal.h with sched/sched.h in files that actually reference something in sched.h 2014-08-08 17:53:55 -06:00
Gregory Nutt
1c99d53bb1 Move clock functions from sched/ to sched/clock 2014-08-08 14:43:02 -06:00
Gregory Nutt
39183d37b8 Change all time conversions. Yech. New timer units in microseconds breaks all existing logic that used milliseconds in the conversions. Something likely got broken doing this, probably because I confused a MSEC2TICK conversion with a TICK2MSEC conversion. Also, the tickless OS no appears fully functional and passes the OS test on the simulator with no errors 2014-08-07 18:00:38 -06:00
Gregory Nutt
dd4be66f1c ARM: Move L2 cache initialization to much later in the sequence 2014-07-27 10:03:33 -06:00
Gregory Nutt
b57d2182ab ARMv7-A L2 Cache currently depends on EXPERIMENTAL because it does not yet work properly 2014-07-26 18:48:54 -06:00
Gregory Nutt
6f5280d284 ARMv7 L2 Cache: Minor bugfixes/improvements 2014-07-26 18:48:26 -06:00
Gregory Nutt
873788bf5a New cache.h file. Renames cp15_XYZ_cache() to arch_XYZ_cache() and addes L2 cache support if L2 cache is enabled 2014-07-26 18:46:52 -06:00
Gregory Nutt
2eb526253b Rename ARMv7-A cache.h to cp15_cache.h. Things will be broken on this commit until I get the new cache.h in place. 2014-07-26 16:54:19 -06:00
Gregory Nutt
6d9ca195ee arch/arm/src/armv7-a/arm_l2cc_pl310.c, l2cc.h, l2cc_pl310.h, Kconfig: Add initiali support for the ARM L2CC-PL310 L2 cache. 2014-07-26 16:50:08 -06:00
Gregory Nutt
fcbf89c6f6 ARMv7-A: L2CC PL310 address filtering is an optional feature 2014-07-25 19:46:09 -06:00
Gregory Nutt
a007fa3f5e ARMv7-A: Add missing L2CC PL310 bit definitions 2014-07-25 19:41:35 -06:00
Gregory Nutt
e74f37445b rch/arm/armv7-a/l2cc_pl310.h: Move arch/arm/sama5/chip/sam_l2cc.h to arch/arm/armv7-a/l2cc_pl310.h. Adjust the two corresponding Kconfig files as well. 2014-07-25 17:25:17 -06:00
Gregory Nutt
0a134f0158 Need to enable FIQ in initial task state; Improve H32/64 test in IRQ handling 2014-06-21 09:55:09 -06:00
Gregory Nutt
40b7ddf68e SAMA5: FIQs should be disabled along with IRQs on most exeptions in most configuratinons. arm_decodefiq and arm_decodeirq are mutually exclusive and, hence, can use the same interrupt stack 2014-06-20 18:49:01 -06:00
Gregory Nutt
c68d2532be SAMA5D4: Add support for secure/FIQ interrupts; SAIC supports need to be be enabled unconditionally 2014-06-20 18:16:41 -06:00
Gregory Nutt
0a2133b57f SAMA5D4: Add partial support for secure interrupt controller (SAIC) 2014-06-20 15:22:00 -06:00
Gregory Nutt
1636d7cb2f Ooops... last (cosmetic) changes were still in the editor 2014-05-06 15:00:39 -06:00
Gregory Nutt
422a9c9bfd Optimized memcpy() functin for the ARMv7-A from David Sidrane 2014-05-06 14:58:48 -06:00
Gregory Nutt
e4fd434a60 Cosmetic update to comments and README files 2014-04-24 12:44:30 -06:00
Gregory Nutt
0d2e525bd4 Updated comments; minor correction in some naming 2014-04-23 14:46:39 -06:00
Gregory Nutt
9d12aa82fe Sourceforge Patch #37: Missing semicolon 2014-04-16 09:43:34 -06:00
Gregory Nutt
25d4ff745b More trailing whilespace removal 2014-04-13 16:22:22 -06:00
Gregory Nutt
c708eff608 Make sure that there is one space after for 2014-04-12 13:28:22 -06:00
Gregory Nutt
78607a7ea9 SAMA5: Don't use MMU PMD bufferable bit to try to control write-through vs write-back. It does not work that way 2014-04-04 16:05:20 -06:00
Gregory Nutt
489651d041 ARMv7-A: Typo fix from David Sidrane 2014-04-03 15:43:13 -06:00
Gregory Nutt
362d539914 If LOWVECTORS is selected, then we need to clear the VBAR register. A bootloader may have left the VBAR in an bad state 2014-04-03 13:09:30 -06:00
Gregory Nutt
e3d2117b29 SAMA5: Make sure the MMU and caches are disabled on power up; flush the vector region D-Cache after copying interrupt vectors; make sure that D-Cache, I-Cache, and TLBs are invalidated after modifying the AXI MATRIX remapping 2014-04-02 16:27:00 -06:00
Gregory Nutt
7372485e16 Updated comments and README 2014-04-02 09:03:29 -06:00
Gregory Nutt
5ac5506b35 All ARM assertion logic will show stack usage on assertion if DEBUG_STACK is enabled 2014-03-23 10:06:48 -06:00
Gregory Nutt
5b9f1f54c2 Add option to dump buffered USB trace data on an assertion 2014-03-20 10:56:30 -06:00
Gregory Nutt
306271d151 Buildroot EABI (vs OABI) is now the default 2014-02-28 07:49:15 -06:00
Gregory Nutt
6e6b048e5a SAMA5: Fix logic for running with data in SDRAM 2014-01-29 07:49:23 -06:00
Gregory Nutt
e29e0f1cc4 ARMv7-A: Conditionally compile out more unneeded logic when .data and .bss are in SDRAM 2014-01-28 16:39:08 -06:00
Gregory Nutt
93bd80b080 SAMA5: Mostly cosmetic 2014-01-28 15:54:03 -06:00
Gregory Nutt
c930554c2c Add support for .data and .bss in SDRAM 2014-01-28 14:35:03 -06:00
Gregory Nutt
a26b03d0d0 rename up_led*() functions to board_led_*() 2014-01-24 14:28:49 -06:00
Gregory Nutt
231889c888 The optimization level can now be selected as part of the configuration 2014-01-24 07:45:35 -06:00
Gregory Nutt
363d44b7d0 Cosmetic spaces to tabs change 2013-12-08 10:38:33 -06:00
Gregory Nutt
c131e94d04 Add more nops after enabling MMU for Cortex-A8 2014-01-07 08:38:00 -06:00
Gregory Nutt
f1e44300c6 A10: Fix error in IRQ dispatch; vector table seems to be offset by 64 bytes? 2013-12-07 08:36:30 -06:00
Gregory Nutt
e86f940374 SVC is the preferred mnemonic vs. SWI for cortex A 2014-01-05 16:21:41 -06:00