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10558 Commits

Author SHA1 Message Date
Jussi Kivilinna
acf0d17e5a Fix STM32F7 I2C interrupt handler 2017-05-04 06:51:44 -06:00
Juha Niskanen
80c2d384bb STM32L4: flash: update override config macros and add FLASH_CONFIG_B 2017-05-04 15:24:16 +03:00
Juha Niskanen
ae22eb224a STM32L4: changes needed for STM32L452 and Nucleo-L452RE board 
GPIO and UART seem similar across STMicro product matrix,
so renamed files accordingly. RCC is cloned just in case,
while conflicting differences there seem to be very minor.
 2017-05-04 15:23:38 +03:00
Juha Niskanen
dd1b9dfa81 STM32L4: modularize Kconfig to support different product lines/families 
This is modeled after STM32F7. Idea is to declare each chip in Kconfig
but allow for flash size override. Commit adds many STM32L4_HAVE_XXX
feature test macros.
 2017-05-04 15:22:51 +03:00
Juha Niskanen
c67c4a75ba STM32L4: stm32l4_i2c: change wrong macro to CONFIG_I2C_POLLED 2017-05-04 09:31:12 +03:00
Gregory Nutt
b0e880b04c Revert "STM32 I2C: More backward tests of CONFIG_I2C_POLLED. Needs to be reviewed." 
This reverts commit 1e054a2d3b.
 2017-05-03 18:26:24 -06:00
Gregory Nutt
11c14470c3 Merge remote-tracking branch 'origin/master' into photon 2017-05-03 17:36:52 -06:00
Gregory Nutt
1e054a2d3b STM32 I2C: More backward tests of CONFIG_I2C_POLLED. Needs to be reviewed. 2017-05-03 17:33:35 -06:00
David Sidrane
9b5ac56409 Fixed typo and backward ifdef 2017-05-03 23:10:48 +00:00
Juha Niskanen
ad3b941c44 STM32L4: stm32l4x6xx_pinmap: update I2C4 and DCMI pins 
Signed-off-by: Juha Niskanen <juha.niskanen@haltian.com>
 2017-05-02 10:16:34 -06:00
Juha Niskanen
74e016d013 STM32F7: flash: macro naming errors, there is no FLASH_CONFIG_F for F7 
Signed-off-by: Juha Niskanen <juha.niskanen@haltian.com>
 2017-05-02 10:14:46 -06:00
Gregory Nutt
e94865a317 Merge remote-tracking branch 'origin/master' into photon 2017-05-02 08:49:19 -06:00
Gregory Nutt
40b5c46024 STM32L4: Delete more references to DFPU, ITCM, and DTCM. 2017-05-02 08:03:21 -06:00
Mateusz Szafoni
1feaae7222 Merged in raiden00/nuttx (pull request #338) 
OPAMP support for STM32F33XX
 2017-05-02 13:57:56 +00:00
Juha Niskanen
a59b7bc932 STM32L4: add GPIO_PORTI definition 
Signed-off-by: Juha Niskanen <juha.niskanen@haltian.com>
 2017-05-02 07:41:14 -06:00
Juha Niskanen
0eb14e9baa STM32L4: don't think these chips have DPFPU, DTCM or ITCM 2017-05-02 07:36:11 -06:00
Gregory Nutt
f7a28c09b0 Merge remote-tracking branch 'origin/master' into photon 2017-05-01 18:06:23 -06:00
Gregory Nutt
c59a5efcae STM32F0: I2C frequency quantization. Add logic to get closer if an oddball frequency is used. 2017-05-01 17:52:51 -06:00
Alan Carvalho de Assis
ccfdef6ddf STM32F0: Fix I2C frequency table 2017-05-01 17:41:57 -06:00
Gregory Nutt
e43b86dbd0 Merge remote-tracking branch 'origin/master' into photon 2017-04-30 17:42:37 -06:00
Gregory Nutt
a8ce97715b Tiva I2C: Update to use the standard parameter passing to interrupt handlers. 2017-04-30 14:44:39 -06:00
Gregory Nutt
0597eb5587 Fix a typo introduced in last commit. 2017-04-30 12:41:19 -06:00
Gregory Nutt
c172d7cf63 EFM32, STM32, and STM32 F7 I2C: Update to use the standard parameter passing to interrupt handlers. 2017-04-30 11:56:06 -06:00
Gregory Nutt
dee736bd0d STM32F0 I2C: Pin definitions should specify open drain (and probably 50Mhz). 2017-04-30 10:28:16 -06:00
Gregory Nutt
0a9dd3876b STM32F0 I2C: Upate driver to use the standard interrupt parameter passing logic. 2017-04-30 09:19:51 -06:00
raiden00pl
e4d47d61cc STM32F33: Add OPAMP support 2017-04-30 11:05:34 +02:00
Alan Carvalho de Assis
b688d41516 STM32F0 I2C: Initial cut at driver. Still a work in progress. 2017-04-29 16:53:47 -06:00
Gregory Nutt
f0bbe56620 STM32F0: Add some protection. There is only one interrupt for USART3-8. Current interrupt handling logic will support only one interrupt in that range. 2017-04-29 12:58:06 -06:00
Gregory Nutt
a7901f5c4c Merge remote-tracking branch 'origin/master' into photon 2017-04-29 12:35:01 -06:00
Gregory Nutt
e9a5477506 Add an instance argument to the SPIDEV definitions. 2017-04-29 12:26:52 -06:00
Gregory Nutt
f175af3cd3 More missed enum spi_dev_e forward references. 2017-04-29 08:29:01 -06:00
Gregory Nutt
b6b16bf4da Fix forward references that were mangled in last large changes. 2017-04-29 06:59:35 -06:00
Sebastien Lorquet
c56c6f7ccc ARM arch changes 2017-04-28 18:23:29 +02:00
Gregory Nutt
9431fb1d91 STM32L4: I2C was not using current interrupt handling parameter passing logic. 2017-04-28 08:21:02 -06:00
Juha Niskanen
b4d2651ca9 STM32L4: stm32l4_i2c: add I2C4 code 2017-04-28 08:09:16 -06:00
Gregory Nutt
2e6908b384 IOCTLS. Separate wireless character driver IOCTL commands from wireless network driver IOCTL commands. Move from wireless.h to ioctl.h. 2017-04-27 16:58:30 -06:00
Gregory Nutt
b608afc484 STM32F0: Fix some missing settings in the clock configuration logic 2017-04-27 15:44:05 -06:00
Gregory Nutt
92d761dfe3 STM32F0 Serial: Costmetic changes to spacing. 2017-04-27 09:15:18 -06:00
Sebastien Lorquet
c3119f06a2 Update STM32L4 README.txt file. 2017-04-27 08:37:14 -06:00
Juha Niskanen
f1b71e3ae7 TM32L4: Add some defines for the new peripherals in STM32L496 parts 2017-04-27 07:26:32 -06:00
Juha Niskanen
8a6662c957 TM32L4: Add some defines for the new peripherals in STM32L496 parts 2017-04-27 07:25:20 -06:00
Juha Niskanen
707d1e67fc STM32, STM32F7, STM32L4: Remove incorrect comment about STM32L1 LSE/RTC/LCD 2017-04-27 07:18:36 -06:00
Gregory Nutt
7d8140708e Merge remote-tracking branch 'origin/master' into photon 2017-04-26 10:42:19 -06:00
Simon Piriou
6bb2db8c15 bcmf: enable DMA for SDIO transfers 2017-04-26 17:23:53 +02:00
Gregory Nutt
232fbf7f00 CONFIG_DEBUG_HARDFAULT should be available for Cortex-M0 too. configs/nucle-f072rb/nsh: Correct amount of available SRAM in defconfig. 2017-04-26 07:45:40 -06:00
Juha Niskanen
06e4c4aedd STM32L4: add support for the STM32L496XX family 2017-04-25 08:47:50 -06:00
Simon Piriou
3bf5044306 stm32: cleanup stm32_sdio.c 2017-04-24 20:01:41 +02:00
Gregory Nutt
62966d915c Merge remote-tracking branch 'origin/master' into photon 2017-04-23 10:16:54 -06:00
Gregory Nutt
ca7d88f6bb SAM3/4: Fix a few more naming differences noted by Alan Carvalho de Assiss. 2017-04-23 08:14:49 -06:00
kc_dtm
db9143b2bd SAM3/4: Remove inappropriate semicolon. 2017-04-23 07:21:44 -06:00
Gregory Nutt
eb1d4ca774 SAM3/4: Fixed configurations for TWI master. Obviously an incomplete port from SAMA5. 2017-04-23 07:17:55 -06:00
Gregory Nutt
a55e937643 Correct mispelling 2017-04-22 17:03:34 -06:00
Gregory Nutt
79256573e1 net: network drver now retains Ethernet MAC address in a union so that other link layer addresses may be used in a MULTILINK environment. 2017-04-22 11:10:30 -06:00
Gregory Nutt
d8e4cbcfd5 Merge remote-tracking branch 'spiriou/wlan_dev' into photon 2017-04-22 08:26:40 -06:00
Jussi Kivilinna
325ba1a803 clock: add clock_resynchronize and use subseconds RTC 
Add clock_resynchronize for better synchronization of CLOCK_REALTIME and CLOCK_MONOTONIC to match RTC after resume from low-power state.

Add up_rtc_getdatetime_with_subseconds under CONFIG_ARCH_HAVE_RTC_SUBSECONDS to allow initializing (and resynchronizing) system clock with subseconds accuracy RTC.
 2017-04-21 08:45:57 -06:00
Juha Niskanen (Haltian)
c04c49dac0 Add support for the STM32F09X family. 2017-04-21 08:23:25 -06:00
Gregory Nutt
f902b8b058 Merge branch 'iob' 2017-04-20 16:09:14 -06:00
Gregory Nutt
bfb93338f6 Move net/iob to drivers/iob so that the I/O buffering feature can be available to other drivers when networking is disabled. 2017-04-20 16:08:49 -06:00
Gregory Nutt
73c7f05a3c Cosmetic changes to spacing and comments. 2017-04-20 14:08:08 -06:00
Gregory Nutt
d0ec395c42 Correct some spacing and some unused definition in some irq.h header files. 2017-04-20 12:39:21 -06:00
Gregory Nutt
bb54449889 STM32F0: Add an untested port of the F1 USB device to the STM32F0 2017-04-20 11:50:58 -06:00
Gregory Nutt
20ddbd7368 STM32F0: Add support for HSI48 2017-04-20 11:08:23 -06:00
Gregory Nutt
a98cdc7a45 Add STM32F0 USB device header file; Update TODO list. 2017-04-20 09:31:12 -06:00
Juha Niskanen
9d0ecedf7d Add support for STM32L152CC, STM32L152RC and STM32L152VC. Update some bits and comments for other STM32L1 parts in chip.h 2017-04-20 06:30:26 -06:00
Juha Niskanen
e631ee4582 STM32 L1: stm32l15xx_rcc: Allow board to configure HSE clock in bypass-mode. Allows using MCO output from ST-link chip (on Nucleo and Discovery boards) as HSE input. 2017-04-20 06:28:01 -06:00
Ian McAfee
6a2c43b0c1 SAMV7 EMAC: Add conditional logic to account the fact that the SAMV71 has 6 rather than 3 queues after version 1. 2017-04-19 14:32:28 -06:00
David Sidrane
29fe0a1b5f Merged in david_s5/nuttx/upstream_stm32_warn (pull request #323) 
stm32:stm32_serial fixed warning

Approved-by: Gregory Nutt <gnutt@nuttx.org>
 2017-04-18 22:01:02 +00:00
David Sidrane
4844011b9c stm32:stm32_serial fixed warning 2017-04-18 11:51:56 -10:00
David Sidrane
a0c4254168 Kinetis:Fixed warning 2017-04-18 10:04:54 -10:00
Gregory Nutt
27e212a291 Nucleo-F072RB: Various fixes to get the first clean build. 2017-04-18 10:37:05 -06:00
Gregory Nutt
b45472baf8 Nucleo-F072RB: Add board configuration 2017-04-18 10:07:03 -06:00
Gregory Nutt
8420e68a9b STM32F0: The STM32F2 does not have use alternate function groupings as does the F1. Rather, it is like other members of the STM32 family with An alternate setting AF0-AF7 for each pin. 2017-04-18 08:40:14 -06:00
Gregory Nutt
04ebdbb336 Move: CONFIG_ADC_NO_START_CONV from drivers/adc/Kconfig to arch/arm/src/stm32[f7]/Kconfig as STM32[F7]_ADC_NO_START_CONV. Refresh all configurations with any reference to CONFIG_ADC_NO_START_CONV. 2017-04-18 07:16:35 -06:00
Juha Niskanen
3c0f3ea35b STM32F7: stm32_adc: Do not override ADCPRE_DIV when measuring internal voltage 2017-04-18 06:51:20 -06:00
Juha Niskanen
54eae7dcde STM32F7: warn if no DMA2 configured when using ADC with DMA. Also correct ADC channel numbers that DMA callback passes to upper half driver. 2017-04-18 06:49:51 -06:00
Gregory Nutt
de22d24f8e More changes UART to USART. Fix garbage code in stm32f0_serial.h that was clearing HAVE_USART 2017-04-17 18:37:52 -06:00
Gregory Nutt
924f58fb2b STM32F0: Change HAVE_UART to HAVE_USART 2017-04-17 17:53:04 -06:00
Gregory Nutt
acdc26f972 STM32F0: Add logic to enable other USARTs. No UART4/5. Rather USART4/5. 2017-04-17 17:51:05 -06:00
Gregory Nutt
639bf31eb4 Move enabling of GPIO peripherals form UART setup to clockconfig. This is not a UART function. It is needed by all periphrals. 2017-04-17 17:20:55 -06:00
Gregory Nutt
8b157b034d STM32F0: Fixes to get STM32F0-Discovery build again after changes to support the STM32F07x 2017-04-17 17:13:32 -06:00
Gregory Nutt
2c01aaad59 STM32F0: Add basic support for STM32F07x family 2017-04-17 16:54:07 -06:00
Alan Carvalho de Assis
b0597583da Fix System Clock value to 48MHz and remove MCLK definition 2017-04-17 12:48:07 -06:00
Alan Carvalho de Assis
735f4d6ea5 STM32F0: Enable the clock for all GPIO ports 2017-04-17 09:58:04 -06:00
Gregory Nutt
cd62425433 STM32F0: type of regval should be uint32_t in clockconfig(). Fix a warning from __start(). 2017-04-17 09:17:31 -06:00
Gregory Nutt
55faedb40d STM32F0: Ooops Missing semicolon 2017-04-17 08:57:00 -06:00
Gregory Nutt
0d9395588b STM32F0: Fix an error in clockconfig() 2017-04-17 08:50:03 -06:00
phreakuencies
eac049222c STM32: Provide TIM5 definition for STM32F429 2017-04-15 12:10:42 -06:00
Gregory Nutt
78bc1aa6bc Argument of network device IOCTL should be unsigned long, just as will all other IOCTL methods. 2017-04-15 09:33:27 -06:00
Simon Piriou
11d3db5c35 photon: add sdpcm + thread support for wlan 2017-04-15 11:39:13 +02:00
Alan Carvalho de Assis
03cbf21cd8 Replace HAVE_USART with HAVE_UART 2017-04-14 11:44:51 -06:00
Alan Carvalho de Assis
4602212612 Fix serial compilation issues 2017-04-14 11:42:20 -06:00
Gregory Nutt
879273f63e arch/arm/Kconfig: Add option for STM32F0 2017-04-14 09:32:15 -06:00
Alan Carvalho de Assis
2cc7744b0c Add stm32f0discovery board support 2017-04-14 08:34:38 -06:00
Gregory Nutt
c910334ced Make sure that Alan is listed as author in new files. 2017-04-14 08:34:37 -06:00
Alan Carvalho de Assis
c3e0ec369f Add basic support for STM32F0 2017-04-14 08:34:36 -06:00
Sebastien Lorquet
dc2890904d STM32L4 DMA: Correct bad channel definition. 2017-04-12 10:25:51 -06:00
Alan Carvalho de Assis
a58823c449 STM32XX: Fix Pending Register definition 2017-04-11 06:45:45 -06:00
Jussi Kivilinna
4c99a6aeec STM32F7: serial: do not stop processing input in SW flow-control mode 2017-04-11 06:40:44 -06:00
Jussi Kivilinna
e9a8dc7c6e STM32F7: serial: disallow broken configuration combination of CONFIG_STM32F7_FLOWCONTROL_BROKEN=y and CONFIG_SERIAL_IFLOWCONTROL_WATERMARKS not set. 2017-04-11 06:39:27 -06:00
Gregory Nutt
ebd2416f9d stm32 COMP: Logic in stm32_comp.h must be configured on CONFIG_STM32_COMP or otherwise it causes an error via #error on every platform without COMP support. 2017-04-09 11:47:57 -06:00
Masayuki Ishikawa
b4e01ecbf9 Merged in masayuki2009/nuttx.nuttx/fix_efm32_i2c_timeout (pull request #312) 
EFM32 I2C: Fix timeout calculation

Approved-by: Gregory Nutt <gnutt@nuttx.org>
 2017-04-06 22:59:34 +00:00
Jussi Kivilinna
e3b3e57e56 RTC: add interface for check if RTC time has been set 
New interface allows checking if RTC time has been set.  This allows to application to detect if RTC has valid time (after
reset) or should application attempt to get real time by other means (for example, by launching ntpclient or GPS).
 2017-04-06 09:53:11 -06:00
Gregory Nutt
ac8ddf4eb1 SAMv7: In review of last patch, change literal 0xfff to WDT_MR_WDD_MAX for portability. 2017-04-06 09:46:04 -06:00
Frank Benkert
571f3d952e SAMV7: Watchdog: fix Forbidden Window Value 
According the Datasheet the WDD Value is the lower bound of a so called Forbidden Window and to disable this we have to set the WDD
Value greater than or equal to the WDV Value.  This seems to be a bug in the datasheet. It looks like we have to set it to a greater value than the WDV to realy disable this Thing.  When triggering the Watchdog faster than the (very slow) clock source of the Watchdog fires, this Forbidden Window Feature resets the System if WDD equals to WDV.

This Changeset disables the Forbidden Window by setting the WDD Value to the Maximum (0xfff) Value possible.
 2017-04-06 09:43:07 -06:00
Jussi Kivilinna
0aa52d98a2 STM32F7: add warning for RXDMA + IFLOWCONTROL combination 
Combination of RXDMA + IFLOWCONTROL does not work as one might expect.
Since RXDMA uses circular DMA-buffer, DMA will always keep reading new
data from USART peripheral even if DMA buffer underruns. Thus this
combination only does following: RTS is asserted on USART setup and
deasserted on shutdown and does not perform actual RTS flow-control.

Data loss can be demonstrated by doing long up_mdelay inside irq
critical section and feeding data to RXDMA+IFLOWCONTROL UART.
 2017-04-06 08:47:45 -06:00
Jussi Kivilinna
e2702cbe4e STM32F7: fix UART7 and UART8 IFLOWCONTROL options 2017-04-06 08:46:24 -06:00
Jussi Kivilinna
dabf45f100 STM32F7: default CONFIG_STM32F7_DMACAPABLE to 'n'. STM32F7 does not have CCM RAM but DTCM, so this option does not need to enabled. DTCM RAM is DMA-able through CPU AHBS bus. 2017-04-06 08:44:53 -06:00
Jussi Kivilinna
e180522854 stm32f7: serial: add interface to get uart_dev_t by USART number, stm32_serial_get_uart 2017-04-06 08:41:41 -06:00
Alan Carvalho de Assis
95941b4908 STM32: Fix SYSCFG_CFGR1_I2C_PBXFMP_SHIFT value 2017-04-06 08:35:33 -06:00
Masayuki Ishikawa
f5b6ae627d EFM32 I2C: Fix timeout calculation 2017-04-06 17:12:13 +09:00
Simon Piriou
e5c4a28c3a photon: wlan support 2017-04-05 21:55:21 +02:00
Juha Niskanen
3e6b92d5fa tm32: stm32l15xxx_rcc: configure medium performance voltage range and zero wait-state when allowed by SYSCLK setting 
Zero wait-state for flash can be configured when:
 Range 1 and SYSCLK <= 16 Mhz
 Range 2 and SYSCLK <= 8 Mhz
 Range 3 and SYSCLK <= 4.2 Mhz

Medium performance voltage range (1.5V) can be configured when SYSCLK is up to 16 Mhz and PLLVCO up to 48 Mhz.
 2017-04-05 07:41:25 -06:00
Juha Niskanen
bff341fdfc stm32: stm32l15xx_rcc: add support for using MSI as system clock 2017-04-05 07:41:24 -06:00
Juha Niskanen
9a29b9a327 stm32: stm32_flash: add EEPROM writing for STM32L15XX 2017-04-04 07:38:49 -06:00
no1wudi
8fbd8b9e6f STM32:add I2C3 SDA pin mapping for STM32F411 2017-04-04 11:57:45 +08:00
no1wudi
730b674b01 STM32:add I2C3 SDA pin mapping for STM32F411 2017-04-04 11:50:58 +08:00
Juha Niskanen
e320e5c100 STM32: add STM32L162VE to chip.h 2017-04-03 07:59:11 -06:00
Juha Niskanen
3a6bd901e4 stm32: fix IWDG and WWDG debug mode stop for STM32L15XX 2017-04-03 07:45:09 -06:00
Gregory Nutt
fb42844788 STM32: Fix a comment 2017-04-02 12:32:20 -06:00
David Sidrane
97fa617c89 stm32f7:stm32_sdmmc removed stray semicolon 2017-03-31 13:17:34 -10:00
David Sidrane
fbb6cfc79c stm32f7:Serial fix for dropped data 
1) Revert the inherited dma bug from the stm32
     see df9ae3c13f
     for details.

  2) Most all CR1-CR3 settings can not be configured while UE
     is true. Threfore we make all operation atomic and disable
     UE and restore it's originalstate on exit.
 2017-03-31 13:17:34 -10:00
Jussi Kivilinna
41912ed98c STM32F7: add support for LSE RTC and enable RTC subseconds 2017-03-31 10:13:40 -06:00
Gregory Nutt
7b789f57ac Review of previous commit 2017-03-30 12:28:40 -06:00
Konstantin Berezenko
95cbbf552b Change STM32 tickless to use only one timer 2017-03-30 10:40:05 -07:00
Juha Niskanen
5577f58458 STM32 RNG: Fix semaphore initial value and disable priority inheritance 2017-03-29 07:12:19 -06:00
Juha Niskanen
9f3b24a4a1 STM32 F7: add stm32 RNG support. This is copied from stm32l4. Tested on STM32F746ZG board. 2017-03-29 07:08:10 -06:00
Gregory Nutt
92da8068ed Merge branch 'master' of bitbucket.org:nuttx/nuttx 2017-03-26 06:57:35 -06:00
Mateusz Szafoni
62f9ae0852 Merged in raiden00/nuttx (pull request #300) 
STM32 COMP cosmetics

Approved-by: Gregory Nutt <gnutt@nuttx.org>
 2017-03-26 12:21:32 +00:00
raiden00pl
f3367233b6 stm32_comp.c: typo 2017-03-26 09:36:53 +02:00
raiden00pl
c1090164f5 stm32/Kconfig: update COMP and OPAMP definitions 2017-03-26 09:34:17 +02:00
raiden00pl
6594c65a77 stm32_comp.c: cosmetic 2017-03-26 09:30:23 +02:00
Gregory Nutt
7d57a2b2bd Trivial changes from review of last PR. 2017-03-25 10:38:41 -06:00
Mateusz Szafoni
c174074dd8 Merged in raiden00/nuttx (pull request #299) 
Add COMP character driver

Approved-by: Gregory Nutt <gnutt@nuttx.org>
 2017-03-25 16:29:02 +00:00
Gregory Nutt
602546f852 Minor typo fix 2017-03-25 10:23:53 -06:00
raiden00pl
a806aedb13 STM32F33: Support for COMP character driver 2017-03-25 16:57:43 +01:00
Alexander Oryshchenko
61ff3c6b84 I needed to use DS3231, I remember that in past it worked ok, but now for stm32f4xx is used another driver (chip specific, stm32f40xxx_i2c.c) and DS3231 driver doesn't work. After investigating a problem I found that I2C driver (isr routine) has a few places there it sends stop bit even if not all messages are managed. So, e.g., removing stm32_i2c_sendstop (#1744) and adding stm32_i2c_sendstart after data reading helps to make DS3231 working. Verified by David Sidrane. 2017-03-24 06:44:33 -06:00
Aleksandr Vyhovanec
82a84a8d98 Merged nuttx/nuttx into master 2017-03-24 11:40:09 +03:00
no1wudi
4c6680df99 Merged in no1wudi/nuttx (pull request #291) 
fix compile error when disabled the flash data cache corruption for stm32 f1xx

Approved-by: Gregory Nutt <gnutt@nuttx.org>
 2017-03-24 00:58:26 +00:00
no1wudi
fd76a3db05 fix spacing 2017-03-24 08:52:46 +08:00
no1wudi
5797e84893 Merged nuttx/nuttx into master 2017-03-24 08:40:40 +08:00
David Sidrane
66910577be stm322_flash:missing unlock on F1 HSI off path 2017-03-23 14:22:45 -10:00
David Sidrane
7e3bec635b stm32_i2c_alt:Move def of regval to top func def per CS 2017-03-23 11:50:37 -10:00
David Sidrane
d25f8710d2 stm32f40xxx_i2c:Duplicate non CS dev of regval 2017-03-23 11:37:12 -10:00
David Sidrane
f5cf22d871 stm32_i2c_alt:Duplicate non CS dev of regval 2017-03-23 11:36:44 -10:00
David Sidrane
c2a1b719be stm32_flash:Need conditinal on non F4 targets 2017-03-23 11:33:32 -10:00
rg
9353ca6039 STM32 I2C: Do not allow CONFIG_I2C_POLLED and CONFIG_I2C_DMA 2017-03-23 11:24:18 -06:00
Aleksandr Vyhovanec
06af125e45 The interrupt occurs over the counter overflow 2017-03-23 17:34:45 +03:00
no1wudi
45f5d30e2e fix compile error when disabled the flash data cache corruption for stm32 f1xx 2017-03-23 13:38:26 +08:00
David Sidrane
c73b65c9b9 stm32f7:stm32_allocateheap.c There are 5 configurations 2017-03-22 23:56:54 +00:00
Gregory Nutt
3fb0a00c35 Small changes from review of last PR. Plus spacing and typo fix. 2017-03-22 17:32:52 -06:00
Gregory Nutt
947acd6c1a Small changes from review of last PR 2017-03-22 15:53:12 -06:00
José Roberto de Souza
b9b4f184a7 stm32: Add workaround for flash data cache corruption on read-while-write 
This is a know hardware issue on some STM32 see the errata of your model
and if you make use of both memory banks you should enable it.
 2017-03-22 13:14:19 -07:00
José Roberto de Souza
09f70c462d stm32: Make up_progmem thread safe 
Writing to a flash sector while starting the erase of other sector
have a undefined behavior so lets add a semaphore and syncronize
access to Flash registers.

But for the semaphore to work it needs to be initialized so each
board needs call stm32_flash_initialize() on initialization, so
to avoid runtime problems it is only using semaphore and making
it thread safe if initialized, after all boards starts to call
stm32_flash_initialize() we can remove the boolean and the check.
 2017-03-22 13:14:15 -07:00
José Roberto de Souza
80f56e75f9 stm32: Fix erase sector number for microcontrolers with more than 11 sectors 
Erase a sector from the second bank cause the bit 4 of SNB being set
but never unsed, so trying to erase a sector from the first bank
was acually eraseing a sector from the second bank.
 2017-03-22 12:42:20 -07:00
David S. Alessio
7f2c4c4274 XMC4xxx: Add FPU support 2017-03-22 12:04:32 -06:00
Gregory Nutt
3f3aa73b8f XMC4xxx: USIC SCTR register, appears taht both WLE and FLE fields hold value - 1. 2017-03-21 17:51:55 -06:00
Gregory Nutt
ea93357a1e XMC4xxx: Fix a typo in the SCU header file 2017-03-21 17:05:47 -06:00
rg
82a5dfddb4 The attached .patch implements DMA support for the stm32f4 I2C. Max and I have verified that it works on our systems. 2017-03-21 16:44:11 -06:00
Gregory Nutt
343f7ceab2 XMC4xxx: Misc clock clean-up; PBDIV should be controllable from board.h 2017-03-21 15:05:17 -06:00
Gregory Nutt
602bdd13fb XMC4xxx: Fix a pin configuration problem. Fix some mispellings. 2017-03-21 11:24:04 -06:00
Gregory Nutt
21a626878a XMC4xxx: Clean up problems associated with USIC initialization. USIC still does not work in UART mode. 2017-03-21 10:55:52 -06:00
Gregory Nutt
805a4f65e9 XMC4xxx: Fixes to HIB domain setup, GPIO pin configuration. 2017-03-21 09:31:44 -06:00
Gregory Nutt
886dadae0a XMC4xxx: Minor updates to naming and comments 2017-03-20 18:10:23 -06:00
Gregory Nutt
b9e29d1083 XMC4xxx: Clean up memory map 2017-03-20 17:08:09 -06:00
Gregory Nutt
4ba091933e XMC4xxx: Fix for early bringup problems 2017-03-20 16:31:35 -06:00
Gregory Nutt
3a91ba5264 XMC4xxx: Plug last holes to get a first, clean build. 2017-03-20 13:46:02 -06:00
Gregory Nutt
985c137b78 XMC4xxx: Finishes system timer logic. 2017-03-20 13:20:31 -06:00
Gregory Nutt
4519b679af XMC4xxx: Finish code for USIC serial driver. 2017-03-20 12:47:26 -06:00
Gregory Nutt
8a3422f837 XMC4xxx: Complete lowputc logic 2017-03-20 11:25:51 -06:00
no1wudi
7d6ee0f222 fix a typo 2017-03-20 09:50:27 +08:00
Gregory Nutt
5df421488c XMC4xxx: Add USIC baudrate calculation. 2017-03-19 18:11:38 -06:00
Gregory Nutt
ae32905fe8 XMC4xxx: Simply some USIC logic, add USIC interface to disable a channel. Add USIC enable logic to UART configuration (a lot more to do there). 2017-03-19 17:06:44 -06:00
Gregory Nutt
e1e4af7454 XMC4xxx: More Ethernet definitions. 2017-03-19 16:25:46 -06:00
Gregory Nutt
c023d41522 XMC4xxx: Beginning of Ethernet register header file 2017-03-19 13:47:27 -06:00
Gregory Nutt
e8a30890f2 Cosmetic changes from review of last PR. 2017-03-19 13:05:31 -06:00
Mateusz Szafoni
9f699e6715 Merged in raiden00/nuttx (pull request #281) 
STM32F3: Add COMP support

Approved-by: Gregory Nutt <gnutt@nuttx.org>
 2017-03-19 18:55:06 +00:00
Gregory Nutt
5c0be816a5 XMC4xxx: Add commin USIC support logic for use in all USIC configurations. 2017-03-19 12:48:37 -06:00
raiden00pl
651b8360c6 STM32F33: Add COMP support 2017-03-19 18:36:44 +01:00
raiden00pl
c760d00158 stm32f33xx_comp.h: fix typos 2017-03-19 18:27:31 +01:00
Gregory Nutt
59b9ef8fdc XMC4xxx: Revise configuration for USICs. Three USICs but 4 UARTs possible with each channel of USIC. 2017-03-19 11:10:31 -06:00
Gregory Nutt
a9aa11f968 XMC4xxx: A few compilation issues; still a long way to go. 2017-03-19 10:03:31 -06:00
Gregory Nutt
064ae17af5 XMC4xxx: Finishes UIC register definition header file. 2017-03-19 09:46:57 -06:00
Gregory Nutt
9110b7d45c XMC4xxxx: Add more definitions to USIC register definition header. 2017-03-19 08:44:28 -06:00
Gregory Nutt
6b5dc49573 XMC4xxx: Flesh out USIC header file. Still needs a little work. 2017-03-18 19:16:29 -06:00
Gregory Nutt
47cd105e32 XMC4xxxx: Final clean-up of SCU heder file 2017-03-18 16:41:33 -06:00
Gregory Nutt
e82a3b3ca7 XMC4xxx: Completes most SCU register definitions. 2017-03-18 16:13:59 -06:00
Gregory Nutt
301e70b073 XMC4xxx: A few more SCU register definitions. 2017-03-18 15:19:02 -06:00
Gregory Nutt
7706810fc0 XMC4xxx: A few more SCU register definitions. 2017-03-18 14:08:35 -06:00
Gregory Nutt
cfa75de85a XMC4xxx: A few more SCU register definitions. 2017-03-18 13:09:07 -06:00
Mateusz Szafoni
5907ec8cf9 Merged in raiden00/nuttx (pull request #279) 
STM32F33: Move DMA logic to a separate files + add ADC support

Approved-by: Gregory Nutt <gnutt@nuttx.org>
 2017-03-18 17:54:19 +00:00
Gregory Nutt
9769c67d4d XMC4xxx: Add pin multiplexing header file. 2017-03-18 11:25:14 -06:00
raiden00pl
fd42900dcc STM32F33: Add ADC support 2017-03-18 16:34:24 +01:00
raiden00pl
49e4e62aab STM32F33: Move DMA logic to a separate files 2017-03-18 16:31:06 +01:00
Gregory Nutt
3f0c4871c8 Merge remote-tracking branch 'origin/master' into xmc4 2017-03-18 06:48:37 -06:00
David Cabecinhas
148e74fd10 Merged in dcabecinhas/nuttx/fix_intstack_allocation (pull request #270) 
ARM: Fix off-by-one interrupt stack allocation (revert missed change in up_initialize.c)

Approved-by: Gregory Nutt <gnutt@nuttx.org>
 2017-03-18 12:25:18 +00:00
Gregory Nutt
c6d5d3bded XMC4xxx: All register definition files need to include memorymap.h 2017-03-17 16:44:26 -06:00
Gregory Nutt
7bde01df98 XMC4C: Clean up some naming, fix some comments, add empty PINMUX header file. 2017-03-17 16:40:29 -06:00
Gregory Nutt
5ae9564b7d XMC4xxx: GPIO write should use OMR, not OUTPUT register. 2017-03-17 16:26:11 -06:00
Gregory Nutt
8bfb735351 XMC4xxx: Finishes implementation of GPIO support. 2017-03-17 13:02:07 -06:00
Gregory Nutt
41758d8e4c XMC4xxx: minor update to GPIO definitions. 2017-03-17 11:22:42 -06:00
Gregory Nutt
d2d54b4ae7 XMC4xxx: Add framework and definitions for GPIO support 2017-03-17 11:18:24 -06:00
Gregory Nutt
042b33414a XMC4xxx: Missing OMR field in PORT register definition header file. 2017-03-17 08:28:40 -06:00
Gregory Nutt
f672478e7e XMC4xxx: Completes the PORT register definition header file. 2017-03-17 08:12:21 -06:00
Gregory Nutt
6b167122c0 XMC4xxx: Move clock utility functions from xmc4_clocconfig.c to new xmc4_clockutils.c 2017-03-16 14:26:22 -06:00
Gregory Nutt
e30e47683b XMC4xxx: Add partial PORTS header file. 2017-03-16 13:24:32 -06:00
Gregory Nutt
e67baffc15 XMC4xxx: Add partial USIC header file. 2017-03-16 13:04:01 -06:00
Gregory Nutt
5693f26a5e XMC4xx: Fix several early compilation problems. 2017-03-16 11:30:02 -06:00
Gregory Nutt
fe610e7a1d XMC4500 Relax: Add basic board support infrastructure of Infineon XMC4500 Relax Lite v1 2017-03-16 10:52:01 -06:00
Gregory Nutt
66d001d0e1 XMC4xxx: Initial clock configuration logic. 2017-03-16 09:48:57 -06:00
no1wudi
812578c066 Merge branch 'master' of https://bitbucket.org/nuttx/nuttx 2017-03-16 23:07:38 +08:00
no1wudi
c613a360a3 Merge branch 'master' of https://bitbucket.org/no1wudi/nuttx 2017-03-16 23:06:54 +08:00
no1wudi
1280c91564 fixed descritpions of NUC100/120 2017-03-16 23:04:52 +08:00
David Cabecinhas
4b65817e99 ARM: Set EABI stack alignment for all ARM architectures (remove OABI code) 2017-03-16 19:58:50 +08:00
David Cabecinhas
08e92abb0b ARM: Remove redundant interrupt stack coloring 2017-03-16 19:13:39 +08:00
Gregory Nutt
059e398185 XMC4xxx: A few more SCU register bit definitions. 2017-03-15 18:50:48 -06:00
Gregory Nutt
450d747265 Merge remote-tracking branch 'origin/master' into xmc4 2017-03-15 13:10:17 -06:00
Gregory Nutt
519f14fbb5 XMC4xxx: A few more SCU register bit definitions. 2017-03-15 11:43:58 -06:00
Gregory Nutt
77f244ed7b XMC4xx: Add logic to get the CPU frequency. 2017-03-15 10:22:24 -06:00
Gregory Nutt
772b3cf21b XMC4xxx: Add Peripheral Memory Map header file. 2017-03-14 19:07:19 -06:00
Gregory Nutt
a635e7df7a XMC4xxx: Add SCU header file. 2017-03-14 16:19:30 -06:00
Simon Piriou
bf9391a1fe photon: porting wlan device 2017-03-14 21:13:36 +01:00
Gregory Nutt
2430049e3b arch/arm/include/xmc4: More support for Infineon XMC4xxx arch. Still incomplete. 2017-03-14 13:04:09 -06:00
Gregory Nutt
dc4ac48aad arch/arm/src/xmc4: Initial, partial support for Infineon XMC4xxx 2017-03-14 11:56:29 -06:00
Gregory Nutt
240d1e9b3b Update some comments 2017-03-14 11:39:10 -06:00
Gregory Nutt
c97581e99b Update some comments 2017-03-14 11:16:35 -06:00
Gregory Nutt
4a93b0dc0c Update comments. 2017-03-14 08:44:56 -06:00
David
33f7bfa351 ARM: Fix off-by-one interrupt stack allocation (revert missed change in up_initialize.c) 2017-03-14 21:01:44 +08:00
David Cabecinhas
86400a252d ARM: Fix off-by-one interrupt stack allocation in 8-byte aligned architectures 2017-03-14 20:01:45 +08:00
Gregory Nutt
4d33f26717 Update some comments 2017-03-12 12:33:44 -06:00
Gregory Nutt
d9cdb6c383 STM32; OTG host implementations of stm32_in_transfer() must obey the polling interval for the case of isochronous and itnerrupt endpoints. 2017-03-12 08:39:30 -06:00
Gregory Nutt
98a98a0c8b Minor change for consistency with a previous commit. 2017-03-12 07:20:10 -06:00
Gregory Nutt
9b11187b2a STM32 OTG HS: A little research reveals that only the F2 RCC initialization set the OTGHSULPIEN bit and Photon is the only F2 board configuration that uses OTG . Therefore, we can simplify the conditional logic of the last PR. Negative logic was used (#ifndef BOARD_DISABLE_USBOTG_HSULPI) to prevent bad settings in other configurations. But give these facts, the preferred positive logic now makes more sense (#ifdef BOARD_ENABLE_USBOTG_HSULPI). 2017-03-11 18:00:38 -06:00
Gregory Nutt
e0f7b9582a STM32: Review of last STM32 F2 PR. Progate changes to STM32 F4 and F7 OTGHS. Rename some configs/photon/src files. Naming can be either photon_ or stm32_ but must be consistent. 2017-03-11 16:31:11 -06:00
Simon Piriou
11876dc090 Merged in spiriou/nuttx/usb_fix (pull request #265) 
stm32f20xxx: add BOARD_DISABLE_USBOTG_HSULPI flag

Approved-by: Gregory Nutt
 2017-03-11 22:04:51 +00:00
Simon Piriou
70d8f0189d stm32f20xxx: add BOARD_DISABLE_USBOTG_HSULPI flag 2017-03-11 18:15:18 +01:00
David Sidrane
cdfc158f90 up_initialize.c edited online with Bitbucket 2017-03-11 15:40:48 +00:00
David Sidrane
c9ecb3c378 As discovered by dcabecinhas. This fix assume the 8 byte alignment options for size stack size or this will overwrite the first word after TOS 
See https://github.com/PX4/Firmware/issues/6613#issuecomment-285869778
 2017-03-11 15:35:03 +00:00
Gregory Nutt
aadf6c6e16 STM32 F33: Fix another error in ADC base address usage. 2017-03-10 17:49:32 -06:00
Gregory Nutt
852b189910 STM32 F33 ADC: Correct bad definitions of base addresses; Fix naming collision by changing colliding STM32_ADC12_BASE to STM32_ADC12_CMN_BASE 2017-03-10 17:46:19 -06:00
Gregory Nutt
24816cb08b All STM32 host drivers. In IN endpoint retry, delay for a clock tick to give some breathing space for the CPU. EXPERIMENTAL change. 2017-03-10 10:25:43 -06:00
David Sidrane
2baffab16e WS 2017-03-10 15:42:59 +00:00
David Sidrane
acaebb361b STM32, STM32 F7, and STM32 L4: Clone Freddie Chopin's I2C change to similar STM32 I2C drivers. 
Save elapsed time before handling I2C in stm32_i2c_sem_waitstop()
   This patch follows the same logic as in previous fix to
   stm32_i2c_sem_waitdone().
   It is possible that a context switch occurs after I2C registers are read
   but before elapsed time is saved in stm32_i2c_sem_waitstop(). It is then
   possible that the registers were read only once with "elapsed time"
   equal 0. When scheduler resumes this thread it is quite possible that
   now "elapsed time" will be well above timeout threshold. In that case
   the function returns and reports a timeout, even though the registers
   were not read "recently".
   Fix this by inverting the order of operations in the loop - save elapsed
   time before reading registers. This way a context switch anywhere in the
   loop will not cause an erroneous "timeout" error.
 2017-03-10 05:07:39 -10:00
Freddie Chopin
3cd66af889 ave elapsed time before handling I2C in stm32_i2c_sem_waitstop() 
This patch follows the same logic as in previous fix to
stm32_i2c_sem_waitdone().

It is possible that a context switch occurs after I2C registers are read
but before elapsed time is saved in stm32_i2c_sem_waitstop(). It is then
possible that the registers were read only once with "elapsed time"
equal 0. When scheduler resumes this thread it is quite possible that
now "elapsed time" will be well above timeout threshold. In that case
the function returns and reports a timeout, even though the registers
were not read "recently".

Fix this by inverting the order of operations in the loop - save elapsed
time before reading registers. This way a context switch anywhere in the
loop will not cause an erroneous "timeout" error.
 2017-03-10 07:35:10 -06:00
Gregory Nutt
9cd3f7f80a STM32, STM32 F7, STM32 L4: OTG host drivers: Do not do data toggle if interrupt transfer is NAKed. Sugested by webbbn@gmail.com 2017-03-09 15:07:31 -06:00
Simon Piriou
6768831851 Merged in spiriou/nuttx (pull request #257) 
STM32F2: add USB OTG HS support for stm32f20xxx cores

Approved-by: Gregory Nutt
 2017-03-09 20:06:12 +00:00
Gregory Nutt
04297d1b0f Update some comments 2017-03-09 13:57:37 -06:00
Gregory Nutt
a3b4475474 STM32, STM32 F7, and STM32 L4: Back out part of 3331e9c49a. Returning immediately int he case of a NAK makes the Mass Storage Class driver unreliable. The retry/timeout logic is necessary. This implementation tries to implement a compromise: If a NAK is received after some data is received, then the partial data received is returned as with 3331e9c49a. If if a NAK is received with no data, then no longer returns the NAK error immediately but retries until data is received or a timeout occurs. Initial testing indicates that this fixes the issues the MSC. However, I hae concerns that if multiple sectors are read in one transfer, there could be NAKs between sectors as well and, in that case, then change will still cause failures. 2017-03-09 13:49:25 -06:00
Simon Piriou
31aef4a9c0 STM32F2: add USB OTG HS support for stm32f20xxx cores 2017-03-09 20:30:32 +01:00
David Sidrane
c8efeecfda Merged in david_s5/nuttx/upstream_kinetis (pull request #256) 
Kinetis:Allow Board to add Pullups on SDHC lines

Approved-by: Gregory Nutt
 2017-03-09 15:34:12 +00:00
David Sidrane
2700fd9e81 Kinetis:Allow Board to add Pullups on SDHC lines 2017-03-09 05:30:02 -10:00