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3957 Commits

Author SHA1 Message Date
Gregory Nutt
1be7285567 TM4C Ethernet: Add some assertions 2015-01-16 15:25:18 -06:00
Gregory Nutt
278c485229 Networking: All Ethernet drivers: Call ipv6_input if IPv6 is enabled and an IPv6 packet is received 2015-01-15 09:31:23 -06:00
Gregory Nutt
89538ac4a2 - Rename devif_input() ipv4_input() 
- Copy net/devif/devif_input.c to ipv6_input.c.  Remove all IPv4-specific logic.
- Rename net/devif/devif_input.c to ipv4_input.c.  Remove all IPv6-specific logic
- Split IPv4 header structure out as net_ipv4hdr_s from net_iphdr_s
 2015-01-15 08:03:56 -06:00
Gregory Nutt
2f4aa0bde7 Networking: Condition certain ARP logic on CONFIG_NET_ARP in all Ethernet drivers 2015-01-15 07:07:39 -06:00
Gregory Nutt
ace8f3bee6 Update README 2015-01-14 09:10:26 -06:00
Gregory Nutt
a40979407f Tiva Timer: Revert the previous change. Thre is a better way to handler timerout interrupts. 
Removed setting of the initial timer interval load value (or, rather, it is always set to zero for a free-running timer).  Also, do not unconditional enable the timer out interrupt.  The timerout interrupt is not not enabled until tiva_timer32_setinterval() is called.
 2015-01-14 07:33:59 -06:00
Gregory Nutt
6d3e291da1 Tiva Timer: Remove a big chunk of unnecessary logic 2015-01-13 17:08:37 -06:00
Gregory Nutt
1d2a4f3b4c Tiva Timer: Timer test must attach a timer handler or the timer is stopped at the first interrupt 2015-01-13 15:55:54 -06:00
Gregory Nutt
3efd127e64 Timer Timer: Timer driver now initializes without complaints. Need a test driver of some kind to make more testing progress. 2015-01-13 11:49:00 -06:00
Gregory Nutt
9c3dce06e1 DK-TM3C129X Timer: Add timer initialization logic to the board bring-up 2015-01-13 11:10:35 -06:00
Gregory Nutt
47b04339d2 Tiva Timer: Rename tiva_timerlow.c to tiva_timerlow32.c since it only supports 32-bit periodic timers 2015-01-13 10:10:02 -06:00
Gregory Nutt
1ae213c0b6 Tiva Timer: Completes implementation of the timer driver lower half 2015-01-13 10:06:40 -06:00
Gregory Nutt
72cd8e57a9 Tiva Timer: Allow timeout interrupts even if the reload value is zero. That is the value that is need to get an interrupt on the wrap from 0xffffffff to 0x00000000 2015-01-13 08:29:25 -06:00
Gregory Nutt
b1697c7ff4 Tiva Timer: Add conditional compilation to enable/disable each timer feature. Not only does this reduce the footprint by suppressing unused features, it also protects from partially implemented features that are now conditioned on EXPERIMENTAL 2015-01-13 07:49:20 -06:00
Gregory Nutt
f3438d0d68 Tiva Timer: Rename tiva_timer.c to tiva_timerlib.c 2015-01-12 15:55:41 -06:00
Gregory Nutt
bbfc5cf747 Tiva Timer: First cut at timer driver lower half (still incomplete) 2015-01-12 15:52:48 -06:00
Gregory Nutt
c93b205eea Tiva Interrupts: Changes corresponding to the last needed in the Tiva Kconfig file as well 2015-01-12 10:14:48 -06:00
Gregory Nutt
b9dcced1aa Tiva interrupts: Fix chip-specific interrupt un-definitions 2015-01-12 10:00:42 -06:00
Gregory Nutt
487f9a3be9 Tiva Timers: Add interfaces to read the current timer value 2015-01-12 10:00:41 -06:00
Gregory Nutt
31a94816b2 USB host drivers: Change all parmeters named class to usbclass to avoid C++ conflicts 2015-01-11 08:05:09 -06:00
Gregory Nutt
2444605b95 Tiva Timer: Fix a typo 2015-01-10 12:42:39 -06:00
Gregory Nutt
d09a9e2741 Tiva Timer: Implements configuration of the 32-bit RTC timer 2015-01-10 12:41:15 -06:00
Gregory Nutt
2c6cf27405 Tiva Timer: Add support for RTC match interrupts 2015-01-10 12:22:37 -06:00
Gregory Nutt
1ea2f5da1c Tive Timer: Add support for ADC trigger generation from one-shot and periodic timers for timeout and match evetns 2015-01-10 10:07:56 -06:00
Gregory Nutt
9cead4170b Tiva Timer: Add support to set the match regiser(s) relative to the timer counter (and prescale) registers. Enable match interrupts. These are one time interruprts: After the match interrupt is dispatched, further match interrupts are disabled 2015-01-10 08:34:39 -06:00
Gregory Nutt
fa4a54c5ad Tiva Timer: Add support for input clock prescaler in 16-bit one-shot/periodic modes 2015-01-09 16:49:00 -06:00
Gregory Nutt
3544eb2fdf Tiva Timer: Add logic to acknowledge Tiva Timer interrupts 2015-01-09 15:01:49 -06:00
Gregory Nutt
64530008ba Tive System Control: Add logic to configure the alternatie clock source (ALTCLK). Needed by the Tiva timer module 2015-01-09 14:10:31 -06:00
Gregory Nutt
9531dd1a80 Tiva Timer: Add more interrupt management logic 2015-01-09 13:29:03 -06:00
Gregory Nutt
59555646c5 Tiva Timer: Add functions to set match registers; Add logic to select count direction 2015-01-09 12:05:26 -06:00
Gregory Nutt
c092ecb131 Tiva Timer: Add interfaces to start/stop timers and to set the interval load registers. 2015-01-09 11:07:52 -06:00
Gregory Nutt
db556691f3 Tiva Timers: Add framework to support tmer interrupts 2015-01-09 10:21:59 -06:00
Gregory Nutt
f787440a04 STM32 SDIO: Don't let architectures select CONFIG_MMCSD_SDIOWAIT_WRCOMPLETE unless they have implemented SDIOWAIT_WRCOMPLETE 2015-01-08 17:47:34 -06:00
Gregory Nutt
45e09d9df7 Tiva Timer: Partial support for 16- and 32-bit, oneshot and periodic timer configurations 2015-01-08 13:44:10 -06:00
Gregory Nutt
4357af2493 Tiva Timer: Add support to select alternate clock source and 32-bit register concatenation mode. 2015-01-08 11:08:54 -06:00
Gregory Nutt
6715926fab Tiva Timer: Add register level debug support 2015-01-08 10:14:38 -06:00
Gregory Nutt
737108e066 Tiva Timer: Add basic framework to configure timers. Incomplete on initial commit 2015-01-08 09:47:38 -06:00
Gregory Nutt
4224fd0edc Tiva Timer: SYNC regiser is only available on GPTM0 2015-01-08 08:07:31 -06:00
Gregory Nutt
ff02574863 Tiva Timer: Update timer register bit definitions for the LM4F 2015-01-08 08:03:47 -06:00
Gregory Nutt
54bf159bdb Tiva Timer: Extend timer register definitions to handle other chips 2015-01-08 07:56:00 -06:00
Gregory Nutt
1842525cc2 MMCSD SDIO: Add support for a new SDWAIT_WRCOMPLETE condition. The previous logic used a busy-wait loop to pool the card R1 start to determine when the card was ready for the next transfer. That busy-wait can be quite long -- hundreds of milliseconds. And alternative is to look the the SD D0 pin which will change state when the card is no longer busy. 
This logic implements a change the avoids the busy-wait poll by reconfiguring the SD D0 pin as a GPIO interrupt, then waiting for the card to becom ready without taking up CPU cycles.

This change is conditioned on CONFIG_MMCSD_SDIOWATI_WRCOMPLETE and is currenlty only implemented for the STM32 SDIO driver.

From David Sidrane
 2015-01-08 06:23:42 -06:00
Gregory Nutt
1f10c56dd0 Tiva Timer: Missed one register bit field definition 2015-01-07 12:03:08 -06:00
Gregory Nutt
6a4935f12b TM4C129X Timer: Completes timer register definition header file 2015-01-07 11:43:56 -06:00
Gregory Nutt
a1065a919a TM4C129X Timer: Add some missing addresses and some of the register bit definitions. Still incomplete 2015-01-07 10:07:47 -06:00
Gregory Nutt
7be7ace918 TM4C129X Timer: Update addresses in the timer register definitions file. Still missing bit field definitions 2015-01-07 08:57:48 -06:00
Gregory Nutt
7277d66529 Tiva IRQs: Fix IRQ control logic; was limited to only 64 IRQs. That is a problem for higher numbered IRQs on many platforms 2015-01-06 10:49:47 -06:00
Gregory Nutt
6f8125bf61 Tiva I2C: For TM4C, high speed mode is now configurable (but disabled as EXPERIMENTAL) 2015-01-06 10:48:08 -06:00
Gregory Nutt
207835bd0d Tiva PHY Interrupts: Need to read the PHY interrupt status register in order to clear the pending PHY interrupt 2015-01-05 15:12:45 -06:00
Gregory Nutt
317b7efc7f Tiva: Fixes to support building Tiva TM4C129X I2C driver 2015-01-05 13:15:40 -06:00
Gregory Nutt
b6fbf41925 Tiva: Update I2C register definitions to include support for the TM4C129X 2015-01-05 13:08:07 -06:00
Gregory Nutt
5752f301de Tiva Ethernet: Add support for PHY interrupts 2015-01-03 13:16:26 -06:00
Gregory Nutt
bb76c88f19 Tiva Ethernet: Configure external PHY interrupt pin 2015-01-03 10:59:12 -06:00
Gregory Nutt
84c809afe4 Tiva Ethernet: Removed logic that holds the PHY and re-ordered some reset logic. Can not ping the DK 2015-01-03 09:28:54 -06:00
Gregory Nutt
1f013b220d Tive Ethernet: Wait for EMAC to come out of reset before accessing any registers 2015-01-03 06:52:19 -06:00
Gregory Nutt
24f8fd53ab Tiva serial: Add volatile to fix a wait loop that was not waiting; CR really should preced LF in CR-LF expansion 2015-01-02 14:05:42 -06:00
Gregory Nutt
52aeabb4b2 Cosmetic changes 2015-01-02 13:59:47 -06:00
Gregory Nutt
44cefe90a9 Tiva: Fix typos in conditional compilation 2015-01-02 13:59:30 -06:00
Gregory Nutt
5009feb414 Tiva Ethernet: Add lots of debug output for testing 2015-01-02 13:10:25 -06:00
Gregory Nutt
213eb321db Tiva: If peripheral ready register not available, then lets say the peripheral is ready 2015-01-02 12:58:20 -06:00
Gregory Nutt
51544be0e2 Tiva: Wait for the console UART to be ready before configuring it 2015-01-02 12:57:41 -06:00
Gregory Nutt
6358e7c23c Tiva Ethernet: Fix compile problem when debug enabled 2015-01-02 12:04:22 -06:00
Gregory Nutt
c6e72df007 Tiva GPIO: Fix a compiler error when debug is enabled with TM4C129X 2015-01-02 11:53:02 -06:00
Gregory Nutt
c989f68a6d Tiva Ethernet: MMC interrupts need to be disable initially 2015-01-02 11:40:48 -06:00
Gregory Nutt
9461b88edc Tiva Ethernet: Update DMA BUSMODE settings based on TI example code 2015-01-02 11:10:41 -06:00
Gregory Nutt
339f71a315 Tiva Ethernet: Update PHY initialization 2015-01-02 10:11:57 -06:00
Gregory Nutt
00f414d11b STM32 RTC: Add Kconfig options needed with the preceding commit 2015-01-02 06:45:45 -06:00
Gregory Nutt
5e0571f5a8 stm32-rtc: Add support for the internal low speed clock (LSI) 
Some boards do not have the external 32khz oscillator installed, for those boards we must fallback to the crummy to the crummy internal RC clock.  Turn on by defining CONFIG_RTC_LSICLOCK.

From Kevin Hester <kevinh@geeksville.com> via Lorenz Meier.
 2015-01-02 06:32:40 -06:00
Gregory Nutt
a40c9e1d8f Cosmetic update to some comments 2015-01-02 06:07:56 -06:00
Gregory Nutt
84519f8077 Cosmetic change to file formatting 2015-01-01 15:55:33 -06:00
Gregory Nutt
78d0d911b3 TM4C129X Ethernet: Add logic to get pre-programmed MAC address from user FLASH registers 2015-01-01 12:28:46 -06:00
Gregory Nutt
4d7ed265ce Tiva FLASH: Add FLASH register definitions for the TM4C129 family 2015-01-01 11:44:35 -06:00
Gregory Nutt
f67363e1ff Tiva PHY: Hard code some properties of the internal PHY 2015-01-01 08:11:17 -06:00
Gregory Nutt
aef65efd38 Tiva Ethernet: Update Ethernet intializaiton logic. Still things to be done 2015-01-01 07:55:15 -06:00
Gregory Nutt
9b04fb5318 Tiva: Add peripheral ready header file; fix typos in clock/pwr enable header files 2015-01-01 07:54:31 -06:00
Gregory Nutt
51b220c6d5 Ethernet skeleton: Add some more example logic 2014-12-31 13:45:19 -06:00
Gregory Nutt
4782acb012 Tiva Ethernet: Integrate use of workqueue so the network processing is not done at the interrupt level 2014-12-31 13:03:00 -06:00
Gregory Nutt
f9775de8ca Tiva Ethernet: Add basic clock/power controls for Ethernet and internal PHY 2014-12-31 11:40:01 -06:00
Gregory Nutt
448ab48f8d Tiva Ethernet: First cut at TM4C129X Ethernet driver. Initial commit is basically just the STM32 Ethernet driver with modifications for a clean compilation in the Tiva environment 2014-12-31 11:34:24 -06:00
Gregory Nutt
24ab902dff Tiva Ethernet: Minor naming update for compatibility 2014-12-31 09:39:00 -06:00
Gregory Nutt
84485b2601 Tiva Ethernet: Add DMA descriptor definitions 2014-12-31 07:32:11 -06:00
Gregory Nutt
54142ae9a6 Mostly cosmetic 2014-12-30 17:00:15 -06:00
Gregory Nutt
bec4cc0483 Tiva Ethernet: Completes TM4C129X Ethernet register definition header file 2014-12-30 13:42:19 -06:00
Gregory Nutt
dd31c12ed5 Don't error out if no ethernet definitions available 2014-12-30 13:26:18 -06:00
Gregory Nutt
094eb69ca0 Tiva Ethernet: More progress with register bit definitions 2014-12-30 11:08:18 -06:00
Gregory Nutt
9f0b5fa394 Tiva Ethernet: More progress with register bit definitions 2014-12-30 09:22:24 -06:00
Gregory Nutt
6f113fc8f4 TM4C129G Ethernet: Add Ethernet register addresses. Header files still incomplete 2014-12-30 08:09:09 -06:00
Gregory Nutt
0eaa52df4e Tiva: Add framework to support the uniqueu TM4C Ethernet register definitions 2014-12-30 07:07:16 -06:00
Gregory Nutt
901e717d5e stm32: update description and code documentation. Also fixes a few code formattings. 
Signed-off-by: Marco Krahl <ocram.lhark@gmail.com>
 2014-12-29 09:59:46 -06:00
Gregory Nutt
3e6307d8ec stm32: fix wait upon vertical blank. This should never have occurred before. 
Signed-off-by: Marco Krahl <ocram.lhark@gmail.com>
 2014-12-29 09:48:25 -06:00
Gregory Nutt
c149b1625c stm32: fix faulty access to non existing layer. This disables operation that requires double layer support, when configured for single layer only. 
Signed-off-by: Marco Krahl <ocram.lhark@gmail.com>
 2014-12-29 09:45:30 -06:00
Gregory Nutt
9d2311e4a2 Tiva SSI: Fix oversight in last commit. Would only fixe the case where the single SSI enabled was SSI0 2014-12-28 16:58:36 -06:00
Gregory Nutt
788541aecf Tiva SSI: Fix some recent breakage to the Tiva SSI driver for the case where only one SSI modules is enabled 2014-12-28 16:55:47 -06:00
Gregory Nutt
089578319a STM32 Serial: PX4 HW workarround for flaky STM32 RTS. From David Sidrane 2014-12-27 18:58:18 -06:00
Gregory Nutt
33f7151cd9 Remove STM32-specific RX flow control logic from the upper level serial driver to the lower level STM32 serial driver 2014-12-27 09:45:45 -06:00
Gregory Nutt
aefde565d3 Serial Upper Half: Add watermarks to RX flow control logic 2014-12-27 07:43:06 -06:00
Gregory Nutt
1c39b67e32 STM32: Fix some incorrectly placed conditional logic 2014-12-26 12:41:35 -06:00
Gregory Nutt
85963aa469 EFM32 Timer/PWM: Add support for timer/PWM EFM32GG. From Pierre-noel Bouteville 2014-12-26 09:55:19 -06:00
Gregory Nutt
fc3765b5ae ARMv7M: More runtine stack checking logic. From David Sidrane 2014-12-26 08:46:25 -06:00
Gregory Nutt
a2f0afd222 STM32 I2C: Add strings to decode trace events. From David Sidrane 2014-12-26 08:35:21 -06:00
Gregory Nutt
8f433bb731 Add support for run time stack checking for the STM32. From David Sidrane 2014-12-26 08:30:42 -06:00
Gregory Nutt
7a3e125461 Tiva: Update UART header file for TM4C129X 2014-12-22 14:11:56 -06:00
Gregory Nutt
e503352bbc Tiva: Upate GPIO header file for TM4C129X 2014-12-22 12:59:13 -06:00
Gregory Nutt
cbeb82cb89 TM4C129X: Simplify be removing unnecessary temporary variable 2014-12-22 12:01:33 -06:00
Gregory Nutt
9fb1cccb37 TM4C129X: Simplify be removing unnecessary temporary variable 2014-12-22 11:53:31 -06:00
Gregory Nutt
1bb168abd6 TM4C129X: First cut at new Tiva clock configuration logic 2014-12-22 11:45:10 -06:00
Gregory Nutt
dd89bd2233 TM4C129X: A small step toward understanding new Tiva clocking 2014-12-22 09:30:41 -06:00
Gregory Nutt
c4d0e0a8dd Tiva: Rename TIVA_CRC_BASE to TIVA_CCM_BASE 2014-12-21 17:44:11 -06:00
Gregory Nutt
197cfbf798 Tiva: Add support for I2C6-9 2014-12-21 17:20:16 -06:00
Gregory Nutt
fe12140f94 Tiva SSI and board configurations: hange negative Tiva logic CONFIG_SSIx_DISABLE to positive logic CONFIG_TIVA_SSIx. Add support for SSI2 and SSI3 2014-12-21 15:23:37 -06:00
Gregory Nutt
467521ba33 Improved comments 2014-12-21 14:09:04 -06:00
Gregory Nutt
240b57428f TM4C129X: Increated power/clocking macros into I2C driver 2014-12-21 13:02:12 -06:00
Gregory Nutt
582966260d TM4C129X: Add macros to enable/disable peripheral power 2014-12-21 11:40:39 -06:00
Gregory Nutt
c24c0021b0 Tiva SSI: Use portable macros to enable peripheral clocking 2014-12-21 11:16:21 -06:00
Gregory Nutt
6c937a3bd3 Tiva: More run mode clock enable macros 2014-12-21 11:02:56 -06:00
Gregory Nutt
1289674a54 TM4C129X: Framework for new Tiva clocking logic (details not yet implemented) 2014-12-21 10:14:40 -06:00
Gregory Nutt
70970d06a1 Tiva: Completes first cut at system control header file 2014-12-20 12:05:22 -06:00
Gregory Nutt
fa358ecdb9 Tiva: More TM4C129 system control register definitions 2014-12-20 11:10:10 -06:00
Gregory Nutt
6e3d693c5c Tiva: More TM4C129 system control register definitions 2014-12-20 09:59:21 -06:00
Gregory Nutt
8aa9f27925 Tiva: Add a configuration setting to better distinguish TM4C123 and 129 families. Reanem tm4c_syscontrol.h to tm4c123_syscontrol.h; rename tm4c129x_syscontrol.h to tm4c129_syscontrol.h 2014-12-20 08:38:11 -06:00
Gregory Nutt
e0678813c1 Tiva: Updates to system control regiser definitions 2014-12-20 08:22:17 -06:00
Gregory Nutt
fa5dffbc18 STM32 LTDC: Move ltdc.h from include/nuttx/video to arch/arm/include/stm32; Trivial updates after general review 2014-12-19 14:52:17 -06:00
Gregory Nutt
4e5c2b7976 stm32: Add configuration option for ltdc 
This adds the following ltdc configuration options:
- dither support
- cmap support, is this the right place for CONFIG_FB_CMAP?
- support for extended ltdc interface

Signed-off-by: Marco Krahl <ocram.lhark@gmail.com>
 2014-12-19 13:58:39 -06:00
Gregory Nutt
4ac49f514d stm32: implements ltdc frambuffer and support for ltdc layer operation 
This implements the framebuffer support for the generic nuttx framebuffer
interface, (see nuttx/video/fb.h)

This also implements the interface to perform hardware accelerated layer
operation by the ltdc controller and dma2d controller later (see
nuttx/video/ltdc.h).

The following methods are supported by the ltdc interface:

- getvideoinfo
  Get video information of the layer

- getplaneinfo
  Get plane information of the layer

- getlid
  Handle specific layer identifier. This allows to detect to current layer
  state (e.g. important for layer flipping)

- setclut
  Set the layer color lookup table. Up to 256 color entries supported.

- getclut
  Get the layer color lookup table

- setcolor
  Set the default layer color. In the context of the ltdc layer this means set
  the default color outside the active area or if the layer is disabled.

- getcolor
  Get the default layer color

- setcolorkey
  Set the layer colorkey (chromakey). Colorkey is enabled by blendmode
  LTDC_BLEND_COLORKEY

- getcolorkey
  Get the layer colorkey

- setalpha
  Set the constant alpha value. If blend mode LTDC_BLEND_SRCPIXELALPHA or
  LTDC_BLEND_DESTPIXELALPHA is defined than the blended color is calculated
  by the formel:
    Cdest = Pixelalpha * Constalpha * Csrc.
  Otherwise:
    Cest = Constalpha * Csrc

- getalpha
  get the alpha value

- setblendmode
  Set the layer blendmode.
  Supported blendmodes:
    non blendmode (do not perform blend operation independent on the layers
                   alpha and colorkey)
    alpha          alpha blending (transparency)
    destpixelalpha use pixel alpha value for the top layer (Layer2)
    srcpixelalpha  use pixel alpha value for the subjacent layer (Layer1)
    colorkey       enable colorkey

- getblendmode
  Get the layer blendmode

- setarea
  Set the active layer area, the visible rectangle inside the whole layer.
  This also allows to change the position of the whole layer which is visible in
  the selected area independent on the area position.

- getarea
  Get the active layer area

- update
  Reload the layer shadow register and make changes visible. Also supports
  layer flipping.

Note! Dithering and background color are static parameter and can only changed
at build time.

Implementation details:

The implementation of ltdc interface was inspired by SDL and DirectFB.
All layer settings are shadowed before they become active (except setclut).
They are still inactive until the layer is updated. This is done by the update
method. Should clut only active after an update or not? Clut is used for drawing
while the other settings usually used for blend or blit operations. So i think
this should be the right way.

The implementation of ltdc interface was inspired by SDL and DirectFB.
All layer settings shadowed before they become active (except clut).
They are still inactive until the layer is updated. This is done by the update
call. Should clut only activated after an update or not? Clut is used for draw
operation while the other settings usually used for blend or blit operations.
So i think this should be the right way.

Deviations from the ltdc hardware implementation:

- Shadow register update of both layer (Layer1 or Layer2) is independent as long
  LTDC_UPDATE_SIM is not set. This flag allows to update both layer simultaneous.
  Otherwise only the desired layer is updated.

Layer operation:

Keep in mind, both layer are allways active (of course if both enabled by the
configuration). First the Layer 1 is blended with the background color and the
result is blended with the Layer2. To avoid blend effects, set the Layer2 in non
blend mode. This is equal to blend with alpha = 255. Enable blending of Layer2
with the background color by enable blending of Layer1 and disable the opacity
by setting the alpha value to 0.

Layer flip:

A layer flip usual mean swapping two framebuffer. So the current inactive buffer
can refreshed with data while the active framebuffer is visible. A flip
operation changes the inactive layer to the active one and vice versa.

The ltdc implementation supports layer flip. This can be done by the update call
and the flag LTDC_UPDATE_FLIP. In this case ltdc makes the inactive layer
invisible. In detail, the inactive layer is disabled and the blendmode reset.
Detection of the current layer state (e.g. active or inactive) is supported
by the getlid method combined with one of the LTDC_LAYER_* flags.
Maybe an additional method "flip" for flip operation should be added to the ltdc
interface? But this make no sence from my view if the layer is a non LTDC layer,
e.g. playing with dma2d only.

Supported and tested nuttx pixel formats:

Single Layer without LTDC interface support:
- FB_FMT_RGB8 (cmap support required)
- FB_FMT_RGB16_565
- FB_FMT_RGB24

Single Layer with LTDC interface support:
- FB_FMT_RGB8 (cmap support required)
- FB_FMT_RGB16_565
- FB_FMT_RGB24

Dual Layer with LTDC interface support:
- FB_FMT_RGB8 (cmap support required)
- FB_FMT_RGB16_565
- FB_FMT_RGB24

Why is FB_FMT_ARGB8888 missing?

Changes:
- Remove unused register debug method.

Todo:
- Add support for backlight, currently not neccessary

Did i forgot something? Take a look in the ltdc example or the interface
description (see nuttx/include/video/ltdc.h).

Thanks to Ken for the base layout. ;)

Signed-off-by: Marco Krahl <ocram.lhark@gmail.com>
 2014-12-19 13:48:53 -06:00
Gregory Nutt
10934fb6a2 stm32: Add infrastructure for dma2d support 
Signed-off-by: Marco Krahl <ocram.lhark@gmail.com>
 2014-12-19 13:41:08 -06:00
Gregory Nutt
7edfddfc96 stm32: Add common stm32 layer description. This defines a common layer description for the ltdc and dma2d controller. 
Signed-off-by: Marco Krahl <ocram.lhark@gmail.com>
 2014-12-19 13:37:08 -06:00
Gregory Nutt
24a2f8a0a4 stm32: configure PLLSAI clock to enable ltdc register access 
Signed-off-by: Marco Krahl <ocram.lhark@gmail.com>
 2014-12-19 13:30:58 -06:00
Gregory Nutt
7999e7519c stm32: Add missing clut register definition 
Signed-off-by: Marco Krahl <ocram.lhark@gmail.com>
 2014-12-19 13:28:42 -06:00
Gregory Nutt
3e640a37d2 stm32: rename CFBLR register name to the name used in the reference manual 
Signed-off-by: Marco Krahl <ocram.lhark@gmail.com>
 2014-12-19 13:26:04 -06:00
Gregory Nutt
a34208d698 stm32: rename PLLSAI register name to this one in the reference manual 
Signed-off-by: Marco Krahl <ocram.lhark@gmail.com>
 2014-12-19 13:21:39 -06:00
Gregory Nutt
93bcd3e03e TM4C129X: Add custom system control header file (incomplete) 2014-12-19 12:12:52 -06:00
Gregory Nutt
6cc9716d55 Tiva: Fix configuration logic for IRQ interrupts. The various parts support varying numbers of GPIO blocks and with varying capabilities to support interrupts on the pins of different GPIO blocks 2014-12-18 15:33:52 -06:00
Gregory Nutt
a5fcd71af0 Tiva: Change negative logic CONFIG_TIVA_DISABLE_GPIOx_IRQS to positive logic CONFIG_TIVA_GPIOx_IRQS 2014-12-18 15:19:16 -06:00
Gregory Nutt
ddad16a7b7 Tiva: Add GPIO interrupt support for the TMS4C129X 2014-12-18 11:52:06 -06:00
Gregory Nutt
55a3c57399 DK-TM4C129X: Fixes to get clean build. Logic is still not complete, however 2014-12-18 08:24:24 -06:00
Gregory Nutt
d27fb63862 TM4C129X: Add pin multiplexing 2014-12-17 11:55:45 -06:00
Gregory Nutt
c1851296b2 Tiva TM4C129X: Fix some errors in memory map 2014-12-17 09:42:37 -06:00
Gregory Nutt
2990c913b4 Add memory map for the TM4C129X 2014-12-17 09:40:56 -06:00
Gregory Nutt
3c6616f86a Add interrupt definitions for the TM4C129X 2014-12-17 08:19:23 -06:00
Gregory Nutt
dfed763f4e Tiva: Better distinguish features of the TM4C1294xx and the TM4C129Xxx 2014-12-16 18:02:59 -06:00
Gregory Nutt
09b16e3819 Remove packaging indications for TM4C129 configuration variables 2014-12-16 16:22:52 -06:00
Gregory Nutt
18c61b6e64 Add TM4C129XNCZAD and TM4C1294NCPDT to the Tiva configuration system 2014-12-16 16:02:21 -06:00
Gregory Nutt
ae18f9dacd Unify sensor debug. ADX driver was using input debug; LM75 and QENCODE that their own custom debug. Now all use CONFIG_DEBUG_SENSOR, sndbg() 2014-12-16 09:54:32 -06:00
Gregory Nutt
ae29667564 More changes associated with GPIO interrupt for the KL architecture from Alan Carvalho de Assis 2014-12-13 17:30:25 -06:00
Gregory Nutt
47919eb274 Add GPIO interrupt capability for the KL architecture. The patch is almost the same as kinetis_pinirq.c, just minor modifications and rename kl_pinirq to kl_gpioirq to make it more generic to developers. From Alan Carvalho de Assis 2014-12-13 17:27:06 -06:00
Gregory Nutt
626fa0719a STM32 LTDC: Fix a typo in conditional compilation 2014-12-13 07:45:42 -06:00
Gregory Nutt
002d4c40a4 STM32 OTG HS DEV (in FS mode): Disable ULPI clock enable in RCC AHB1 Register. If Both ULPI and the FS clock enable bits are set in FS mode, then the ARM never awakens froom WFI due to a chip issue. From Ken Pettit 2014-12-13 07:44:13 -06:00
Gregory Nutt
a1e05721d8 Tiva I2C: Don't try to ACK and STOP on the same byte. Improve logic that suppresses STOP on a repeated start 2014-12-12 12:13:31 -06:00
Gregory Nutt
3ac6379bbe Tiva I2C: Legacy mode reset logic ommitted in last commit 2014-12-12 09:31:17 -06:00
Gregory Nutt
c8d1f87571 Tiva I2C: Add logic to reset I2C when busy hangs with busy 2014-12-12 09:26:10 -06:00
Gregory Nutt
fb6661aaa4 STM32 OTGHS Device: Fix for OTGHS core working in FS mode. From Ken Pettit 2014-12-12 07:43:32 -06:00
Gregory Nutt
1c569b85f8 Cosmetic change to force compliance with coding standard 2014-12-12 07:14:16 -06:00
Gregory Nutt
b818691a3a Tiva I2C: Fix how I2C transactions are started and some I2C error reporting 2014-12-11 12:31:42 -06:00
Gregory Nutt
a190aeeeba Tiva I2C: All SDA pins should be open drain, but all SCL pins should be digital output 2014-12-11 12:30:48 -06:00
Gregory Nutt
c7adcf5af2 Tiva I2C: Add register-level debug capability 2014-12-11 09:34:03 -06:00
Gregory Nutt
3958661ae5 Tiva I2C: Minor clean-up to I2C tracing 2014-12-11 08:11:32 -06:00
Gregory Nutt
475d2c3137 Tiva I2C: Fix error in assertion logic 2014-12-11 07:02:14 -06:00
Gregory Nutt
98d9ceb582 Tiva I2C: Add I2C options to Kconfig 2014-12-10 13:56:00 -06:00
Gregory Nutt
bf5179d0ac Tiva I2C: Add workaround for errata; clean up some error handling 2014-12-10 13:01:47 -06:00
Gregory Nutt
58d0e169c7 Tiva I2C: Driver is code complete but untested 2014-12-10 12:43:46 -06:00
Gregory Nutt
03e1ecd6aa Tiva i2C: Lots of compilation fixes 2014-12-10 08:47:34 -06:00
Gregory Nutt
86577c2282 Simplify I2C master/slave addresing to simplify driver development 2014-12-10 08:47:07 -06:00
Gregory Nutt
0daa071f2a Tiva I2C: Finishes initialization logic 2014-12-10 07:31:44 -06:00
Gregory Nutt
c16ab05135 Tiva: Do I2C clock initialization without using legacy registers. Necessary for I2C3-5 2014-12-09 15:28:10 -06:00
Gregory Nutt
20b4417e48 Add a little bit more Tiva I2C initialization logic 2014-12-09 14:48:24 -06:00
Gregory Nutt
b05fefc15a Fix typo in Tiva UART regiser address definition. SourceForge Ticket #37 2014-12-09 12:18:41 -06:00
Gregory Nutt
f5c124e081 Tiva: Add build framework and skeleton files for Tiva I2C driver. Initial commit is just the STM32 I2C driver with name changes and STM32-specific logic removed 2014-12-09 12:18:40 -06:00
Gregory Nutt
928bc5ca84 Update the Tiva I2C register definitions for the TM4C123 and TM4C129 2014-12-09 08:42:12 -06:00
Gregory Nutt
63ba9bdf17 Set the GPIO_SPEED_50MHz on all F2 and F4 SPI pin configurations. This is based on an F411 SPI1 errata but the fixed is generalized to all SPI and all F2 and F4 (let me know if this introduces any other issues). Discovered and fixed by Sebastien Lorquet after much consternation. 2014-12-08 09:51:52 -06:00
Gregory Nutt
1f2447502f SAMA5D3 Xplained: Add support for the Itead Joystick shield 2014-12-03 12:24:23 -06:00
Gregory Nutt
56a5d59a96 STM32: Add MCO configuration for the STM32L1xx. From Jussi Kivilinna 2014-12-02 10:19:37 -06:00
Gregory Nutt
4016ca3495 STM32L15: Fix typo in MCO pin definition. From Jussi Kivilinna 2014-12-02 10:18:02 -06:00
Gregory Nutt
1fa790cf8e Update comments 2014-11-29 15:28:28 -06:00
Gregory Nutt
dc4c66c2f1 STM32 F4 I2C: Port Tridge's I2C noise resiliance logic from the PX4 repository. 2014-11-29 13:37:45 -06:00
Gregory Nutt
997fa4b749 Fix one warning. There are a couple of others that look like real problems 2014-11-28 11:49:24 -06:00
Gregory Nutt
50285b91fe EFM32 Serial: Add support for termios TCGET and TCSET. For the moment, only set/get speed is implemetned. From Pierre-noel Bouteville 2014-11-27 19:14:10 -06:00
Gregory Nutt
2021130e35 Forgot too add file before last commit 2014-11-27 06:14:09 -06:00
Gregory Nutt
a1c8e97c12 Enable support for STM32F102. https://github.com/PX4/NuttX/pull/28.diff 2014-11-27 06:12:35 -06:00
Gregory Nutt
70981eb7d5 Initial support for the LPC4357-EVB provided by Toby Duckworth 2014-11-26 15:18:24 -06:00
Gregory Nutt
2994448d85 More fixes to problems noted by cppcheck. Some are kind of risky; some are real bugs. 2014-11-25 13:15:09 -06:00
Gregory Nutt
ad36e75a40 Fixes for more issues found by cppcheck 2014-11-24 17:00:26 -06:00
Gregory Nutt
7cfd619167 More bugs/warnings found by cppcheck 2014-11-24 13:24:51 -06:00
Gregory Nutt
1d2ec9d2bb Various issues/bugs detected by cppcheck 2014-11-24 12:59:52 -06:00
Gregory Nutt
fc804e29af I2C header file for the Freescale KL family. From Alan Carvalho de Assis. 2014-11-23 16:49:00 -06:00
Gregory Nutt
5d231b25f0 SAMA5D3 Xplained: Add an apps/examples/bridge configuration 2014-11-20 16:24:30 -06:00
Gregory Nutt
cba8179c28 STM32 F4 OTGHS device controller driver from Brennan Ashton 2014-11-20 07:19:04 -06:00
Gregory Nutt
2d51315e66 SAM EMAC: Fix typo in the check for successfull allocation of a timer 2014-11-18 14:20:31 -06:00
Gregory Nutt
2134d0df43 SAMA5D4-EK EMAC1: Correct name of EMAC1 configuration variable 2014-11-18 11:02:22 -06:00
Gregory Nutt
a03b6af57a Cosmetic fixes to comments 2014-11-18 07:19:10 -06:00
Gregory Nutt
a1598152d1 Update ChangeLog 2014-11-17 12:48:01 -06:00
Gregory Nutt
63526fb1ef Rename CONFIG_NET_BUFSIZE to CONFIG_NET_ETH_MTU is all MCU Ethernet drivers 2014-11-16 08:10:06 -06:00
Gregory Nutt
c2c37abf47 EFM32 USART setup: Computation of BAUD includes shift; Eliminate additional shift. From Pierre-noel Bouteville 2014-11-16 07:57:57 -06:00
Gregory Nutt
1055ba464d SAM3/4: Add missing SPI0 clock configuartion macro for the SAM4S 2014-11-16 06:43:08 -06:00
Gregory Nutt
25a9005ce7 Remove use of NET_LL_HDRLEN from Ethernet drivers. Use ETH_HDRLEN instead 2014-11-15 09:05:34 -06:00
Gregory Nutt
388ef8db1a Netwoek: Ada a parameter to netdev_register() to indicate the link protocol supported by the driver. Use this value to replace some logic commited yesterday 2014-11-15 08:22:51 -06:00
Gregory Nutt
66dbce8cf6 Cosmetic updates; updates to README 2014-11-14 09:54:00 -06:00
Gregory Nutt
db12ac1f14 EFM32: Finishes USB naming fixup. Still some missing initialization logic 2014-11-14 08:36:18 -06:00
Gregory Nutt
7358c3c641 EFM32: More USB naming updates. Still not finished 2014-11-14 07:20:13 -06:00
Gregory Nutt
9dc834e723 EFM32: More USB register name corrections. Still incomplete 2014-11-13 12:25:42 -06:00
Gregory Nutt
e6ff1518f6 EFM32: Finishes USB naming changes for device 2014-11-13 10:45:47 -06:00
Gregory Nutt
c3aadcdef5 Correct a typo in the STM32 OTGFS register bit definitions 2014-11-13 10:43:54 -06:00
Gregory Nutt
9160054188 EFM32: Tweaks to get EFM32GG-STK3700 running NSH over LEUART0 2014-11-12 12:50:09 -06:00
Gregory Nutt
984fffee1a EFM32: More USB register name corrections. Still incomplete 2014-11-12 10:43:29 -06:00
Gregory Nutt
9d0eb576c7 EFM32: More USB register name corrections. Still incomplete 2014-11-12 09:46:58 -06:00
Gregory Nutt
ae3485bf88 Remove the definition of INT_FAST32_MIN which is already defined in stdint.h (the correct location). From Lorenz Meier. 2014-11-12 07:47:37 -06:00
Gregory Nutt
c147913e27 Add protection from C++ name mangling in the ARM up_internal.h. From Lorenz Meier. 2014-11-12 07:27:28 -06:00
Gregory Nutt
f9ff3469f6 Fix a typo in an I2C header file. From Jahu Niskanen 2014-11-11 07:12:16 -06:00
Gregory Nutt
54245b1b9c Support for the STM32F103RG. From Murilo Ponte 2014-11-10 07:48:46 -06:00
Gregory Nutt
5073f3e951 EFM32: Reduce writes to the CTRL register 2014-11-09 09:43:43 -06:00
Gregory Nutt
fe7bdb284e EFM32: Fix issues associated with SPI bi order. From Pierre 2014-11-09 08:21:38 -06:00
Gregory Nutt
8e5ae2ee18 EFM32: Fix typo in connecting ODD GPIO interrupt. Noted by Pierre 2014-11-08 06:18:21 -06:00
Gregory Nutt
67f8002de9 EFM32 USB: More naming fixes... still does not compile 2014-11-05 14:22:12 -06:00
Gregory Nutt
4859d610dd EFM32 USB: A few more naming conversions... still a long way to go 2014-11-04 11:48:41 -06:00
Gregory Nutt
54fe538f25 EFM32: Port USB device and host drivers from STM32. Still does not compile 2014-11-04 10:14:04 -06:00
Gregory Nutt
e31947689d EFM32: Add USB build support 2014-11-04 06:47:14 -06:00
Gregory Nutt
e1fcd2b550 STM32GG Starter Kit: Add basic NSH configuration 2014-11-03 16:58:22 -06:00
Gregory Nutt
642bf34e45 Fix typo is SAM4E pinmap file 2014-11-03 11:59:53 -06:00
Gregory Nutt
0ae4ee8df5 EFM32 ROM table header files 2014-11-01 13:27:36 -06:00
Gregory Nutt
a968312262 EFM32: Add LESENSE header file 2014-11-01 12:56:55 -06:00
Gregory Nutt
de7d25efdf EFM32: Add USB header file 2014-11-01 11:57:11 -06:00
Gregory Nutt
e6c2a36bbe Add optional timestamp to syslog output. From pn_bouteville@yahoo.fr 2014-11-01 09:17:34 -06:00
Gregory Nutt
a86d86e866 Remove carriage returns 2014-11-01 08:06:50 -06:00
Gregory Nutt
0c0c059451 ARMv7-M: ETM header file 2014-11-01 08:06:06 -06:00
Gregory Nutt
180a8bf8f6 EFTM32 ITM: Add missing ~ in bit clear operation. From pn_bouteville@yahoo.fr 2014-11-01 06:51:14 -06:00
Gregory Nutt
e5f9501858 EFM32: Add LCD header file 2014-10-31 20:25:37 -06:00
Gregory Nutt
15ba15ad3b EFM32: Add DAC header file 2014-10-31 20:05:47 -06:00
Gregory Nutt
721f59b3be EFM32: Add BURTC header file 2014-10-31 13:05:00 -06:00
Gregory Nutt
141ac52984 EFM32: Add PRS signals 2014-10-31 12:30:01 -06:00
Gregory Nutt
fc7868e4f1 EFM32: Add ADC heder file 2014-10-31 12:22:45 -06:00
Gregory Nutt
fba66228f7 EFM32: Add I2C header file 2014-10-31 12:07:57 -06:00
Gregory Nutt
e97bdf6dc1 EFM32: Add PRS header file 2014-10-31 11:47:40 -06:00
Gregory Nutt
ac16ca1a9c EFM32: Add PCNT header file 2014-10-31 11:34:00 -06:00
Gregory Nutt
ac9889be07 EFM32: Add RMU header file 2014-10-31 11:17:12 -06:00
Gregory Nutt
9b9489c678 EFM32: Add EMU header file 2014-10-31 10:56:15 -06:00
Gregory Nutt
0924a813f7 EFM32: Add VCMP header file 2014-10-31 10:41:28 -06:00
Gregory Nutt
bf6b44a46e EFM32: Add RTC header file 2014-10-31 10:27:52 -06:00
Gregory Nutt
1bdb07fdf8 EFM32: Add AES header file 2014-10-31 10:17:48 -06:00
Gregory Nutt
ae1bb7bd57 EFM32: Add watchdog header file 2014-10-31 10:02:37 -06:00
Gregory Nutt
ad431a2935 EFM32: Add LETIMER header file 2014-10-31 09:54:26 -06:00
Gregory Nutt
496815ec51 EFM32: Add ACMP header file 2014-10-31 09:38:21 -06:00
Gregory Nutt
2b3944da60 EFM32: Add timer header file 2014-10-31 09:27:15 -06:00
Gregory Nutt
ac56c1924a EFM32: Changes picked up from Pierre's repository 2014-10-30 18:01:46 -06:00
Gregory Nutt
f76962257e Costmetic changes -- spacing, comments. 2014-10-30 16:33:40 -06:00
Gregory Nutt
87ee3f2fc7 SAM3/4: Fix error serial TERMIOS ioctl handling 2014-10-30 12:23:15 -06:00
Gregory Nutt
60a853df95 Add support for SAM3/4 basic TERMIOS and flow control. There are issues with IFLOW control: PDC or DMAC support is required 2014-10-29 15:47:15 -06:00
Gregory Nutt
a418aefe13 EFM32: In order to use LEUART, LE clocking must be enabled 2014-10-29 11:20:54 -06:00
Gregory Nutt
b388511137 EFM32: Various fixes for LEUART build 2014-10-29 09:37:39 -06:00
Gregory Nutt
47a8e614e8 EFM32: Minor serial interrupt mask change; Add LEUART0 board support 2014-10-29 08:04:29 -06:00
Gregory Nutt
0679d3109f EFM32: Implement HFPERCLK logic 2014-10-28 19:46:45 -06:00
Gregory Nutt
8a17a264ff Fix a few more EFM32 integration bugs 2014-10-28 19:02:21 -06:00
Gregory Nutt
761059aee2 SAM4: Fix a usbnsh build problem that has crept into all serial drivers 2014-10-28 15:44:47 -06:00
Gregory Nutt
b9814fac99 EFM32: Need to configure UART GPIOs as outputs 2014-10-28 14:50:15 -06:00
Gregory Nutt
ff85d95902 Oops... fix an error in an assertion of last commit 2014-10-28 12:42:19 -06:00
Gregory Nutt
4cc64a7405 EFM32: Add missing shift of register value 2014-10-28 12:36:47 -06:00
Gregory Nutt
9e773f396e EFM32: Fix GPIO configuration logic; Add missing board initializatin logic; Fix LED naming 2014-10-28 10:39:57 -06:00
Gregory Nutt
f2a2e6b645 EFM32G: Fix typo in memory map header file 2014-10-28 09:26:06 -06:00
Gregory Nutt
e01ceb3df8 SAM4E: Fix error TC header file 2014-10-28 09:22:37 -06:00
Gregory Nutt
947c896c45 EFM32: Correct a typo in LFXO bit in clock configuration 2014-10-28 08:59:27 -06:00
Gregory Nutt
1c8bf0c395 EFM32: Update a configuration; Compile fix for when DEBUG is enabled 2014-10-28 07:24:04 -06:00
Gregory Nutt
facf7e916e STM32 Serial: Don't compile up_earlyserialinit() if USE_EARLYSERIALINIT is not define. Otherwise, a macro definition clobbers the function definition 2014-10-28 06:58:37 -06:00
Gregory Nutt
6c9f325e1e Move selection for CONFIG_SERIAL_TERMIOS out of MCU Kconfigs to common drivers/serial/Kconfig. Add CONFIG_ARCH_HAVE_SERIAL_TERMIOS to indicate if an MCU supports TERMIOS 2014-10-27 11:31:16 -06:00
Gregory Nutt
586a363391 Cosmetic... removed checks for non-existent configuration setting 2014-10-27 09:05:52 -06:00
Gregory Nutt
03663a7ac4 Cosmetic changes 2014-10-27 07:57:12 -06:00
Gregory Nutt
80efa803b9 EFM32 SPI: setfrequency() needs to return actual frequency; simplify nbits usages by removing conditional logic 2014-10-27 07:07:30 -06:00
Gregory Nutt
a7b9bf776e EFM32 SPI: Add check to make sure that the SPI RX buffer is empty before starting a transfer 2014-10-26 13:13:53 -06:00
Gregory Nutt
7569b596be EFM32 SPI: Change some logic that I fear could cause RX data overrun 2014-10-26 12:53:26 -06:00
Gregory Nutt
a022fd68e5 EFM32: Cosmetic changes to comments and format 2014-10-26 12:48:47 -06:00
Gregory Nutt
eeccd16a54 Cosmetic update to spacing and comments 2014-10-26 11:25:47 -06:00
Gregory Nutt
c392115fbd EFM32: Integrate SPI DMA capability 2014-10-26 11:22:16 -06:00
Gregory Nutt
741f98fe0a EFM32: Integrate Pierre's SPI driver 2014-10-26 09:27:55 -06:00
Gregory Nutt
0eb45e78f3 Remove unnecessary header file inclusion 2014-10-26 06:09:20 -06:00
Gregory Nutt
562b719f26 EFM32: dma_config_t needs to be only 16-bits for now 2014-10-25 17:53:29 -06:00
Gregory Nutt
d4f35ba41c EFM32 DMA: Cosmetic changes to debug instrumentatin and comments 2014-10-25 17:43:56 -06:00
Gregory Nutt
0a7924ba26 EFM32: Fix misconception in DMA control descriptor alignment 2014-10-25 17:21:58 -06:00
Gregory Nutt
b156685475 EFM32: More fixes to DMA descriptor table logic 2014-10-25 17:15:16 -06:00
Gregory Nutt
678dce33f6 Add debug assertion 2014-10-25 15:29:23 -06:00
Gregory Nutt
de08cc54fd EFM32: Correct handling of DMA descriptors; Add initialization of DMA CTRLBASE 2014-10-25 14:55:02 -06:00
Gregory Nutt
116129adf8 EFM32: Completes very basic DMA support. Needs review. Untested 2014-10-25 11:31:13 -06:00
Gregory Nutt
1502ba31b3 Dangle whitespace removal 2014-10-25 10:35:29 -06:00
Gregory Nutt
b9cf875752 EFM32: A little more DMA logic. Still incomplete 2014-10-25 10:34:07 -06:00
Gregory Nutt
f79e803e89 Add some logic to EFM32 DMA module. Still incomplete 2014-10-25 08:09:19 -06:00
Gregory Nutt
6c044cbf9b Add framework for EFM32 DMA support -- no logic in place yet 2014-10-24 17:59:13 -06:00
Gregory Nutt
889e80fe7a Fix some typos that I just introduced... Sometimes I can't do anything right 2014-10-24 17:58:33 -06:00
Gregory Nutt
7792b78072 Update EFM32 DMA header file for Gecko support 2014-10-24 16:58:38 -06:00
Gregory Nutt
9573023529 SAM4E-EK: Add support for PHY insterrupt 2014-10-24 12:28:57 -06:00
Gregory Nutt
6d4f448c31 Another fix to SAM3/4 GPIO IRQ issue 2014-10-24 10:55:52 -06:00
Gregory Nutt
69966a1b62 SAM3/4: Fix conditional compilation in GPIO IRQ logic 2014-10-24 10:44:43 -06:00
Gregory Nutt
b7a35c1e65 SAM4E: Fix options to select GPIO interrupts in Kconfig 2014-10-24 09:29:01 -06:00
Gregory Nutt
7c9b830d8d Add EFM32 DMA header file 2014-10-24 07:57:16 -06:00
Gregory Nutt
72d11583e3 Another typo in EMF32 GPIO logic 2014-10-23 19:19:58 -06:00
Gregory Nutt
bf565dc94b Fix compiler errors in up_itm_syslog.c. From Pierre-Noel Bouteville 2014-10-23 18:30:32 -06:00
Gregory Nutt
87a45f7f2f Fix file naming: arm_item_syslog.c changed to up_itm_syslog.c. From Pierre-Noel Bouteville 2014-10-23 18:25:05 -06:00
Gregory Nutt
9b13710e39 EFM32 port and pin decoding backward in every case. From Pierre-Noel Bouteville 2014-10-23 18:16:57 -06:00
Gregory Nutt
ddb16e08ec Oops last changes still in editor 2014-10-23 10:13:32 -06:00
Gregory Nutt
20476ade5e EFM32: Add configuration option to use USARTs as SPI 2014-10-23 08:54:26 -06:00
Gregory Nutt
85834ac1f1 EFM32: Add configuration option to use USARTs as SPI 2014-10-23 08:25:37 -06:00
Gregory Nutt
2cd7340e87 Update to the LPC43xx RIT/Tickless code. From Brandon Warhurst 2014-10-23 07:14:37 -06:00
Gregory Nutt
b5fc30f1e8 Add support for tickless operation using the NXP LPC43xx 2014-10-23 06:54:24 -06:00
Gregory Nutt
9df5ba14f2 EFM32: Add logic to initialize and use ITM system 2014-10-22 09:05:22 -06:00
Gregory Nutt
d1472cbf2a Remove whitespace and and carriage returns 2014-10-22 09:04:40 -06:00
Gregory Nutt
bfc12bf3a7 ARMv7: Add support to use ITM for SYSLOG debug output 2014-10-22 09:03:00 -06:00
Gregory Nutt
d98d1e9d21 Eliminate a warning 2014-10-22 07:56:48 -06:00
Gregory Nutt
0196b77961 EFM32: Add IDLE power management hooks. Nothing implemented; just define the hooks 2014-10-22 07:26:31 -06:00
Gregory Nutt
9ef8abc5ec Add ARMv7-M DWT and TPI register definitions 2014-10-21 16:46:26 -06:00
Gregory Nutt
d094fd1c19 Add CMSIS ITM header file and library 2014-10-21 16:16:00 -06:00
Gregory Nutt
d930f2cdbc EFM32: Add buton interrupt handling for the Olimex board 2014-10-21 13:51:30 -06:00
Gregory Nutt
37e08c3b49 The olimex-efm32g880f128-stk now defaults to use LEUART1 as the serial console. Also fixes lots of compile bugs from the original LEUART checkin 2014-10-21 11:38:51 -06:00
Gregory Nutt
d273686d42 EFM32: Add LFA and LFB clock support 2014-10-21 10:45:33 -06:00
Gregory Nutt
d13c9a08b9 EFM32: Add configuration support for LEUARTs 2014-10-21 09:37:02 -06:00
Gregory Nutt
d9abc779fe EFM32: Add a LEUART-based serial driver (untestee) 2014-10-21 09:21:03 -06:00
Gregory Nutt
2be00bbde2 EFM32: Add basic, low-level support for the low energy UARTs 2014-10-21 08:48:38 -06:00
Gregory Nutt
73874782db EFM32: Addred LEUART register definition header file 2014-10-21 08:11:03 -06:00
Gregory Nutt
6737c28066 Add ADC pinmap definitions for the STM32 F103R from Lederhilger Martin 2014-10-21 06:48:16 -06:00
Gregory Nutt
0e9955a37c Fixe to allow compile of lpc43_gpioint.c. It likely doesn't work. From Brandon warhurst_002 2014-10-21 06:36:27 -06:00
Gregory Nutt
5c20da2a34 stm32: rename spi frame format definition 
This renames the stm32 spi frame format definition to the short description
name as well as the other cr2 register flags.

Note! STM32_SPI3_FRF was never used by nuttx somewhere

Signed-off-by: Marco Krahl <ocram.lhark@gmail.com>
 2014-10-20 15:12:59 -06:00
Gregory Nutt
f566c5ed53 EFM32: Another update to USART oversampling calculation. Clip to positive; update comments 2014-10-20 13:54:43 -06:00
Gregory Nutt
f754a51d15 Fix some naming 2014-10-20 12:29:28 -06:00
Gregory Nutt
09f6908aa1 EFM32 USART: Fix oversampling selection; Should be biased toward higher oversampling rates 2014-10-20 10:54:13 -06:00
Gregory Nutt
ba21728389 Finsh USART configuration logic 2014-10-20 08:12:08 -06:00
Gregory Nutt
735268d266 Add GPIO interrupt logic 2014-10-20 08:12:08 -06:00
Gregory Nutt
574840778f Trivial, cosmetic typos in comments 2014-10-20 08:12:07 -06:00
Gregory Nutt
b9a8456582 Add EFM32 serial driver 2014-10-19 18:55:44 -06:00
Gregory Nutt
5fa6188c55 Add some UART configuration logic (still incomplete) 2014-10-19 16:42:15 -06:00
Gregory Nutt
302e16223e Fleshes out GPIO configuration logic 2014-10-19 13:47:52 -06:00
Gregory Nutt
8125da0424 Add GPIO header file + a little bit of GPIO configuration logig 2014-10-19 13:07:52 -06:00
Gregory Nutt
6839ac9c60 Basic clock configuration logic 2014-10-19 11:08:56 -06:00
Gregory Nutt
95a544c166 Add MSC header file 2014-10-19 09:59:40 -06:00
Gregory Nutt
600726d661 Fix conditional logic in CMU header file 2014-10-19 06:46:35 -06:00
Gregory Nutt
c82488f1a0 Add frame for EFM32 GPIO logic (empty functions) 2014-10-18 18:40:08 -06:00
Gregory Nutt
7075a83ed7 Fix some incorrect conditional logic 2014-10-18 16:16:57 -06:00
Gregory Nutt
4355396d81 Add skeleton lowputc() file for EFM32 2014-10-18 16:16:48 -06:00
Gregory Nutt
534194aa68 Add skeleton lowputc() file for EFM32 2014-10-18 16:16:22 -06:00
Gregory Nutt
377c06c0ff Add EFM32 configuration header file 2014-10-18 16:15:53 -06:00
Gregory Nutt
7f83a5c6fd efm32_vectors.S is not really a HEAD object 2014-10-18 15:32:56 -06:00
Gregory Nutt
31db5d324b Add EFM32 SysTick timer support 2014-10-18 15:27:36 -06:00
Gregory Nutt
1f1c0c91b9 Add empty file for event EFM32 clock configuration logic 2014-10-18 15:22:11 -06:00
Gregory Nutt
2c2a3bee5a More framework for GPIO interrupt support 2014-10-18 14:05:07 -06:00
Gregory Nutt
c15f07dba3 Use UART0 for the serial console 2014-10-18 12:47:45 -06:00
Gregory Nutt
9dfa4ec117 Add EFM32 UART/USART header file 2014-10-18 11:13:03 -06:00
Gregory Nutt
f07970eba0 Oops committed the wrong version 2014-10-18 09:46:35 -06:00
Gregory Nutt
aae510ac5b Add EFM32 CMU header file 2014-10-18 09:26:56 -06:00
Gregory Nutt
452b1f3c3a Add EFM32 Memory Maps 2014-10-17 16:43:52 -06:00
Gregory Nutt
848ca3e9cc Add GPIO header file and EFM32 Gecko Starter Kit LED support 2014-10-17 14:17:44 -06:00
Gregory Nutt
c51fcc5323 More EFM32 files 2014-10-17 12:31:44 -06:00
Gregory Nutt
598ebd29a2 More EFM32 files and logic 2014-10-17 12:02:32 -06:00
Gregory Nutt
fd8a610e4d Add EFM32 interrupt vector defintions 2014-10-17 10:34:39 -06:00
Gregory Nutt
be389f411b Add configuration support for the EFM32 Gecko Starter Kit 2014-10-17 09:25:52 -06:00
Gregory Nutt
30e827d7d8 Enable selection of SPI2 for STM32L15XX in Kconfig. From Jussi Kivilinna 2014-10-16 07:03:23 -06:00
Gregory Nutt
66f3b0f85f Minor update to last Kconfig change 2014-10-15 12:33:37 -06:00
Gregory Nutt
d1f17269f4 Add Kconfig selections for STM32-F4x1RE SPI peripheral 2014-10-15 12:22:04 -06:00
Gregory Nutt
128b032a16 Fix file mode on modified files 2014-10-14 15:45:56 -06:00
Gregory Nutt
5a306e16fe Support for the STM32 F411RE from Serg Podtynnyi 2014-10-14 15:42:28 -06:00
Gregory Nutt
5134d0fea7 Cosmetic changes to comments 2014-10-10 16:54:47 -06:00
Gregory Nutt
d55d30b202 Fix a few typos 2014-10-10 11:41:40 -06:00
Gregory Nutt
afa548a1bc Fix watchdog stop bit usage. From Lazlo 2014-10-10 11:36:50 -06:00
Gregory Nutt
a1322602b3 Fix a typo in the lpc43 makefile, lpc43_usb0dev not lpc31_usb0dev 2014-10-09 17:59:42 -06:00
Gregory Nutt
0f07dfb6e5 Correct STM32 RTC EXTI bit definition. From Lazlo 2014-10-09 06:25:07 -06:00
Gregory Nutt
176491ce75 Misc changes to get a clean build after all of the syslog changes. There are probably other things still broken 2014-10-08 16:23:48 -06:00
Gregory Nutt
7b310711a1 Update everything under nuttx/arch to use the corrected syslog interfaces 2014-10-08 12:48:47 -06:00
Gregory Nutt
792e40f513 Simplification of conditional compilation suggested by pn_bouteville 2014-10-07 15:44:54 -06:00
Gregory Nutt
868fa211bc Remove non-functional vestiges of OTGHS in FS mode (including OTGFS2); try to convert the stm32f429i-disco configuration to use OTGHS instead of OTFHS in FS mode (OTGFS2). But I don't have the boards and can't test 2014-10-07 15:25:31 -06:00
Gregory Nutt
c448888810 Integrates OTGHS support into the STM32; Eliminates the older OTGHS in FS mode logic. From Brennan Ashton 2014-10-07 15:05:30 -06:00
Gregory Nutt
170e5c6134 Add files that implement true high speed support for the STM32 OTGHS peripheral. From Brennan Ashton 2014-10-07 15:01:42 -06:00
Gregory Nutt
87eb1d47ed Fix some recently introduced typos, build problems, and warnings 2014-10-05 16:58:52 -06:00
Gregory Nutt
e4deeada85 More vfork(): If we get to vfork() via system call, then we need to clone some system call information so that the return form the cloned system call works correctly 2014-09-29 10:59:15 -06:00
Gregory Nutt
1dc9768c1a Fix vfork(). Now that arguments are kept on the stack, the way that arguments are passed from parent to child in vfork() must change. This bug has always been present, but was not visible with the old strdup() way of passing arguments 2014-09-29 10:45:44 -06:00
Gregory Nutt
468097b3b9 This completes the implementation of shared memory support 2014-09-24 09:27:17 -06:00
Gregory Nutt
31329acede STM32 CAN correction suggested by Max Holtzberg 2014-09-24 08:23:05 -06:00
Gregory Nutt
dcdfd99a08 Build support for platform-specific shared memory logic. Not logic yet in place 2014-09-24 07:39:06 -06:00
Gregory Nutt
f6f7587c47 Build support for platform-specific shared memory logic. Not logic yet in place 2014-09-24 07:38:11 -06:00
Gregory Nutt
b33c2d9cef Move include/nuttx/mm.h to include/nuttx/mm/mm.h 2014-09-24 07:29:09 -06:00
Gregory Nutt
b542d1733f Cosmetic 2014-09-23 16:03:52 -06:00
Gregory Nutt
46b58dbb28 Extend virtual/physical address conversions to include addresses in shared memory. 2014-09-23 16:03:08 -06:00
Gregory Nutt
e326fcfef3 Fix some inconsistent field name in struct task_group_s: addrenv should be tg_addrenv. 2014-09-23 16:01:44 -06:00
Gregory Nutt
edbaed19f9 Add logic necessary to handler remapping of shared memory on contex switches 2014-09-23 13:19:30 -06:00
Gregory Nutt
5e285b8bc4 More NxWM build fixes 2014-09-20 16:47:00 -06:00
Gregory Nutt
ffb60d064b More naming changes to get the stm3240g-eval/nxterm configuration building again 2014-09-20 15:53:28 -06:00
Gregory Nutt
942aaf6c31 SAMA5D4-EK/nsh: WM8904 support enabled; README updated 2014-09-18 14:29:20 -06:00
Gregory Nutt
d7ae119684 Ooops... a file that I forgot to add yesterday 2014-09-17 09:52:07 -06:00
Gregory Nutt
b37c0a832a Fixes to avoid some hang conditions using STM32 CAN 2014-09-17 08:35:03 -06:00
Gregory Nutt
82381dbdc6 Only SAM4 family has RTTDIS bit in the MR register. SourceForge bug #33 from Fabien Comte 2014-09-17 07:42:12 -06:00
Gregory Nutt
311a88e819 Add a sharable version of arm_virtpgaddr() 2014-09-16 16:49:44 -06:00
Gregory Nutt
925fc9ad81 First round of changes to get the ELF configuration building again 2014-09-16 15:37:05 -06:00
Gregory Nutt
2defa2d45c These files were deleted and moved to a different location (see previos commit) 2014-09-16 13:36:51 -06:00
Gregory Nutt
af2efda031 remove tailing blank line 2014-09-16 13:36:14 -06:00
Gregory Nutt
d4d1534b5a Move common/up_signal_dispatch.c to armv6-m, armv7-m, and armv7-a. The armv7-a version needs to be different to handle the case where we are dispatch kernel mode signals when running under a user mode group 2014-09-16 13:35:29 -06:00
Gregory Nutt
058229b626 Correct stack handling is signal deliver to user processes 2014-09-16 13:33:13 -06:00
Gregory Nutt
0bedf06b49 Move some share-able logic from sama5/sam_pgalloc.c to armv7-a/arm_physpgaddr.c 2014-09-16 13:31:48 -06:00
Gregory Nutt
9a49f05087 Move some share-able logic from sama5/sam_pgalloc.c to armv7-a/arm_physpgaddr.c 2014-09-16 13:31:24 -06:00
Gregory Nutt
b627c70492 Move some share-able logic from sama5/sam_pgalloc.c to armv7-a/arm_physpgaddr.c 2014-09-16 13:29:43 -06:00
Gregory Nutt
731de13347 Partial fix to an cache cleaning problem 2014-09-15 16:04:42 -06:00
Gregory Nutt
ff97fa2114 Fix an error in a debug statement 2014-09-15 15:15:57 -06:00
Gregory Nutt
2711592e52 Eliminate a bug introduced in last checking 2014-09-15 15:10:50 -06:00
Gregory Nutt
8c3528183b ARMv7-A: Improvements to assertion output for kernel mode 2014-09-15 15:03:55 -06:00
Gregory Nutt
5e4c77245f If we are configured to use a kernel stack while in SYSCALL handling, then we need to switch back to the user stack to deliver a signal 2014-09-15 11:38:48 -06:00
Gregory Nutt
7ac0a7a4ec Fix a typo in system call when fetching parameter from the stack: regs[REG_PC]+4 is the address, not regs[REG_PC+4] 2014-09-15 10:55:10 -06:00
Gregory Nutt
3649dab9bd Initial integration of kernel stack (does not work) 2014-09-14 11:19:34 -06:00
Gregory Nutt
de4956a2cd Add the initial implementation of the process kernel stack logic. Not yet integrated into the main OS logic nor tested. 2014-09-14 09:53:54 -06:00
Gregory Nutt
b255883b0a Rename everything associated with the dynamic process stack to ustack to make room in the name space for a kstack 2014-09-14 09:10:09 -06:00
Gregory Nutt
6e48516a31 Add logic need to manage a virtualized stack. Not yet incorporated into base OS logic. 2014-09-13 13:45:35 -06:00
Gregory Nutt
f965ca1fed Move static helper routines from arm_addrenv.c and may them global so that they can be shared both forthcoming stack address environment logic. 2014-09-13 13:17:44 -06:00
Gregory Nutt
ed9fced470 Add a configuration option for dynamic stack management 2014-09-13 12:25:32 -06:00
Gregory Nutt
e411e8aa3f Comsetic updates to comments, debug output 2014-09-12 10:31:58 -06:00
Gregory Nutt
f8170550e1 ARMv7-A: Modify up_fullcontextrestore() for CONFIG_BUILD_KERNEL. It changed CPSR while in kernel. That will crash is the new CPSR is user mode while executing in kernel space. Fixed by adding a SYS_context_restore system call. There is an alternative, simpler modification to up_fullcontextrestore() that could have been done: It might have been possible to use the SPSR instead of the CPRSR and then do an exception return from up_fullcontextrestore(). That would be more efficient, but I never tried it. 2014-09-12 08:04:27 -06:00
Gregory Nutt
814ac67f62 Fix logic for returning from exceptions to user-mode contexts 2014-09-11 18:43:30 -06:00
Gregory Nutt
bb7b5f3490 All tasks, even user mode tasks, must start in supervisor mode until they get past the start-up trampoline 2014-09-11 18:42:52 -06:00
Gregory Nutt
67838239c4 Update some comments/function headers 2014-09-11 17:15:26 -06:00
Gregory Nutt
8f2e9bcfdf Tighten up some ARM assembly language. You can always do better 2014-09-11 15:12:08 -06:00
Gregory Nutt
57d78ddd93 ARMv7-A: Exception register save/restore needs to work a little differently if we support user mode processes 2014-09-11 14:34:10 -06:00
Gregory Nutt
17e798993d Trivial kernel build related fixes for consistency 2014-09-11 12:35:23 -06:00
Gregory Nutt
0fc55d042f Misc fixes to repair some of the breakage to the SAMA5D4-EK elf configuration caused by changes for the knsh configuration 2014-09-11 10:31:12 -06:00
Gregory Nutt
8d9df11ca2 Fix for UART7 and UART8 on STM32 clock enable from Aton 2014-09-11 10:27:40 -06:00
Gregory Nutt
205c23b9d6 Add logic to initialize the per-process user heap when each user process is started 2014-09-10 15:55:36 -06:00
Gregory Nutt
9a5640b542 SAMA5D4-EK: These configurations now use the fixed DRAM mapping for manipulating the page memory pool. 2014-09-10 08:44:09 -06:00
Gregory Nutt
df4682fd1f Add configuration to use the fixed DRAM mapping for the page pool (if available) instead of remapping dynamically to access L2 page tables and page data. Also, add logic in address environment creation to initialize the shared data at the beginning of the .bss/.data process memory region. 2014-09-10 08:41:01 -06:00
Gregory Nutt
1f2adbd4c3 pcDuino: Several fixes so that it still builds after other Cortex-A changes. 2014-09-10 06:24:39 -06:00
Gregory Nutt
c458e72b70 ELF relocations. Some relocation types do not have a named symbol associated with them. The design did not account for that case 2014-09-09 16:52:51 -06:00
Gregory Nutt
e57d2e5460 SAM3X/Arduino Due: Fix typo in sam3x_periphclks.h; add SCLK definitions to board.h header file. From Fabien Comte 2014-09-08 06:14:59 -06:00
Gregory Nutt
99f191c4a2 SAMA5D4-EK: In kernel build with address environment, need logic to map user virtual addresses to physical addresses, and vice versa 2014-09-07 19:25:30 -06:00
Gregory Nutt
a8c9c6723e Fix loop counter... was overrunning a table on larger ELF files 2014-09-07 14:42:04 -06:00
Gregory Nutt
089a49d869 Correct size comparison (pages vs. sections) 2014-09-07 13:47:01 -06:00
Gregory Nutt
56dc80cf59 The 'make export' target needs to bundle up the user C startup file (crt0), not the kernel head object 2014-09-04 13:31:34 -06:00
Gregory Nutt
47d55c28dc Mostly cosmetic changes 2014-09-04 10:28:38 -06:00
Gregory Nutt
b05f29dbfe I love/hate conditional compilation 2014-09-03 11:43:23 -06:00
Gregory Nutt
1a4f8914c5 Add support for delivery of use-mode signals in the kernel build. 2014-09-02 15:58:14 -06:00
Gregory Nutt
b4438e44c5 Restructuring of build to allow use of use-space allocators by kernel logic in the kernel build. 2014-09-02 11:22:09 -06:00
Gregory Nutt
b085e084f4 Space at the beginning of the process data space is now reserved for user heap management structures. In the kernel build mode, these heap structures are shared between the kernel and use code in order to allocate user-specific data. 2014-09-02 11:21:23 -06:00
Gregory Nutt
a5af2568eb sbrk() need to initialized the memory manager on the first call 2014-09-02 08:05:11 -06:00
Gregory Nutt
64ab35b399 There used to be two ways to pass parameters to new tasks, depending upon the configuration: Either (1) argv[] as created as an array with each string strdup'ed. Or (1) argv[] array and strings were created on the stack before the new task was started. Now, there is only one way, way (1). Way (2) might be slightly more compact, but this is not worth carry the complexity of two different ways of doing the same thing. 2014-09-01 15:39:34 -06:00
Gregory Nutt
45c31d633c Completes the implementation of sbrk() (untested) 2014-09-01 10:46:51 -06:00
Gregory Nutt
a33c0533f4 ARMv7 address environment: Static functions not marked static 2014-09-01 08:49:08 -06:00
Gregory Nutt
edf5b0bccc Fix common heap allocation logic, taking into account the kernel build requirements 2014-09-01 07:57:54 -06:00
Gregory Nutt
205260d5e2 Reanem kzalloc to kmm_zalloc for consistency 2014-08-31 17:34:44 -06:00
Gregory Nutt
1780810d3d Rename kmalloc to kmm_malloc for consistency 2014-08-31 17:26:36 -06:00
Gregory Nutt
54fa3b0b59 Rename kfree to kmm_free for consistency with other naming conventions 2014-08-31 17:04:02 -06:00
Gregory Nutt
9aca0c1c84 Rename kumalloc to kumm_malloc and kuzalloc to kumm_zalloc for consistency with other naming 2014-08-31 16:24:24 -06:00
Gregory Nutt
9ad7dae4c1 Rename kufree to kumm_free for consistency with other naming 2014-08-31 16:15:11 -06:00
Gregory Nutt
5a488475a8 Rename kmemalign to kmm_memalign for consitency with other naming 2014-08-31 14:57:31 -06:00
Gregory Nutt
2904fb0420 Clean up some kernel build heap allocation issues. The Cortex-A kernel build now compiles without errors (but cannot link until brk() and sbrk() are implemented). 2014-08-31 12:50:05 -06:00
Gregory Nutt
3c1a70c9dc Remove CONFIG_MM_MULTIHEAP. Non-multiheap operation is no longer supported 2014-08-31 10:54:55 -06:00
Gregory Nutt
67a54fd52e ARMv7-A: A little more logic and a few more fixes for Cortex-A kernel build 2014-08-31 07:15:46 -06:00
Gregory Nutt
0f5dc2fc65 Various changes/fixes to get configs/stm32f4discovery/kostest working after the big configuration renaming (and after a long period of bit rot) 2014-08-29 16:23:46 -06:00
Gregory Nutt
faf16f229c Some initial clean-up in verifying the CONFIG_BUILD_PROTECTED configuration change 2014-08-29 15:07:35 -06:00
Gregory Nutt
e3ff0689bb Rename CONFIG_NUTTX_KERNEL to CONFIG_BUILD_PROTECTED; Partially integrate new CONFIG_BUILD_KERNEL 2014-08-29 14:47:22 -06:00
Gregory Nutt
de3d353a8e Fix hard coded values in dispatch_sysall inline assembly. Back out/corect part of last change; that was going the wrong direction. 2014-08-29 10:10:47 -06:00
Gregory Nutt
cb5bec2e34 Fix a cloned typo 2014-08-29 10:09:07 -06:00
Gregory Nutt
c499297899 Fix ARM7/9 and Cortex-A SYSCALLs: For threads in SVC mode, the SVC instructions clobbers R14. This must be taken account in the inline assembly 2014-08-29 10:07:11 -06:00
Gregory Nutt
63fd1e12dd Various fixes to the ARMv7-A system call logic 2014-08-29 08:24:00 -06:00
Gregory Nutt
3ffc8871de Rename arch/arm/src/armv7-a/syscall.h to svcall.h to work around some include path name collisions; fix some compilation errors in SYSCALL logic when debug is enabled 2014-08-29 07:48:16 -06:00
Gregory Nutt
043c384e38 ARMv7-A: Add SYSCALL handling logic 2014-08-28 14:52:14 -06:00
Gregory Nutt
b4a20f0928 Add an ARMv7-A system call definition header file 2014-08-28 13:21:36 -06:00
Gregory Nutt
7a81bce7b1 The system call library can now be built with CONFIG_NUTTX_KERNEL. New select: CONFIG_LIB_SYSCALL 2014-08-28 12:09:49 -06:00
Gregory Nutt
0c7f07e344 Cortex-A address environments: Fix issue with page privileges 2014-08-28 11:00:41 -06:00
Gregory Nutt
709654673b Remove a warning 2014-08-28 10:04:41 -06:00
Gregory Nutt
7ba9ddee7f STM32 FLASH fixes: use size_t instead of uint16_t, make interface more generic. From Freddie Chopin 2014-08-28 09:11:20 -06:00
Gregory Nutt
45f3328247 Fix an error introduced into ALL implmentations of interrupt dispatch logic 2014-08-28 08:41:57 -06:00
Gregory Nutt
dfdaeb31ac Add address environment support to ALL implementatins of up_release_pending() 2014-08-28 08:10:19 -06:00
Gregory Nutt
9598412386 Add address environment support to ALL implementatins of up_reprioritize_rtr() 2014-08-28 07:54:07 -06:00
Gregory Nutt
f6967b99bd ARM: Move address environment switch from the task switchers to the interrupt handler. That may save doing the actin multiple times per interrupt 2014-08-28 06:49:05 -06:00
Gregory Nutt
27bf67c2d0 ARM: Move address environment switch from the task switchers to the interrupt handler. That may save doing the actin multiple times per interrupt 2014-08-28 06:34:09 -06:00
Gregory Nutt
9bc9d2d86d Add ADDRENV support to ALL implmentations of _exit() 2014-08-27 16:31:02 -06:00
Gregory Nutt
4d24c48901 Add ADDRENV support to ALL implementations of up_unblock_task() 2014-08-27 16:15:46 -06:00
Gregory Nutt
57c066b7a3 Add ADDRENV support to all implementations of up_block_task() 2014-08-27 15:36:52 -06:00
Gregory Nutt
d35723749b Minor address environment clean-up. Cannot generate debug contexts in certain contexts 2014-08-27 14:22:00 -06:00
Gregory Nutt
c3a498264e CC3200 Launchpad updates 2014-08-26 16:31:47 -06:00
Gregory Nutt
2c40815569 Support the the TC3200 from Jim Ewing 2014-08-26 15:13:57 -06:00
Gregory Nutt
0db7da1858 Add up_addrenv_coherent which will be called before address environment switches 2014-08-26 14:53:19 -06:00
Gregory Nutt
519e9c85e9 up_coherent_dcache should do nothing the the length is zero 2014-08-26 14:51:53 -06:00
Gregory Nutt
b13d9b4161 Rename up_addrenv_assign() to up_addrenv_clone() and generalize its arguments so that can be used for other purposes 2014-08-26 12:16:05 -06:00
Gregory Nutt
a14cb94b45 Mostly cosmetic use of uintptr_t to hold addresses instead of uint32_t 2014-08-26 10:44:10 -06:00
Gregory Nutt
3a44227caa Fix confusion about what is a page of data and what is a page of L2 page table; restructure functions to reduce duplicated logic 2014-08-26 10:41:43 -06:00
Gregory Nutt
dbeba82e85 Add lots of debug output 2014-08-26 07:54:43 -06:00
Gregory Nutt
66a5328a68 Cortex-A address environment: Fix some section mapping and address increments 2014-08-26 06:33:26 -06:00
Gregory Nutt
e87804cc8c ARMv7-A: Use of write back might be unpredictable 2014-08-25 16:34:22 -06:00
Gregory Nutt
00f5e8f70e Bugfixes.. still integrating SAMA5 ELF with address environment 2014-08-25 15:27:58 -06:00
Gregory Nutt
17cc5caa98 SAMA5 ELF configuration with address environments finally builds without errors 2014-08-25 13:59:02 -06:00
Gregory Nutt
1725946447 Misc changed to get the SAMA5 ELF configuration with address environments working 2014-08-25 13:28:13 -06:00
Gregory Nutt
e1799b0423 Cortex-A/SAMA5 address environment support is code complete (untested) 2014-08-25 11:18:32 -06:00
Gregory Nutt
e0a48b60b6 Change naming of ELF interfaces from arch_ to up_ for consistency 2014-08-25 06:47:14 -06:00
Gregory Nutt
7aea220ebf After cached related fix, the ELF example is now functional 2014-08-24 14:12:45 -06:00
Gregory Nutt
10b621ac10 Modify ADDRENV Kconfigs. Z180 does not need all of the virtual address settings that the ARM does 2014-08-24 12:54:37 -06:00
Gregory Nutt
241a7e17bd addrenv interface changes: up_addrenv_create() may need to create .text and .bss/.data separately because of differing access privileges (read/execute vs read/write). And, as a consequence, up_addrenv_vaddr() needs to be split into up_addrenv_vtext(0 and up_addrenv_vdata(). 2014-08-24 11:54:14 -06:00
Gregory Nutt
2cb9d5c7b0 Add addrenv.h; First cut at Cortex-A address environment structures; Add configuration options to setup address enviornment 2014-08-24 09:57:53 -06:00
Gregory Nutt
1624e2fbcf Change CONFIG_ADDRENV to CONFIG_ARCH_ADDRENV; change how it is selected -- the architecure must first declare support 2014-08-24 06:42:11 -06:00
Gregory Nutt
03830250e7 ARMv7-A: Add skeleton environment and build support for process address environments 2014-08-23 18:59:24 -06:00
Gregory Nutt
081f88b4b9 STM32 serial: MAke uart_devs[] const. From Freddie Chopin 2014-08-22 16:20:52 -06:00
Gregory Nutt
4af3e1cfa1 Recent STM32 UART change: Wasn't that logic backward? Shouldn't that have been disable the USART if (1) we don't have than many USARTs OR (2) we don't have that particular USART -- not AND. 2014-08-22 16:16:23 -06:00
Gregory Nutt
150fcfb5b8 STM32 F401: Only 3 USARTS, but need to set STM32_NUSARTS to six because they are not numbered sequentially 2014-08-22 09:02:58 -06:00
Gregory Nutt
de3dd8e96b STM32 F401: Correct support for USART6 on this chip. From Freddie Chopin 2014-08-22 06:49:16 -06:00
Gregory Nutt
ad9b3f8ab8 wdog.h does not contain any application interface, only internal OS interface. Further, it is non-standard. Move wdog.h from include/ to include/nuttx. For the same reason, move the description of the watchdog timer interfaces from the Users Guide to the Porting Guide. 2014-08-21 11:16:55 -06:00
Gregory Nutt
3b07378b38 NSH link management now works! The last fix was to the Ethernet drivers: They cannot disable clocking to the Ethernet blok on ifdown. Otherwise, we cannot communicate with the PHY 2014-08-17 17:54:46 -06:00
Gregory Nutt
004788d7c0 Change the way PHY interrupts work: disable automatically. Then we have to re-subscribe each time after the interrupt fires 2014-08-17 16:51:56 -06:00
Gregory Nutt
e04ab2bcfc In order to get PHY interrupts, they must be enabled at the PHY (still don't get PHY interrupts) 2014-08-17 13:03:18 -06:00
Gregory Nutt
5ba42680ac For all SAM Ethernet, need to enable management interface before reading PHY regisers in IOCTL 2014-08-17 11:09:54 -06:00
Gregory Nutt
ab78e8a0c5 SAM3/4 Ethernet: Clone ioctl support from the SAMA5 2014-08-17 06:54:37 -06:00
Gregory Nutt
d87013a665 Use the device name assigned by the registration process, not our best guess 2014-08-16 15:14:39 -06:00
Gregory Nutt
057af36c1d More of the PHY event notification logic change: Fix some compile errors when full feature is enabled; Add some missing ioctol logic 2014-08-16 15:04:09 -06:00
Gregory Nutt
68e55c454c Implement all network ioctls, including the new ioctl to setup PHY event notifications. 2014-08-16 14:09:14 -06:00
Gregory Nutt
f33510a394 Modified to support the change to the network ioctl signature changes. Also add support for new ioctl to setup PHY event notifications. 2014-08-16 14:08:58 -06:00
Gregory Nutt
c9ba1d4091 Fix conditional compilation error 2014-08-12 10:00:58 -06:00
Gregory Nutt
7025465109 Adds support for localtime. From Max Neklyudov 2014-08-12 06:18:22 -06:00
Gregory Nutt
56196ecea1 Fix a computation error in the fix for the last computational error 2014-08-11 12:07:49 -06:00
Gregory Nutt
51da249d0e Correct time conversion, 1000000 not 1000 to convert seconds to microseconds. 2014-08-11 11:14:10 -06:00
Gregory Nutt
f2058fa271 Comment out reassessment of timer in the middle of context switches. Need to revisit 2014-08-11 07:05:47 -06:00
Gregory Nutt
cd53f96f11 SAMA5 Tickless: Corrects some logic errors with timer/counter frequency 2014-08-10 19:04:18 -06:00
Gregory Nutt
8855c1369b Cosmetic 2014-08-10 16:09:45 -06:00
Gregory Nutt
c7a51f4ef1 Cosmetic changed, updated README files, improved comments 2014-08-10 13:11:31 -06:00
Gregory Nutt
71e18367f6 Don't try to return time remaining if the timespec pointer is NULL 2014-08-10 11:39:16 -06:00
Gregory Nutt
a5514be85c Move TC debug options to one file 2014-08-10 11:38:44 -06:00
Gregory Nutt
219c1a68d3 Update comments 2014-08-10 11:38:08 -06:00
Gregory Nutt
320707fdfa SAMA5: Fix bugs in timer/counter interrupts and one-shot timer 2014-08-10 10:47:38 -06:00
Gregory Nutt
6324df44e8 SAMA5 Timer/counter repair: Missing sem_post() caused a hang 2014-08-09 18:34:52 -06:00
Gregory Nutt
d1d1d76189 SAMA5: Use the one-shot and free-running timers to implement tickless OS support for SAMA5 2014-08-09 17:14:51 -06:00
Gregory Nutt
569d5d7218 SAMA5 free-running timer: Add support for a free-running timer wrapper around the low-level timer/counter logic. 2014-08-09 16:43:48 -06:00
Gregory Nutt
acb05460d0 SAMA5 oneshot: Some clean-up and correction to the initial implementation 2014-08-09 16:42:04 -06:00
Gregory Nutt
d8aa6c01bd SAMA5 timer/counter: Add support for a one-shot timer wrapper around the low-level timer/counter logic. This also involved several changes that rippled into the ADC driver (untested). 2014-08-09 15:27:55 -06:00
Gregory Nutt
5803fb78b8 SAMA5 T/C: Can now handle non-constant BOARD_MCK_FREQUENCY. Also now supports methods to attach user interrupt handlers 2014-08-09 10:30:45 -06:00
Gregory Nutt
e1769b22f1 Remove os_internal.h it has been replace by several new header files under sched/. There have been some sneak inclusion paths via os_internal.h, so expect a few compilation errors for some architectures 2014-08-08 18:39:28 -06:00
Gregory Nutt
d798dd37a7 Replace os_internal.h with sched/sched.h in files that actually reference something in sched.h 2014-08-08 17:53:55 -06:00
Gregory Nutt
23a334c066 Move task control files from sched/ to sched/task 2014-08-08 16:44:08 -06:00
Gregory Nutt
d4b56eb3cc Move clock functions from sched/ to sched/clock 2014-08-08 14:43:02 -06:00
Gregory Nutt
85e8117062 Move interrupt dispatch logic from sched/ to sched/irq 2014-08-08 14:31:15 -06:00
Gregory Nutt
c9661ad5a7 Change all time conversions. Yech. New timer units in microseconds breaks all existing logic that used milliseconds in the conversions. Something likely got broken doing this, probably because I confused a MSEC2TICK conversion with a TICK2MSEC conversion. Also, the tickless OS no appears fully functional and passes the OS test on the simulator with no errors 2014-08-07 18:00:38 -06:00
Gregory Nutt
736d3c169a Rename up_timerinit() to up_timer_initailize(); Add prototypes for candidate interfaces for the tickless OS; Don't build existing timer initialization logic if CONFIG_SCHED_TICKLESS is defined. 2014-08-06 16:26:01 -06:00
Gregory Nutt
7b9c44101d SAMA5D3 HSMCI: TX DMA is again disabled 2014-08-05 07:07:39 -06:00
Gregory Nutt
159bcc255d SAMA5 PCK: Add Main clock as an option for the PCK clock source 2014-08-03 10:17:50 -06:00
Gregory Nutt
c75bf6d741 SAMA5 SSC: Verify that the requested bit width is supported. Correct some alignment tests that depend upon the data bit width. 2014-08-02 14:26:49 -06:00
Gregory Nutt
83dab03576 SAMA5 WM8904: Fix errors in programmable clock output configuration 2014-08-01 15:18:58 -06:00
Gregory Nutt
805a02965c SAMA5 SSC: Start Delay is now configurable 2014-08-01 14:10:37 -06:00
Gregory Nutt
50bd2ba46c SAMA5 SSC: Frame Synch Delay is now configurable 2014-08-01 12:25:31 -06:00
Gregory Nutt
0b4090df0d SAMA5D SSC: Needs to account for data offset in audio buffer. 2014-07-31 19:14:24 -06:00
Gregory Nutt
c657139b30 SAMA5D3X-EK: Add support for the WM8904 audio CODEC 2014-07-31 11:14:57 -06:00
Gregory Nutt
24af676c05 SAMA5: Changes needed for a clean SAMA5D3 build after all of the recent SAMA5D4 changes. 2014-07-31 11:09:56 -06:00
Gregory Nutt
276cc44878 SAMA5 HSMCI: e-enable TX DMA and verify that DMA writes to the SD card are functional. They are so now TX DMA is re-enabled in the driver. This might affect the SAMA5D3 platforms where the TX DMA problem was found. The SAMA4D3 and 4 use the same HSMCI driver. Much has change since then and it is not surprising that DMA is now functional. However, the has not be re-verified on the SAMA5D3 which has a different DMA controller. 2014-07-30 11:20:06 -06:00
Gregory Nutt
4df0fbec04 SAMA5D HSMCI: Fix a problem on card insertion/removal callback handling. Interrupts were being disable so that the callbacks occurred with interrupts disabled. This resulted in loss of some interrupts and some not-so-good behaviors. The solution is to perform all callbacks on the work thread unconditionally (2014-7-29). 2014-07-30 10:19:41 -06:00
Gregory Nutt
70be3bae16 SAMA5D HSMCI: Add method to do RX transfer without DMA. The 8-byte SCR transfer was failing silently with the DMA transfer, leaving the SD card in single bit mode 2014-07-29 21:13:28 -06:00
Gregory Nutt
53930d5531 SAMA5D-EK: Correct system timer frequency. Input clock is MCK/2, not MCK 2014-07-29 07:12:36 -06:00
Gregory Nutt
1b6eec572d Cosmetic changes to comments 2014-07-29 07:11:16 -06:00
Gregory Nutt
8c2b458d75 Fixes to last SAMA5 PMIC checkin 2014-07-28 17:09:37 -06:00
Gregory Nutt
d450993f2e LPC17xx: DC updates from Max. Also fixes some syntax errors that I introduced in the last commit. 2014-07-28 07:23:49 -06:00
Gregory Nutt
100bba42be ARM: Move L2 cache initialization to much later in the sequence 2014-07-27 10:03:33 -06:00
Gregory Nutt
c523abdc62 ARMv7-A L2 Cache currently depends on EXPERIMENTAL because it does not yet work properly 2014-07-26 18:48:54 -06:00
Gregory Nutt
4446d6e98d ARMv7 L2 Cache: Minor bugfixes/improvements 2014-07-26 18:48:26 -06:00
Gregory Nutt
0519118de2 Enables cache early in boot-up sequence 2014-07-26 18:48:00 -06:00
Gregory Nutt
d09ee81320 Change naming from cp_XYZ_cache() to arch_XYP_cache() so that all cache operations will pick up L2 support if it is enabled 2014-07-26 18:47:33 -06:00
Gregory Nutt
0d83d198de New cache.h file. Renames cp15_XYZ_cache() to arch_XYZ_cache() and addes L2 cache support if L2 cache is enabled 2014-07-26 18:46:52 -06:00
Gregory Nutt
ca3776a7ec Rename ARMv7-A cache.h to cp15_cache.h. Things will be broken on this commit until I get the new cache.h in place. 2014-07-26 16:54:19 -06:00
Gregory Nutt
ec70cfe44c arch/arm/src/armv7-a/arm_l2cc_pl310.c, l2cc.h, l2cc_pl310.h, Kconfig: Add initiali support for the ARM L2CC-PL310 L2 cache. 2014-07-26 16:50:08 -06:00
Gregory Nutt
be198337f7 ARMv7-A: L2CC PL310 address filtering is an optional feature 2014-07-25 19:46:09 -06:00
Gregory Nutt
ef5bfd72a6 ARMv7-A: Add missing L2CC PL310 bit definitions 2014-07-25 19:41:35 -06:00
Gregory Nutt
597c9839cc rch/arm/armv7-a/l2cc_pl310.h: Move arch/arm/sama5/chip/sam_l2cc.h to arch/arm/armv7-a/l2cc_pl310.h. Adjust the two corresponding Kconfig files as well. 2014-07-25 17:25:17 -06:00